1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2017 exceet electronics GmbH
4 *
5 * Authors:
6 * Frieder Schrempf <frieder.schrempf@exceet.de>
7 * Boris Brezillon <boris.brezillon@bootlin.com>
8 */
9
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/mtd/spinand.h>
13
14 #define SPINAND_MFR_WINBOND 0xEF
15
16 #define WINBOND_CFG_BUF_READ BIT(3)
17
18 #define W25N04KV_STATUS_ECC_5_8_BITFLIPS (3 << 4)
19
20 static SPINAND_OP_VARIANTS(read_cache_variants,
21 SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
22 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
23 SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
24 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
25 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
26 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
27
28 static SPINAND_OP_VARIANTS(write_cache_variants,
29 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
30 SPINAND_PROG_LOAD(true, 0, NULL, 0));
31
32 static SPINAND_OP_VARIANTS(update_cache_variants,
33 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
34 SPINAND_PROG_LOAD(false, 0, NULL, 0));
35
w25m02gv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)36 static int w25m02gv_ooblayout_ecc(struct mtd_info *mtd, int section,
37 struct mtd_oob_region *region)
38 {
39 if (section > 3)
40 return -ERANGE;
41
42 region->offset = (16 * section) + 8;
43 region->length = 8;
44
45 return 0;
46 }
47
w25m02gv_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)48 static int w25m02gv_ooblayout_free(struct mtd_info *mtd, int section,
49 struct mtd_oob_region *region)
50 {
51 if (section > 3)
52 return -ERANGE;
53
54 region->offset = (16 * section) + 2;
55 region->length = 6;
56
57 return 0;
58 }
59
60 static const struct mtd_ooblayout_ops w25m02gv_ooblayout = {
61 .ecc = w25m02gv_ooblayout_ecc,
62 .free = w25m02gv_ooblayout_free,
63 };
64
w25m02gv_select_target(struct spinand_device * spinand,unsigned int target)65 static int w25m02gv_select_target(struct spinand_device *spinand,
66 unsigned int target)
67 {
68 struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0xc2, 1),
69 SPI_MEM_OP_NO_ADDR,
70 SPI_MEM_OP_NO_DUMMY,
71 SPI_MEM_OP_DATA_OUT(1,
72 spinand->scratchbuf,
73 1));
74
75 *spinand->scratchbuf = target;
76 return spi_mem_exec_op(spinand->spimem, &op);
77 }
78
w25n01kv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)79 static int w25n01kv_ooblayout_ecc(struct mtd_info *mtd, int section,
80 struct mtd_oob_region *region)
81 {
82 if (section > 3)
83 return -ERANGE;
84
85 region->offset = 64 + (8 * section);
86 region->length = 7;
87
88 return 0;
89 }
90
w25n02kv_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)91 static int w25n02kv_ooblayout_ecc(struct mtd_info *mtd, int section,
92 struct mtd_oob_region *region)
93 {
94 if (section > 3)
95 return -ERANGE;
96
97 region->offset = 64 + (16 * section);
98 region->length = 13;
99
100 return 0;
101 }
102
w25n02kv_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)103 static int w25n02kv_ooblayout_free(struct mtd_info *mtd, int section,
104 struct mtd_oob_region *region)
105 {
106 if (section > 3)
107 return -ERANGE;
108
109 region->offset = (16 * section) + 2;
110 region->length = 14;
111
112 return 0;
113 }
114
115 static const struct mtd_ooblayout_ops w25n01kv_ooblayout = {
116 .ecc = w25n01kv_ooblayout_ecc,
117 .free = w25n02kv_ooblayout_free,
118 };
119
120 static const struct mtd_ooblayout_ops w25n02kv_ooblayout = {
121 .ecc = w25n02kv_ooblayout_ecc,
122 .free = w25n02kv_ooblayout_free,
123 };
124
w25n02kv_ecc_get_status(struct spinand_device * spinand,u8 status)125 static int w25n02kv_ecc_get_status(struct spinand_device *spinand,
126 u8 status)
127 {
128 struct nand_device *nand = spinand_to_nand(spinand);
129 u8 mbf = 0;
130 struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
131
132 switch (status & STATUS_ECC_MASK) {
133 case STATUS_ECC_NO_BITFLIPS:
134 return 0;
135
136 case STATUS_ECC_UNCOR_ERROR:
137 return -EBADMSG;
138
139 case STATUS_ECC_HAS_BITFLIPS:
140 case W25N04KV_STATUS_ECC_5_8_BITFLIPS:
141 /*
142 * Let's try to retrieve the real maximum number of bitflips
143 * in order to avoid forcing the wear-leveling layer to move
144 * data around if it's not necessary.
145 */
146 if (spi_mem_exec_op(spinand->spimem, &op))
147 return nanddev_get_ecc_conf(nand)->strength;
148
149 mbf = *(spinand->scratchbuf) >> 4;
150
151 if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
152 return nanddev_get_ecc_conf(nand)->strength;
153
154 return mbf;
155
156 default:
157 break;
158 }
159
160 return -EINVAL;
161 }
162
163 static const struct spinand_info winbond_spinand_table[] = {
164 /* 512M-bit densities */
165 SPINAND_INFO("W25N512GW", /* 1.8V */
166 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x20),
167 NAND_MEMORG(1, 2048, 64, 64, 512, 10, 1, 1, 1),
168 NAND_ECCREQ(1, 512),
169 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
170 &write_cache_variants,
171 &update_cache_variants),
172 0,
173 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
174 /* 1G-bit densities */
175 SPINAND_INFO("W25N01GV", /* 3.3V */
176 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x21),
177 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
178 NAND_ECCREQ(1, 512),
179 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
180 &write_cache_variants,
181 &update_cache_variants),
182 0,
183 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
184 SPINAND_INFO("W25N01GW", /* 1.8V */
185 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x21),
186 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
187 NAND_ECCREQ(1, 512),
188 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
189 &write_cache_variants,
190 &update_cache_variants),
191 0,
192 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
193 SPINAND_INFO("W25N01JW", /* high-speed 1.8V */
194 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbc, 0x21),
195 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
196 NAND_ECCREQ(1, 512),
197 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
198 &write_cache_variants,
199 &update_cache_variants),
200 0,
201 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
202 SPINAND_INFO("W25N01KV", /* 3.3V */
203 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
204 NAND_MEMORG(1, 2048, 96, 64, 1024, 20, 1, 1, 1),
205 NAND_ECCREQ(4, 512),
206 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
207 &write_cache_variants,
208 &update_cache_variants),
209 0,
210 SPINAND_ECCINFO(&w25n01kv_ooblayout, w25n02kv_ecc_get_status)),
211 /* 2G-bit densities */
212 SPINAND_INFO("W25M02GV", /* 2x1G-bit 3.3V */
213 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xab, 0x21),
214 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 2),
215 NAND_ECCREQ(1, 512),
216 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
217 &write_cache_variants,
218 &update_cache_variants),
219 0,
220 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
221 SPINAND_SELECT_TARGET(w25m02gv_select_target)),
222 SPINAND_INFO("W25N02JW", /* high-speed 1.8V */
223 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbf, 0x22),
224 NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 2, 1),
225 NAND_ECCREQ(1, 512),
226 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
227 &write_cache_variants,
228 &update_cache_variants),
229 0,
230 SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
231 SPINAND_INFO("W25N02KV", /* 3.3V */
232 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
233 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
234 NAND_ECCREQ(8, 512),
235 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
236 &write_cache_variants,
237 &update_cache_variants),
238 0,
239 SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
240 SPINAND_INFO("W25N02KW", /* 1.8V */
241 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x22),
242 NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
243 NAND_ECCREQ(8, 512),
244 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
245 &write_cache_variants,
246 &update_cache_variants),
247 0,
248 SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
249 /* 4G-bit densities */
250 SPINAND_INFO("W25N04KV", /* 3.3V */
251 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x23),
252 NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 2, 1, 1),
253 NAND_ECCREQ(8, 512),
254 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
255 &write_cache_variants,
256 &update_cache_variants),
257 0,
258 SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
259 SPINAND_INFO("W25N04KW", /* 1.8V */
260 SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xba, 0x23),
261 NAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1),
262 NAND_ECCREQ(8, 512),
263 SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
264 &write_cache_variants,
265 &update_cache_variants),
266 0,
267 SPINAND_ECCINFO(&w25n02kv_ooblayout, w25n02kv_ecc_get_status)),
268 };
269
winbond_spinand_init(struct spinand_device * spinand)270 static int winbond_spinand_init(struct spinand_device *spinand)
271 {
272 struct nand_device *nand = spinand_to_nand(spinand);
273 unsigned int i;
274
275 /*
276 * Make sure all dies are in buffer read mode and not continuous read
277 * mode.
278 */
279 for (i = 0; i < nand->memorg.ntargets; i++) {
280 spinand_select_target(spinand, i);
281 spinand_upd_cfg(spinand, WINBOND_CFG_BUF_READ,
282 WINBOND_CFG_BUF_READ);
283 }
284
285 return 0;
286 }
287
288 static const struct spinand_manufacturer_ops winbond_spinand_manuf_ops = {
289 .init = winbond_spinand_init,
290 };
291
292 const struct spinand_manufacturer winbond_spinand_manufacturer = {
293 .id = SPINAND_MFR_WINBOND,
294 .name = "Winbond",
295 .chips = winbond_spinand_table,
296 .nchips = ARRAY_SIZE(winbond_spinand_table),
297 .ops = &winbond_spinand_manuf_ops,
298 };
299