1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 ARM Ltd. 4 */ 5 #ifndef __CLKSOURCE_ARM_ARCH_TIMER_H 6 #define __CLKSOURCE_ARM_ARCH_TIMER_H 7 8 #include <linux/bitops.h> 9 #include <linux/timecounter.h> 10 #include <linux/types.h> 11 12 #define ARCH_TIMER_TYPE_CP15 BIT(0) 13 #define ARCH_TIMER_TYPE_MEM BIT(1) 14 15 #define ARCH_TIMER_CTRL_ENABLE (1 << 0) 16 #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) 17 #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) 18 19 #define CNTHCTL_EL1PCTEN (1 << 0) 20 #define CNTHCTL_EL1PCEN (1 << 1) 21 #define CNTHCTL_EVNTEN (1 << 2) 22 #define CNTHCTL_EVNTDIR (1 << 3) 23 #define CNTHCTL_EVNTI (0xF << 4) 24 #define CNTHCTL_ECV (1 << 12) 25 #define CNTHCTL_EL1TVT (1 << 13) 26 #define CNTHCTL_EL1TVCT (1 << 14) 27 #define CNTHCTL_EL1NVPCT (1 << 15) 28 #define CNTHCTL_EL1NVVCT (1 << 16) 29 #define CNTHCTL_CNTVMASK (1 << 18) 30 #define CNTHCTL_CNTPMASK (1 << 19) 31 32 enum arch_timer_reg { 33 ARCH_TIMER_REG_CTRL, 34 ARCH_TIMER_REG_CVAL, 35 }; 36 37 enum arch_timer_ppi_nr { 38 ARCH_TIMER_PHYS_SECURE_PPI, 39 ARCH_TIMER_PHYS_NONSECURE_PPI, 40 ARCH_TIMER_VIRT_PPI, 41 ARCH_TIMER_HYP_PPI, 42 ARCH_TIMER_HYP_VIRT_PPI, 43 ARCH_TIMER_MAX_TIMER_PPI 44 }; 45 46 enum arch_timer_spi_nr { 47 ARCH_TIMER_PHYS_SPI, 48 ARCH_TIMER_VIRT_SPI, 49 ARCH_TIMER_MAX_TIMER_SPI 50 }; 51 52 #define ARCH_TIMER_PHYS_ACCESS 0 53 #define ARCH_TIMER_VIRT_ACCESS 1 54 #define ARCH_TIMER_MEM_PHYS_ACCESS 2 55 #define ARCH_TIMER_MEM_VIRT_ACCESS 3 56 57 #define ARCH_TIMER_MEM_MAX_FRAMES 8 58 59 #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ 60 #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ 61 #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) 62 #define ARCH_TIMER_EVT_TRIGGER_SHIFT (4) 63 #define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT) 64 #define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */ 65 #define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */ 66 #define ARCH_TIMER_EVT_INTERVAL_SCALE (1 << 17) /* EVNTIS in the ARMv8 ARM */ 67 68 #define ARCH_TIMER_EVT_STREAM_PERIOD_US 100 69 #define ARCH_TIMER_EVT_STREAM_FREQ \ 70 (USEC_PER_SEC / ARCH_TIMER_EVT_STREAM_PERIOD_US) 71 72 struct arch_timer_kvm_info { 73 struct timecounter timecounter; 74 int virtual_irq; 75 int physical_irq; 76 }; 77 78 struct arch_timer_mem_frame { 79 bool valid; 80 phys_addr_t cntbase; 81 size_t size; 82 int phys_irq; 83 int virt_irq; 84 }; 85 86 struct arch_timer_mem { 87 phys_addr_t cntctlbase; 88 size_t size; 89 struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES]; 90 }; 91 92 #ifdef CONFIG_ARM_ARCH_TIMER 93 94 extern u32 arch_timer_get_rate(void); 95 extern u64 (*arch_timer_read_counter)(void); 96 extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void); 97 extern bool arch_timer_evtstrm_available(void); 98 99 #else 100 101 static inline u32 arch_timer_get_rate(void) 102 { 103 return 0; 104 } 105 106 static inline u64 arch_timer_read_counter(void) 107 { 108 return 0; 109 } 110 111 static inline bool arch_timer_evtstrm_available(void) 112 { 113 return false; 114 } 115 116 #endif 117 118 #endif 119