xref: /linux/drivers/crypto/marvell/octeontx2/otx2_cptpf.h (revision 06d07429858317ded2db7986113a9e0129cd599b)
1 /* SPDX-License-Identifier: GPL-2.0-only
2  * Copyright (C) 2020 Marvell.
3  */
4 
5 #ifndef __OTX2_CPTPF_H
6 #define __OTX2_CPTPF_H
7 
8 #include "otx2_cpt_common.h"
9 #include "otx2_cptpf_ucode.h"
10 #include "otx2_cptlf.h"
11 
12 struct otx2_cptpf_dev;
13 struct otx2_cptvf_info {
14 	struct otx2_cptpf_dev *cptpf;	/* PF pointer this VF belongs to */
15 	struct work_struct vfpf_mbox_work;
16 	struct pci_dev *vf_dev;
17 	int vf_id;
18 	int intr_idx;
19 };
20 
21 struct cptpf_flr_work {
22 	struct work_struct work;
23 	struct otx2_cptpf_dev *pf;
24 };
25 
26 struct otx2_cptpf_dev {
27 	void __iomem *reg_base;		/* CPT PF registers start address */
28 	void __iomem *afpf_mbox_base;	/* PF-AF mbox start address */
29 	void __iomem *vfpf_mbox_base;   /* VF-PF mbox start address */
30 	struct pci_dev *pdev;		/* PCI device handle */
31 	struct otx2_cptvf_info vf[OTX2_CPT_MAX_VFS_NUM];
32 	struct otx2_cpt_eng_grps eng_grps;/* Engine groups information */
33 	struct otx2_cptlfs_info lfs;      /* CPT LFs attached to this PF */
34 	struct otx2_cptlfs_info cpt1_lfs; /* CPT1 LFs attached to this PF */
35 	/* HW capabilities for each engine type */
36 	union otx2_cpt_eng_caps eng_caps[OTX2_CPT_MAX_ENG_TYPES];
37 	bool is_eng_caps_discovered;
38 
39 	/* AF <=> PF mbox */
40 	struct otx2_mbox	afpf_mbox;
41 	struct work_struct	afpf_mbox_work;
42 	struct workqueue_struct *afpf_mbox_wq;
43 
44 	struct otx2_mbox	afpf_mbox_up;
45 	struct work_struct	afpf_mbox_up_work;
46 
47 	/* VF <=> PF mbox */
48 	struct otx2_mbox	vfpf_mbox;
49 	struct workqueue_struct *vfpf_mbox_wq;
50 
51 	struct workqueue_struct	*flr_wq;
52 	struct cptpf_flr_work   *flr_work;
53 	struct mutex            lock;   /* serialize mailbox access */
54 
55 	unsigned long cap_flag;
56 	u8 pf_id;               /* RVU PF number */
57 	u8 max_vfs;		/* Maximum number of VFs supported by CPT */
58 	u8 enabled_vfs;		/* Number of enabled VFs */
59 	u8 sso_pf_func_ovrd;	/* SSO PF_FUNC override bit */
60 	u8 kvf_limits;		/* Kernel crypto limits */
61 	bool has_cpt1;
62 	u8 rsrc_req_blkaddr;
63 
64 	/* Devlink */
65 	struct devlink *dl;
66 };
67 
68 irqreturn_t otx2_cptpf_afpf_mbox_intr(int irq, void *arg);
69 void otx2_cptpf_afpf_mbox_handler(struct work_struct *work);
70 void otx2_cptpf_afpf_mbox_up_handler(struct work_struct *work);
71 irqreturn_t otx2_cptpf_vfpf_mbox_intr(int irq, void *arg);
72 void otx2_cptpf_vfpf_mbox_handler(struct work_struct *work);
73 
74 int otx2_inline_cptlf_setup(struct otx2_cptpf_dev *cptpf,
75 			    struct otx2_cptlfs_info *lfs, u8 egrp, int num_lfs);
76 void otx2_inline_cptlf_cleanup(struct otx2_cptlfs_info *lfs);
77 
78 #endif /* __OTX2_CPTPF_H */
79