1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
4 * Author: Alex Williamson <alex.williamson@redhat.com>
5 *
6 * Derived from original vfio:
7 * Copyright 2010 Cisco Systems, Inc. All rights reserved.
8 * Author: Tom Lyon, pugs@cisco.com
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/aperture.h>
14 #include <linux/device.h>
15 #include <linux/eventfd.h>
16 #include <linux/file.h>
17 #include <linux/interrupt.h>
18 #include <linux/iommu.h>
19 #include <linux/module.h>
20 #include <linux/mutex.h>
21 #include <linux/notifier.h>
22 #include <linux/pci.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/slab.h>
25 #include <linux/types.h>
26 #include <linux/uaccess.h>
27 #include <linux/vgaarb.h>
28 #include <linux/nospec.h>
29 #include <linux/sched/mm.h>
30 #include <linux/iommufd.h>
31 #include <linux/pci-p2pdma.h>
32 #if IS_ENABLED(CONFIG_EEH)
33 #include <asm/eeh.h>
34 #endif
35
36 #include "vfio_pci_priv.h"
37
38 #define DRIVER_AUTHOR "Alex Williamson <alex.williamson@redhat.com>"
39 #define DRIVER_DESC "core driver for VFIO based PCI devices"
40
41 static bool nointxmask;
42 static bool disable_vga;
43 static bool disable_idle_d3;
44
vfio_pci_eventfd_rcu_free(struct rcu_head * rcu)45 static void vfio_pci_eventfd_rcu_free(struct rcu_head *rcu)
46 {
47 struct vfio_pci_eventfd *eventfd =
48 container_of(rcu, struct vfio_pci_eventfd, rcu);
49
50 eventfd_ctx_put(eventfd->ctx);
51 kfree(eventfd);
52 }
53
vfio_pci_eventfd_replace_locked(struct vfio_pci_core_device * vdev,struct vfio_pci_eventfd __rcu ** peventfd,struct eventfd_ctx * ctx)54 int vfio_pci_eventfd_replace_locked(struct vfio_pci_core_device *vdev,
55 struct vfio_pci_eventfd __rcu **peventfd,
56 struct eventfd_ctx *ctx)
57 {
58 struct vfio_pci_eventfd *new = NULL;
59 struct vfio_pci_eventfd *old;
60
61 lockdep_assert_held(&vdev->igate);
62
63 if (ctx) {
64 new = kzalloc(sizeof(*new), GFP_KERNEL_ACCOUNT);
65 if (!new)
66 return -ENOMEM;
67
68 new->ctx = ctx;
69 }
70
71 old = rcu_replace_pointer(*peventfd, new,
72 lockdep_is_held(&vdev->igate));
73 if (old)
74 call_rcu(&old->rcu, vfio_pci_eventfd_rcu_free);
75
76 return 0;
77 }
78
79 /* List of PF's that vfio_pci_core_sriov_configure() has been called on */
80 static DEFINE_MUTEX(vfio_pci_sriov_pfs_mutex);
81 static LIST_HEAD(vfio_pci_sriov_pfs);
82
83 struct vfio_pci_dummy_resource {
84 struct resource resource;
85 int index;
86 struct list_head res_next;
87 };
88
89 struct vfio_pci_vf_token {
90 struct mutex lock;
91 uuid_t uuid;
92 int users;
93 };
94
vfio_vga_disabled(void)95 static inline bool vfio_vga_disabled(void)
96 {
97 #ifdef CONFIG_VFIO_PCI_VGA
98 return disable_vga;
99 #else
100 return true;
101 #endif
102 }
103
104 /*
105 * Our VGA arbiter participation is limited since we don't know anything
106 * about the device itself. However, if the device is the only VGA device
107 * downstream of a bridge and VFIO VGA support is disabled, then we can
108 * safely return legacy VGA IO and memory as not decoded since the user
109 * has no way to get to it and routing can be disabled externally at the
110 * bridge.
111 */
vfio_pci_set_decode(struct pci_dev * pdev,bool single_vga)112 static unsigned int vfio_pci_set_decode(struct pci_dev *pdev, bool single_vga)
113 {
114 struct pci_dev *tmp = NULL;
115 unsigned char max_busnr;
116 unsigned int decodes;
117
118 if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
119 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
120 VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
121
122 max_busnr = pci_bus_max_busnr(pdev->bus);
123 decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
124
125 while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
126 if (tmp == pdev ||
127 pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
128 pci_is_root_bus(tmp->bus))
129 continue;
130
131 if (tmp->bus->number >= pdev->bus->number &&
132 tmp->bus->number <= max_busnr) {
133 pci_dev_put(tmp);
134 decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
135 break;
136 }
137 }
138
139 return decodes;
140 }
141
vfio_pci_probe_mmaps(struct vfio_pci_core_device * vdev)142 static void vfio_pci_probe_mmaps(struct vfio_pci_core_device *vdev)
143 {
144 struct resource *res;
145 int i;
146 struct vfio_pci_dummy_resource *dummy_res;
147
148 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
149 int bar = i + PCI_STD_RESOURCES;
150
151 res = &vdev->pdev->resource[bar];
152
153 if (vdev->pdev->non_mappable_bars)
154 goto no_mmap;
155
156 if (!(res->flags & IORESOURCE_MEM))
157 goto no_mmap;
158
159 /*
160 * The PCI core shouldn't set up a resource with a
161 * type but zero size. But there may be bugs that
162 * cause us to do that.
163 */
164 if (!resource_size(res))
165 goto no_mmap;
166
167 if (resource_size(res) >= PAGE_SIZE) {
168 vdev->bar_mmap_supported[bar] = true;
169 continue;
170 }
171
172 if (!(res->start & ~PAGE_MASK)) {
173 /*
174 * Add a dummy resource to reserve the remainder
175 * of the exclusive page in case that hot-add
176 * device's bar is assigned into it.
177 */
178 dummy_res =
179 kzalloc(sizeof(*dummy_res), GFP_KERNEL_ACCOUNT);
180 if (dummy_res == NULL)
181 goto no_mmap;
182
183 dummy_res->resource.name = "vfio sub-page reserved";
184 dummy_res->resource.start = res->end + 1;
185 dummy_res->resource.end = res->start + PAGE_SIZE - 1;
186 dummy_res->resource.flags = res->flags;
187 if (request_resource(res->parent,
188 &dummy_res->resource)) {
189 kfree(dummy_res);
190 goto no_mmap;
191 }
192 dummy_res->index = bar;
193 list_add(&dummy_res->res_next,
194 &vdev->dummy_resources_list);
195 vdev->bar_mmap_supported[bar] = true;
196 continue;
197 }
198 /*
199 * Here we don't handle the case when the BAR is not page
200 * aligned because we can't expect the BAR will be
201 * assigned into the same location in a page in guest
202 * when we passthrough the BAR. And it's hard to access
203 * this BAR in userspace because we have no way to get
204 * the BAR's location in a page.
205 */
206 no_mmap:
207 vdev->bar_mmap_supported[bar] = false;
208 }
209 }
210
211 struct vfio_pci_group_info;
212 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set);
213 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
214 struct vfio_pci_group_info *groups,
215 struct iommufd_ctx *iommufd_ctx);
216
217 /*
218 * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
219 * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
220 * If a device implements the former but not the latter we would typically
221 * expect broken_intx_masking be set and require an exclusive interrupt.
222 * However since we do have control of the device's ability to assert INTx,
223 * we can instead pretend that the device does not implement INTx, virtualizing
224 * the pin register to report zero and maintaining DisINTx set on the host.
225 */
vfio_pci_nointx(struct pci_dev * pdev)226 static bool vfio_pci_nointx(struct pci_dev *pdev)
227 {
228 switch (pdev->vendor) {
229 case PCI_VENDOR_ID_INTEL:
230 switch (pdev->device) {
231 /* All i40e (XL710/X710/XXV710) 10/20/25/40GbE NICs */
232 case 0x1572:
233 case 0x1574:
234 case 0x1580 ... 0x1581:
235 case 0x1583 ... 0x158b:
236 case 0x37d0 ... 0x37d2:
237 /* X550 */
238 case 0x1563:
239 return true;
240 default:
241 return false;
242 }
243 }
244
245 return false;
246 }
247
vfio_pci_probe_power_state(struct vfio_pci_core_device * vdev)248 static void vfio_pci_probe_power_state(struct vfio_pci_core_device *vdev)
249 {
250 struct pci_dev *pdev = vdev->pdev;
251 u16 pmcsr;
252
253 if (!pdev->pm_cap)
254 return;
255
256 pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmcsr);
257
258 vdev->needs_pm_restore = !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET);
259 }
260
261 /*
262 * pci_set_power_state() wrapper handling devices which perform a soft reset on
263 * D3->D0 transition. Save state prior to D0/1/2->D3, stash it on the vdev,
264 * restore when returned to D0. Saved separately from pci_saved_state for use
265 * by PM capability emulation and separately from pci_dev internal saved state
266 * to avoid it being overwritten and consumed around other resets.
267 */
vfio_pci_set_power_state(struct vfio_pci_core_device * vdev,pci_power_t state)268 int vfio_pci_set_power_state(struct vfio_pci_core_device *vdev, pci_power_t state)
269 {
270 struct pci_dev *pdev = vdev->pdev;
271 bool needs_restore = false, needs_save = false;
272 int ret;
273
274 /* Prevent changing power state for PFs with VFs enabled */
275 if (pci_num_vf(pdev) && state > PCI_D0)
276 return -EBUSY;
277
278 if (vdev->needs_pm_restore) {
279 if (pdev->current_state < PCI_D3hot && state >= PCI_D3hot) {
280 pci_save_state(pdev);
281 needs_save = true;
282 }
283
284 if (pdev->current_state >= PCI_D3hot && state <= PCI_D0)
285 needs_restore = true;
286 }
287
288 ret = pci_set_power_state(pdev, state);
289
290 if (!ret) {
291 /* D3 might be unsupported via quirk, skip unless in D3 */
292 if (needs_save && pdev->current_state >= PCI_D3hot) {
293 /*
294 * The current PCI state will be saved locally in
295 * 'pm_save' during the D3hot transition. When the
296 * device state is changed to D0 again with the current
297 * function, then pci_store_saved_state() will restore
298 * the state and will free the memory pointed by
299 * 'pm_save'. There are few cases where the PCI power
300 * state can be changed to D0 without the involvement
301 * of the driver. For these cases, free the earlier
302 * allocated memory first before overwriting 'pm_save'
303 * to prevent the memory leak.
304 */
305 kfree(vdev->pm_save);
306 vdev->pm_save = pci_store_saved_state(pdev);
307 } else if (needs_restore) {
308 pci_load_and_free_saved_state(pdev, &vdev->pm_save);
309 pci_restore_state(pdev);
310 }
311 }
312
313 return ret;
314 }
315
vfio_pci_runtime_pm_entry(struct vfio_pci_core_device * vdev,struct eventfd_ctx * efdctx)316 static int vfio_pci_runtime_pm_entry(struct vfio_pci_core_device *vdev,
317 struct eventfd_ctx *efdctx)
318 {
319 /*
320 * The vdev power related flags are protected with 'memory_lock'
321 * semaphore.
322 */
323 vfio_pci_zap_and_down_write_memory_lock(vdev);
324 vfio_pci_dma_buf_move(vdev, true);
325
326 if (vdev->pm_runtime_engaged) {
327 up_write(&vdev->memory_lock);
328 return -EINVAL;
329 }
330
331 vdev->pm_runtime_engaged = true;
332 vdev->pm_wake_eventfd_ctx = efdctx;
333 pm_runtime_put_noidle(&vdev->pdev->dev);
334 up_write(&vdev->memory_lock);
335
336 return 0;
337 }
338
vfio_pci_core_pm_entry(struct vfio_pci_core_device * vdev,u32 flags,void __user * arg,size_t argsz)339 static int vfio_pci_core_pm_entry(struct vfio_pci_core_device *vdev, u32 flags,
340 void __user *arg, size_t argsz)
341 {
342 int ret;
343
344 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0);
345 if (ret != 1)
346 return ret;
347
348 /*
349 * Inside vfio_pci_runtime_pm_entry(), only the runtime PM usage count
350 * will be decremented. The pm_runtime_put() will be invoked again
351 * while returning from the ioctl and then the device can go into
352 * runtime suspended state.
353 */
354 return vfio_pci_runtime_pm_entry(vdev, NULL);
355 }
356
vfio_pci_core_pm_entry_with_wakeup(struct vfio_pci_core_device * vdev,u32 flags,struct vfio_device_low_power_entry_with_wakeup __user * arg,size_t argsz)357 static int vfio_pci_core_pm_entry_with_wakeup(
358 struct vfio_pci_core_device *vdev, u32 flags,
359 struct vfio_device_low_power_entry_with_wakeup __user *arg,
360 size_t argsz)
361 {
362 struct vfio_device_low_power_entry_with_wakeup entry;
363 struct eventfd_ctx *efdctx;
364 int ret;
365
366 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET,
367 sizeof(entry));
368 if (ret != 1)
369 return ret;
370
371 if (copy_from_user(&entry, arg, sizeof(entry)))
372 return -EFAULT;
373
374 if (entry.wakeup_eventfd < 0)
375 return -EINVAL;
376
377 efdctx = eventfd_ctx_fdget(entry.wakeup_eventfd);
378 if (IS_ERR(efdctx))
379 return PTR_ERR(efdctx);
380
381 ret = vfio_pci_runtime_pm_entry(vdev, efdctx);
382 if (ret)
383 eventfd_ctx_put(efdctx);
384
385 return ret;
386 }
387
__vfio_pci_runtime_pm_exit(struct vfio_pci_core_device * vdev)388 static void __vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev)
389 {
390 if (vdev->pm_runtime_engaged) {
391 vdev->pm_runtime_engaged = false;
392 pm_runtime_get_noresume(&vdev->pdev->dev);
393
394 if (vdev->pm_wake_eventfd_ctx) {
395 eventfd_ctx_put(vdev->pm_wake_eventfd_ctx);
396 vdev->pm_wake_eventfd_ctx = NULL;
397 }
398 }
399 }
400
vfio_pci_runtime_pm_exit(struct vfio_pci_core_device * vdev)401 static void vfio_pci_runtime_pm_exit(struct vfio_pci_core_device *vdev)
402 {
403 /*
404 * The vdev power related flags are protected with 'memory_lock'
405 * semaphore.
406 */
407 down_write(&vdev->memory_lock);
408 __vfio_pci_runtime_pm_exit(vdev);
409 if (__vfio_pci_memory_enabled(vdev))
410 vfio_pci_dma_buf_move(vdev, false);
411 up_write(&vdev->memory_lock);
412 }
413
vfio_pci_core_pm_exit(struct vfio_pci_core_device * vdev,u32 flags,void __user * arg,size_t argsz)414 static int vfio_pci_core_pm_exit(struct vfio_pci_core_device *vdev, u32 flags,
415 void __user *arg, size_t argsz)
416 {
417 int ret;
418
419 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET, 0);
420 if (ret != 1)
421 return ret;
422
423 /*
424 * The device is always in the active state here due to pm wrappers
425 * around ioctls. If the device had entered a low power state and
426 * pm_wake_eventfd_ctx is valid, vfio_pci_core_runtime_resume() has
427 * already signaled the eventfd and exited low power mode itself.
428 * pm_runtime_engaged protects the redundant call here.
429 */
430 vfio_pci_runtime_pm_exit(vdev);
431 return 0;
432 }
433
434 #ifdef CONFIG_PM
vfio_pci_core_runtime_suspend(struct device * dev)435 static int vfio_pci_core_runtime_suspend(struct device *dev)
436 {
437 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev);
438
439 down_write(&vdev->memory_lock);
440 /*
441 * The user can move the device into D3hot state before invoking
442 * power management IOCTL. Move the device into D0 state here and then
443 * the pci-driver core runtime PM suspend function will move the device
444 * into the low power state. Also, for the devices which have
445 * NoSoftRst-, it will help in restoring the original state
446 * (saved locally in 'vdev->pm_save').
447 */
448 vfio_pci_set_power_state(vdev, PCI_D0);
449 up_write(&vdev->memory_lock);
450
451 /*
452 * If INTx is enabled, then mask INTx before going into the runtime
453 * suspended state and unmask the same in the runtime resume.
454 * If INTx has already been masked by the user, then
455 * vfio_pci_intx_mask() will return false and in that case, INTx
456 * should not be unmasked in the runtime resume.
457 */
458 vdev->pm_intx_masked = ((vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) &&
459 vfio_pci_intx_mask(vdev));
460
461 return 0;
462 }
463
vfio_pci_core_runtime_resume(struct device * dev)464 static int vfio_pci_core_runtime_resume(struct device *dev)
465 {
466 struct vfio_pci_core_device *vdev = dev_get_drvdata(dev);
467
468 /*
469 * Resume with a pm_wake_eventfd_ctx signals the eventfd and exit
470 * low power mode.
471 */
472 down_write(&vdev->memory_lock);
473 if (vdev->pm_wake_eventfd_ctx) {
474 eventfd_signal(vdev->pm_wake_eventfd_ctx);
475 __vfio_pci_runtime_pm_exit(vdev);
476 }
477 up_write(&vdev->memory_lock);
478
479 if (vdev->pm_intx_masked)
480 vfio_pci_intx_unmask(vdev);
481
482 return 0;
483 }
484 #endif /* CONFIG_PM */
485
486 /*
487 * The pci-driver core runtime PM routines always save the device state
488 * before going into suspended state. If the device is going into low power
489 * state with only with runtime PM ops, then no explicit handling is needed
490 * for the devices which have NoSoftRst-.
491 */
492 static const struct dev_pm_ops vfio_pci_core_pm_ops = {
493 SET_RUNTIME_PM_OPS(vfio_pci_core_runtime_suspend,
494 vfio_pci_core_runtime_resume,
495 NULL)
496 };
497
vfio_pci_core_enable(struct vfio_pci_core_device * vdev)498 int vfio_pci_core_enable(struct vfio_pci_core_device *vdev)
499 {
500 struct pci_dev *pdev = vdev->pdev;
501 int ret;
502 u16 cmd;
503 u8 msix_pos;
504
505 if (!disable_idle_d3) {
506 ret = pm_runtime_resume_and_get(&pdev->dev);
507 if (ret < 0)
508 return ret;
509 }
510
511 /* Don't allow our initial saved state to include busmaster */
512 pci_clear_master(pdev);
513
514 ret = pci_enable_device(pdev);
515 if (ret)
516 goto out_power;
517
518 /* If reset fails because of the device lock, fail this path entirely */
519 ret = pci_try_reset_function(pdev);
520 if (ret == -EAGAIN)
521 goto out_disable_device;
522
523 vdev->reset_works = !ret;
524 pci_save_state(pdev);
525 vdev->pci_saved_state = pci_store_saved_state(pdev);
526 if (!vdev->pci_saved_state)
527 pci_dbg(pdev, "%s: Couldn't store saved state\n", __func__);
528
529 if (likely(!nointxmask)) {
530 if (vfio_pci_nointx(pdev)) {
531 pci_info(pdev, "Masking broken INTx support\n");
532 vdev->nointx = true;
533 pci_intx(pdev, 0);
534 } else
535 vdev->pci_2_3 = pci_intx_mask_supported(pdev);
536 }
537
538 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
539 if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
540 cmd &= ~PCI_COMMAND_INTX_DISABLE;
541 pci_write_config_word(pdev, PCI_COMMAND, cmd);
542 }
543
544 ret = vfio_pci_zdev_open_device(vdev);
545 if (ret)
546 goto out_free_state;
547
548 ret = vfio_config_init(vdev);
549 if (ret)
550 goto out_free_zdev;
551
552 msix_pos = pdev->msix_cap;
553 if (msix_pos) {
554 u16 flags;
555 u32 table;
556
557 pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
558 pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
559
560 vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
561 vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
562 vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
563 vdev->has_dyn_msix = pci_msix_can_alloc_dyn(pdev);
564 } else {
565 vdev->msix_bar = 0xFF;
566 vdev->has_dyn_msix = false;
567 }
568
569 if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
570 vdev->has_vga = true;
571
572
573 return 0;
574
575 out_free_zdev:
576 vfio_pci_zdev_close_device(vdev);
577 out_free_state:
578 kfree(vdev->pci_saved_state);
579 vdev->pci_saved_state = NULL;
580 out_disable_device:
581 pci_disable_device(pdev);
582 out_power:
583 if (!disable_idle_d3)
584 pm_runtime_put(&pdev->dev);
585 return ret;
586 }
587 EXPORT_SYMBOL_GPL(vfio_pci_core_enable);
588
vfio_pci_core_disable(struct vfio_pci_core_device * vdev)589 void vfio_pci_core_disable(struct vfio_pci_core_device *vdev)
590 {
591 struct pci_dev *pdev = vdev->pdev;
592 struct vfio_pci_dummy_resource *dummy_res, *tmp;
593 struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp;
594 int i, bar;
595
596 /* For needs_reset */
597 lockdep_assert_held(&vdev->vdev.dev_set->lock);
598
599 /*
600 * This function can be invoked while the power state is non-D0.
601 * This non-D0 power state can be with or without runtime PM.
602 * vfio_pci_runtime_pm_exit() will internally increment the usage
603 * count corresponding to pm_runtime_put() called during low power
604 * feature entry and then pm_runtime_resume() will wake up the device,
605 * if the device has already gone into the suspended state. Otherwise,
606 * the vfio_pci_set_power_state() will change the device power state
607 * to D0.
608 */
609 vfio_pci_runtime_pm_exit(vdev);
610 pm_runtime_resume(&pdev->dev);
611
612 /*
613 * This function calls __pci_reset_function_locked() which internally
614 * can use pci_pm_reset() for the function reset. pci_pm_reset() will
615 * fail if the power state is non-D0. Also, for the devices which
616 * have NoSoftRst-, the reset function can cause the PCI config space
617 * reset without restoring the original state (saved locally in
618 * 'vdev->pm_save').
619 */
620 vfio_pci_set_power_state(vdev, PCI_D0);
621
622 /* Stop the device from further DMA */
623 pci_clear_master(pdev);
624
625 vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
626 VFIO_IRQ_SET_ACTION_TRIGGER,
627 vdev->irq_type, 0, 0, NULL);
628
629 /* Device closed, don't need mutex here */
630 list_for_each_entry_safe(ioeventfd, ioeventfd_tmp,
631 &vdev->ioeventfds_list, next) {
632 vfio_virqfd_disable(&ioeventfd->virqfd);
633 list_del(&ioeventfd->next);
634 kfree(ioeventfd);
635 }
636 vdev->ioeventfds_nr = 0;
637
638 vdev->virq_disabled = false;
639
640 for (i = 0; i < vdev->num_regions; i++)
641 vdev->region[i].ops->release(vdev, &vdev->region[i]);
642
643 vdev->num_regions = 0;
644 kfree(vdev->region);
645 vdev->region = NULL; /* don't krealloc a freed pointer */
646
647 vfio_config_free(vdev);
648
649 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
650 bar = i + PCI_STD_RESOURCES;
651 if (!vdev->barmap[bar])
652 continue;
653 pci_iounmap(pdev, vdev->barmap[bar]);
654 pci_release_selected_regions(pdev, 1 << bar);
655 vdev->barmap[bar] = NULL;
656 }
657
658 list_for_each_entry_safe(dummy_res, tmp,
659 &vdev->dummy_resources_list, res_next) {
660 list_del(&dummy_res->res_next);
661 release_resource(&dummy_res->resource);
662 kfree(dummy_res);
663 }
664
665 vdev->needs_reset = true;
666
667 vfio_pci_zdev_close_device(vdev);
668
669 /*
670 * If we have saved state, restore it. If we can reset the device,
671 * even better. Resetting with current state seems better than
672 * nothing, but saving and restoring current state without reset
673 * is just busy work.
674 */
675 if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
676 pci_info(pdev, "%s: Couldn't reload saved state\n", __func__);
677
678 if (!vdev->reset_works)
679 goto out;
680
681 pci_save_state(pdev);
682 }
683
684 /*
685 * Disable INTx and MSI, presumably to avoid spurious interrupts
686 * during reset. Stolen from pci_reset_function()
687 */
688 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
689
690 /*
691 * Try to get the locks ourselves to prevent a deadlock. The
692 * success of this is dependent on being able to lock the device,
693 * which is not always possible.
694 * We can not use the "try" reset interface here, which will
695 * overwrite the previously restored configuration information.
696 */
697 if (vdev->reset_works && pci_dev_trylock(pdev)) {
698 if (!__pci_reset_function_locked(pdev))
699 vdev->needs_reset = false;
700 pci_dev_unlock(pdev);
701 }
702
703 pci_restore_state(pdev);
704 out:
705 pci_disable_device(pdev);
706
707 vfio_pci_dev_set_try_reset(vdev->vdev.dev_set);
708
709 /* Put the pm-runtime usage counter acquired during enable */
710 if (!disable_idle_d3)
711 pm_runtime_put(&pdev->dev);
712 }
713 EXPORT_SYMBOL_GPL(vfio_pci_core_disable);
714
vfio_pci_core_close_device(struct vfio_device * core_vdev)715 void vfio_pci_core_close_device(struct vfio_device *core_vdev)
716 {
717 struct vfio_pci_core_device *vdev =
718 container_of(core_vdev, struct vfio_pci_core_device, vdev);
719
720 if (vdev->sriov_pf_core_dev) {
721 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock);
722 WARN_ON(!vdev->sriov_pf_core_dev->vf_token->users);
723 vdev->sriov_pf_core_dev->vf_token->users--;
724 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock);
725 }
726 #if IS_ENABLED(CONFIG_EEH)
727 eeh_dev_release(vdev->pdev);
728 #endif
729 vfio_pci_core_disable(vdev);
730
731 vfio_pci_dma_buf_cleanup(vdev);
732
733 mutex_lock(&vdev->igate);
734 vfio_pci_eventfd_replace_locked(vdev, &vdev->err_trigger, NULL);
735 vfio_pci_eventfd_replace_locked(vdev, &vdev->req_trigger, NULL);
736 mutex_unlock(&vdev->igate);
737 }
738 EXPORT_SYMBOL_GPL(vfio_pci_core_close_device);
739
vfio_pci_core_finish_enable(struct vfio_pci_core_device * vdev)740 void vfio_pci_core_finish_enable(struct vfio_pci_core_device *vdev)
741 {
742 vfio_pci_probe_mmaps(vdev);
743 #if IS_ENABLED(CONFIG_EEH)
744 eeh_dev_open(vdev->pdev);
745 #endif
746
747 if (vdev->sriov_pf_core_dev) {
748 mutex_lock(&vdev->sriov_pf_core_dev->vf_token->lock);
749 vdev->sriov_pf_core_dev->vf_token->users++;
750 mutex_unlock(&vdev->sriov_pf_core_dev->vf_token->lock);
751 }
752 }
753 EXPORT_SYMBOL_GPL(vfio_pci_core_finish_enable);
754
vfio_pci_get_irq_count(struct vfio_pci_core_device * vdev,int irq_type)755 static int vfio_pci_get_irq_count(struct vfio_pci_core_device *vdev, int irq_type)
756 {
757 if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
758 return vdev->vconfig[PCI_INTERRUPT_PIN] ? 1 : 0;
759 } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
760 u8 pos;
761 u16 flags;
762
763 pos = vdev->pdev->msi_cap;
764 if (pos) {
765 pci_read_config_word(vdev->pdev,
766 pos + PCI_MSI_FLAGS, &flags);
767 return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
768 }
769 } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
770 u8 pos;
771 u16 flags;
772
773 pos = vdev->pdev->msix_cap;
774 if (pos) {
775 pci_read_config_word(vdev->pdev,
776 pos + PCI_MSIX_FLAGS, &flags);
777
778 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
779 }
780 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
781 if (pci_is_pcie(vdev->pdev))
782 return 1;
783 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
784 return 1;
785 }
786
787 return 0;
788 }
789
vfio_pci_count_devs(struct pci_dev * pdev,void * data)790 static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
791 {
792 (*(int *)data)++;
793 return 0;
794 }
795
796 struct vfio_pci_fill_info {
797 struct vfio_device *vdev;
798 struct vfio_pci_dependent_device *devices;
799 int nr_devices;
800 u32 count;
801 u32 flags;
802 };
803
vfio_pci_fill_devs(struct pci_dev * pdev,void * data)804 static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
805 {
806 struct vfio_pci_dependent_device *info;
807 struct vfio_pci_fill_info *fill = data;
808
809 /* The topology changed since we counted devices */
810 if (fill->count >= fill->nr_devices)
811 return -EAGAIN;
812
813 info = &fill->devices[fill->count++];
814 info->segment = pci_domain_nr(pdev->bus);
815 info->bus = pdev->bus->number;
816 info->devfn = pdev->devfn;
817
818 if (fill->flags & VFIO_PCI_HOT_RESET_FLAG_DEV_ID) {
819 struct iommufd_ctx *iommufd = vfio_iommufd_device_ictx(fill->vdev);
820 struct vfio_device_set *dev_set = fill->vdev->dev_set;
821 struct vfio_device *vdev;
822
823 /*
824 * hot-reset requires all affected devices be represented in
825 * the dev_set.
826 */
827 vdev = vfio_find_device_in_devset(dev_set, &pdev->dev);
828 if (!vdev) {
829 info->devid = VFIO_PCI_DEVID_NOT_OWNED;
830 } else {
831 int id = vfio_iommufd_get_dev_id(vdev, iommufd);
832
833 if (id > 0)
834 info->devid = id;
835 else if (id == -ENOENT)
836 info->devid = VFIO_PCI_DEVID_OWNED;
837 else
838 info->devid = VFIO_PCI_DEVID_NOT_OWNED;
839 }
840 /* If devid is VFIO_PCI_DEVID_NOT_OWNED, clear owned flag. */
841 if (info->devid == VFIO_PCI_DEVID_NOT_OWNED)
842 fill->flags &= ~VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED;
843 } else {
844 struct iommu_group *iommu_group;
845
846 iommu_group = iommu_group_get(&pdev->dev);
847 if (!iommu_group)
848 return -EPERM; /* Cannot reset non-isolated devices */
849
850 info->group_id = iommu_group_id(iommu_group);
851 iommu_group_put(iommu_group);
852 }
853
854 return 0;
855 }
856
857 struct vfio_pci_group_info {
858 int count;
859 struct file **files;
860 };
861
vfio_pci_dev_below_slot(struct pci_dev * pdev,struct pci_slot * slot)862 static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
863 {
864 for (; pdev; pdev = pdev->bus->self)
865 if (pdev->bus == slot->bus)
866 return (pdev->slot == slot);
867 return false;
868 }
869
870 struct vfio_pci_walk_info {
871 int (*fn)(struct pci_dev *pdev, void *data);
872 void *data;
873 struct pci_dev *pdev;
874 bool slot;
875 int ret;
876 };
877
vfio_pci_walk_wrapper(struct pci_dev * pdev,void * data)878 static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
879 {
880 struct vfio_pci_walk_info *walk = data;
881
882 if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
883 walk->ret = walk->fn(pdev, walk->data);
884
885 return walk->ret;
886 }
887
vfio_pci_for_each_slot_or_bus(struct pci_dev * pdev,int (* fn)(struct pci_dev *,void * data),void * data,bool slot)888 static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
889 int (*fn)(struct pci_dev *,
890 void *data), void *data,
891 bool slot)
892 {
893 struct vfio_pci_walk_info walk = {
894 .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
895 };
896
897 pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
898
899 return walk.ret;
900 }
901
msix_mmappable_cap(struct vfio_pci_core_device * vdev,struct vfio_info_cap * caps)902 static int msix_mmappable_cap(struct vfio_pci_core_device *vdev,
903 struct vfio_info_cap *caps)
904 {
905 struct vfio_info_cap_header header = {
906 .id = VFIO_REGION_INFO_CAP_MSIX_MAPPABLE,
907 .version = 1
908 };
909
910 return vfio_info_add_capability(caps, &header, sizeof(header));
911 }
912
vfio_pci_core_register_dev_region(struct vfio_pci_core_device * vdev,unsigned int type,unsigned int subtype,const struct vfio_pci_regops * ops,size_t size,u32 flags,void * data)913 int vfio_pci_core_register_dev_region(struct vfio_pci_core_device *vdev,
914 unsigned int type, unsigned int subtype,
915 const struct vfio_pci_regops *ops,
916 size_t size, u32 flags, void *data)
917 {
918 struct vfio_pci_region *region;
919
920 region = krealloc(vdev->region,
921 (vdev->num_regions + 1) * sizeof(*region),
922 GFP_KERNEL_ACCOUNT);
923 if (!region)
924 return -ENOMEM;
925
926 vdev->region = region;
927 vdev->region[vdev->num_regions].type = type;
928 vdev->region[vdev->num_regions].subtype = subtype;
929 vdev->region[vdev->num_regions].ops = ops;
930 vdev->region[vdev->num_regions].size = size;
931 vdev->region[vdev->num_regions].flags = flags;
932 vdev->region[vdev->num_regions].data = data;
933
934 vdev->num_regions++;
935
936 return 0;
937 }
938 EXPORT_SYMBOL_GPL(vfio_pci_core_register_dev_region);
939
vfio_pci_info_atomic_cap(struct vfio_pci_core_device * vdev,struct vfio_info_cap * caps)940 static int vfio_pci_info_atomic_cap(struct vfio_pci_core_device *vdev,
941 struct vfio_info_cap *caps)
942 {
943 struct vfio_device_info_cap_pci_atomic_comp cap = {
944 .header.id = VFIO_DEVICE_INFO_CAP_PCI_ATOMIC_COMP,
945 .header.version = 1
946 };
947 struct pci_dev *pdev = pci_physfn(vdev->pdev);
948 u32 devcap2;
949
950 pcie_capability_read_dword(pdev, PCI_EXP_DEVCAP2, &devcap2);
951
952 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP32) &&
953 !pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP32))
954 cap.flags |= VFIO_PCI_ATOMIC_COMP32;
955
956 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP64) &&
957 !pci_enable_atomic_ops_to_root(pdev, PCI_EXP_DEVCAP2_ATOMIC_COMP64))
958 cap.flags |= VFIO_PCI_ATOMIC_COMP64;
959
960 if ((devcap2 & PCI_EXP_DEVCAP2_ATOMIC_COMP128) &&
961 !pci_enable_atomic_ops_to_root(pdev,
962 PCI_EXP_DEVCAP2_ATOMIC_COMP128))
963 cap.flags |= VFIO_PCI_ATOMIC_COMP128;
964
965 if (!cap.flags)
966 return -ENODEV;
967
968 return vfio_info_add_capability(caps, &cap.header, sizeof(cap));
969 }
970
vfio_pci_ioctl_get_info(struct vfio_pci_core_device * vdev,struct vfio_device_info __user * arg)971 static int vfio_pci_ioctl_get_info(struct vfio_pci_core_device *vdev,
972 struct vfio_device_info __user *arg)
973 {
974 unsigned long minsz = offsetofend(struct vfio_device_info, num_irqs);
975 struct vfio_device_info info = {};
976 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
977 int ret;
978
979 if (copy_from_user(&info, arg, minsz))
980 return -EFAULT;
981
982 if (info.argsz < minsz)
983 return -EINVAL;
984
985 minsz = min_t(size_t, info.argsz, sizeof(info));
986
987 info.flags = VFIO_DEVICE_FLAGS_PCI;
988
989 if (vdev->reset_works)
990 info.flags |= VFIO_DEVICE_FLAGS_RESET;
991
992 info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
993 info.num_irqs = VFIO_PCI_NUM_IRQS;
994
995 ret = vfio_pci_info_zdev_add_caps(vdev, &caps);
996 if (ret && ret != -ENODEV) {
997 pci_warn(vdev->pdev,
998 "Failed to setup zPCI info capabilities\n");
999 return ret;
1000 }
1001
1002 ret = vfio_pci_info_atomic_cap(vdev, &caps);
1003 if (ret && ret != -ENODEV) {
1004 pci_warn(vdev->pdev,
1005 "Failed to setup AtomicOps info capability\n");
1006 return ret;
1007 }
1008
1009 if (caps.size) {
1010 info.flags |= VFIO_DEVICE_FLAGS_CAPS;
1011 if (info.argsz < sizeof(info) + caps.size) {
1012 info.argsz = sizeof(info) + caps.size;
1013 } else {
1014 vfio_info_cap_shift(&caps, sizeof(info));
1015 if (copy_to_user(arg + 1, caps.buf, caps.size)) {
1016 kfree(caps.buf);
1017 return -EFAULT;
1018 }
1019 info.cap_offset = sizeof(*arg);
1020 }
1021
1022 kfree(caps.buf);
1023 }
1024
1025 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
1026 }
1027
vfio_pci_ioctl_get_region_info(struct vfio_device * core_vdev,struct vfio_region_info * info,struct vfio_info_cap * caps)1028 int vfio_pci_ioctl_get_region_info(struct vfio_device *core_vdev,
1029 struct vfio_region_info *info,
1030 struct vfio_info_cap *caps)
1031 {
1032 struct vfio_pci_core_device *vdev =
1033 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1034 struct pci_dev *pdev = vdev->pdev;
1035 int i, ret;
1036
1037 switch (info->index) {
1038 case VFIO_PCI_CONFIG_REGION_INDEX:
1039 info->offset = VFIO_PCI_INDEX_TO_OFFSET(info->index);
1040 info->size = pdev->cfg_size;
1041 info->flags = VFIO_REGION_INFO_FLAG_READ |
1042 VFIO_REGION_INFO_FLAG_WRITE;
1043 break;
1044 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1045 info->offset = VFIO_PCI_INDEX_TO_OFFSET(info->index);
1046 info->size = pci_resource_len(pdev, info->index);
1047 if (!info->size) {
1048 info->flags = 0;
1049 break;
1050 }
1051
1052 info->flags = VFIO_REGION_INFO_FLAG_READ |
1053 VFIO_REGION_INFO_FLAG_WRITE;
1054 if (vdev->bar_mmap_supported[info->index]) {
1055 info->flags |= VFIO_REGION_INFO_FLAG_MMAP;
1056 if (info->index == vdev->msix_bar) {
1057 ret = msix_mmappable_cap(vdev, caps);
1058 if (ret)
1059 return ret;
1060 }
1061 }
1062
1063 break;
1064 case VFIO_PCI_ROM_REGION_INDEX: {
1065 void __iomem *io;
1066 size_t size;
1067 u16 cmd;
1068
1069 info->offset = VFIO_PCI_INDEX_TO_OFFSET(info->index);
1070 info->flags = 0;
1071 info->size = 0;
1072
1073 if (pci_resource_start(pdev, PCI_ROM_RESOURCE)) {
1074 /*
1075 * Check ROM content is valid. Need to enable memory
1076 * decode for ROM access in pci_map_rom().
1077 */
1078 cmd = vfio_pci_memory_lock_and_enable(vdev);
1079 io = pci_map_rom(pdev, &size);
1080 if (io) {
1081 info->flags = VFIO_REGION_INFO_FLAG_READ;
1082 /* Report the BAR size, not the ROM size. */
1083 info->size = pci_resource_len(pdev,
1084 PCI_ROM_RESOURCE);
1085 pci_unmap_rom(pdev, io);
1086 }
1087 vfio_pci_memory_unlock_and_restore(vdev, cmd);
1088 } else if (pdev->rom && pdev->romlen) {
1089 info->flags = VFIO_REGION_INFO_FLAG_READ;
1090 /* Report BAR size as power of two. */
1091 info->size = roundup_pow_of_two(pdev->romlen);
1092 }
1093
1094 break;
1095 }
1096 case VFIO_PCI_VGA_REGION_INDEX:
1097 if (!vdev->has_vga)
1098 return -EINVAL;
1099
1100 info->offset = VFIO_PCI_INDEX_TO_OFFSET(info->index);
1101 info->size = 0xc0000;
1102 info->flags = VFIO_REGION_INFO_FLAG_READ |
1103 VFIO_REGION_INFO_FLAG_WRITE;
1104
1105 break;
1106 default: {
1107 struct vfio_region_info_cap_type cap_type = {
1108 .header.id = VFIO_REGION_INFO_CAP_TYPE,
1109 .header.version = 1
1110 };
1111
1112 if (info->index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1113 return -EINVAL;
1114 info->index = array_index_nospec(
1115 info->index, VFIO_PCI_NUM_REGIONS + vdev->num_regions);
1116
1117 i = info->index - VFIO_PCI_NUM_REGIONS;
1118
1119 info->offset = VFIO_PCI_INDEX_TO_OFFSET(info->index);
1120 info->size = vdev->region[i].size;
1121 info->flags = vdev->region[i].flags;
1122
1123 cap_type.type = vdev->region[i].type;
1124 cap_type.subtype = vdev->region[i].subtype;
1125
1126 ret = vfio_info_add_capability(caps, &cap_type.header,
1127 sizeof(cap_type));
1128 if (ret)
1129 return ret;
1130
1131 if (vdev->region[i].ops->add_capability) {
1132 ret = vdev->region[i].ops->add_capability(
1133 vdev, &vdev->region[i], caps);
1134 if (ret)
1135 return ret;
1136 }
1137 }
1138 }
1139 return 0;
1140 }
1141 EXPORT_SYMBOL_GPL(vfio_pci_ioctl_get_region_info);
1142
vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device * vdev,struct vfio_irq_info __user * arg)1143 static int vfio_pci_ioctl_get_irq_info(struct vfio_pci_core_device *vdev,
1144 struct vfio_irq_info __user *arg)
1145 {
1146 unsigned long minsz = offsetofend(struct vfio_irq_info, count);
1147 struct vfio_irq_info info;
1148
1149 if (copy_from_user(&info, arg, minsz))
1150 return -EFAULT;
1151
1152 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
1153 return -EINVAL;
1154
1155 switch (info.index) {
1156 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
1157 case VFIO_PCI_REQ_IRQ_INDEX:
1158 break;
1159 case VFIO_PCI_ERR_IRQ_INDEX:
1160 if (pci_is_pcie(vdev->pdev))
1161 break;
1162 fallthrough;
1163 default:
1164 return -EINVAL;
1165 }
1166
1167 info.flags = VFIO_IRQ_INFO_EVENTFD;
1168
1169 info.count = vfio_pci_get_irq_count(vdev, info.index);
1170
1171 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
1172 info.flags |=
1173 (VFIO_IRQ_INFO_MASKABLE | VFIO_IRQ_INFO_AUTOMASKED);
1174 else if (info.index != VFIO_PCI_MSIX_IRQ_INDEX || !vdev->has_dyn_msix)
1175 info.flags |= VFIO_IRQ_INFO_NORESIZE;
1176
1177 return copy_to_user(arg, &info, minsz) ? -EFAULT : 0;
1178 }
1179
vfio_pci_ioctl_set_irqs(struct vfio_pci_core_device * vdev,struct vfio_irq_set __user * arg)1180 static int vfio_pci_ioctl_set_irqs(struct vfio_pci_core_device *vdev,
1181 struct vfio_irq_set __user *arg)
1182 {
1183 unsigned long minsz = offsetofend(struct vfio_irq_set, count);
1184 struct vfio_irq_set hdr;
1185 u8 *data = NULL;
1186 int max, ret = 0;
1187 size_t data_size = 0;
1188
1189 if (copy_from_user(&hdr, arg, minsz))
1190 return -EFAULT;
1191
1192 max = vfio_pci_get_irq_count(vdev, hdr.index);
1193
1194 ret = vfio_set_irqs_validate_and_prepare(&hdr, max, VFIO_PCI_NUM_IRQS,
1195 &data_size);
1196 if (ret)
1197 return ret;
1198
1199 if (data_size) {
1200 data = memdup_user(&arg->data, data_size);
1201 if (IS_ERR(data))
1202 return PTR_ERR(data);
1203 }
1204
1205 mutex_lock(&vdev->igate);
1206
1207 ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index, hdr.start,
1208 hdr.count, data);
1209
1210 mutex_unlock(&vdev->igate);
1211 kfree(data);
1212
1213 return ret;
1214 }
1215
vfio_pci_ioctl_reset(struct vfio_pci_core_device * vdev,void __user * arg)1216 static int vfio_pci_ioctl_reset(struct vfio_pci_core_device *vdev,
1217 void __user *arg)
1218 {
1219 int ret;
1220
1221 if (!vdev->reset_works)
1222 return -EINVAL;
1223
1224 vfio_pci_zap_and_down_write_memory_lock(vdev);
1225
1226 /*
1227 * This function can be invoked while the power state is non-D0. If
1228 * pci_try_reset_function() has been called while the power state is
1229 * non-D0, then pci_try_reset_function() will internally set the power
1230 * state to D0 without vfio driver involvement. For the devices which
1231 * have NoSoftRst-, the reset function can cause the PCI config space
1232 * reset without restoring the original state (saved locally in
1233 * 'vdev->pm_save').
1234 */
1235 vfio_pci_set_power_state(vdev, PCI_D0);
1236
1237 vfio_pci_dma_buf_move(vdev, true);
1238 ret = pci_try_reset_function(vdev->pdev);
1239 if (__vfio_pci_memory_enabled(vdev))
1240 vfio_pci_dma_buf_move(vdev, false);
1241 up_write(&vdev->memory_lock);
1242
1243 return ret;
1244 }
1245
vfio_pci_ioctl_get_pci_hot_reset_info(struct vfio_pci_core_device * vdev,struct vfio_pci_hot_reset_info __user * arg)1246 static int vfio_pci_ioctl_get_pci_hot_reset_info(
1247 struct vfio_pci_core_device *vdev,
1248 struct vfio_pci_hot_reset_info __user *arg)
1249 {
1250 unsigned long minsz =
1251 offsetofend(struct vfio_pci_hot_reset_info, count);
1252 struct vfio_pci_dependent_device *devices = NULL;
1253 struct vfio_pci_hot_reset_info hdr;
1254 struct vfio_pci_fill_info fill = {};
1255 bool slot = false;
1256 int ret, count = 0;
1257
1258 if (copy_from_user(&hdr, arg, minsz))
1259 return -EFAULT;
1260
1261 if (hdr.argsz < minsz)
1262 return -EINVAL;
1263
1264 hdr.flags = 0;
1265
1266 /* Can we do a slot or bus reset or neither? */
1267 if (!pci_probe_reset_slot(vdev->pdev->slot))
1268 slot = true;
1269 else if (pci_probe_reset_bus(vdev->pdev->bus))
1270 return -ENODEV;
1271
1272 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1273 &count, slot);
1274 if (ret)
1275 return ret;
1276
1277 if (WARN_ON(!count)) /* Should always be at least one */
1278 return -ERANGE;
1279
1280 if (count > (hdr.argsz - sizeof(hdr)) / sizeof(*devices)) {
1281 hdr.count = count;
1282 ret = -ENOSPC;
1283 goto header;
1284 }
1285
1286 devices = kcalloc(count, sizeof(*devices), GFP_KERNEL);
1287 if (!devices)
1288 return -ENOMEM;
1289
1290 fill.devices = devices;
1291 fill.nr_devices = count;
1292 fill.vdev = &vdev->vdev;
1293
1294 if (vfio_device_cdev_opened(&vdev->vdev))
1295 fill.flags |= VFIO_PCI_HOT_RESET_FLAG_DEV_ID |
1296 VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED;
1297
1298 mutex_lock(&vdev->vdev.dev_set->lock);
1299 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_fill_devs,
1300 &fill, slot);
1301 mutex_unlock(&vdev->vdev.dev_set->lock);
1302 if (ret)
1303 goto out;
1304
1305 if (copy_to_user(arg->devices, devices,
1306 sizeof(*devices) * fill.count)) {
1307 ret = -EFAULT;
1308 goto out;
1309 }
1310
1311 hdr.count = fill.count;
1312 hdr.flags = fill.flags;
1313
1314 header:
1315 if (copy_to_user(arg, &hdr, minsz))
1316 ret = -EFAULT;
1317 out:
1318 kfree(devices);
1319 return ret;
1320 }
1321
1322 static int
vfio_pci_ioctl_pci_hot_reset_groups(struct vfio_pci_core_device * vdev,u32 array_count,bool slot,struct vfio_pci_hot_reset __user * arg)1323 vfio_pci_ioctl_pci_hot_reset_groups(struct vfio_pci_core_device *vdev,
1324 u32 array_count, bool slot,
1325 struct vfio_pci_hot_reset __user *arg)
1326 {
1327 int32_t *group_fds;
1328 struct file **files;
1329 struct vfio_pci_group_info info;
1330 int file_idx, count = 0, ret = 0;
1331
1332 /*
1333 * We can't let userspace give us an arbitrarily large buffer to copy,
1334 * so verify how many we think there could be. Note groups can have
1335 * multiple devices so one group per device is the max.
1336 */
1337 ret = vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
1338 &count, slot);
1339 if (ret)
1340 return ret;
1341
1342 if (array_count > count)
1343 return -EINVAL;
1344
1345 group_fds = kcalloc(array_count, sizeof(*group_fds), GFP_KERNEL);
1346 files = kcalloc(array_count, sizeof(*files), GFP_KERNEL);
1347 if (!group_fds || !files) {
1348 kfree(group_fds);
1349 kfree(files);
1350 return -ENOMEM;
1351 }
1352
1353 if (copy_from_user(group_fds, arg->group_fds,
1354 array_count * sizeof(*group_fds))) {
1355 kfree(group_fds);
1356 kfree(files);
1357 return -EFAULT;
1358 }
1359
1360 /*
1361 * Get the group file for each fd to ensure the group is held across
1362 * the reset
1363 */
1364 for (file_idx = 0; file_idx < array_count; file_idx++) {
1365 struct file *file = fget(group_fds[file_idx]);
1366
1367 if (!file) {
1368 ret = -EBADF;
1369 break;
1370 }
1371
1372 /* Ensure the FD is a vfio group FD.*/
1373 if (!vfio_file_is_group(file)) {
1374 fput(file);
1375 ret = -EINVAL;
1376 break;
1377 }
1378
1379 files[file_idx] = file;
1380 }
1381
1382 kfree(group_fds);
1383
1384 /* release reference to groups on error */
1385 if (ret)
1386 goto hot_reset_release;
1387
1388 info.count = array_count;
1389 info.files = files;
1390
1391 ret = vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, &info, NULL);
1392
1393 hot_reset_release:
1394 for (file_idx--; file_idx >= 0; file_idx--)
1395 fput(files[file_idx]);
1396
1397 kfree(files);
1398 return ret;
1399 }
1400
vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device * vdev,struct vfio_pci_hot_reset __user * arg)1401 static int vfio_pci_ioctl_pci_hot_reset(struct vfio_pci_core_device *vdev,
1402 struct vfio_pci_hot_reset __user *arg)
1403 {
1404 unsigned long minsz = offsetofend(struct vfio_pci_hot_reset, count);
1405 struct vfio_pci_hot_reset hdr;
1406 bool slot = false;
1407
1408 if (copy_from_user(&hdr, arg, minsz))
1409 return -EFAULT;
1410
1411 if (hdr.argsz < minsz || hdr.flags)
1412 return -EINVAL;
1413
1414 /* zero-length array is only for cdev opened devices */
1415 if (!!hdr.count == vfio_device_cdev_opened(&vdev->vdev))
1416 return -EINVAL;
1417
1418 /* Can we do a slot or bus reset or neither? */
1419 if (!pci_probe_reset_slot(vdev->pdev->slot))
1420 slot = true;
1421 else if (pci_probe_reset_bus(vdev->pdev->bus))
1422 return -ENODEV;
1423
1424 if (hdr.count)
1425 return vfio_pci_ioctl_pci_hot_reset_groups(vdev, hdr.count, slot, arg);
1426
1427 return vfio_pci_dev_set_hot_reset(vdev->vdev.dev_set, NULL,
1428 vfio_iommufd_device_ictx(&vdev->vdev));
1429 }
1430
vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device * vdev,struct vfio_device_ioeventfd __user * arg)1431 static int vfio_pci_ioctl_ioeventfd(struct vfio_pci_core_device *vdev,
1432 struct vfio_device_ioeventfd __user *arg)
1433 {
1434 unsigned long minsz = offsetofend(struct vfio_device_ioeventfd, fd);
1435 struct vfio_device_ioeventfd ioeventfd;
1436 int count;
1437
1438 if (copy_from_user(&ioeventfd, arg, minsz))
1439 return -EFAULT;
1440
1441 if (ioeventfd.argsz < minsz)
1442 return -EINVAL;
1443
1444 if (ioeventfd.flags & ~VFIO_DEVICE_IOEVENTFD_SIZE_MASK)
1445 return -EINVAL;
1446
1447 count = ioeventfd.flags & VFIO_DEVICE_IOEVENTFD_SIZE_MASK;
1448
1449 if (hweight8(count) != 1 || ioeventfd.fd < -1)
1450 return -EINVAL;
1451
1452 return vfio_pci_ioeventfd(vdev, ioeventfd.offset, ioeventfd.data, count,
1453 ioeventfd.fd);
1454 }
1455
vfio_pci_core_ioctl(struct vfio_device * core_vdev,unsigned int cmd,unsigned long arg)1456 long vfio_pci_core_ioctl(struct vfio_device *core_vdev, unsigned int cmd,
1457 unsigned long arg)
1458 {
1459 struct vfio_pci_core_device *vdev =
1460 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1461 void __user *uarg = (void __user *)arg;
1462
1463 switch (cmd) {
1464 case VFIO_DEVICE_GET_INFO:
1465 return vfio_pci_ioctl_get_info(vdev, uarg);
1466 case VFIO_DEVICE_GET_IRQ_INFO:
1467 return vfio_pci_ioctl_get_irq_info(vdev, uarg);
1468 case VFIO_DEVICE_GET_PCI_HOT_RESET_INFO:
1469 return vfio_pci_ioctl_get_pci_hot_reset_info(vdev, uarg);
1470 case VFIO_DEVICE_IOEVENTFD:
1471 return vfio_pci_ioctl_ioeventfd(vdev, uarg);
1472 case VFIO_DEVICE_PCI_HOT_RESET:
1473 return vfio_pci_ioctl_pci_hot_reset(vdev, uarg);
1474 case VFIO_DEVICE_RESET:
1475 return vfio_pci_ioctl_reset(vdev, uarg);
1476 case VFIO_DEVICE_SET_IRQS:
1477 return vfio_pci_ioctl_set_irqs(vdev, uarg);
1478 default:
1479 return -ENOTTY;
1480 }
1481 }
1482 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl);
1483
vfio_pci_core_feature_token(struct vfio_pci_core_device * vdev,u32 flags,uuid_t __user * arg,size_t argsz)1484 static int vfio_pci_core_feature_token(struct vfio_pci_core_device *vdev,
1485 u32 flags, uuid_t __user *arg,
1486 size_t argsz)
1487 {
1488 uuid_t uuid;
1489 int ret;
1490
1491 if (!vdev->vf_token)
1492 return -ENOTTY;
1493 /*
1494 * We do not support GET of the VF Token UUID as this could
1495 * expose the token of the previous device user.
1496 */
1497 ret = vfio_check_feature(flags, argsz, VFIO_DEVICE_FEATURE_SET,
1498 sizeof(uuid));
1499 if (ret != 1)
1500 return ret;
1501
1502 if (copy_from_user(&uuid, arg, sizeof(uuid)))
1503 return -EFAULT;
1504
1505 mutex_lock(&vdev->vf_token->lock);
1506 uuid_copy(&vdev->vf_token->uuid, &uuid);
1507 mutex_unlock(&vdev->vf_token->lock);
1508 return 0;
1509 }
1510
vfio_pci_core_ioctl_feature(struct vfio_device * device,u32 flags,void __user * arg,size_t argsz)1511 int vfio_pci_core_ioctl_feature(struct vfio_device *device, u32 flags,
1512 void __user *arg, size_t argsz)
1513 {
1514 struct vfio_pci_core_device *vdev =
1515 container_of(device, struct vfio_pci_core_device, vdev);
1516
1517 switch (flags & VFIO_DEVICE_FEATURE_MASK) {
1518 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY:
1519 return vfio_pci_core_pm_entry(vdev, flags, arg, argsz);
1520 case VFIO_DEVICE_FEATURE_LOW_POWER_ENTRY_WITH_WAKEUP:
1521 return vfio_pci_core_pm_entry_with_wakeup(vdev, flags,
1522 arg, argsz);
1523 case VFIO_DEVICE_FEATURE_LOW_POWER_EXIT:
1524 return vfio_pci_core_pm_exit(vdev, flags, arg, argsz);
1525 case VFIO_DEVICE_FEATURE_PCI_VF_TOKEN:
1526 return vfio_pci_core_feature_token(vdev, flags, arg, argsz);
1527 case VFIO_DEVICE_FEATURE_DMA_BUF:
1528 return vfio_pci_core_feature_dma_buf(vdev, flags, arg, argsz);
1529 default:
1530 return -ENOTTY;
1531 }
1532 }
1533 EXPORT_SYMBOL_GPL(vfio_pci_core_ioctl_feature);
1534
vfio_pci_rw(struct vfio_pci_core_device * vdev,char __user * buf,size_t count,loff_t * ppos,bool iswrite)1535 static ssize_t vfio_pci_rw(struct vfio_pci_core_device *vdev, char __user *buf,
1536 size_t count, loff_t *ppos, bool iswrite)
1537 {
1538 unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
1539 int ret;
1540
1541 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1542 return -EINVAL;
1543
1544 ret = pm_runtime_resume_and_get(&vdev->pdev->dev);
1545 if (ret) {
1546 pci_info_ratelimited(vdev->pdev, "runtime resume failed %d\n",
1547 ret);
1548 return -EIO;
1549 }
1550
1551 switch (index) {
1552 case VFIO_PCI_CONFIG_REGION_INDEX:
1553 ret = vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
1554 break;
1555
1556 case VFIO_PCI_ROM_REGION_INDEX:
1557 if (iswrite)
1558 ret = -EINVAL;
1559 else
1560 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, false);
1561 break;
1562
1563 case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1564 ret = vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
1565 break;
1566
1567 case VFIO_PCI_VGA_REGION_INDEX:
1568 ret = vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
1569 break;
1570
1571 default:
1572 index -= VFIO_PCI_NUM_REGIONS;
1573 ret = vdev->region[index].ops->rw(vdev, buf,
1574 count, ppos, iswrite);
1575 break;
1576 }
1577
1578 pm_runtime_put(&vdev->pdev->dev);
1579 return ret;
1580 }
1581
vfio_pci_core_read(struct vfio_device * core_vdev,char __user * buf,size_t count,loff_t * ppos)1582 ssize_t vfio_pci_core_read(struct vfio_device *core_vdev, char __user *buf,
1583 size_t count, loff_t *ppos)
1584 {
1585 struct vfio_pci_core_device *vdev =
1586 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1587
1588 if (!count)
1589 return 0;
1590
1591 return vfio_pci_rw(vdev, buf, count, ppos, false);
1592 }
1593 EXPORT_SYMBOL_GPL(vfio_pci_core_read);
1594
vfio_pci_core_write(struct vfio_device * core_vdev,const char __user * buf,size_t count,loff_t * ppos)1595 ssize_t vfio_pci_core_write(struct vfio_device *core_vdev, const char __user *buf,
1596 size_t count, loff_t *ppos)
1597 {
1598 struct vfio_pci_core_device *vdev =
1599 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1600
1601 if (!count)
1602 return 0;
1603
1604 return vfio_pci_rw(vdev, (char __user *)buf, count, ppos, true);
1605 }
1606 EXPORT_SYMBOL_GPL(vfio_pci_core_write);
1607
vfio_pci_zap_bars(struct vfio_pci_core_device * vdev)1608 static void vfio_pci_zap_bars(struct vfio_pci_core_device *vdev)
1609 {
1610 struct vfio_device *core_vdev = &vdev->vdev;
1611 loff_t start = VFIO_PCI_INDEX_TO_OFFSET(VFIO_PCI_BAR0_REGION_INDEX);
1612 loff_t end = VFIO_PCI_INDEX_TO_OFFSET(VFIO_PCI_ROM_REGION_INDEX);
1613 loff_t len = end - start;
1614
1615 unmap_mapping_range(core_vdev->inode->i_mapping, start, len, true);
1616 }
1617
vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device * vdev)1618 void vfio_pci_zap_and_down_write_memory_lock(struct vfio_pci_core_device *vdev)
1619 {
1620 down_write(&vdev->memory_lock);
1621 vfio_pci_zap_bars(vdev);
1622 }
1623
vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device * vdev)1624 u16 vfio_pci_memory_lock_and_enable(struct vfio_pci_core_device *vdev)
1625 {
1626 u16 cmd;
1627
1628 down_write(&vdev->memory_lock);
1629 pci_read_config_word(vdev->pdev, PCI_COMMAND, &cmd);
1630 if (!(cmd & PCI_COMMAND_MEMORY))
1631 pci_write_config_word(vdev->pdev, PCI_COMMAND,
1632 cmd | PCI_COMMAND_MEMORY);
1633
1634 return cmd;
1635 }
1636
vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device * vdev,u16 cmd)1637 void vfio_pci_memory_unlock_and_restore(struct vfio_pci_core_device *vdev, u16 cmd)
1638 {
1639 pci_write_config_word(vdev->pdev, PCI_COMMAND, cmd);
1640 up_write(&vdev->memory_lock);
1641 }
1642
vma_to_pfn(struct vm_area_struct * vma)1643 static unsigned long vma_to_pfn(struct vm_area_struct *vma)
1644 {
1645 struct vfio_pci_core_device *vdev = vma->vm_private_data;
1646 int index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1647 u64 pgoff;
1648
1649 pgoff = vma->vm_pgoff &
1650 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1651
1652 return (pci_resource_start(vdev->pdev, index) >> PAGE_SHIFT) + pgoff;
1653 }
1654
vfio_pci_vmf_insert_pfn(struct vfio_pci_core_device * vdev,struct vm_fault * vmf,unsigned long pfn,unsigned int order)1655 vm_fault_t vfio_pci_vmf_insert_pfn(struct vfio_pci_core_device *vdev,
1656 struct vm_fault *vmf,
1657 unsigned long pfn,
1658 unsigned int order)
1659 {
1660 lockdep_assert_held_read(&vdev->memory_lock);
1661
1662 if (vdev->pm_runtime_engaged || !__vfio_pci_memory_enabled(vdev))
1663 return VM_FAULT_SIGBUS;
1664
1665 switch (order) {
1666 case 0:
1667 return vmf_insert_pfn(vmf->vma, vmf->address, pfn);
1668 #ifdef CONFIG_ARCH_SUPPORTS_PMD_PFNMAP
1669 case PMD_ORDER:
1670 return vmf_insert_pfn_pmd(vmf, pfn, false);
1671 #endif
1672 #ifdef CONFIG_ARCH_SUPPORTS_PUD_PFNMAP
1673 case PUD_ORDER:
1674 return vmf_insert_pfn_pud(vmf, pfn, false);
1675 break;
1676 #endif
1677 default:
1678 return VM_FAULT_FALLBACK;
1679 }
1680 }
1681 EXPORT_SYMBOL_GPL(vfio_pci_vmf_insert_pfn);
1682
vfio_pci_mmap_huge_fault(struct vm_fault * vmf,unsigned int order)1683 static vm_fault_t vfio_pci_mmap_huge_fault(struct vm_fault *vmf,
1684 unsigned int order)
1685 {
1686 struct vm_area_struct *vma = vmf->vma;
1687 struct vfio_pci_core_device *vdev = vma->vm_private_data;
1688 unsigned long addr = vmf->address & ~((PAGE_SIZE << order) - 1);
1689 unsigned long pgoff = (addr - vma->vm_start) >> PAGE_SHIFT;
1690 unsigned long pfn = vma_to_pfn(vma) + pgoff;
1691 vm_fault_t ret = VM_FAULT_FALLBACK;
1692
1693 if (is_aligned_for_order(vma, addr, pfn, order)) {
1694 scoped_guard(rwsem_read, &vdev->memory_lock)
1695 ret = vfio_pci_vmf_insert_pfn(vdev, vmf, pfn, order);
1696 }
1697
1698 dev_dbg_ratelimited(&vdev->pdev->dev,
1699 "%s(,order = %d) BAR %ld page offset 0x%lx: 0x%x\n",
1700 __func__, order,
1701 vma->vm_pgoff >>
1702 (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT),
1703 pgoff, (unsigned int)ret);
1704
1705 return ret;
1706 }
1707
vfio_pci_mmap_page_fault(struct vm_fault * vmf)1708 static vm_fault_t vfio_pci_mmap_page_fault(struct vm_fault *vmf)
1709 {
1710 return vfio_pci_mmap_huge_fault(vmf, 0);
1711 }
1712
1713 static const struct vm_operations_struct vfio_pci_mmap_ops = {
1714 .fault = vfio_pci_mmap_page_fault,
1715 #ifdef CONFIG_ARCH_SUPPORTS_HUGE_PFNMAP
1716 .huge_fault = vfio_pci_mmap_huge_fault,
1717 #endif
1718 };
1719
vfio_pci_core_mmap(struct vfio_device * core_vdev,struct vm_area_struct * vma)1720 int vfio_pci_core_mmap(struct vfio_device *core_vdev, struct vm_area_struct *vma)
1721 {
1722 struct vfio_pci_core_device *vdev =
1723 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1724 struct pci_dev *pdev = vdev->pdev;
1725 unsigned int index;
1726 u64 phys_len, req_len, pgoff, req_start;
1727 int ret;
1728
1729 index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
1730
1731 if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
1732 return -EINVAL;
1733 if (vma->vm_end < vma->vm_start)
1734 return -EINVAL;
1735 if ((vma->vm_flags & VM_SHARED) == 0)
1736 return -EINVAL;
1737 if (index >= VFIO_PCI_NUM_REGIONS) {
1738 int regnum = index - VFIO_PCI_NUM_REGIONS;
1739 struct vfio_pci_region *region = vdev->region + regnum;
1740
1741 if (region->ops && region->ops->mmap &&
1742 (region->flags & VFIO_REGION_INFO_FLAG_MMAP))
1743 return region->ops->mmap(vdev, region, vma);
1744 return -EINVAL;
1745 }
1746 if (index >= VFIO_PCI_ROM_REGION_INDEX)
1747 return -EINVAL;
1748 if (!vdev->bar_mmap_supported[index])
1749 return -EINVAL;
1750
1751 phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
1752 req_len = vma->vm_end - vma->vm_start;
1753 pgoff = vma->vm_pgoff &
1754 ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
1755 req_start = pgoff << PAGE_SHIFT;
1756
1757 if (req_start + req_len > phys_len)
1758 return -EINVAL;
1759
1760 /*
1761 * Even though we don't make use of the barmap for the mmap,
1762 * we need to request the region and the barmap tracks that.
1763 */
1764 ret = vfio_pci_core_setup_barmap(vdev, index);
1765 if (ret)
1766 return ret;
1767
1768 vma->vm_private_data = vdev;
1769 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1770 vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
1771
1772 /*
1773 * Set vm_flags now, they should not be changed in the fault handler.
1774 * We want the same flags and page protection (decrypted above) as
1775 * io_remap_pfn_range() would set.
1776 *
1777 * VM_ALLOW_ANY_UNCACHED: The VMA flag is implemented for ARM64,
1778 * allowing KVM stage 2 device mapping attributes to use Normal-NC
1779 * rather than DEVICE_nGnRE, which allows guest mappings
1780 * supporting write-combining attributes (WC). ARM does not
1781 * architecturally guarantee this is safe, and indeed some MMIO
1782 * regions like the GICv2 VCPU interface can trigger uncontained
1783 * faults if Normal-NC is used.
1784 *
1785 * To safely use VFIO in KVM the platform must guarantee full
1786 * safety in the guest where no action taken against a MMIO
1787 * mapping can trigger an uncontained failure. The assumption is
1788 * that most VFIO PCI platforms support this for both mapping types,
1789 * at least in common flows, based on some expectations of how
1790 * PCI IP is integrated. Hence VM_ALLOW_ANY_UNCACHED is set in
1791 * the VMA flags.
1792 */
1793 vm_flags_set(vma, VM_ALLOW_ANY_UNCACHED | VM_IO | VM_PFNMAP |
1794 VM_DONTEXPAND | VM_DONTDUMP);
1795 vma->vm_ops = &vfio_pci_mmap_ops;
1796
1797 return 0;
1798 }
1799 EXPORT_SYMBOL_GPL(vfio_pci_core_mmap);
1800
vfio_pci_core_request(struct vfio_device * core_vdev,unsigned int count)1801 void vfio_pci_core_request(struct vfio_device *core_vdev, unsigned int count)
1802 {
1803 struct vfio_pci_core_device *vdev =
1804 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1805 struct pci_dev *pdev = vdev->pdev;
1806 struct vfio_pci_eventfd *eventfd;
1807
1808 rcu_read_lock();
1809 eventfd = rcu_dereference(vdev->req_trigger);
1810 if (eventfd) {
1811 if (!(count % 10))
1812 pci_notice_ratelimited(pdev,
1813 "Relaying device request to user (#%u)\n",
1814 count);
1815 eventfd_signal(eventfd->ctx);
1816 } else if (count == 0) {
1817 pci_warn(pdev,
1818 "No device request channel registered, blocked until released by user\n");
1819 }
1820 rcu_read_unlock();
1821 }
1822 EXPORT_SYMBOL_GPL(vfio_pci_core_request);
1823
vfio_pci_core_match_token_uuid(struct vfio_device * core_vdev,const uuid_t * uuid)1824 int vfio_pci_core_match_token_uuid(struct vfio_device *core_vdev,
1825 const uuid_t *uuid)
1826
1827 {
1828 struct vfio_pci_core_device *vdev =
1829 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1830
1831 /*
1832 * There's always some degree of trust or collaboration between SR-IOV
1833 * PF and VFs, even if just that the PF hosts the SR-IOV capability and
1834 * can disrupt VFs with a reset, but often the PF has more explicit
1835 * access to deny service to the VF or access data passed through the
1836 * VF. We therefore require an opt-in via a shared VF token (UUID) to
1837 * represent this trust. This both prevents that a VF driver might
1838 * assume the PF driver is a trusted, in-kernel driver, and also that
1839 * a PF driver might be replaced with a rogue driver, unknown to in-use
1840 * VF drivers.
1841 *
1842 * Therefore when presented with a VF, if the PF is a vfio device and
1843 * it is bound to the vfio-pci driver, the user needs to provide a VF
1844 * token to access the device, in the form of appending a vf_token to
1845 * the device name, for example:
1846 *
1847 * "0000:04:10.0 vf_token=bd8d9d2b-5a5f-4f5a-a211-f591514ba1f3"
1848 *
1849 * When presented with a PF which has VFs in use, the user must also
1850 * provide the current VF token to prove collaboration with existing
1851 * VF users. If VFs are not in use, the VF token provided for the PF
1852 * device will act to set the VF token.
1853 *
1854 * If the VF token is provided but unused, an error is generated.
1855 */
1856 if (vdev->pdev->is_virtfn) {
1857 struct vfio_pci_core_device *pf_vdev = vdev->sriov_pf_core_dev;
1858 bool match;
1859
1860 if (!pf_vdev) {
1861 if (!uuid)
1862 return 0; /* PF is not vfio-pci, no VF token */
1863
1864 pci_info_ratelimited(vdev->pdev,
1865 "VF token incorrectly provided, PF not bound to vfio-pci\n");
1866 return -EINVAL;
1867 }
1868
1869 if (!uuid) {
1870 pci_info_ratelimited(vdev->pdev,
1871 "VF token required to access device\n");
1872 return -EACCES;
1873 }
1874
1875 mutex_lock(&pf_vdev->vf_token->lock);
1876 match = uuid_equal(uuid, &pf_vdev->vf_token->uuid);
1877 mutex_unlock(&pf_vdev->vf_token->lock);
1878
1879 if (!match) {
1880 pci_info_ratelimited(vdev->pdev,
1881 "Incorrect VF token provided for device\n");
1882 return -EACCES;
1883 }
1884 } else if (vdev->vf_token) {
1885 mutex_lock(&vdev->vf_token->lock);
1886 if (vdev->vf_token->users) {
1887 if (!uuid) {
1888 mutex_unlock(&vdev->vf_token->lock);
1889 pci_info_ratelimited(vdev->pdev,
1890 "VF token required to access device\n");
1891 return -EACCES;
1892 }
1893
1894 if (!uuid_equal(uuid, &vdev->vf_token->uuid)) {
1895 mutex_unlock(&vdev->vf_token->lock);
1896 pci_info_ratelimited(vdev->pdev,
1897 "Incorrect VF token provided for device\n");
1898 return -EACCES;
1899 }
1900 } else if (uuid) {
1901 uuid_copy(&vdev->vf_token->uuid, uuid);
1902 }
1903
1904 mutex_unlock(&vdev->vf_token->lock);
1905 } else if (uuid) {
1906 pci_info_ratelimited(vdev->pdev,
1907 "VF token incorrectly provided, not a PF or VF\n");
1908 return -EINVAL;
1909 }
1910
1911 return 0;
1912 }
1913 EXPORT_SYMBOL_GPL(vfio_pci_core_match_token_uuid);
1914
1915 #define VF_TOKEN_ARG "vf_token="
1916
vfio_pci_core_match(struct vfio_device * core_vdev,char * buf)1917 int vfio_pci_core_match(struct vfio_device *core_vdev, char *buf)
1918 {
1919 struct vfio_pci_core_device *vdev =
1920 container_of(core_vdev, struct vfio_pci_core_device, vdev);
1921 bool vf_token = false;
1922 uuid_t uuid;
1923 int ret;
1924
1925 if (strncmp(pci_name(vdev->pdev), buf, strlen(pci_name(vdev->pdev))))
1926 return 0; /* No match */
1927
1928 if (strlen(buf) > strlen(pci_name(vdev->pdev))) {
1929 buf += strlen(pci_name(vdev->pdev));
1930
1931 if (*buf != ' ')
1932 return 0; /* No match: non-whitespace after name */
1933
1934 while (*buf) {
1935 if (*buf == ' ') {
1936 buf++;
1937 continue;
1938 }
1939
1940 if (!vf_token && !strncmp(buf, VF_TOKEN_ARG,
1941 strlen(VF_TOKEN_ARG))) {
1942 buf += strlen(VF_TOKEN_ARG);
1943
1944 if (strlen(buf) < UUID_STRING_LEN)
1945 return -EINVAL;
1946
1947 ret = uuid_parse(buf, &uuid);
1948 if (ret)
1949 return ret;
1950
1951 vf_token = true;
1952 buf += UUID_STRING_LEN;
1953 } else {
1954 /* Unknown/duplicate option */
1955 return -EINVAL;
1956 }
1957 }
1958 }
1959
1960 ret = core_vdev->ops->match_token_uuid(core_vdev,
1961 vf_token ? &uuid : NULL);
1962 if (ret)
1963 return ret;
1964
1965 return 1; /* Match */
1966 }
1967 EXPORT_SYMBOL_GPL(vfio_pci_core_match);
1968
vfio_pci_bus_notifier(struct notifier_block * nb,unsigned long action,void * data)1969 static int vfio_pci_bus_notifier(struct notifier_block *nb,
1970 unsigned long action, void *data)
1971 {
1972 struct vfio_pci_core_device *vdev = container_of(nb,
1973 struct vfio_pci_core_device, nb);
1974 struct device *dev = data;
1975 struct pci_dev *pdev = to_pci_dev(dev);
1976 struct pci_dev *physfn = pci_physfn(pdev);
1977
1978 if (action == BUS_NOTIFY_ADD_DEVICE &&
1979 pdev->is_virtfn && physfn == vdev->pdev) {
1980 pci_info(vdev->pdev, "Captured SR-IOV VF %s driver_override\n",
1981 pci_name(pdev));
1982 pdev->driver_override = kasprintf(GFP_KERNEL, "%s",
1983 vdev->vdev.ops->name);
1984 WARN_ON(!pdev->driver_override);
1985 } else if (action == BUS_NOTIFY_BOUND_DRIVER &&
1986 pdev->is_virtfn && physfn == vdev->pdev) {
1987 struct pci_driver *drv = pci_dev_driver(pdev);
1988
1989 if (drv && drv != pci_dev_driver(vdev->pdev))
1990 pci_warn(vdev->pdev,
1991 "VF %s bound to driver %s while PF bound to driver %s\n",
1992 pci_name(pdev), drv->name,
1993 pci_dev_driver(vdev->pdev)->name);
1994 }
1995
1996 return 0;
1997 }
1998
vfio_pci_vf_init(struct vfio_pci_core_device * vdev)1999 static int vfio_pci_vf_init(struct vfio_pci_core_device *vdev)
2000 {
2001 struct pci_dev *pdev = vdev->pdev;
2002 struct vfio_pci_core_device *cur;
2003 struct pci_dev *physfn;
2004 int ret;
2005
2006 if (pdev->is_virtfn) {
2007 /*
2008 * If this VF was created by our vfio_pci_core_sriov_configure()
2009 * then we can find the PF vfio_pci_core_device now, and due to
2010 * the locking in pci_disable_sriov() it cannot change until
2011 * this VF device driver is removed.
2012 */
2013 physfn = pci_physfn(vdev->pdev);
2014 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2015 list_for_each_entry(cur, &vfio_pci_sriov_pfs, sriov_pfs_item) {
2016 if (cur->pdev == physfn) {
2017 vdev->sriov_pf_core_dev = cur;
2018 break;
2019 }
2020 }
2021 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2022 return 0;
2023 }
2024
2025 /* Not a SRIOV PF */
2026 if (!pdev->is_physfn)
2027 return 0;
2028
2029 vdev->vf_token = kzalloc(sizeof(*vdev->vf_token), GFP_KERNEL);
2030 if (!vdev->vf_token)
2031 return -ENOMEM;
2032
2033 mutex_init(&vdev->vf_token->lock);
2034 uuid_gen(&vdev->vf_token->uuid);
2035
2036 vdev->nb.notifier_call = vfio_pci_bus_notifier;
2037 ret = bus_register_notifier(&pci_bus_type, &vdev->nb);
2038 if (ret) {
2039 kfree(vdev->vf_token);
2040 return ret;
2041 }
2042 return 0;
2043 }
2044
vfio_pci_vf_uninit(struct vfio_pci_core_device * vdev)2045 static void vfio_pci_vf_uninit(struct vfio_pci_core_device *vdev)
2046 {
2047 if (!vdev->vf_token)
2048 return;
2049
2050 bus_unregister_notifier(&pci_bus_type, &vdev->nb);
2051 WARN_ON(vdev->vf_token->users);
2052 mutex_destroy(&vdev->vf_token->lock);
2053 kfree(vdev->vf_token);
2054 }
2055
vfio_pci_vga_init(struct vfio_pci_core_device * vdev)2056 static int vfio_pci_vga_init(struct vfio_pci_core_device *vdev)
2057 {
2058 struct pci_dev *pdev = vdev->pdev;
2059 int ret;
2060
2061 if (!vfio_pci_is_vga(pdev))
2062 return 0;
2063
2064 ret = aperture_remove_conflicting_pci_devices(pdev, vdev->vdev.ops->name);
2065 if (ret)
2066 return ret;
2067
2068 ret = vga_client_register(pdev, vfio_pci_set_decode);
2069 if (ret)
2070 return ret;
2071 vga_set_legacy_decoding(pdev, vfio_pci_set_decode(pdev, false));
2072 return 0;
2073 }
2074
vfio_pci_vga_uninit(struct vfio_pci_core_device * vdev)2075 static void vfio_pci_vga_uninit(struct vfio_pci_core_device *vdev)
2076 {
2077 struct pci_dev *pdev = vdev->pdev;
2078
2079 if (!vfio_pci_is_vga(pdev))
2080 return;
2081 vga_client_unregister(pdev);
2082 vga_set_legacy_decoding(pdev, VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
2083 VGA_RSRC_LEGACY_IO |
2084 VGA_RSRC_LEGACY_MEM);
2085 }
2086
vfio_pci_core_init_dev(struct vfio_device * core_vdev)2087 int vfio_pci_core_init_dev(struct vfio_device *core_vdev)
2088 {
2089 struct vfio_pci_core_device *vdev =
2090 container_of(core_vdev, struct vfio_pci_core_device, vdev);
2091 int ret;
2092
2093 vdev->pdev = to_pci_dev(core_vdev->dev);
2094 vdev->irq_type = VFIO_PCI_NUM_IRQS;
2095 mutex_init(&vdev->igate);
2096 spin_lock_init(&vdev->irqlock);
2097 mutex_init(&vdev->ioeventfds_lock);
2098 INIT_LIST_HEAD(&vdev->dummy_resources_list);
2099 INIT_LIST_HEAD(&vdev->ioeventfds_list);
2100 INIT_LIST_HEAD(&vdev->sriov_pfs_item);
2101 ret = pcim_p2pdma_init(vdev->pdev);
2102 if (ret && ret != -EOPNOTSUPP)
2103 return ret;
2104 INIT_LIST_HEAD(&vdev->dmabufs);
2105 init_rwsem(&vdev->memory_lock);
2106 xa_init(&vdev->ctx);
2107
2108 return 0;
2109 }
2110 EXPORT_SYMBOL_GPL(vfio_pci_core_init_dev);
2111
vfio_pci_core_release_dev(struct vfio_device * core_vdev)2112 void vfio_pci_core_release_dev(struct vfio_device *core_vdev)
2113 {
2114 struct vfio_pci_core_device *vdev =
2115 container_of(core_vdev, struct vfio_pci_core_device, vdev);
2116
2117 mutex_destroy(&vdev->igate);
2118 mutex_destroy(&vdev->ioeventfds_lock);
2119 kfree(vdev->region);
2120 kfree(vdev->pm_save);
2121 }
2122 EXPORT_SYMBOL_GPL(vfio_pci_core_release_dev);
2123
vfio_pci_core_register_device(struct vfio_pci_core_device * vdev)2124 int vfio_pci_core_register_device(struct vfio_pci_core_device *vdev)
2125 {
2126 struct pci_dev *pdev = vdev->pdev;
2127 struct device *dev = &pdev->dev;
2128 int ret;
2129
2130 /* Drivers must set the vfio_pci_core_device to their drvdata */
2131 if (WARN_ON(vdev != dev_get_drvdata(dev)))
2132 return -EINVAL;
2133
2134 if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
2135 return -EINVAL;
2136
2137 if (vdev->vdev.mig_ops) {
2138 if (!(vdev->vdev.mig_ops->migration_get_state &&
2139 vdev->vdev.mig_ops->migration_set_state &&
2140 vdev->vdev.mig_ops->migration_get_data_size) ||
2141 !(vdev->vdev.migration_flags & VFIO_MIGRATION_STOP_COPY))
2142 return -EINVAL;
2143 }
2144
2145 if (vdev->vdev.log_ops && !(vdev->vdev.log_ops->log_start &&
2146 vdev->vdev.log_ops->log_stop &&
2147 vdev->vdev.log_ops->log_read_and_clear))
2148 return -EINVAL;
2149
2150 /*
2151 * Prevent binding to PFs with VFs enabled, the VFs might be in use
2152 * by the host or other users. We cannot capture the VFs if they
2153 * already exist, nor can we track VF users. Disabling SR-IOV here
2154 * would initiate removing the VFs, which would unbind the driver,
2155 * which is prone to blocking if that VF is also in use by vfio-pci.
2156 * Just reject these PFs and let the user sort it out.
2157 */
2158 if (pci_num_vf(pdev)) {
2159 pci_warn(pdev, "Cannot bind to PF with SR-IOV enabled\n");
2160 return -EBUSY;
2161 }
2162
2163 if (pci_is_root_bus(pdev->bus) || pdev->is_virtfn) {
2164 ret = vfio_assign_device_set(&vdev->vdev, vdev);
2165 } else if (!pci_probe_reset_slot(pdev->slot)) {
2166 ret = vfio_assign_device_set(&vdev->vdev, pdev->slot);
2167 } else {
2168 /*
2169 * If there is no slot reset support for this device, the whole
2170 * bus needs to be grouped together to support bus-wide resets.
2171 */
2172 ret = vfio_assign_device_set(&vdev->vdev, pdev->bus);
2173 }
2174
2175 if (ret)
2176 return ret;
2177 ret = vfio_pci_vf_init(vdev);
2178 if (ret)
2179 return ret;
2180 ret = vfio_pci_vga_init(vdev);
2181 if (ret)
2182 goto out_vf;
2183
2184 vfio_pci_probe_power_state(vdev);
2185
2186 /*
2187 * pci-core sets the device power state to an unknown value at
2188 * bootup and after being removed from a driver. The only
2189 * transition it allows from this unknown state is to D0, which
2190 * typically happens when a driver calls pci_enable_device().
2191 * We're not ready to enable the device yet, but we do want to
2192 * be able to get to D3. Therefore first do a D0 transition
2193 * before enabling runtime PM.
2194 */
2195 vfio_pci_set_power_state(vdev, PCI_D0);
2196
2197 dev->driver->pm = &vfio_pci_core_pm_ops;
2198 pm_runtime_allow(dev);
2199 if (!disable_idle_d3)
2200 pm_runtime_put(dev);
2201
2202 ret = vfio_register_group_dev(&vdev->vdev);
2203 if (ret)
2204 goto out_power;
2205 return 0;
2206
2207 out_power:
2208 if (!disable_idle_d3)
2209 pm_runtime_get_noresume(dev);
2210
2211 pm_runtime_forbid(dev);
2212 out_vf:
2213 vfio_pci_vf_uninit(vdev);
2214 return ret;
2215 }
2216 EXPORT_SYMBOL_GPL(vfio_pci_core_register_device);
2217
vfio_pci_core_unregister_device(struct vfio_pci_core_device * vdev)2218 void vfio_pci_core_unregister_device(struct vfio_pci_core_device *vdev)
2219 {
2220 vfio_pci_core_sriov_configure(vdev, 0);
2221
2222 vfio_unregister_group_dev(&vdev->vdev);
2223
2224 vfio_pci_vf_uninit(vdev);
2225 vfio_pci_vga_uninit(vdev);
2226
2227 if (!disable_idle_d3)
2228 pm_runtime_get_noresume(&vdev->pdev->dev);
2229
2230 pm_runtime_forbid(&vdev->pdev->dev);
2231 }
2232 EXPORT_SYMBOL_GPL(vfio_pci_core_unregister_device);
2233
vfio_pci_core_aer_err_detected(struct pci_dev * pdev,pci_channel_state_t state)2234 pci_ers_result_t vfio_pci_core_aer_err_detected(struct pci_dev *pdev,
2235 pci_channel_state_t state)
2236 {
2237 struct vfio_pci_core_device *vdev = dev_get_drvdata(&pdev->dev);
2238 struct vfio_pci_eventfd *eventfd;
2239
2240 rcu_read_lock();
2241 eventfd = rcu_dereference(vdev->err_trigger);
2242 if (eventfd)
2243 eventfd_signal(eventfd->ctx);
2244 rcu_read_unlock();
2245
2246 return PCI_ERS_RESULT_CAN_RECOVER;
2247 }
2248 EXPORT_SYMBOL_GPL(vfio_pci_core_aer_err_detected);
2249
vfio_pci_core_sriov_configure(struct vfio_pci_core_device * vdev,int nr_virtfn)2250 int vfio_pci_core_sriov_configure(struct vfio_pci_core_device *vdev,
2251 int nr_virtfn)
2252 {
2253 struct pci_dev *pdev = vdev->pdev;
2254 int ret = 0;
2255
2256 device_lock_assert(&pdev->dev);
2257
2258 if (nr_virtfn) {
2259 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2260 /*
2261 * The thread that adds the vdev to the list is the only thread
2262 * that gets to call pci_enable_sriov() and we will only allow
2263 * it to be called once without going through
2264 * pci_disable_sriov()
2265 */
2266 if (!list_empty(&vdev->sriov_pfs_item)) {
2267 ret = -EINVAL;
2268 goto out_unlock;
2269 }
2270 list_add_tail(&vdev->sriov_pfs_item, &vfio_pci_sriov_pfs);
2271 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2272
2273 /*
2274 * The PF power state should always be higher than the VF power
2275 * state. The PF can be in low power state either with runtime
2276 * power management (when there is no user) or PCI_PM_CTRL
2277 * register write by the user. If PF is in the low power state,
2278 * then change the power state to D0 first before enabling
2279 * SR-IOV. Also, this function can be called at any time, and
2280 * userspace PCI_PM_CTRL write can race against this code path,
2281 * so protect the same with 'memory_lock'.
2282 */
2283 ret = pm_runtime_resume_and_get(&pdev->dev);
2284 if (ret)
2285 goto out_del;
2286
2287 down_write(&vdev->memory_lock);
2288 vfio_pci_set_power_state(vdev, PCI_D0);
2289 ret = pci_enable_sriov(pdev, nr_virtfn);
2290 up_write(&vdev->memory_lock);
2291 if (ret) {
2292 pm_runtime_put(&pdev->dev);
2293 goto out_del;
2294 }
2295 return nr_virtfn;
2296 }
2297
2298 if (pci_num_vf(pdev)) {
2299 pci_disable_sriov(pdev);
2300 pm_runtime_put(&pdev->dev);
2301 }
2302
2303 out_del:
2304 mutex_lock(&vfio_pci_sriov_pfs_mutex);
2305 list_del_init(&vdev->sriov_pfs_item);
2306 out_unlock:
2307 mutex_unlock(&vfio_pci_sriov_pfs_mutex);
2308 return ret;
2309 }
2310 EXPORT_SYMBOL_GPL(vfio_pci_core_sriov_configure);
2311
2312 const struct pci_error_handlers vfio_pci_core_err_handlers = {
2313 .error_detected = vfio_pci_core_aer_err_detected,
2314 };
2315 EXPORT_SYMBOL_GPL(vfio_pci_core_err_handlers);
2316
vfio_dev_in_groups(struct vfio_device * vdev,struct vfio_pci_group_info * groups)2317 static bool vfio_dev_in_groups(struct vfio_device *vdev,
2318 struct vfio_pci_group_info *groups)
2319 {
2320 unsigned int i;
2321
2322 if (!groups)
2323 return false;
2324
2325 for (i = 0; i < groups->count; i++)
2326 if (vfio_file_has_dev(groups->files[i], vdev))
2327 return true;
2328 return false;
2329 }
2330
vfio_pci_is_device_in_set(struct pci_dev * pdev,void * data)2331 static int vfio_pci_is_device_in_set(struct pci_dev *pdev, void *data)
2332 {
2333 struct vfio_device_set *dev_set = data;
2334
2335 return vfio_find_device_in_devset(dev_set, &pdev->dev) ? 0 : -ENODEV;
2336 }
2337
2338 /*
2339 * vfio-core considers a group to be viable and will create a vfio_device even
2340 * if some devices are bound to drivers like pci-stub or pcieport. Here we
2341 * require all PCI devices to be inside our dev_set since that ensures they stay
2342 * put and that every driver controlling the device can co-ordinate with the
2343 * device reset.
2344 *
2345 * Returns the pci_dev to pass to pci_reset_bus() if every PCI device to be
2346 * reset is inside the dev_set, and pci_reset_bus() can succeed. NULL otherwise.
2347 */
2348 static struct pci_dev *
vfio_pci_dev_set_resettable(struct vfio_device_set * dev_set)2349 vfio_pci_dev_set_resettable(struct vfio_device_set *dev_set)
2350 {
2351 struct pci_dev *pdev;
2352
2353 lockdep_assert_held(&dev_set->lock);
2354
2355 /*
2356 * By definition all PCI devices in the dev_set share the same PCI
2357 * reset, so any pci_dev will have the same outcomes for
2358 * pci_probe_reset_*() and pci_reset_bus().
2359 */
2360 pdev = list_first_entry(&dev_set->device_list,
2361 struct vfio_pci_core_device,
2362 vdev.dev_set_list)->pdev;
2363
2364 /* pci_reset_bus() is supported */
2365 if (pci_probe_reset_slot(pdev->slot) && pci_probe_reset_bus(pdev->bus))
2366 return NULL;
2367
2368 if (vfio_pci_for_each_slot_or_bus(pdev, vfio_pci_is_device_in_set,
2369 dev_set,
2370 !pci_probe_reset_slot(pdev->slot)))
2371 return NULL;
2372 return pdev;
2373 }
2374
vfio_pci_dev_set_pm_runtime_get(struct vfio_device_set * dev_set)2375 static int vfio_pci_dev_set_pm_runtime_get(struct vfio_device_set *dev_set)
2376 {
2377 struct vfio_pci_core_device *cur;
2378 int ret;
2379
2380 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) {
2381 ret = pm_runtime_resume_and_get(&cur->pdev->dev);
2382 if (ret)
2383 goto unwind;
2384 }
2385
2386 return 0;
2387
2388 unwind:
2389 list_for_each_entry_continue_reverse(cur, &dev_set->device_list,
2390 vdev.dev_set_list)
2391 pm_runtime_put(&cur->pdev->dev);
2392
2393 return ret;
2394 }
2395
vfio_pci_dev_set_hot_reset(struct vfio_device_set * dev_set,struct vfio_pci_group_info * groups,struct iommufd_ctx * iommufd_ctx)2396 static int vfio_pci_dev_set_hot_reset(struct vfio_device_set *dev_set,
2397 struct vfio_pci_group_info *groups,
2398 struct iommufd_ctx *iommufd_ctx)
2399 {
2400 struct vfio_pci_core_device *vdev;
2401 struct pci_dev *pdev;
2402 int ret;
2403
2404 mutex_lock(&dev_set->lock);
2405
2406 pdev = vfio_pci_dev_set_resettable(dev_set);
2407 if (!pdev) {
2408 ret = -EINVAL;
2409 goto err_unlock;
2410 }
2411
2412 /*
2413 * Some of the devices in the dev_set can be in the runtime suspended
2414 * state. Increment the usage count for all the devices in the dev_set
2415 * before reset and decrement the same after reset.
2416 */
2417 ret = vfio_pci_dev_set_pm_runtime_get(dev_set);
2418 if (ret)
2419 goto err_unlock;
2420
2421 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list) {
2422 bool owned;
2423
2424 /*
2425 * Test whether all the affected devices can be reset by the
2426 * user.
2427 *
2428 * If called from a group opened device and the user provides
2429 * a set of groups, all the devices in the dev_set should be
2430 * contained by the set of groups provided by the user.
2431 *
2432 * If called from a cdev opened device and the user provides
2433 * a zero-length array, all the devices in the dev_set must
2434 * be bound to the same iommufd_ctx as the input iommufd_ctx.
2435 * If there is any device that has not been bound to any
2436 * iommufd_ctx yet, check if its iommu_group has any device
2437 * bound to the input iommufd_ctx. Such devices can be
2438 * considered owned by the input iommufd_ctx as the device
2439 * cannot be owned by another iommufd_ctx when its iommu_group
2440 * is owned.
2441 *
2442 * Otherwise, reset is not allowed.
2443 */
2444 if (iommufd_ctx) {
2445 int devid = vfio_iommufd_get_dev_id(&vdev->vdev,
2446 iommufd_ctx);
2447
2448 owned = (devid > 0 || devid == -ENOENT);
2449 } else {
2450 owned = vfio_dev_in_groups(&vdev->vdev, groups);
2451 }
2452
2453 if (!owned) {
2454 ret = -EINVAL;
2455 break;
2456 }
2457
2458 /*
2459 * Take the memory write lock for each device and zap BAR
2460 * mappings to prevent the user accessing the device while in
2461 * reset. Locking multiple devices is prone to deadlock,
2462 * runaway and unwind if we hit contention.
2463 */
2464 if (!down_write_trylock(&vdev->memory_lock)) {
2465 ret = -EBUSY;
2466 break;
2467 }
2468
2469 vfio_pci_dma_buf_move(vdev, true);
2470 vfio_pci_zap_bars(vdev);
2471 }
2472
2473 if (!list_entry_is_head(vdev,
2474 &dev_set->device_list, vdev.dev_set_list)) {
2475 vdev = list_prev_entry(vdev, vdev.dev_set_list);
2476 goto err_undo;
2477 }
2478
2479 /*
2480 * The pci_reset_bus() will reset all the devices in the bus.
2481 * The power state can be non-D0 for some of the devices in the bus.
2482 * For these devices, the pci_reset_bus() will internally set
2483 * the power state to D0 without vfio driver involvement.
2484 * For the devices which have NoSoftRst-, the reset function can
2485 * cause the PCI config space reset without restoring the original
2486 * state (saved locally in 'vdev->pm_save').
2487 */
2488 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list)
2489 vfio_pci_set_power_state(vdev, PCI_D0);
2490
2491 ret = pci_reset_bus(pdev);
2492
2493 vdev = list_last_entry(&dev_set->device_list,
2494 struct vfio_pci_core_device, vdev.dev_set_list);
2495
2496 err_undo:
2497 list_for_each_entry_from_reverse(vdev, &dev_set->device_list,
2498 vdev.dev_set_list) {
2499 if (vdev->vdev.open_count && __vfio_pci_memory_enabled(vdev))
2500 vfio_pci_dma_buf_move(vdev, false);
2501 up_write(&vdev->memory_lock);
2502 }
2503
2504 list_for_each_entry(vdev, &dev_set->device_list, vdev.dev_set_list)
2505 pm_runtime_put(&vdev->pdev->dev);
2506
2507 err_unlock:
2508 mutex_unlock(&dev_set->lock);
2509 return ret;
2510 }
2511
vfio_pci_dev_set_needs_reset(struct vfio_device_set * dev_set)2512 static bool vfio_pci_dev_set_needs_reset(struct vfio_device_set *dev_set)
2513 {
2514 struct vfio_pci_core_device *cur;
2515 bool needs_reset = false;
2516
2517 /* No other VFIO device in the set can be open. */
2518 if (vfio_device_set_open_count(dev_set) > 1)
2519 return false;
2520
2521 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list)
2522 needs_reset |= cur->needs_reset;
2523 return needs_reset;
2524 }
2525
2526 /*
2527 * If a bus or slot reset is available for the provided dev_set and:
2528 * - All of the devices affected by that bus or slot reset are unused
2529 * - At least one of the affected devices is marked dirty via
2530 * needs_reset (such as by lack of FLR support)
2531 * Then attempt to perform that bus or slot reset.
2532 */
vfio_pci_dev_set_try_reset(struct vfio_device_set * dev_set)2533 static void vfio_pci_dev_set_try_reset(struct vfio_device_set *dev_set)
2534 {
2535 struct vfio_pci_core_device *cur;
2536 struct pci_dev *pdev;
2537 bool reset_done = false;
2538
2539 if (!vfio_pci_dev_set_needs_reset(dev_set))
2540 return;
2541
2542 pdev = vfio_pci_dev_set_resettable(dev_set);
2543 if (!pdev)
2544 return;
2545
2546 /*
2547 * Some of the devices in the bus can be in the runtime suspended
2548 * state. Increment the usage count for all the devices in the dev_set
2549 * before reset and decrement the same after reset.
2550 */
2551 if (!disable_idle_d3 && vfio_pci_dev_set_pm_runtime_get(dev_set))
2552 return;
2553
2554 if (!pci_reset_bus(pdev))
2555 reset_done = true;
2556
2557 list_for_each_entry(cur, &dev_set->device_list, vdev.dev_set_list) {
2558 if (reset_done)
2559 cur->needs_reset = false;
2560
2561 if (!disable_idle_d3)
2562 pm_runtime_put(&cur->pdev->dev);
2563 }
2564 }
2565
vfio_pci_core_set_params(bool is_nointxmask,bool is_disable_vga,bool is_disable_idle_d3)2566 void vfio_pci_core_set_params(bool is_nointxmask, bool is_disable_vga,
2567 bool is_disable_idle_d3)
2568 {
2569 nointxmask = is_nointxmask;
2570 disable_vga = is_disable_vga;
2571 disable_idle_d3 = is_disable_idle_d3;
2572 }
2573 EXPORT_SYMBOL_GPL(vfio_pci_core_set_params);
2574
vfio_pci_core_cleanup(void)2575 static void vfio_pci_core_cleanup(void)
2576 {
2577 vfio_pci_uninit_perm_bits();
2578 }
2579
vfio_pci_core_init(void)2580 static int __init vfio_pci_core_init(void)
2581 {
2582 /* Allocate shared config space permission data used by all devices */
2583 return vfio_pci_init_perm_bits();
2584 }
2585
2586 module_init(vfio_pci_core_init);
2587 module_exit(vfio_pci_core_cleanup);
2588
2589 MODULE_LICENSE("GPL v2");
2590 MODULE_AUTHOR(DRIVER_AUTHOR);
2591 MODULE_DESCRIPTION(DRIVER_DESC);
2592