xref: /linux/drivers/iio/light/veml3328.c (revision d2c9a99135da931377240942d44f3dea104cedb8)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Vishay VEML3328 RGBCIR light sensor driver
4  *
5  * Copyright (c) 2026 Joshua Crofts <joshua.crofts1@gmail.com>
6  *
7  * Datasheet: https://www.vishay.com/docs/84968/veml3328.pdf
8  */
9 
10 #include <linux/array_size.h>
11 #include <linux/bitfield.h>
12 #include <linux/bits.h>
13 #include <linux/cleanup.h>
14 #include <linux/delay.h>
15 #include <linux/err.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/mutex.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/regmap.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/time.h>
23 #include <linux/types.h>
24 
25 #include <linux/iio/iio.h>
26 
27 #define VEML3328_REG_CONF		0x00
28 #define VEML3328_REG_ID			0x0c
29 #define VEML3328_REG_DATA_C		0x04
30 #define VEML3328_REG_DATA_R		0x05
31 #define VEML3328_REG_DATA_G		0x06
32 #define VEML3328_REG_DATA_B		0x07
33 #define VEML3328_REG_DATA_IR		0x08
34 
35 #define VEML3328_CONF_IT_MASK		GENMASK(5, 4)
36 #define VEML3328_CONF_GAIN_MASK		GENMASK(11, 10)
37 
38 #define VEML3328_MAX_IT_TIME		(400 * USEC_PER_MSEC)
39 
40 #define VEML3328_ID_VAL			0x28
41 
42 #define VEML3328_SHUTDOWN		(BIT(0) | BIT(15))
43 
44 struct veml3328_data {
45 	struct regmap *regmap;
46 	/* Ensure read-modify-write sequences are not interrupted. */
47 	struct mutex lock;
48 };
49 
50 static const struct regmap_config veml3328_regmap_config = {
51 	.name = "veml3328",
52 	.reg_bits = 8,
53 	.val_bits = 16,
54 	.max_register = VEML3328_REG_ID,
55 	.val_format_endian = REGMAP_ENDIAN_LITTLE,
56 };
57 
58 #define VEML3328_CHAN_SPEC(_color, _addr) { \
59 	.type = IIO_INTENSITY, \
60 	.modified = 1, \
61 	.channel2 = IIO_MOD_LIGHT_##_color, \
62 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
63 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
64 	.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE), \
65 	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME), \
66 	.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME), \
67 	.address = _addr, \
68 }
69 
70 static const struct iio_chan_spec veml3328_channels[] = {
71 	{
72 		.type = IIO_LIGHT,
73 
74 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
75 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
76 		.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE),
77 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME),
78 		.info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME),
79 		.address = VEML3328_REG_DATA_G,
80 	},
81 	VEML3328_CHAN_SPEC(CLEAR, VEML3328_REG_DATA_C),
82 	VEML3328_CHAN_SPEC(RED, VEML3328_REG_DATA_R),
83 	VEML3328_CHAN_SPEC(GREEN, VEML3328_REG_DATA_G),
84 	VEML3328_CHAN_SPEC(BLUE, VEML3328_REG_DATA_B),
85 	VEML3328_CHAN_SPEC(IR, VEML3328_REG_DATA_IR),
86 };
87 
88 /*
89  * Precomputed scale values (micro units).
90  * Formula for calculation: 0.384 * (50000 / IT_us) * (1 / Gain)
91  * Gain indexes: 0 (x0.5), 1 (x1), 2 (x2), 3 (x4)
92  * IT indexes: 0 (50ms), 1 (100ms), 2 (200ms), 3 (400ms)
93  */
94 static const int veml3328_scale_vals[4][8] = {
95 	{ 0, 768000, 0, 384000, 0, 192000, 0, 96000 },
96 	{ 0, 384000, 0, 192000, 0, 96000,  0, 48000 },
97 	{ 0, 192000, 0, 96000,  0, 48000,  0, 24000 },
98 	{ 0, 96000,  0, 48000,  0, 24000,  0, 12000 },
99 };
100 
101 /* integration times in microseconds */
102 static const int veml3328_it_times[][2] = {
103 	{ 0, 50 * USEC_PER_MSEC },
104 	{ 0, 100 * USEC_PER_MSEC },
105 	{ 0, 200 * USEC_PER_MSEC },
106 	{ 0, 400 * USEC_PER_MSEC },
107 };
108 
veml3328_power_down(struct veml3328_data * data)109 static int veml3328_power_down(struct veml3328_data *data)
110 {
111 	return regmap_set_bits(data->regmap, VEML3328_REG_CONF,
112 			       VEML3328_SHUTDOWN);
113 }
114 
veml3328_power_up(struct veml3328_data * data)115 static int veml3328_power_up(struct veml3328_data *data)
116 {
117 	int ret;
118 
119 	ret = regmap_clear_bits(data->regmap, VEML3328_REG_CONF,
120 				VEML3328_SHUTDOWN);
121 	if (ret)
122 		return ret;
123 
124 	/*
125 	 * Sleep for maximum integration time to ensure sensor is powered on
126 	 * correctly.
127 	 */
128 	fsleep(VEML3328_MAX_IT_TIME);
129 
130 	return 0;
131 }
132 
veml3328_power_down_action(void * data)133 static void veml3328_power_down_action(void *data)
134 {
135 	veml3328_power_down(data);
136 }
137 
veml3328_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)138 static int veml3328_read_raw(struct iio_dev *indio_dev,
139 			     struct iio_chan_spec const *chan,
140 			     int *val, int *val2, long mask)
141 {
142 	struct veml3328_data *data = iio_priv(indio_dev);
143 	struct regmap *regmap = data->regmap;
144 	struct device *dev = regmap_get_device(regmap);
145 	unsigned int reg_val;
146 	int it_inx, gain_inx;
147 	int ret;
148 
149 	PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(dev, pm);
150 	ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
151 	if (ret)
152 		return ret;
153 
154 	switch (mask) {
155 	case IIO_CHAN_INFO_RAW:
156 		ret = regmap_read(regmap, chan->address, &reg_val);
157 		if (ret)
158 			return ret;
159 
160 		*val = reg_val;
161 		return IIO_VAL_INT;
162 
163 	case IIO_CHAN_INFO_INT_TIME:
164 		ret = regmap_read(regmap, VEML3328_REG_CONF, &reg_val);
165 		if (ret)
166 			return ret;
167 
168 		it_inx = FIELD_GET(VEML3328_CONF_IT_MASK, reg_val);
169 		if (it_inx >= ARRAY_SIZE(veml3328_it_times))
170 			return -EINVAL;
171 
172 		*val = veml3328_it_times[it_inx][0];
173 		*val2 = veml3328_it_times[it_inx][1];
174 		return IIO_VAL_INT_PLUS_MICRO;
175 
176 	case IIO_CHAN_INFO_SCALE:
177 		ret = regmap_read(regmap, VEML3328_REG_CONF, &reg_val);
178 		if (ret)
179 			return ret;
180 
181 		it_inx = FIELD_GET(VEML3328_CONF_IT_MASK, reg_val);
182 		gain_inx = FIELD_GET(VEML3328_CONF_GAIN_MASK, reg_val);
183 
184 		if (it_inx >= ARRAY_SIZE(veml3328_it_times) || gain_inx >= 4)
185 			return -EINVAL;
186 
187 		/* Stride by 2 through the flattened array to match (val, val2) */
188 		*val = veml3328_scale_vals[it_inx][gain_inx * 2];
189 		*val2 = veml3328_scale_vals[it_inx][gain_inx * 2 + 1];
190 
191 		return IIO_VAL_INT_PLUS_MICRO;
192 
193 	default:
194 		return -EINVAL;
195 	}
196 }
197 
veml3328_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)198 static int veml3328_read_avail(struct iio_dev *indio_dev,
199 			       struct iio_chan_spec const *chan,
200 			       const int **vals, int *type, int *length,
201 			       long mask)
202 {
203 	struct veml3328_data *data = iio_priv(indio_dev);
204 	struct regmap *regmap = data->regmap;
205 	struct device *dev = regmap_get_device(data->regmap);
206 	unsigned int reg_val;
207 	int ret, it_inx;
208 
209 	switch (mask) {
210 	case IIO_CHAN_INFO_INT_TIME:
211 		*length = ARRAY_SIZE(veml3328_it_times) * 2;
212 		*vals = (const int *)veml3328_it_times;
213 		*type = IIO_VAL_INT_PLUS_MICRO;
214 		return IIO_AVAIL_LIST;
215 
216 	case IIO_CHAN_INFO_SCALE: {
217 		PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(dev, pm);
218 		ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
219 		if (ret)
220 			return ret;
221 
222 		ret = regmap_read(regmap, VEML3328_REG_CONF, &reg_val);
223 		if (ret)
224 			return ret;
225 
226 		it_inx = FIELD_GET(VEML3328_CONF_IT_MASK, reg_val);
227 		if (it_inx >= ARRAY_SIZE(veml3328_it_times))
228 			return -EINVAL;
229 
230 		*length = 8;
231 		*vals = (const int *)veml3328_scale_vals[it_inx];
232 		*type = IIO_VAL_INT_PLUS_MICRO;
233 		return IIO_AVAIL_LIST;
234 	}
235 	default:
236 		return -EINVAL;
237 	}
238 }
239 
veml3328_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)240 static int veml3328_write_raw(struct iio_dev *indio_dev,
241 			      struct iio_chan_spec const *chan,
242 			      int val, int val2, long mask)
243 {
244 	struct veml3328_data *data = iio_priv(indio_dev);
245 	struct regmap *regmap = data->regmap;
246 	struct device *dev = regmap_get_device(regmap);
247 	unsigned int reg_val;
248 	int i, it_inx;
249 	int ret;
250 
251 	PM_RUNTIME_ACQUIRE_IF_ENABLED_AUTOSUSPEND(dev, pm);
252 	ret = PM_RUNTIME_ACQUIRE_ERR(&pm);
253 	if (ret)
254 		return ret;
255 
256 	guard(mutex)(&data->lock);
257 
258 	switch (mask) {
259 	case IIO_CHAN_INFO_INT_TIME:
260 		if (val != 0)
261 			return -EINVAL;
262 
263 		for (i = 0; i < ARRAY_SIZE(veml3328_it_times); i++) {
264 			if (veml3328_it_times[i][1] == val2)
265 				break;
266 		}
267 
268 		if (i == ARRAY_SIZE(veml3328_it_times))
269 			return -EINVAL;
270 
271 		return regmap_update_bits(regmap, VEML3328_REG_CONF,
272 					  VEML3328_CONF_IT_MASK,
273 					  FIELD_PREP(VEML3328_CONF_IT_MASK, i));
274 
275 	case IIO_CHAN_INFO_SCALE:
276 		ret = regmap_read(regmap, VEML3328_REG_CONF, &reg_val);
277 		if (ret)
278 			return ret;
279 
280 		it_inx = FIELD_GET(VEML3328_CONF_IT_MASK, reg_val);
281 		if (it_inx >= ARRAY_SIZE(veml3328_it_times))
282 			return -EINVAL;
283 
284 		for (i = 0; i < 4; i++) {
285 			if (val == veml3328_scale_vals[it_inx][i * 2] &&
286 			    val2 == veml3328_scale_vals[it_inx][i * 2 + 1])
287 				break;
288 		}
289 
290 		if (i == 4)
291 			return -EINVAL;
292 
293 		return regmap_update_bits(regmap, VEML3328_REG_CONF,
294 					  VEML3328_CONF_GAIN_MASK,
295 					  FIELD_PREP(VEML3328_CONF_GAIN_MASK, i));
296 
297 	default:
298 		return -EINVAL;
299 	}
300 }
301 
302 static const struct iio_info veml3328_info = {
303 	.read_raw = veml3328_read_raw,
304 	.write_raw = veml3328_write_raw,
305 	.read_avail = veml3328_read_avail,
306 };
307 
veml3328_probe(struct i2c_client * client)308 static int veml3328_probe(struct i2c_client *client)
309 {
310 	struct device *dev = &client->dev;
311 	struct veml3328_data *data;
312 	struct iio_dev *indio_dev;
313 	unsigned int reg_val;
314 	int ret;
315 
316 	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
317 	if (!indio_dev)
318 		return -ENOMEM;
319 
320 	data = iio_priv(indio_dev);
321 	i2c_set_clientdata(client, indio_dev);
322 
323 	data->regmap = devm_regmap_init_i2c(client, &veml3328_regmap_config);
324 	if (IS_ERR(data->regmap))
325 		return dev_err_probe(dev, PTR_ERR(data->regmap),
326 				     "Failed to initialize regmap\n");
327 
328 	ret = devm_mutex_init(dev, &data->lock);
329 	if (ret)
330 		return ret;
331 
332 	ret = devm_regulator_get_enable(dev, "vdd");
333 	if (ret)
334 		return dev_err_probe(dev, ret, "Failed to enable regulator\n");
335 
336 	ret = regmap_read(data->regmap, VEML3328_REG_ID, &reg_val);
337 	if (ret)
338 		return dev_err_probe(dev, ret, "Failed to read ID register\n");
339 
340 	if ((reg_val & 0xff) != VEML3328_ID_VAL)
341 		dev_warn(dev, "Unknown device ID: 0x%02x\n", reg_val & 0xff);
342 
343 	ret = veml3328_power_up(data);
344 	if (ret)
345 		return dev_err_probe(dev, ret, "Failed to power on sensor\n");
346 
347 	ret = devm_add_action_or_reset(dev, veml3328_power_down_action, data);
348 	if (ret)
349 		return dev_err_probe(dev, ret, "Failed to register teardown\n");
350 
351 	indio_dev->name = "veml3328";
352 	indio_dev->modes = INDIO_DIRECT_MODE;
353 	indio_dev->info = &veml3328_info;
354 	indio_dev->channels = veml3328_channels;
355 	indio_dev->num_channels = ARRAY_SIZE(veml3328_channels);
356 
357 	pm_runtime_set_active(dev);
358 	pm_runtime_set_autosuspend_delay(dev, 2000);
359 	pm_runtime_use_autosuspend(dev);
360 
361 	ret = devm_pm_runtime_enable(dev);
362 	if (ret)
363 		return dev_err_probe(dev, ret, "Failed to enable runtime PM\n");
364 
365 	return devm_iio_device_register(dev, indio_dev);
366 }
367 
veml3328_runtime_suspend(struct device * dev)368 static int veml3328_runtime_suspend(struct device *dev)
369 {
370 	struct veml3328_data *data = iio_priv(dev_get_drvdata(dev));
371 	int ret;
372 
373 	ret = veml3328_power_down(data);
374 	if (ret)
375 		dev_err(dev, "Failed to suspend: %d\n", ret);
376 
377 	return ret;
378 }
379 
veml3328_runtime_resume(struct device * dev)380 static int veml3328_runtime_resume(struct device *dev)
381 {
382 	struct veml3328_data *data = iio_priv(dev_get_drvdata(dev));
383 	int ret;
384 
385 	ret = veml3328_power_up(data);
386 	if (ret)
387 		dev_err(dev, "Failed to resume: %d\n", ret);
388 
389 	return ret;
390 }
391 
392 static DEFINE_RUNTIME_DEV_PM_OPS(veml3328_pm_ops,
393 				 veml3328_runtime_suspend,
394 				 veml3328_runtime_resume,
395 				 NULL);
396 
397 static const struct of_device_id veml3328_of_match[] = {
398 	{ .compatible = "vishay,veml3328" },
399 	{ }
400 };
401 MODULE_DEVICE_TABLE(of, veml3328_of_match);
402 
403 static const struct i2c_device_id veml3328_id[] = {
404 	{ .name = "veml3328" },
405 	{ }
406 };
407 MODULE_DEVICE_TABLE(i2c, veml3328_id);
408 
409 static struct i2c_driver veml3328_driver = {
410 	.driver = {
411 		.name = "veml3328",
412 		.of_match_table = veml3328_of_match,
413 		.pm = pm_ptr(&veml3328_pm_ops),
414 	},
415 	.probe = veml3328_probe,
416 	.id_table = veml3328_id,
417 };
418 module_i2c_driver(veml3328_driver);
419 
420 MODULE_AUTHOR("Joshua Crofts <joshua.crofts1@gmail.com>");
421 MODULE_DESCRIPTION("VEML3328 RGBCIR Light Sensor");
422 MODULE_LICENSE("GPL");
423