1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef VIRTIO_DRV_H 27 #define VIRTIO_DRV_H 28 29 #include <linux/dma-direction.h> 30 #include <linux/virtio.h> 31 #include <linux/virtio_ids.h> 32 #include <linux/virtio_config.h> 33 #include <linux/virtio_gpu.h> 34 35 #include <drm/drm_atomic.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_encoder.h> 38 #include <drm/drm_fourcc.h> 39 #include <drm/drm_framebuffer.h> 40 #include <drm/drm_gem.h> 41 #include <drm/drm_gem_shmem_helper.h> 42 #include <drm/drm_ioctl.h> 43 #include <drm/drm_probe_helper.h> 44 #include <drm/virtgpu_drm.h> 45 46 #define DRIVER_NAME "virtio_gpu" 47 #define DRIVER_DESC "virtio GPU" 48 49 #define DRIVER_MAJOR 0 50 #define DRIVER_MINOR 1 51 #define DRIVER_PATCHLEVEL 0 52 53 #define STATE_INITIALIZING 0 54 #define STATE_OK 1 55 #define STATE_ERR 2 56 57 #define MAX_CAPSET_ID 63 58 #define MAX_RINGS 64 59 60 /* See virtio_gpu_ctx_create. One additional character for NULL terminator. */ 61 #define DEBUG_NAME_MAX_LEN 65 62 63 struct virtio_gpu_object_params { 64 unsigned long size; 65 bool dumb; 66 /* 3d */ 67 bool virgl; 68 bool blob; 69 70 /* classic resources only */ 71 uint32_t format; 72 uint32_t width; 73 uint32_t height; 74 uint32_t target; 75 uint32_t bind; 76 uint32_t depth; 77 uint32_t array_size; 78 uint32_t last_level; 79 uint32_t nr_samples; 80 uint32_t flags; 81 82 /* blob resources only */ 83 uint32_t ctx_id; 84 uint32_t blob_mem; 85 uint32_t blob_flags; 86 uint64_t blob_id; 87 uint32_t blob_hints; 88 }; 89 90 struct virtio_gpu_object { 91 struct drm_gem_shmem_object base; 92 struct sg_table *sgt; 93 uint32_t hw_res_handle; 94 bool dumb; 95 bool created; 96 bool attached; 97 bool host3d_blob, guest_blob; 98 uint32_t blob_mem, blob_flags; 99 100 int uuid_state; 101 uuid_t uuid; 102 }; 103 #define gem_to_virtio_gpu_obj(gobj) \ 104 container_of((gobj), struct virtio_gpu_object, base.base) 105 106 struct virtio_gpu_object_shmem { 107 struct virtio_gpu_object base; 108 }; 109 110 struct virtio_gpu_object_vram { 111 struct virtio_gpu_object base; 112 uint32_t map_state; 113 uint32_t map_info; 114 struct drm_mm_node vram_node; 115 }; 116 117 #define to_virtio_gpu_shmem(virtio_gpu_object) \ 118 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base) 119 120 #define to_virtio_gpu_vram(virtio_gpu_object) \ 121 container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base) 122 123 struct virtio_gpu_object_array { 124 struct ww_acquire_ctx ticket; 125 struct list_head next; 126 u32 nents, total; 127 struct drm_gem_object *objs[] __counted_by(total); 128 }; 129 130 struct virtio_gpu_vbuffer; 131 struct virtio_gpu_device; 132 133 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 134 struct virtio_gpu_vbuffer *vbuf); 135 136 struct virtio_gpu_fence_driver { 137 atomic64_t last_fence_id; 138 uint64_t current_fence_id; 139 uint64_t context; 140 struct list_head fences; 141 spinlock_t lock; 142 }; 143 144 struct virtio_gpu_fence_event { 145 struct drm_pending_event base; 146 struct drm_event event; 147 }; 148 149 struct virtio_gpu_fence { 150 struct dma_fence f; 151 uint32_t ring_idx; 152 uint64_t fence_id; 153 bool emit_fence_info; 154 struct virtio_gpu_fence_event *e; 155 struct virtio_gpu_fence_driver *drv; 156 struct list_head node; 157 }; 158 159 struct virtio_gpu_vbuffer { 160 char *buf; 161 int size; 162 163 void *data_buf; 164 uint32_t data_size; 165 166 char *resp_buf; 167 int resp_size; 168 virtio_gpu_resp_cb resp_cb; 169 void *resp_cb_data; 170 171 struct virtio_gpu_object_array *objs; 172 struct list_head list; 173 174 uint32_t seqno; 175 }; 176 177 struct virtio_gpu_output { 178 int index; 179 struct drm_crtc crtc; 180 struct drm_connector conn; 181 struct drm_encoder enc; 182 struct virtio_gpu_display_one info; 183 struct virtio_gpu_update_cursor cursor; 184 const struct drm_edid *drm_edid; 185 int cur_x; 186 int cur_y; 187 bool needs_modeset; 188 }; 189 #define drm_crtc_to_virtio_gpu_output(x) \ 190 container_of(x, struct virtio_gpu_output, crtc) 191 192 struct virtio_gpu_framebuffer { 193 struct drm_framebuffer base; 194 struct virtio_gpu_fence *fence; 195 }; 196 #define to_virtio_gpu_framebuffer(x) \ 197 container_of(x, struct virtio_gpu_framebuffer, base) 198 199 struct virtio_gpu_plane_state { 200 struct drm_plane_state base; 201 struct virtio_gpu_fence *fence; 202 }; 203 #define to_virtio_gpu_plane_state(x) \ 204 container_of(x, struct virtio_gpu_plane_state, base) 205 206 struct virtio_gpu_queue { 207 struct virtqueue *vq; 208 spinlock_t qlock; 209 wait_queue_head_t ack_queue; 210 struct work_struct dequeue_work; 211 uint32_t seqno; 212 }; 213 214 struct virtio_gpu_drv_capset { 215 uint32_t id; 216 uint32_t max_version; 217 uint32_t max_size; 218 }; 219 220 struct virtio_gpu_drv_cap_cache { 221 struct list_head head; 222 void *caps_cache; 223 uint32_t id; 224 uint32_t version; 225 uint32_t size; 226 atomic_t is_valid; 227 }; 228 229 struct virtio_gpu_device { 230 struct drm_device *ddev; 231 232 struct virtio_device *vdev; 233 234 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 235 uint32_t num_scanouts; 236 237 struct virtio_gpu_queue ctrlq; 238 struct virtio_gpu_queue cursorq; 239 struct kmem_cache *vbufs; 240 241 atomic_t pending_commands; 242 243 struct ida resource_ida; 244 245 wait_queue_head_t resp_wq; 246 /* current display info */ 247 spinlock_t display_info_lock; 248 bool display_info_pending; 249 250 struct virtio_gpu_fence_driver fence_drv; 251 252 struct ida ctx_id_ida; 253 254 bool has_virgl_3d; 255 bool has_edid; 256 bool has_indirect; 257 bool has_resource_assign_uuid; 258 bool has_resource_blob; 259 bool has_host_visible; 260 bool has_context_init; 261 bool has_blob_alignment; 262 struct virtio_shm_region host_visible_region; 263 struct drm_mm host_visible_mm; 264 265 struct work_struct config_changed_work; 266 267 struct work_struct obj_free_work; 268 spinlock_t obj_free_lock; 269 struct list_head obj_free_list; 270 271 struct virtio_gpu_drv_capset *capsets; 272 uint32_t num_capsets; 273 uint64_t capset_id_mask; 274 struct list_head cap_cache; 275 uint32_t blob_alignment; 276 277 /* protects uuid state when exporting */ 278 spinlock_t resource_export_lock; 279 /* protects map state and host_visible_mm */ 280 spinlock_t host_visible_lock; 281 }; 282 283 struct virtio_gpu_fpriv { 284 uint32_t ctx_id; 285 uint32_t context_init; 286 bool context_created; 287 uint32_t num_rings; 288 uint64_t base_fence_ctx; 289 uint64_t ring_idx_mask; 290 struct mutex context_lock; 291 char debug_name[DEBUG_NAME_MAX_LEN]; 292 bool explicit_debug_name; 293 }; 294 295 /* virtgpu_ioctl.c */ 296 #define DRM_VIRTIO_NUM_IOCTLS 12 297 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 298 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file); 299 300 /* virtgpu_kms.c */ 301 int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev); 302 void virtio_gpu_deinit(struct drm_device *dev); 303 void virtio_gpu_release(struct drm_device *dev); 304 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 305 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 306 307 /* virtgpu_gem.c */ 308 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 309 struct drm_file *file); 310 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 311 struct drm_file *file); 312 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 313 struct drm_device *dev, 314 struct drm_mode_create_dumb *args); 315 316 struct virtio_gpu_object_array *virtio_gpu_panic_array_alloc(void); 317 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 318 struct virtio_gpu_object_array* 319 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 320 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 321 struct drm_gem_object *obj); 322 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 323 int virtio_gpu_lock_one_resv_uninterruptible(struct virtio_gpu_object_array *objs); 324 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 325 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 326 struct dma_fence *fence); 327 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 328 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 329 struct virtio_gpu_object_array *objs); 330 void virtio_gpu_array_put_free_work(struct work_struct *work); 331 332 /* virtgpu_vq.c */ 333 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 334 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 335 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 336 struct virtio_gpu_object *bo, 337 struct virtio_gpu_object_params *params, 338 struct virtio_gpu_object_array *objs, 339 struct virtio_gpu_fence *fence); 340 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 341 struct virtio_gpu_object *bo); 342 int virtio_gpu_panic_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 343 uint64_t offset, 344 uint32_t width, uint32_t height, 345 uint32_t x, uint32_t y, 346 struct virtio_gpu_object_array *objs); 347 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 348 uint64_t offset, 349 uint32_t width, uint32_t height, 350 uint32_t x, uint32_t y, 351 struct virtio_gpu_object_array *objs, 352 struct virtio_gpu_fence *fence); 353 void virtio_gpu_panic_cmd_resource_flush(struct virtio_gpu_device *vgdev, 354 uint32_t resource_id, 355 uint32_t x, uint32_t y, 356 uint32_t width, uint32_t height); 357 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 358 uint32_t resource_id, 359 uint32_t x, uint32_t y, 360 uint32_t width, uint32_t height, 361 struct virtio_gpu_object_array *objs, 362 struct virtio_gpu_fence *fence); 363 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 364 uint32_t scanout_id, uint32_t resource_id, 365 uint32_t width, uint32_t height, 366 uint32_t x, uint32_t y); 367 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 368 struct virtio_gpu_object *obj, 369 struct virtio_gpu_mem_entry *ents, 370 unsigned int nents); 371 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev, 372 struct virtio_gpu_object *obj, 373 struct virtio_gpu_fence *fence); 374 int virtio_gpu_detach_object_fenced(struct virtio_gpu_object *bo); 375 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 376 struct virtio_gpu_output *output); 377 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 378 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 379 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 380 int idx, int version, 381 struct virtio_gpu_drv_cap_cache **cache_p); 382 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 383 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 384 uint32_t context_init, uint32_t nlen, 385 const char *name); 386 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 387 uint32_t id); 388 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 389 uint32_t ctx_id, 390 struct virtio_gpu_object_array *objs); 391 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 392 uint32_t ctx_id, 393 struct virtio_gpu_object_array *objs); 394 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 395 void *data, uint32_t data_size, 396 uint32_t ctx_id, 397 struct virtio_gpu_object_array *objs, 398 struct virtio_gpu_fence *fence); 399 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 400 uint32_t ctx_id, 401 uint64_t offset, uint32_t level, 402 uint32_t stride, 403 uint32_t layer_stride, 404 struct drm_virtgpu_3d_box *box, 405 struct virtio_gpu_object_array *objs, 406 struct virtio_gpu_fence *fence); 407 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 408 uint32_t ctx_id, 409 uint64_t offset, uint32_t level, 410 uint32_t stride, 411 uint32_t layer_stride, 412 struct drm_virtgpu_3d_box *box, 413 struct virtio_gpu_object_array *objs, 414 struct virtio_gpu_fence *fence); 415 void 416 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 417 struct virtio_gpu_object *bo, 418 struct virtio_gpu_object_params *params, 419 struct virtio_gpu_object_array *objs, 420 struct virtio_gpu_fence *fence); 421 void virtio_gpu_ctrl_ack(struct virtqueue *vq); 422 void virtio_gpu_cursor_ack(struct virtqueue *vq); 423 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 424 void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 425 void virtio_gpu_panic_notify(struct virtio_gpu_device *vgdev); 426 void virtio_gpu_notify(struct virtio_gpu_device *vgdev); 427 428 int 429 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev, 430 struct virtio_gpu_object_array *objs); 431 432 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev, 433 struct virtio_gpu_object_array *objs, uint64_t offset); 434 435 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev, 436 struct virtio_gpu_object *bo); 437 438 void 439 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev, 440 struct virtio_gpu_object *bo, 441 struct virtio_gpu_object_params *params, 442 struct virtio_gpu_mem_entry *ents, 443 uint32_t nents); 444 void 445 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev, 446 uint32_t scanout_id, 447 struct virtio_gpu_object *bo, 448 struct drm_framebuffer *fb, 449 uint32_t width, uint32_t height, 450 uint32_t x, uint32_t y); 451 452 /* virtgpu_display.c */ 453 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 454 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 455 456 /* virtgpu_plane.c */ 457 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 458 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 459 enum drm_plane_type type, 460 int index); 461 462 /* virtgpu_fence.c */ 463 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev, 464 uint64_t base_fence_ctx, 465 uint32_t ring_idx); 466 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 467 struct virtio_gpu_ctrl_hdr *cmd_hdr, 468 struct virtio_gpu_fence *fence); 469 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 470 u64 fence_id); 471 472 /* virtgpu_object.c */ 473 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo); 474 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 475 size_t size); 476 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 477 struct virtio_gpu_object_params *params, 478 struct virtio_gpu_object **bo_ptr, 479 struct virtio_gpu_fence *fence); 480 481 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo); 482 483 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev, 484 uint32_t *resid); 485 /* virtgpu_prime.c */ 486 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev, 487 struct virtio_gpu_object *bo); 488 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj, 489 int flags); 490 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev, 491 struct dma_buf *buf); 492 struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 493 struct drm_device *dev, struct dma_buf_attachment *attach, 494 struct sg_table *sgt); 495 int virtgpu_dma_buf_import_sgt(struct virtio_gpu_mem_entry **ents, 496 unsigned int *nents, 497 struct virtio_gpu_object *bo, 498 struct dma_buf_attachment *attach); 499 500 /* virtgpu_debugfs.c */ 501 void virtio_gpu_debugfs_init(struct drm_minor *minor); 502 503 /* virtgpu_vram.c */ 504 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo); 505 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev, 506 struct virtio_gpu_object_params *params, 507 struct virtio_gpu_object **bo_ptr); 508 struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo, 509 struct device *dev, 510 enum dma_data_direction dir); 511 void virtio_gpu_vram_unmap_dma_buf(struct device *dev, 512 struct sg_table *sgt, 513 enum dma_data_direction dir); 514 void virtio_gpu_vram_map_deferred(struct virtio_gpu_object_vram *vram); 515 516 /* virtgpu_submit.c */ 517 int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data, 518 struct drm_file *file); 519 520 #endif 521