1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2019 Mellanox Technologies. All rights reserved */
3
4 #include <linux/ptp_clock_kernel.h>
5 #include <linux/clocksource.h>
6 #include <linux/timecounter.h>
7 #include <linux/spinlock.h>
8 #include <linux/device.h>
9 #include <linux/rhashtable.h>
10 #include <linux/ptp_classify.h>
11 #include <linux/if_ether.h>
12 #include <linux/if_vlan.h>
13 #include <linux/net_tstamp.h>
14 #include <linux/refcount.h>
15
16 #include "spectrum.h"
17 #include "spectrum_ptp.h"
18 #include "core.h"
19 #include "txheader.h"
20
21 #define MLXSW_SP1_PTP_CLOCK_CYCLES_SHIFT 29
22 #define MLXSW_SP1_PTP_CLOCK_FREQ_KHZ 156257 /* 6.4nSec */
23 #define MLXSW_SP1_PTP_CLOCK_MASK 64
24
25 #define MLXSW_SP1_PTP_HT_GC_INTERVAL 500 /* ms */
26
27 /* How long, approximately, should the unmatched entries stay in the hash table
28 * before they are collected. Should be evenly divisible by the GC interval.
29 */
30 #define MLXSW_SP1_PTP_HT_GC_TIMEOUT 1000 /* ms */
31
32 struct mlxsw_sp_ptp_state {
33 struct mlxsw_sp *mlxsw_sp;
34 };
35
36 struct mlxsw_sp1_ptp_state {
37 struct mlxsw_sp_ptp_state common;
38 struct rhltable unmatched_ht;
39 spinlock_t unmatched_lock; /* protects the HT */
40 struct delayed_work ht_gc_dw;
41 u32 gc_cycle;
42 };
43
44 struct mlxsw_sp2_ptp_state {
45 struct mlxsw_sp_ptp_state common;
46 refcount_t ptp_port_enabled_ref; /* Number of ports with time stamping
47 * enabled.
48 */
49 struct kernel_hwtstamp_config config;
50 struct mutex lock; /* Protects 'config' and HW configuration. */
51 };
52
53 struct mlxsw_sp1_ptp_key {
54 u16 local_port;
55 u8 message_type;
56 u16 sequence_id;
57 u8 domain_number;
58 bool ingress;
59 };
60
61 struct mlxsw_sp1_ptp_unmatched {
62 struct mlxsw_sp1_ptp_key key;
63 struct rhlist_head ht_node;
64 struct rcu_head rcu;
65 struct sk_buff *skb;
66 u64 timestamp;
67 u32 gc_cycle;
68 };
69
70 static const struct rhashtable_params mlxsw_sp1_ptp_unmatched_ht_params = {
71 .key_len = sizeof_field(struct mlxsw_sp1_ptp_unmatched, key),
72 .key_offset = offsetof(struct mlxsw_sp1_ptp_unmatched, key),
73 .head_offset = offsetof(struct mlxsw_sp1_ptp_unmatched, ht_node),
74 };
75
76 struct mlxsw_sp_ptp_clock {
77 struct mlxsw_core *core;
78 struct ptp_clock *ptp;
79 struct ptp_clock_info ptp_info;
80 };
81
82 struct mlxsw_sp1_ptp_clock {
83 struct mlxsw_sp_ptp_clock common;
84 spinlock_t lock; /* protect this structure */
85 struct cyclecounter cycles;
86 struct timecounter tc;
87 u32 nominal_c_mult;
88 unsigned long overflow_period;
89 struct delayed_work overflow_work;
90 };
91
92 static struct mlxsw_sp1_ptp_state *
mlxsw_sp1_ptp_state(struct mlxsw_sp * mlxsw_sp)93 mlxsw_sp1_ptp_state(struct mlxsw_sp *mlxsw_sp)
94 {
95 return container_of(mlxsw_sp->ptp_state, struct mlxsw_sp1_ptp_state,
96 common);
97 }
98
99 static struct mlxsw_sp2_ptp_state *
mlxsw_sp2_ptp_state(struct mlxsw_sp * mlxsw_sp)100 mlxsw_sp2_ptp_state(struct mlxsw_sp *mlxsw_sp)
101 {
102 return container_of(mlxsw_sp->ptp_state, struct mlxsw_sp2_ptp_state,
103 common);
104 }
105
106 static struct mlxsw_sp1_ptp_clock *
mlxsw_sp1_ptp_clock(struct ptp_clock_info * ptp)107 mlxsw_sp1_ptp_clock(struct ptp_clock_info *ptp)
108 {
109 return container_of(ptp, struct mlxsw_sp1_ptp_clock, common.ptp_info);
110 }
111
__mlxsw_sp1_ptp_read_frc(struct mlxsw_sp1_ptp_clock * clock,struct ptp_system_timestamp * sts)112 static u64 __mlxsw_sp1_ptp_read_frc(struct mlxsw_sp1_ptp_clock *clock,
113 struct ptp_system_timestamp *sts)
114 {
115 struct mlxsw_core *mlxsw_core = clock->common.core;
116 u32 frc_h1, frc_h2, frc_l;
117
118 frc_h1 = mlxsw_core_read_frc_h(mlxsw_core);
119 ptp_read_system_prets(sts);
120 frc_l = mlxsw_core_read_frc_l(mlxsw_core);
121 ptp_read_system_postts(sts);
122 frc_h2 = mlxsw_core_read_frc_h(mlxsw_core);
123
124 if (frc_h1 != frc_h2) {
125 /* wrap around */
126 ptp_read_system_prets(sts);
127 frc_l = mlxsw_core_read_frc_l(mlxsw_core);
128 ptp_read_system_postts(sts);
129 }
130
131 return (u64) frc_l | (u64) frc_h2 << 32;
132 }
133
mlxsw_sp1_ptp_read_frc(struct cyclecounter * cc)134 static u64 mlxsw_sp1_ptp_read_frc(struct cyclecounter *cc)
135 {
136 struct mlxsw_sp1_ptp_clock *clock =
137 container_of(cc, struct mlxsw_sp1_ptp_clock, cycles);
138
139 return __mlxsw_sp1_ptp_read_frc(clock, NULL) & cc->mask;
140 }
141
142 static int
mlxsw_sp_ptp_phc_adjfreq(struct mlxsw_sp_ptp_clock * clock,int freq_adj)143 mlxsw_sp_ptp_phc_adjfreq(struct mlxsw_sp_ptp_clock *clock, int freq_adj)
144 {
145 struct mlxsw_core *mlxsw_core = clock->core;
146 char mtutc_pl[MLXSW_REG_MTUTC_LEN];
147
148 mlxsw_reg_mtutc_pack(mtutc_pl, MLXSW_REG_MTUTC_OPERATION_ADJUST_FREQ,
149 freq_adj, 0, 0, 0);
150 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl);
151 }
152
mlxsw_sp1_ptp_ns2cycles(const struct timecounter * tc,u64 nsec)153 static u64 mlxsw_sp1_ptp_ns2cycles(const struct timecounter *tc, u64 nsec)
154 {
155 u64 cycles = (u64) nsec;
156
157 cycles <<= tc->cc->shift;
158 cycles = div_u64(cycles, tc->cc->mult);
159
160 return cycles;
161 }
162
163 static int
mlxsw_sp1_ptp_phc_settime(struct mlxsw_sp1_ptp_clock * clock,u64 nsec)164 mlxsw_sp1_ptp_phc_settime(struct mlxsw_sp1_ptp_clock *clock, u64 nsec)
165 {
166 struct mlxsw_core *mlxsw_core = clock->common.core;
167 u64 next_sec, next_sec_in_nsec, cycles;
168 char mtutc_pl[MLXSW_REG_MTUTC_LEN];
169 char mtpps_pl[MLXSW_REG_MTPPS_LEN];
170 int err;
171
172 next_sec = div_u64(nsec, NSEC_PER_SEC) + 1;
173 next_sec_in_nsec = next_sec * NSEC_PER_SEC;
174
175 spin_lock_bh(&clock->lock);
176 cycles = mlxsw_sp1_ptp_ns2cycles(&clock->tc, next_sec_in_nsec);
177 spin_unlock_bh(&clock->lock);
178
179 mlxsw_reg_mtpps_vpin_pack(mtpps_pl, cycles);
180 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtpps), mtpps_pl);
181 if (err)
182 return err;
183
184 mlxsw_reg_mtutc_pack(mtutc_pl,
185 MLXSW_REG_MTUTC_OPERATION_SET_TIME_AT_NEXT_SEC,
186 0, next_sec, 0, 0);
187 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl);
188 }
189
mlxsw_sp1_ptp_adjfine(struct ptp_clock_info * ptp,long scaled_ppm)190 static int mlxsw_sp1_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
191 {
192 struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);
193 s32 ppb;
194
195 ppb = scaled_ppm_to_ppb(scaled_ppm);
196
197 spin_lock_bh(&clock->lock);
198 timecounter_read(&clock->tc);
199 clock->cycles.mult = adjust_by_scaled_ppm(clock->nominal_c_mult,
200 scaled_ppm);
201 spin_unlock_bh(&clock->lock);
202
203 return mlxsw_sp_ptp_phc_adjfreq(&clock->common, ppb);
204 }
205
mlxsw_sp1_ptp_adjtime(struct ptp_clock_info * ptp,s64 delta)206 static int mlxsw_sp1_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
207 {
208 struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);
209 u64 nsec;
210
211 spin_lock_bh(&clock->lock);
212 timecounter_adjtime(&clock->tc, delta);
213 nsec = timecounter_read(&clock->tc);
214 spin_unlock_bh(&clock->lock);
215
216 return mlxsw_sp1_ptp_phc_settime(clock, nsec);
217 }
218
mlxsw_sp1_ptp_gettimex(struct ptp_clock_info * ptp,struct timespec64 * ts,struct ptp_system_timestamp * sts)219 static int mlxsw_sp1_ptp_gettimex(struct ptp_clock_info *ptp,
220 struct timespec64 *ts,
221 struct ptp_system_timestamp *sts)
222 {
223 struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);
224 u64 cycles, nsec;
225
226 spin_lock_bh(&clock->lock);
227 cycles = __mlxsw_sp1_ptp_read_frc(clock, sts);
228 nsec = timecounter_cyc2time(&clock->tc, cycles);
229 spin_unlock_bh(&clock->lock);
230
231 *ts = ns_to_timespec64(nsec);
232
233 return 0;
234 }
235
mlxsw_sp1_ptp_settime(struct ptp_clock_info * ptp,const struct timespec64 * ts)236 static int mlxsw_sp1_ptp_settime(struct ptp_clock_info *ptp,
237 const struct timespec64 *ts)
238 {
239 struct mlxsw_sp1_ptp_clock *clock = mlxsw_sp1_ptp_clock(ptp);
240 u64 nsec = timespec64_to_ns(ts);
241
242 spin_lock_bh(&clock->lock);
243 timecounter_init(&clock->tc, &clock->cycles, nsec);
244 nsec = timecounter_read(&clock->tc);
245 spin_unlock_bh(&clock->lock);
246
247 return mlxsw_sp1_ptp_phc_settime(clock, nsec);
248 }
249
250 static const struct ptp_clock_info mlxsw_sp1_ptp_clock_info = {
251 .owner = THIS_MODULE,
252 .name = "mlxsw_sp_clock",
253 .max_adj = 100000000,
254 .adjfine = mlxsw_sp1_ptp_adjfine,
255 .adjtime = mlxsw_sp1_ptp_adjtime,
256 .gettimex64 = mlxsw_sp1_ptp_gettimex,
257 .settime64 = mlxsw_sp1_ptp_settime,
258 };
259
mlxsw_sp1_ptp_clock_overflow(struct work_struct * work)260 static void mlxsw_sp1_ptp_clock_overflow(struct work_struct *work)
261 {
262 struct delayed_work *dwork = to_delayed_work(work);
263 struct mlxsw_sp1_ptp_clock *clock;
264
265 clock = container_of(dwork, struct mlxsw_sp1_ptp_clock, overflow_work);
266
267 spin_lock_bh(&clock->lock);
268 timecounter_read(&clock->tc);
269 spin_unlock_bh(&clock->lock);
270 mlxsw_core_schedule_dw(&clock->overflow_work, clock->overflow_period);
271 }
272
273 struct mlxsw_sp_ptp_clock *
mlxsw_sp1_ptp_clock_init(struct mlxsw_sp * mlxsw_sp,struct device * dev)274 mlxsw_sp1_ptp_clock_init(struct mlxsw_sp *mlxsw_sp, struct device *dev)
275 {
276 u64 overflow_cycles, nsec, frac = 0;
277 struct mlxsw_sp1_ptp_clock *clock;
278 int err;
279
280 clock = kzalloc_obj(*clock);
281 if (!clock)
282 return ERR_PTR(-ENOMEM);
283
284 spin_lock_init(&clock->lock);
285 clock->cycles.read = mlxsw_sp1_ptp_read_frc;
286 clock->cycles.shift = MLXSW_SP1_PTP_CLOCK_CYCLES_SHIFT;
287 clock->cycles.mult = clocksource_khz2mult(MLXSW_SP1_PTP_CLOCK_FREQ_KHZ,
288 clock->cycles.shift);
289 clock->nominal_c_mult = clock->cycles.mult;
290 clock->cycles.mask = CLOCKSOURCE_MASK(MLXSW_SP1_PTP_CLOCK_MASK);
291 clock->common.core = mlxsw_sp->core;
292
293 timecounter_init(&clock->tc, &clock->cycles, 0);
294
295 /* Calculate period in seconds to call the overflow watchdog - to make
296 * sure counter is checked at least twice every wrap around.
297 * The period is calculated as the minimum between max HW cycles count
298 * (The clock source mask) and max amount of cycles that can be
299 * multiplied by clock multiplier where the result doesn't exceed
300 * 64bits.
301 */
302 overflow_cycles = div64_u64(~0ULL >> 1, clock->cycles.mult);
303 overflow_cycles = min(overflow_cycles, div_u64(clock->cycles.mask, 3));
304
305 nsec = cyclecounter_cyc2ns(&clock->cycles, overflow_cycles, 0, &frac);
306 clock->overflow_period = nsecs_to_jiffies(nsec);
307
308 INIT_DELAYED_WORK(&clock->overflow_work, mlxsw_sp1_ptp_clock_overflow);
309 mlxsw_core_schedule_dw(&clock->overflow_work, 0);
310
311 clock->common.ptp_info = mlxsw_sp1_ptp_clock_info;
312 clock->common.ptp = ptp_clock_register(&clock->common.ptp_info, dev);
313 if (IS_ERR(clock->common.ptp)) {
314 err = PTR_ERR(clock->common.ptp);
315 dev_err(dev, "ptp_clock_register failed %d\n", err);
316 goto err_ptp_clock_register;
317 }
318
319 return &clock->common;
320
321 err_ptp_clock_register:
322 cancel_delayed_work_sync(&clock->overflow_work);
323 kfree(clock);
324 return ERR_PTR(err);
325 }
326
mlxsw_sp1_ptp_clock_fini(struct mlxsw_sp_ptp_clock * clock_common)327 void mlxsw_sp1_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock_common)
328 {
329 struct mlxsw_sp1_ptp_clock *clock =
330 container_of(clock_common, struct mlxsw_sp1_ptp_clock, common);
331
332 ptp_clock_unregister(clock_common->ptp);
333 cancel_delayed_work_sync(&clock->overflow_work);
334 kfree(clock);
335 }
336
mlxsw_sp2_ptp_read_utc(struct mlxsw_sp_ptp_clock * clock,struct ptp_system_timestamp * sts)337 static u64 mlxsw_sp2_ptp_read_utc(struct mlxsw_sp_ptp_clock *clock,
338 struct ptp_system_timestamp *sts)
339 {
340 struct mlxsw_core *mlxsw_core = clock->core;
341 u32 utc_sec1, utc_sec2, utc_nsec;
342
343 utc_sec1 = mlxsw_core_read_utc_sec(mlxsw_core);
344 ptp_read_system_prets(sts);
345 utc_nsec = mlxsw_core_read_utc_nsec(mlxsw_core);
346 ptp_read_system_postts(sts);
347 utc_sec2 = mlxsw_core_read_utc_sec(mlxsw_core);
348
349 if (utc_sec1 != utc_sec2) {
350 /* Wrap around. */
351 ptp_read_system_prets(sts);
352 utc_nsec = mlxsw_core_read_utc_nsec(mlxsw_core);
353 ptp_read_system_postts(sts);
354 }
355
356 return (u64)utc_sec2 * NSEC_PER_SEC + utc_nsec;
357 }
358
359 static int
mlxsw_sp2_ptp_phc_settime(struct mlxsw_sp_ptp_clock * clock,u64 nsec)360 mlxsw_sp2_ptp_phc_settime(struct mlxsw_sp_ptp_clock *clock, u64 nsec)
361 {
362 struct mlxsw_core *mlxsw_core = clock->core;
363 char mtutc_pl[MLXSW_REG_MTUTC_LEN];
364 u32 sec, nsec_rem;
365
366 sec = div_u64_rem(nsec, NSEC_PER_SEC, &nsec_rem);
367 mlxsw_reg_mtutc_pack(mtutc_pl,
368 MLXSW_REG_MTUTC_OPERATION_SET_TIME_IMMEDIATE,
369 0, sec, nsec_rem, 0);
370 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl);
371 }
372
mlxsw_sp2_ptp_adjfine(struct ptp_clock_info * ptp,long scaled_ppm)373 static int mlxsw_sp2_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
374 {
375 struct mlxsw_sp_ptp_clock *clock =
376 container_of(ptp, struct mlxsw_sp_ptp_clock, ptp_info);
377 s32 ppb = scaled_ppm_to_ppb(scaled_ppm);
378
379 /* In Spectrum-2 and newer ASICs, the frequency adjustment in MTUTC is
380 * reversed, positive values mean to decrease the frequency. Adjust the
381 * sign of PPB to this behavior.
382 */
383 return mlxsw_sp_ptp_phc_adjfreq(clock, -ppb);
384 }
385
mlxsw_sp2_ptp_adjtime(struct ptp_clock_info * ptp,s64 delta)386 static int mlxsw_sp2_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
387 {
388 struct mlxsw_sp_ptp_clock *clock =
389 container_of(ptp, struct mlxsw_sp_ptp_clock, ptp_info);
390 struct mlxsw_core *mlxsw_core = clock->core;
391 char mtutc_pl[MLXSW_REG_MTUTC_LEN];
392
393 /* HW time adjustment range is s16. If out of range, set time instead. */
394 if (delta < S16_MIN || delta > S16_MAX) {
395 u64 nsec;
396
397 nsec = mlxsw_sp2_ptp_read_utc(clock, NULL);
398 nsec += delta;
399
400 return mlxsw_sp2_ptp_phc_settime(clock, nsec);
401 }
402
403 mlxsw_reg_mtutc_pack(mtutc_pl,
404 MLXSW_REG_MTUTC_OPERATION_ADJUST_TIME,
405 0, 0, 0, delta);
406 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mtutc), mtutc_pl);
407 }
408
mlxsw_sp2_ptp_gettimex(struct ptp_clock_info * ptp,struct timespec64 * ts,struct ptp_system_timestamp * sts)409 static int mlxsw_sp2_ptp_gettimex(struct ptp_clock_info *ptp,
410 struct timespec64 *ts,
411 struct ptp_system_timestamp *sts)
412 {
413 struct mlxsw_sp_ptp_clock *clock =
414 container_of(ptp, struct mlxsw_sp_ptp_clock, ptp_info);
415 u64 nsec;
416
417 nsec = mlxsw_sp2_ptp_read_utc(clock, sts);
418 *ts = ns_to_timespec64(nsec);
419
420 return 0;
421 }
422
mlxsw_sp2_ptp_settime(struct ptp_clock_info * ptp,const struct timespec64 * ts)423 static int mlxsw_sp2_ptp_settime(struct ptp_clock_info *ptp,
424 const struct timespec64 *ts)
425 {
426 struct mlxsw_sp_ptp_clock *clock =
427 container_of(ptp, struct mlxsw_sp_ptp_clock, ptp_info);
428 u64 nsec = timespec64_to_ns(ts);
429
430 return mlxsw_sp2_ptp_phc_settime(clock, nsec);
431 }
432
433 static const struct ptp_clock_info mlxsw_sp2_ptp_clock_info = {
434 .owner = THIS_MODULE,
435 .name = "mlxsw_sp_clock",
436 .max_adj = MLXSW_REG_MTUTC_MAX_FREQ_ADJ,
437 .adjfine = mlxsw_sp2_ptp_adjfine,
438 .adjtime = mlxsw_sp2_ptp_adjtime,
439 .gettimex64 = mlxsw_sp2_ptp_gettimex,
440 .settime64 = mlxsw_sp2_ptp_settime,
441 };
442
443 struct mlxsw_sp_ptp_clock *
mlxsw_sp2_ptp_clock_init(struct mlxsw_sp * mlxsw_sp,struct device * dev)444 mlxsw_sp2_ptp_clock_init(struct mlxsw_sp *mlxsw_sp, struct device *dev)
445 {
446 struct mlxsw_sp_ptp_clock *clock;
447 int err;
448
449 clock = kzalloc_obj(*clock);
450 if (!clock)
451 return ERR_PTR(-ENOMEM);
452
453 clock->core = mlxsw_sp->core;
454
455 clock->ptp_info = mlxsw_sp2_ptp_clock_info;
456
457 err = mlxsw_sp2_ptp_phc_settime(clock, 0);
458 if (err) {
459 dev_err(dev, "setting UTC time failed %d\n", err);
460 goto err_ptp_phc_settime;
461 }
462
463 clock->ptp = ptp_clock_register(&clock->ptp_info, dev);
464 if (IS_ERR(clock->ptp)) {
465 err = PTR_ERR(clock->ptp);
466 dev_err(dev, "ptp_clock_register failed %d\n", err);
467 goto err_ptp_clock_register;
468 }
469
470 return clock;
471
472 err_ptp_clock_register:
473 err_ptp_phc_settime:
474 kfree(clock);
475 return ERR_PTR(err);
476 }
477
mlxsw_sp2_ptp_clock_fini(struct mlxsw_sp_ptp_clock * clock)478 void mlxsw_sp2_ptp_clock_fini(struct mlxsw_sp_ptp_clock *clock)
479 {
480 ptp_clock_unregister(clock->ptp);
481 kfree(clock);
482 }
483
mlxsw_sp_ptp_parse(struct sk_buff * skb,u8 * p_domain_number,u8 * p_message_type,u16 * p_sequence_id)484 static int mlxsw_sp_ptp_parse(struct sk_buff *skb,
485 u8 *p_domain_number,
486 u8 *p_message_type,
487 u16 *p_sequence_id)
488 {
489 unsigned int ptp_class;
490 struct ptp_header *hdr;
491
492 ptp_class = ptp_classify_raw(skb);
493
494 switch (ptp_class & PTP_CLASS_VMASK) {
495 case PTP_CLASS_V1:
496 case PTP_CLASS_V2:
497 break;
498 default:
499 return -ERANGE;
500 }
501
502 hdr = ptp_parse_header(skb, ptp_class);
503 if (!hdr)
504 return -EINVAL;
505
506 *p_message_type = ptp_get_msgtype(hdr, ptp_class);
507 *p_domain_number = hdr->domain_number;
508 *p_sequence_id = be16_to_cpu(hdr->sequence_id);
509
510 return 0;
511 }
512
513 /* Returns NULL on successful insertion, a pointer on conflict, or an ERR_PTR on
514 * error.
515 */
516 static int
mlxsw_sp1_ptp_unmatched_save(struct mlxsw_sp * mlxsw_sp,struct mlxsw_sp1_ptp_key key,struct sk_buff * skb,u64 timestamp)517 mlxsw_sp1_ptp_unmatched_save(struct mlxsw_sp *mlxsw_sp,
518 struct mlxsw_sp1_ptp_key key,
519 struct sk_buff *skb,
520 u64 timestamp)
521 {
522 int cycles = MLXSW_SP1_PTP_HT_GC_TIMEOUT / MLXSW_SP1_PTP_HT_GC_INTERVAL;
523 struct mlxsw_sp1_ptp_state *ptp_state = mlxsw_sp1_ptp_state(mlxsw_sp);
524 struct mlxsw_sp1_ptp_unmatched *unmatched;
525 int err;
526
527 unmatched = kzalloc_obj(*unmatched, GFP_ATOMIC);
528 if (!unmatched)
529 return -ENOMEM;
530
531 unmatched->key = key;
532 unmatched->skb = skb;
533 unmatched->timestamp = timestamp;
534 unmatched->gc_cycle = ptp_state->gc_cycle + cycles;
535
536 err = rhltable_insert(&ptp_state->unmatched_ht, &unmatched->ht_node,
537 mlxsw_sp1_ptp_unmatched_ht_params);
538 if (err)
539 kfree(unmatched);
540
541 return err;
542 }
543
544 static struct mlxsw_sp1_ptp_unmatched *
mlxsw_sp1_ptp_unmatched_lookup(struct mlxsw_sp * mlxsw_sp,struct mlxsw_sp1_ptp_key key,int * p_length)545 mlxsw_sp1_ptp_unmatched_lookup(struct mlxsw_sp *mlxsw_sp,
546 struct mlxsw_sp1_ptp_key key, int *p_length)
547 {
548 struct mlxsw_sp1_ptp_state *ptp_state = mlxsw_sp1_ptp_state(mlxsw_sp);
549 struct mlxsw_sp1_ptp_unmatched *unmatched, *last = NULL;
550 struct rhlist_head *tmp, *list;
551 int length = 0;
552
553 list = rhltable_lookup(&ptp_state->unmatched_ht, &key,
554 mlxsw_sp1_ptp_unmatched_ht_params);
555 rhl_for_each_entry_rcu(unmatched, tmp, list, ht_node) {
556 last = unmatched;
557 length++;
558 }
559
560 *p_length = length;
561 return last;
562 }
563
564 static int
mlxsw_sp1_ptp_unmatched_remove(struct mlxsw_sp * mlxsw_sp,struct mlxsw_sp1_ptp_unmatched * unmatched)565 mlxsw_sp1_ptp_unmatched_remove(struct mlxsw_sp *mlxsw_sp,
566 struct mlxsw_sp1_ptp_unmatched *unmatched)
567 {
568 struct mlxsw_sp1_ptp_state *ptp_state = mlxsw_sp1_ptp_state(mlxsw_sp);
569
570 return rhltable_remove(&ptp_state->unmatched_ht,
571 &unmatched->ht_node,
572 mlxsw_sp1_ptp_unmatched_ht_params);
573 }
574
575 /* mlxsw_sp1_ptp_packet_finish() is reached both from the NAPI poll context
576 * (mlxsw_sp1_ptp_got_packet(), mlxsw_sp1_ptp_got_piece() and
577 * mlxsw_sp1_packet_timestamp()) and from process context, by way of the GC
578 * workqueue (mlxsw_sp1_ptp_ht_gc_collect() ->
579 * mlxsw_sp1_ptp_unmatched_finish()).
580 *
581 * mlxsw_sp_rx_listener_no_mark_func() ends in napi_gro_receive(), using the
582 * NAPI pointer that was placed in the SKB control block when the trapped
583 * packet was received in the NAPI context. That pointer may only be used
584 * from its own poll context, which this call site cannot guarantee.
585 *
586 * netif_receive_skb(), unlike napi_gro_receive(), can be called from outside
587 * of the NAPI instance's poll context. RX stats accounting and the skb->dev
588 * assignment are still preserved; the only change is the delivery call.
589 */
mlxsw_sp1_ptp_rx_finish(struct mlxsw_sp_port * mlxsw_sp_port,struct sk_buff * skb)590 static void mlxsw_sp1_ptp_rx_finish(struct mlxsw_sp_port *mlxsw_sp_port,
591 struct sk_buff *skb)
592 {
593 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
594
595 skb->dev = mlxsw_sp_port->dev;
596
597 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
598 u64_stats_update_begin(&pcpu_stats->syncp);
599 pcpu_stats->rx_packets++;
600 pcpu_stats->rx_bytes += skb->len;
601 u64_stats_update_end(&pcpu_stats->syncp);
602
603 skb->protocol = eth_type_trans(skb, skb->dev);
604 netif_receive_skb(skb);
605 }
606
607 /* This function is called in the following scenarios:
608 *
609 * 1) When a packet is matched with its timestamp.
610 * 2) In several situation when it is necessary to immediately pass on
611 * an SKB without a timestamp.
612 * 3) From GC indirectly through mlxsw_sp1_ptp_unmatched_finish().
613 * This case is similar to 2) above.
614 */
mlxsw_sp1_ptp_packet_finish(struct mlxsw_sp * mlxsw_sp,struct sk_buff * skb,u16 local_port,bool ingress,struct skb_shared_hwtstamps * hwtstamps)615 static void mlxsw_sp1_ptp_packet_finish(struct mlxsw_sp *mlxsw_sp,
616 struct sk_buff *skb, u16 local_port,
617 bool ingress,
618 struct skb_shared_hwtstamps *hwtstamps)
619 {
620 struct mlxsw_sp_port *mlxsw_sp_port;
621
622 /* Between capturing the packet and finishing it, there is a window of
623 * opportunity for the originating port to go away (e.g. due to a
624 * split). Also make sure the SKB device reference is still valid.
625 */
626 mlxsw_sp_port = mlxsw_sp->ports[local_port];
627 if (!(mlxsw_sp_port && (!skb->dev || skb->dev == mlxsw_sp_port->dev))) {
628 dev_kfree_skb_any(skb);
629 return;
630 }
631
632 if (ingress) {
633 if (hwtstamps)
634 *skb_hwtstamps(skb) = *hwtstamps;
635 mlxsw_sp1_ptp_rx_finish(mlxsw_sp_port, skb);
636 } else {
637 /* skb_tstamp_tx() allows hwtstamps to be NULL. */
638 skb_tstamp_tx(skb, hwtstamps);
639 dev_kfree_skb_any(skb);
640 }
641 }
642
mlxsw_sp1_packet_timestamp(struct mlxsw_sp * mlxsw_sp,struct mlxsw_sp1_ptp_key key,struct sk_buff * skb,u64 timestamp)643 static void mlxsw_sp1_packet_timestamp(struct mlxsw_sp *mlxsw_sp,
644 struct mlxsw_sp1_ptp_key key,
645 struct sk_buff *skb,
646 u64 timestamp)
647 {
648 struct mlxsw_sp_ptp_clock *clock_common = mlxsw_sp->clock;
649 struct mlxsw_sp1_ptp_clock *clock =
650 container_of(clock_common, struct mlxsw_sp1_ptp_clock, common);
651
652 struct skb_shared_hwtstamps hwtstamps;
653 u64 nsec;
654
655 spin_lock_bh(&clock->lock);
656 nsec = timecounter_cyc2time(&clock->tc, timestamp);
657 spin_unlock_bh(&clock->lock);
658
659 hwtstamps.hwtstamp = ns_to_ktime(nsec);
660 mlxsw_sp1_ptp_packet_finish(mlxsw_sp, skb,
661 key.local_port, key.ingress, &hwtstamps);
662 }
663
664 static void
mlxsw_sp1_ptp_unmatched_finish(struct mlxsw_sp * mlxsw_sp,struct mlxsw_sp1_ptp_unmatched * unmatched)665 mlxsw_sp1_ptp_unmatched_finish(struct mlxsw_sp *mlxsw_sp,
666 struct mlxsw_sp1_ptp_unmatched *unmatched)
667 {
668 if (unmatched->skb && unmatched->timestamp)
669 mlxsw_sp1_packet_timestamp(mlxsw_sp, unmatched->key,
670 unmatched->skb,
671 unmatched->timestamp);
672 else if (unmatched->skb)
673 mlxsw_sp1_ptp_packet_finish(mlxsw_sp, unmatched->skb,
674 unmatched->key.local_port,
675 unmatched->key.ingress, NULL);
676 kfree_rcu(unmatched, rcu);
677 }
678
mlxsw_sp1_ptp_unmatched_free_fn(void * ptr,void * arg)679 static void mlxsw_sp1_ptp_unmatched_free_fn(void *ptr, void *arg)
680 {
681 struct mlxsw_sp1_ptp_unmatched *unmatched = ptr;
682
683 /* This is invoked at a point where the ports are gone already. Nothing
684 * to do with whatever is left in the HT but to free it.
685 */
686 if (unmatched->skb)
687 dev_kfree_skb_any(unmatched->skb);
688 kfree_rcu(unmatched, rcu);
689 }
690
mlxsw_sp1_ptp_got_piece(struct mlxsw_sp * mlxsw_sp,struct mlxsw_sp1_ptp_key key,struct sk_buff * skb,u64 timestamp)691 static void mlxsw_sp1_ptp_got_piece(struct mlxsw_sp *mlxsw_sp,
692 struct mlxsw_sp1_ptp_key key,
693 struct sk_buff *skb, u64 timestamp)
694 {
695 struct mlxsw_sp1_ptp_state *ptp_state = mlxsw_sp1_ptp_state(mlxsw_sp);
696 struct mlxsw_sp1_ptp_unmatched *unmatched;
697 int length;
698 int err;
699
700 rcu_read_lock();
701
702 spin_lock(&ptp_state->unmatched_lock);
703
704 unmatched = mlxsw_sp1_ptp_unmatched_lookup(mlxsw_sp, key, &length);
705 if (skb && unmatched && unmatched->timestamp) {
706 unmatched->skb = skb;
707 } else if (timestamp && unmatched && unmatched->skb) {
708 unmatched->timestamp = timestamp;
709 } else {
710 /* Either there is no entry to match, or one that is there is
711 * incompatible.
712 */
713 if (length < 100)
714 err = mlxsw_sp1_ptp_unmatched_save(mlxsw_sp, key,
715 skb, timestamp);
716 else
717 err = -E2BIG;
718 if (err && skb)
719 mlxsw_sp1_ptp_packet_finish(mlxsw_sp, skb,
720 key.local_port,
721 key.ingress, NULL);
722 unmatched = NULL;
723 }
724
725 if (unmatched) {
726 err = mlxsw_sp1_ptp_unmatched_remove(mlxsw_sp, unmatched);
727 WARN_ON_ONCE(err);
728 }
729
730 spin_unlock(&ptp_state->unmatched_lock);
731
732 if (unmatched)
733 mlxsw_sp1_ptp_unmatched_finish(mlxsw_sp, unmatched);
734
735 rcu_read_unlock();
736 }
737
mlxsw_sp1_ptp_got_packet(struct mlxsw_sp * mlxsw_sp,struct sk_buff * skb,u16 local_port,bool ingress)738 static void mlxsw_sp1_ptp_got_packet(struct mlxsw_sp *mlxsw_sp,
739 struct sk_buff *skb, u16 local_port,
740 bool ingress)
741 {
742 struct mlxsw_sp_port *mlxsw_sp_port;
743 struct mlxsw_sp1_ptp_key key;
744 u8 types;
745 int err;
746
747 mlxsw_sp_port = mlxsw_sp->ports[local_port];
748 if (!mlxsw_sp_port)
749 goto immediate;
750
751 types = ingress ? mlxsw_sp_port->ptp.ing_types :
752 mlxsw_sp_port->ptp.egr_types;
753 if (!types)
754 goto immediate;
755
756 memset(&key, 0, sizeof(key));
757 key.local_port = local_port;
758 key.ingress = ingress;
759
760 err = mlxsw_sp_ptp_parse(skb, &key.domain_number, &key.message_type,
761 &key.sequence_id);
762 if (err)
763 goto immediate;
764
765 /* For packets whose timestamping was not enabled on this port, don't
766 * bother trying to match the timestamp.
767 */
768 if (!((1 << key.message_type) & types))
769 goto immediate;
770
771 mlxsw_sp1_ptp_got_piece(mlxsw_sp, key, skb, 0);
772 return;
773
774 immediate:
775 mlxsw_sp1_ptp_packet_finish(mlxsw_sp, skb, local_port, ingress, NULL);
776 }
777
mlxsw_sp1_ptp_got_timestamp(struct mlxsw_sp * mlxsw_sp,bool ingress,u16 local_port,u8 message_type,u8 domain_number,u16 sequence_id,u64 timestamp)778 void mlxsw_sp1_ptp_got_timestamp(struct mlxsw_sp *mlxsw_sp, bool ingress,
779 u16 local_port, u8 message_type,
780 u8 domain_number, u16 sequence_id,
781 u64 timestamp)
782 {
783 struct mlxsw_sp_port *mlxsw_sp_port;
784 struct mlxsw_sp1_ptp_key key;
785 u8 types;
786
787 if (WARN_ON_ONCE(!mlxsw_sp_local_port_is_valid(mlxsw_sp, local_port)))
788 return;
789 mlxsw_sp_port = mlxsw_sp->ports[local_port];
790 if (!mlxsw_sp_port)
791 return;
792
793 types = ingress ? mlxsw_sp_port->ptp.ing_types :
794 mlxsw_sp_port->ptp.egr_types;
795
796 /* For message types whose timestamping was not enabled on this port,
797 * don't bother with the timestamp.
798 */
799 if (!((1 << message_type) & types))
800 return;
801
802 memset(&key, 0, sizeof(key));
803 key.local_port = local_port;
804 key.domain_number = domain_number;
805 key.message_type = message_type;
806 key.sequence_id = sequence_id;
807 key.ingress = ingress;
808
809 mlxsw_sp1_ptp_got_piece(mlxsw_sp, key, NULL, timestamp);
810 }
811
mlxsw_sp1_ptp_receive(struct mlxsw_sp * mlxsw_sp,struct sk_buff * skb,u16 local_port)812 void mlxsw_sp1_ptp_receive(struct mlxsw_sp *mlxsw_sp, struct sk_buff *skb,
813 u16 local_port)
814 {
815 skb_reset_mac_header(skb);
816 mlxsw_sp1_ptp_got_packet(mlxsw_sp, skb, local_port, true);
817 }
818
mlxsw_sp1_ptp_transmitted(struct mlxsw_sp * mlxsw_sp,struct sk_buff * skb,u16 local_port)819 void mlxsw_sp1_ptp_transmitted(struct mlxsw_sp *mlxsw_sp,
820 struct sk_buff *skb, u16 local_port)
821 {
822 mlxsw_sp1_ptp_got_packet(mlxsw_sp, skb, local_port, false);
823 }
824
825 static void
mlxsw_sp1_ptp_ht_gc_collect(struct mlxsw_sp1_ptp_state * ptp_state,struct mlxsw_sp1_ptp_unmatched * unmatched)826 mlxsw_sp1_ptp_ht_gc_collect(struct mlxsw_sp1_ptp_state *ptp_state,
827 struct mlxsw_sp1_ptp_unmatched *unmatched)
828 {
829 struct mlxsw_sp *mlxsw_sp = ptp_state->common.mlxsw_sp;
830 struct mlxsw_sp_ptp_port_dir_stats *stats;
831 struct mlxsw_sp_port *mlxsw_sp_port;
832 int err;
833
834 /* If an unmatched entry has an SKB, it has to be handed over to the
835 * networking stack. This is usually done from a trap handler, which is
836 * invoked in a softirq context. Here we are going to do it in process
837 * context. If that were to be interrupted by a softirq, it could cause
838 * a deadlock when an attempt is made to take an already-taken lock
839 * somewhere along the sending path. Disable softirqs to prevent this.
840 */
841 local_bh_disable();
842
843 spin_lock(&ptp_state->unmatched_lock);
844 err = rhltable_remove(&ptp_state->unmatched_ht, &unmatched->ht_node,
845 mlxsw_sp1_ptp_unmatched_ht_params);
846 spin_unlock(&ptp_state->unmatched_lock);
847
848 if (err)
849 /* The packet was matched with timestamp during the walk. */
850 goto out;
851
852 mlxsw_sp_port = mlxsw_sp->ports[unmatched->key.local_port];
853 if (mlxsw_sp_port) {
854 stats = unmatched->key.ingress ?
855 &mlxsw_sp_port->ptp.stats.rx_gcd :
856 &mlxsw_sp_port->ptp.stats.tx_gcd;
857 if (unmatched->skb)
858 stats->packets++;
859 else
860 stats->timestamps++;
861 }
862
863 /* mlxsw_sp1_ptp_unmatched_finish() invokes netif_receive_skb(). While
864 * the comment at that function states that it can only be called in
865 * soft IRQ context, this pattern of local_bh_disable() +
866 * netif_receive_skb(), in process context, is seen elsewhere in the
867 * kernel, notably in pktgen.
868 */
869 mlxsw_sp1_ptp_unmatched_finish(mlxsw_sp, unmatched);
870
871 out:
872 local_bh_enable();
873 }
874
mlxsw_sp1_ptp_ht_gc(struct work_struct * work)875 static void mlxsw_sp1_ptp_ht_gc(struct work_struct *work)
876 {
877 struct delayed_work *dwork = to_delayed_work(work);
878 struct mlxsw_sp1_ptp_unmatched *unmatched;
879 struct mlxsw_sp1_ptp_state *ptp_state;
880 struct rhashtable_iter iter;
881 u32 gc_cycle;
882 void *obj;
883
884 ptp_state = container_of(dwork, struct mlxsw_sp1_ptp_state, ht_gc_dw);
885 gc_cycle = ptp_state->gc_cycle++;
886
887 rhltable_walk_enter(&ptp_state->unmatched_ht, &iter);
888 rhashtable_walk_start(&iter);
889 while ((obj = rhashtable_walk_next(&iter))) {
890 if (IS_ERR(obj))
891 continue;
892
893 unmatched = obj;
894 if (unmatched->gc_cycle <= gc_cycle)
895 mlxsw_sp1_ptp_ht_gc_collect(ptp_state, unmatched);
896 }
897 rhashtable_walk_stop(&iter);
898 rhashtable_walk_exit(&iter);
899
900 mlxsw_core_schedule_dw(&ptp_state->ht_gc_dw,
901 MLXSW_SP1_PTP_HT_GC_INTERVAL);
902 }
903
mlxsw_sp_ptp_mtptpt_set(struct mlxsw_sp * mlxsw_sp,enum mlxsw_reg_mtptpt_trap_id trap_id,u16 message_type)904 static int mlxsw_sp_ptp_mtptpt_set(struct mlxsw_sp *mlxsw_sp,
905 enum mlxsw_reg_mtptpt_trap_id trap_id,
906 u16 message_type)
907 {
908 char mtptpt_pl[MLXSW_REG_MTPTPT_LEN];
909
910 mlxsw_reg_mtptpt_pack(mtptpt_pl, trap_id, message_type);
911 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtptpt), mtptpt_pl);
912 }
913
mlxsw_sp1_ptp_set_fifo_clr_on_trap(struct mlxsw_sp * mlxsw_sp,bool clr)914 static int mlxsw_sp1_ptp_set_fifo_clr_on_trap(struct mlxsw_sp *mlxsw_sp,
915 bool clr)
916 {
917 char mogcr_pl[MLXSW_REG_MOGCR_LEN] = {0};
918 int err;
919
920 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl);
921 if (err)
922 return err;
923
924 mlxsw_reg_mogcr_ptp_iftc_set(mogcr_pl, clr);
925 mlxsw_reg_mogcr_ptp_eftc_set(mogcr_pl, clr);
926 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mogcr), mogcr_pl);
927 }
928
mlxsw_sp1_ptp_mtpppc_set(struct mlxsw_sp * mlxsw_sp,u16 ing_types,u16 egr_types)929 static int mlxsw_sp1_ptp_mtpppc_set(struct mlxsw_sp *mlxsw_sp,
930 u16 ing_types, u16 egr_types)
931 {
932 char mtpppc_pl[MLXSW_REG_MTPPPC_LEN];
933
934 mlxsw_reg_mtpppc_pack(mtpppc_pl, ing_types, egr_types);
935 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtpppc), mtpppc_pl);
936 }
937
938 struct mlxsw_sp1_ptp_shaper_params {
939 u32 ethtool_speed;
940 enum mlxsw_reg_qpsc_port_speed port_speed;
941 u8 shaper_time_exp;
942 u8 shaper_time_mantissa;
943 u8 shaper_inc;
944 u8 shaper_bs;
945 u8 port_to_shaper_credits;
946 int ing_timestamp_inc;
947 int egr_timestamp_inc;
948 };
949
950 static const struct mlxsw_sp1_ptp_shaper_params
951 mlxsw_sp1_ptp_shaper_params[] = {
952 {
953 .ethtool_speed = SPEED_100,
954 .port_speed = MLXSW_REG_QPSC_PORT_SPEED_100M,
955 .shaper_time_exp = 4,
956 .shaper_time_mantissa = 12,
957 .shaper_inc = 9,
958 .shaper_bs = 1,
959 .port_to_shaper_credits = 1,
960 .ing_timestamp_inc = -313,
961 .egr_timestamp_inc = 313,
962 },
963 {
964 .ethtool_speed = SPEED_1000,
965 .port_speed = MLXSW_REG_QPSC_PORT_SPEED_1G,
966 .shaper_time_exp = 0,
967 .shaper_time_mantissa = 12,
968 .shaper_inc = 6,
969 .shaper_bs = 0,
970 .port_to_shaper_credits = 1,
971 .ing_timestamp_inc = -35,
972 .egr_timestamp_inc = 35,
973 },
974 {
975 .ethtool_speed = SPEED_10000,
976 .port_speed = MLXSW_REG_QPSC_PORT_SPEED_10G,
977 .shaper_time_exp = 0,
978 .shaper_time_mantissa = 2,
979 .shaper_inc = 14,
980 .shaper_bs = 1,
981 .port_to_shaper_credits = 1,
982 .ing_timestamp_inc = -11,
983 .egr_timestamp_inc = 11,
984 },
985 {
986 .ethtool_speed = SPEED_25000,
987 .port_speed = MLXSW_REG_QPSC_PORT_SPEED_25G,
988 .shaper_time_exp = 0,
989 .shaper_time_mantissa = 0,
990 .shaper_inc = 11,
991 .shaper_bs = 1,
992 .port_to_shaper_credits = 1,
993 .ing_timestamp_inc = -14,
994 .egr_timestamp_inc = 14,
995 },
996 };
997
998 #define MLXSW_SP1_PTP_SHAPER_PARAMS_LEN ARRAY_SIZE(mlxsw_sp1_ptp_shaper_params)
999
mlxsw_sp1_ptp_shaper_params_set(struct mlxsw_sp * mlxsw_sp)1000 static int mlxsw_sp1_ptp_shaper_params_set(struct mlxsw_sp *mlxsw_sp)
1001 {
1002 const struct mlxsw_sp1_ptp_shaper_params *params;
1003 char qpsc_pl[MLXSW_REG_QPSC_LEN];
1004 int i, err;
1005
1006 for (i = 0; i < MLXSW_SP1_PTP_SHAPER_PARAMS_LEN; i++) {
1007 params = &mlxsw_sp1_ptp_shaper_params[i];
1008 mlxsw_reg_qpsc_pack(qpsc_pl, params->port_speed,
1009 params->shaper_time_exp,
1010 params->shaper_time_mantissa,
1011 params->shaper_inc, params->shaper_bs,
1012 params->port_to_shaper_credits,
1013 params->ing_timestamp_inc,
1014 params->egr_timestamp_inc);
1015 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qpsc), qpsc_pl);
1016 if (err)
1017 return err;
1018 }
1019
1020 return 0;
1021 }
1022
mlxsw_sp_ptp_traps_set(struct mlxsw_sp * mlxsw_sp)1023 static int mlxsw_sp_ptp_traps_set(struct mlxsw_sp *mlxsw_sp)
1024 {
1025 u16 event_message_type;
1026 int err;
1027
1028 /* Deliver these message types as PTP0. */
1029 event_message_type = BIT(PTP_MSGTYPE_SYNC) |
1030 BIT(PTP_MSGTYPE_DELAY_REQ) |
1031 BIT(PTP_MSGTYPE_PDELAY_REQ) |
1032 BIT(PTP_MSGTYPE_PDELAY_RESP);
1033
1034 err = mlxsw_sp_ptp_mtptpt_set(mlxsw_sp, MLXSW_REG_MTPTPT_TRAP_ID_PTP0,
1035 event_message_type);
1036 if (err)
1037 return err;
1038
1039 /* Everything else is PTP1. */
1040 err = mlxsw_sp_ptp_mtptpt_set(mlxsw_sp, MLXSW_REG_MTPTPT_TRAP_ID_PTP1,
1041 ~event_message_type);
1042 if (err)
1043 goto err_mtptpt1_set;
1044
1045 return 0;
1046
1047 err_mtptpt1_set:
1048 mlxsw_sp_ptp_mtptpt_set(mlxsw_sp, MLXSW_REG_MTPTPT_TRAP_ID_PTP0, 0);
1049 return err;
1050 }
1051
mlxsw_sp_ptp_traps_unset(struct mlxsw_sp * mlxsw_sp)1052 static void mlxsw_sp_ptp_traps_unset(struct mlxsw_sp *mlxsw_sp)
1053 {
1054 mlxsw_sp_ptp_mtptpt_set(mlxsw_sp, MLXSW_REG_MTPTPT_TRAP_ID_PTP1, 0);
1055 mlxsw_sp_ptp_mtptpt_set(mlxsw_sp, MLXSW_REG_MTPTPT_TRAP_ID_PTP0, 0);
1056 }
1057
mlxsw_sp1_ptp_init(struct mlxsw_sp * mlxsw_sp)1058 struct mlxsw_sp_ptp_state *mlxsw_sp1_ptp_init(struct mlxsw_sp *mlxsw_sp)
1059 {
1060 struct mlxsw_sp1_ptp_state *ptp_state;
1061 int err;
1062
1063 err = mlxsw_sp1_ptp_shaper_params_set(mlxsw_sp);
1064 if (err)
1065 return ERR_PTR(err);
1066
1067 ptp_state = kzalloc_obj(*ptp_state);
1068 if (!ptp_state)
1069 return ERR_PTR(-ENOMEM);
1070 ptp_state->common.mlxsw_sp = mlxsw_sp;
1071
1072 spin_lock_init(&ptp_state->unmatched_lock);
1073
1074 err = rhltable_init(&ptp_state->unmatched_ht,
1075 &mlxsw_sp1_ptp_unmatched_ht_params);
1076 if (err)
1077 goto err_hashtable_init;
1078
1079 err = mlxsw_sp_ptp_traps_set(mlxsw_sp);
1080 if (err)
1081 goto err_ptp_traps_set;
1082
1083 err = mlxsw_sp1_ptp_set_fifo_clr_on_trap(mlxsw_sp, true);
1084 if (err)
1085 goto err_fifo_clr;
1086
1087 INIT_DELAYED_WORK(&ptp_state->ht_gc_dw, mlxsw_sp1_ptp_ht_gc);
1088 mlxsw_core_schedule_dw(&ptp_state->ht_gc_dw,
1089 MLXSW_SP1_PTP_HT_GC_INTERVAL);
1090 return &ptp_state->common;
1091
1092 err_fifo_clr:
1093 mlxsw_sp_ptp_traps_unset(mlxsw_sp);
1094 err_ptp_traps_set:
1095 rhltable_destroy(&ptp_state->unmatched_ht);
1096 err_hashtable_init:
1097 kfree(ptp_state);
1098 return ERR_PTR(err);
1099 }
1100
mlxsw_sp1_ptp_fini(struct mlxsw_sp_ptp_state * ptp_state_common)1101 void mlxsw_sp1_ptp_fini(struct mlxsw_sp_ptp_state *ptp_state_common)
1102 {
1103 struct mlxsw_sp *mlxsw_sp = ptp_state_common->mlxsw_sp;
1104 struct mlxsw_sp1_ptp_state *ptp_state;
1105
1106 ptp_state = mlxsw_sp1_ptp_state(mlxsw_sp);
1107
1108 cancel_delayed_work_sync(&ptp_state->ht_gc_dw);
1109 mlxsw_sp1_ptp_mtpppc_set(mlxsw_sp, 0, 0);
1110 mlxsw_sp1_ptp_set_fifo_clr_on_trap(mlxsw_sp, false);
1111 mlxsw_sp_ptp_traps_unset(mlxsw_sp);
1112 rhltable_free_and_destroy(&ptp_state->unmatched_ht,
1113 &mlxsw_sp1_ptp_unmatched_free_fn, NULL);
1114 kfree(ptp_state);
1115 }
1116
mlxsw_sp1_ptp_hwtstamp_get(struct mlxsw_sp_port * mlxsw_sp_port,struct kernel_hwtstamp_config * config)1117 int mlxsw_sp1_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,
1118 struct kernel_hwtstamp_config *config)
1119 {
1120 *config = mlxsw_sp_port->ptp.hwtstamp_config;
1121 return 0;
1122 }
1123
1124 static int
mlxsw_sp1_ptp_get_message_types(const struct kernel_hwtstamp_config * config,u16 * p_ing_types,u16 * p_egr_types,enum hwtstamp_rx_filters * p_rx_filter)1125 mlxsw_sp1_ptp_get_message_types(const struct kernel_hwtstamp_config *config,
1126 u16 *p_ing_types, u16 *p_egr_types,
1127 enum hwtstamp_rx_filters *p_rx_filter)
1128 {
1129 enum hwtstamp_rx_filters rx_filter = config->rx_filter;
1130 enum hwtstamp_tx_types tx_type = config->tx_type;
1131 u16 ing_types = 0x00;
1132 u16 egr_types = 0x00;
1133
1134 switch (tx_type) {
1135 case HWTSTAMP_TX_OFF:
1136 egr_types = 0x00;
1137 break;
1138 case HWTSTAMP_TX_ON:
1139 egr_types = 0xff;
1140 break;
1141 case HWTSTAMP_TX_ONESTEP_SYNC:
1142 case HWTSTAMP_TX_ONESTEP_P2P:
1143 return -ERANGE;
1144 default:
1145 return -EINVAL;
1146 }
1147
1148 switch (rx_filter) {
1149 case HWTSTAMP_FILTER_NONE:
1150 ing_types = 0x00;
1151 break;
1152 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1153 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1154 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1155 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1156 ing_types = 0x01;
1157 break;
1158 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1159 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1160 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1161 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1162 ing_types = 0x02;
1163 break;
1164 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1165 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1166 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1167 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1168 ing_types = 0x0f;
1169 break;
1170 case HWTSTAMP_FILTER_ALL:
1171 ing_types = 0xff;
1172 break;
1173 case HWTSTAMP_FILTER_SOME:
1174 case HWTSTAMP_FILTER_NTP_ALL:
1175 return -ERANGE;
1176 default:
1177 return -EINVAL;
1178 }
1179
1180 *p_ing_types = ing_types;
1181 *p_egr_types = egr_types;
1182 *p_rx_filter = rx_filter;
1183 return 0;
1184 }
1185
mlxsw_sp1_ptp_mtpppc_update(struct mlxsw_sp_port * mlxsw_sp_port,u16 ing_types,u16 egr_types)1186 static int mlxsw_sp1_ptp_mtpppc_update(struct mlxsw_sp_port *mlxsw_sp_port,
1187 u16 ing_types, u16 egr_types)
1188 {
1189 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1190 struct mlxsw_sp_port *tmp;
1191 u16 orig_ing_types = 0;
1192 u16 orig_egr_types = 0;
1193 int err;
1194 int i;
1195
1196 /* MTPPPC configures timestamping globally, not per port. Find the
1197 * configuration that contains all configured timestamping requests.
1198 */
1199 for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++) {
1200 tmp = mlxsw_sp->ports[i];
1201 if (tmp) {
1202 orig_ing_types |= tmp->ptp.ing_types;
1203 orig_egr_types |= tmp->ptp.egr_types;
1204 }
1205 if (tmp && tmp != mlxsw_sp_port) {
1206 ing_types |= tmp->ptp.ing_types;
1207 egr_types |= tmp->ptp.egr_types;
1208 }
1209 }
1210
1211 if ((ing_types || egr_types) && !(orig_ing_types || orig_egr_types)) {
1212 err = mlxsw_sp_parsing_depth_inc(mlxsw_sp);
1213 if (err) {
1214 netdev_err(mlxsw_sp_port->dev, "Failed to increase parsing depth");
1215 return err;
1216 }
1217 }
1218 if (!(ing_types || egr_types) && (orig_ing_types || orig_egr_types))
1219 mlxsw_sp_parsing_depth_dec(mlxsw_sp);
1220
1221 return mlxsw_sp1_ptp_mtpppc_set(mlxsw_sp_port->mlxsw_sp,
1222 ing_types, egr_types);
1223 }
1224
mlxsw_sp1_ptp_hwtstamp_enabled(struct mlxsw_sp_port * mlxsw_sp_port)1225 static bool mlxsw_sp1_ptp_hwtstamp_enabled(struct mlxsw_sp_port *mlxsw_sp_port)
1226 {
1227 return mlxsw_sp_port->ptp.ing_types || mlxsw_sp_port->ptp.egr_types;
1228 }
1229
1230 static int
mlxsw_sp1_ptp_port_shaper_set(struct mlxsw_sp_port * mlxsw_sp_port,bool enable)1231 mlxsw_sp1_ptp_port_shaper_set(struct mlxsw_sp_port *mlxsw_sp_port, bool enable)
1232 {
1233 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1234 char qeec_pl[MLXSW_REG_QEEC_LEN];
1235
1236 mlxsw_reg_qeec_ptps_pack(qeec_pl, mlxsw_sp_port->local_port, enable);
1237 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1238 }
1239
mlxsw_sp1_ptp_port_shaper_check(struct mlxsw_sp_port * mlxsw_sp_port)1240 static int mlxsw_sp1_ptp_port_shaper_check(struct mlxsw_sp_port *mlxsw_sp_port)
1241 {
1242 bool ptps = false;
1243 int err, i;
1244 u32 speed;
1245
1246 if (!mlxsw_sp1_ptp_hwtstamp_enabled(mlxsw_sp_port))
1247 return mlxsw_sp1_ptp_port_shaper_set(mlxsw_sp_port, false);
1248
1249 err = mlxsw_sp_port_speed_get(mlxsw_sp_port, &speed);
1250 if (err)
1251 return err;
1252
1253 for (i = 0; i < MLXSW_SP1_PTP_SHAPER_PARAMS_LEN; i++) {
1254 if (mlxsw_sp1_ptp_shaper_params[i].ethtool_speed == speed) {
1255 ptps = true;
1256 break;
1257 }
1258 }
1259
1260 return mlxsw_sp1_ptp_port_shaper_set(mlxsw_sp_port, ptps);
1261 }
1262
mlxsw_sp1_ptp_shaper_work(struct work_struct * work)1263 void mlxsw_sp1_ptp_shaper_work(struct work_struct *work)
1264 {
1265 struct delayed_work *dwork = to_delayed_work(work);
1266 struct mlxsw_sp_port *mlxsw_sp_port;
1267 int err;
1268
1269 mlxsw_sp_port = container_of(dwork, struct mlxsw_sp_port,
1270 ptp.shaper_dw);
1271
1272 if (!mlxsw_sp1_ptp_hwtstamp_enabled(mlxsw_sp_port))
1273 return;
1274
1275 err = mlxsw_sp1_ptp_port_shaper_check(mlxsw_sp_port);
1276 if (err)
1277 netdev_err(mlxsw_sp_port->dev, "Failed to set up PTP shaper\n");
1278 }
1279
mlxsw_sp1_ptp_hwtstamp_set(struct mlxsw_sp_port * mlxsw_sp_port,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)1280 int mlxsw_sp1_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,
1281 struct kernel_hwtstamp_config *config,
1282 struct netlink_ext_ack *extack)
1283 {
1284 enum hwtstamp_rx_filters rx_filter;
1285 u16 ing_types;
1286 u16 egr_types;
1287 int err;
1288
1289 err = mlxsw_sp1_ptp_get_message_types(config, &ing_types, &egr_types,
1290 &rx_filter);
1291 if (err)
1292 return err;
1293
1294 err = mlxsw_sp1_ptp_mtpppc_update(mlxsw_sp_port, ing_types, egr_types);
1295 if (err)
1296 return err;
1297
1298 mlxsw_sp_port->ptp.hwtstamp_config = *config;
1299 mlxsw_sp_port->ptp.ing_types = ing_types;
1300 mlxsw_sp_port->ptp.egr_types = egr_types;
1301
1302 err = mlxsw_sp1_ptp_port_shaper_check(mlxsw_sp_port);
1303 if (err)
1304 return err;
1305
1306 /* Notify the caller what we are actually timestamping. */
1307 config->rx_filter = rx_filter;
1308
1309 return 0;
1310 }
1311
mlxsw_sp1_ptp_get_ts_info(struct mlxsw_sp * mlxsw_sp,struct kernel_ethtool_ts_info * info)1312 int mlxsw_sp1_ptp_get_ts_info(struct mlxsw_sp *mlxsw_sp,
1313 struct kernel_ethtool_ts_info *info)
1314 {
1315 info->phc_index = ptp_clock_index(mlxsw_sp->clock->ptp);
1316
1317 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1318 SOF_TIMESTAMPING_RX_HARDWARE |
1319 SOF_TIMESTAMPING_RAW_HARDWARE;
1320
1321 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1322 BIT(HWTSTAMP_TX_ON);
1323
1324 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1325 BIT(HWTSTAMP_FILTER_ALL);
1326
1327 return 0;
1328 }
1329
1330 struct mlxsw_sp_ptp_port_stat {
1331 char str[ETH_GSTRING_LEN];
1332 ptrdiff_t offset;
1333 };
1334
1335 #define MLXSW_SP_PTP_PORT_STAT(NAME, FIELD) \
1336 { \
1337 .str = NAME, \
1338 .offset = offsetof(struct mlxsw_sp_ptp_port_stats, \
1339 FIELD), \
1340 }
1341
1342 static const struct mlxsw_sp_ptp_port_stat mlxsw_sp_ptp_port_stats[] = {
1343 MLXSW_SP_PTP_PORT_STAT("ptp_rx_gcd_packets", rx_gcd.packets),
1344 MLXSW_SP_PTP_PORT_STAT("ptp_rx_gcd_timestamps", rx_gcd.timestamps),
1345 MLXSW_SP_PTP_PORT_STAT("ptp_tx_gcd_packets", tx_gcd.packets),
1346 MLXSW_SP_PTP_PORT_STAT("ptp_tx_gcd_timestamps", tx_gcd.timestamps),
1347 };
1348
1349 #undef MLXSW_SP_PTP_PORT_STAT
1350
1351 #define MLXSW_SP_PTP_PORT_STATS_LEN \
1352 ARRAY_SIZE(mlxsw_sp_ptp_port_stats)
1353
mlxsw_sp1_get_stats_count(void)1354 int mlxsw_sp1_get_stats_count(void)
1355 {
1356 return MLXSW_SP_PTP_PORT_STATS_LEN;
1357 }
1358
mlxsw_sp1_get_stats_strings(u8 ** p)1359 void mlxsw_sp1_get_stats_strings(u8 **p)
1360 {
1361 int i;
1362
1363 for (i = 0; i < MLXSW_SP_PTP_PORT_STATS_LEN; i++) {
1364 memcpy(*p, mlxsw_sp_ptp_port_stats[i].str,
1365 ETH_GSTRING_LEN);
1366 *p += ETH_GSTRING_LEN;
1367 }
1368 }
1369
mlxsw_sp1_get_stats(struct mlxsw_sp_port * mlxsw_sp_port,u64 * data,int data_index)1370 void mlxsw_sp1_get_stats(struct mlxsw_sp_port *mlxsw_sp_port,
1371 u64 *data, int data_index)
1372 {
1373 void *stats = &mlxsw_sp_port->ptp.stats;
1374 ptrdiff_t offset;
1375 int i;
1376
1377 data += data_index;
1378 for (i = 0; i < MLXSW_SP_PTP_PORT_STATS_LEN; i++) {
1379 offset = mlxsw_sp_ptp_port_stats[i].offset;
1380 *data++ = *(u64 *)(stats + offset);
1381 }
1382 }
1383
mlxsw_sp2_ptp_init(struct mlxsw_sp * mlxsw_sp)1384 struct mlxsw_sp_ptp_state *mlxsw_sp2_ptp_init(struct mlxsw_sp *mlxsw_sp)
1385 {
1386 struct mlxsw_sp2_ptp_state *ptp_state;
1387 int err;
1388
1389 /* Max FID will be used in data path, check validity as part of init. */
1390 if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, FID))
1391 return ERR_PTR(-EIO);
1392
1393 ptp_state = kzalloc_obj(*ptp_state);
1394 if (!ptp_state)
1395 return ERR_PTR(-ENOMEM);
1396
1397 ptp_state->common.mlxsw_sp = mlxsw_sp;
1398
1399 err = mlxsw_sp_ptp_traps_set(mlxsw_sp);
1400 if (err)
1401 goto err_ptp_traps_set;
1402
1403 refcount_set(&ptp_state->ptp_port_enabled_ref, 0);
1404 mutex_init(&ptp_state->lock);
1405 return &ptp_state->common;
1406
1407 err_ptp_traps_set:
1408 kfree(ptp_state);
1409 return ERR_PTR(err);
1410 }
1411
mlxsw_sp2_ptp_fini(struct mlxsw_sp_ptp_state * ptp_state_common)1412 void mlxsw_sp2_ptp_fini(struct mlxsw_sp_ptp_state *ptp_state_common)
1413 {
1414 struct mlxsw_sp *mlxsw_sp = ptp_state_common->mlxsw_sp;
1415 struct mlxsw_sp2_ptp_state *ptp_state;
1416
1417 ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp);
1418
1419 mutex_destroy(&ptp_state->lock);
1420 mlxsw_sp_ptp_traps_unset(mlxsw_sp);
1421 kfree(ptp_state);
1422 }
1423
mlxsw_ptp_utc_time_stamp_sec_get(struct mlxsw_core * mlxsw_core,u8 cqe_ts_sec)1424 static u32 mlxsw_ptp_utc_time_stamp_sec_get(struct mlxsw_core *mlxsw_core,
1425 u8 cqe_ts_sec)
1426 {
1427 u32 utc_sec = mlxsw_core_read_utc_sec(mlxsw_core);
1428
1429 if (cqe_ts_sec > (utc_sec & 0xff))
1430 /* Time stamp above the last bits of UTC (UTC & 0xff) means the
1431 * latter has wrapped after the time stamp was collected.
1432 */
1433 utc_sec -= 256;
1434
1435 utc_sec &= ~0xff;
1436 utc_sec |= cqe_ts_sec;
1437
1438 return utc_sec;
1439 }
1440
mlxsw_sp2_ptp_hwtstamp_fill(struct mlxsw_core * mlxsw_core,const struct mlxsw_skb_cb * cb,struct skb_shared_hwtstamps * hwtstamps)1441 static void mlxsw_sp2_ptp_hwtstamp_fill(struct mlxsw_core *mlxsw_core,
1442 const struct mlxsw_skb_cb *cb,
1443 struct skb_shared_hwtstamps *hwtstamps)
1444 {
1445 u64 ts_sec, ts_nsec, nsec;
1446
1447 WARN_ON_ONCE(!cb->cqe_ts.sec && !cb->cqe_ts.nsec);
1448
1449 /* The time stamp in the CQE is represented by 38 bits, which is a short
1450 * representation of UTC time. Software should create the full time
1451 * stamp using the global UTC clock. The seconds have only 8 bits in the
1452 * CQE, to create the full time stamp, use the current UTC time and fix
1453 * the seconds according to the relation between UTC seconds and CQE
1454 * seconds.
1455 */
1456 ts_sec = mlxsw_ptp_utc_time_stamp_sec_get(mlxsw_core, cb->cqe_ts.sec);
1457 ts_nsec = cb->cqe_ts.nsec;
1458
1459 nsec = ts_sec * NSEC_PER_SEC + ts_nsec;
1460
1461 hwtstamps->hwtstamp = ns_to_ktime(nsec);
1462 }
1463
mlxsw_sp2_ptp_receive(struct mlxsw_sp * mlxsw_sp,struct sk_buff * skb,u16 local_port)1464 void mlxsw_sp2_ptp_receive(struct mlxsw_sp *mlxsw_sp, struct sk_buff *skb,
1465 u16 local_port)
1466 {
1467 struct skb_shared_hwtstamps hwtstamps;
1468
1469 mlxsw_sp2_ptp_hwtstamp_fill(mlxsw_sp->core, mlxsw_skb_cb(skb),
1470 &hwtstamps);
1471 *skb_hwtstamps(skb) = hwtstamps;
1472 mlxsw_sp_rx_listener_no_mark_func(skb, local_port, mlxsw_sp);
1473 }
1474
mlxsw_sp2_ptp_transmitted(struct mlxsw_sp * mlxsw_sp,struct sk_buff * skb,u16 local_port)1475 void mlxsw_sp2_ptp_transmitted(struct mlxsw_sp *mlxsw_sp,
1476 struct sk_buff *skb, u16 local_port)
1477 {
1478 struct skb_shared_hwtstamps hwtstamps;
1479
1480 mlxsw_sp2_ptp_hwtstamp_fill(mlxsw_sp->core, mlxsw_skb_cb(skb),
1481 &hwtstamps);
1482 skb_tstamp_tx(skb, &hwtstamps);
1483 dev_kfree_skb_any(skb);
1484 }
1485
mlxsw_sp2_ptp_hwtstamp_get(struct mlxsw_sp_port * mlxsw_sp_port,struct kernel_hwtstamp_config * config)1486 int mlxsw_sp2_ptp_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,
1487 struct kernel_hwtstamp_config *config)
1488 {
1489 struct mlxsw_sp2_ptp_state *ptp_state;
1490
1491 ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp_port->mlxsw_sp);
1492
1493 mutex_lock(&ptp_state->lock);
1494 *config = ptp_state->config;
1495 mutex_unlock(&ptp_state->lock);
1496
1497 return 0;
1498 }
1499
1500 static int
mlxsw_sp2_ptp_get_message_types(const struct kernel_hwtstamp_config * config,u16 * p_ing_types,u16 * p_egr_types,enum hwtstamp_rx_filters * p_rx_filter)1501 mlxsw_sp2_ptp_get_message_types(const struct kernel_hwtstamp_config *config,
1502 u16 *p_ing_types, u16 *p_egr_types,
1503 enum hwtstamp_rx_filters *p_rx_filter)
1504 {
1505 enum hwtstamp_rx_filters rx_filter = config->rx_filter;
1506 enum hwtstamp_tx_types tx_type = config->tx_type;
1507 u16 ing_types = 0x00;
1508 u16 egr_types = 0x00;
1509
1510 *p_rx_filter = rx_filter;
1511
1512 switch (rx_filter) {
1513 case HWTSTAMP_FILTER_NONE:
1514 ing_types = 0x00;
1515 break;
1516 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1517 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1518 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1519 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1520 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1521 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1522 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1523 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1524 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1525 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1526 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1527 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1528 /* In Spectrum-2 and above, all packets get time stamp by
1529 * default and the driver fill the time stamp only for event
1530 * packets. Return all event types even if only specific types
1531 * were required.
1532 */
1533 ing_types = 0x0f;
1534 *p_rx_filter = HWTSTAMP_FILTER_SOME;
1535 break;
1536 case HWTSTAMP_FILTER_ALL:
1537 case HWTSTAMP_FILTER_SOME:
1538 case HWTSTAMP_FILTER_NTP_ALL:
1539 return -ERANGE;
1540 default:
1541 return -EINVAL;
1542 }
1543
1544 switch (tx_type) {
1545 case HWTSTAMP_TX_OFF:
1546 egr_types = 0x00;
1547 break;
1548 case HWTSTAMP_TX_ON:
1549 egr_types = 0x0f;
1550 break;
1551 case HWTSTAMP_TX_ONESTEP_SYNC:
1552 case HWTSTAMP_TX_ONESTEP_P2P:
1553 return -ERANGE;
1554 default:
1555 return -EINVAL;
1556 }
1557
1558 if ((ing_types && !egr_types) || (!ing_types && egr_types))
1559 return -EINVAL;
1560
1561 *p_ing_types = ing_types;
1562 *p_egr_types = egr_types;
1563 return 0;
1564 }
1565
mlxsw_sp2_ptp_mtpcpc_set(struct mlxsw_sp * mlxsw_sp,bool ptp_trap_en,u16 ing_types,u16 egr_types)1566 static int mlxsw_sp2_ptp_mtpcpc_set(struct mlxsw_sp *mlxsw_sp, bool ptp_trap_en,
1567 u16 ing_types, u16 egr_types)
1568 {
1569 char mtpcpc_pl[MLXSW_REG_MTPCPC_LEN];
1570
1571 mlxsw_reg_mtpcpc_pack(mtpcpc_pl, false, 0, ptp_trap_en, ing_types,
1572 egr_types);
1573 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mtpcpc), mtpcpc_pl);
1574 }
1575
mlxsw_sp2_ptp_enable(struct mlxsw_sp * mlxsw_sp,u16 ing_types,u16 egr_types,struct kernel_hwtstamp_config new_config)1576 static int mlxsw_sp2_ptp_enable(struct mlxsw_sp *mlxsw_sp, u16 ing_types,
1577 u16 egr_types,
1578 struct kernel_hwtstamp_config new_config)
1579 {
1580 struct mlxsw_sp2_ptp_state *ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp);
1581 int err;
1582
1583 err = mlxsw_sp2_ptp_mtpcpc_set(mlxsw_sp, true, ing_types, egr_types);
1584 if (err)
1585 return err;
1586
1587 ptp_state->config = new_config;
1588 return 0;
1589 }
1590
mlxsw_sp2_ptp_disable(struct mlxsw_sp * mlxsw_sp,struct kernel_hwtstamp_config new_config)1591 static int mlxsw_sp2_ptp_disable(struct mlxsw_sp *mlxsw_sp,
1592 struct kernel_hwtstamp_config new_config)
1593 {
1594 struct mlxsw_sp2_ptp_state *ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp);
1595 int err;
1596
1597 err = mlxsw_sp2_ptp_mtpcpc_set(mlxsw_sp, false, 0, 0);
1598 if (err)
1599 return err;
1600
1601 ptp_state->config = new_config;
1602 return 0;
1603 }
1604
mlxsw_sp2_ptp_configure_port(struct mlxsw_sp_port * mlxsw_sp_port,u16 ing_types,u16 egr_types,struct kernel_hwtstamp_config new_config)1605 static int mlxsw_sp2_ptp_configure_port(struct mlxsw_sp_port *mlxsw_sp_port,
1606 u16 ing_types, u16 egr_types,
1607 struct kernel_hwtstamp_config new_config)
1608 {
1609 struct mlxsw_sp2_ptp_state *ptp_state;
1610 int err;
1611
1612 ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp_port->mlxsw_sp);
1613
1614 if (refcount_inc_not_zero(&ptp_state->ptp_port_enabled_ref))
1615 return 0;
1616
1617 err = mlxsw_sp2_ptp_enable(mlxsw_sp_port->mlxsw_sp, ing_types,
1618 egr_types, new_config);
1619 if (err)
1620 return err;
1621
1622 refcount_set(&ptp_state->ptp_port_enabled_ref, 1);
1623
1624 return 0;
1625 }
1626
mlxsw_sp2_ptp_deconfigure_port(struct mlxsw_sp_port * mlxsw_sp_port,struct kernel_hwtstamp_config new_config)1627 static int mlxsw_sp2_ptp_deconfigure_port(struct mlxsw_sp_port *mlxsw_sp_port,
1628 struct kernel_hwtstamp_config new_config)
1629 {
1630 struct mlxsw_sp2_ptp_state *ptp_state;
1631 int err;
1632
1633 ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp_port->mlxsw_sp);
1634
1635 if (!refcount_dec_and_test(&ptp_state->ptp_port_enabled_ref))
1636 return 0;
1637
1638 err = mlxsw_sp2_ptp_disable(mlxsw_sp_port->mlxsw_sp, new_config);
1639 if (err)
1640 goto err_ptp_disable;
1641
1642 return 0;
1643
1644 err_ptp_disable:
1645 refcount_set(&ptp_state->ptp_port_enabled_ref, 1);
1646 return err;
1647 }
1648
mlxsw_sp2_ptp_hwtstamp_set(struct mlxsw_sp_port * mlxsw_sp_port,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)1649 int mlxsw_sp2_ptp_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,
1650 struct kernel_hwtstamp_config *config,
1651 struct netlink_ext_ack *extack)
1652 {
1653 struct kernel_hwtstamp_config new_config;
1654 struct mlxsw_sp2_ptp_state *ptp_state;
1655 enum hwtstamp_rx_filters rx_filter;
1656 u16 new_ing_types, new_egr_types;
1657 bool ptp_enabled;
1658 int err;
1659
1660 ptp_state = mlxsw_sp2_ptp_state(mlxsw_sp_port->mlxsw_sp);
1661 mutex_lock(&ptp_state->lock);
1662
1663 err = mlxsw_sp2_ptp_get_message_types(config, &new_ing_types,
1664 &new_egr_types, &rx_filter);
1665 if (err)
1666 goto err_get_message_types;
1667
1668 new_config.flags = config->flags;
1669 new_config.tx_type = config->tx_type;
1670 new_config.rx_filter = rx_filter;
1671
1672 ptp_enabled = mlxsw_sp_port->ptp.ing_types ||
1673 mlxsw_sp_port->ptp.egr_types;
1674
1675 if ((new_ing_types || new_egr_types) && !ptp_enabled) {
1676 err = mlxsw_sp2_ptp_configure_port(mlxsw_sp_port, new_ing_types,
1677 new_egr_types, new_config);
1678 if (err)
1679 goto err_configure_port;
1680 } else if (!new_ing_types && !new_egr_types && ptp_enabled) {
1681 err = mlxsw_sp2_ptp_deconfigure_port(mlxsw_sp_port, new_config);
1682 if (err)
1683 goto err_deconfigure_port;
1684 }
1685
1686 mlxsw_sp_port->ptp.ing_types = new_ing_types;
1687 mlxsw_sp_port->ptp.egr_types = new_egr_types;
1688
1689 /* Notify the caller what we are actually timestamping. */
1690 config->rx_filter = rx_filter;
1691 mutex_unlock(&ptp_state->lock);
1692
1693 return 0;
1694
1695 err_deconfigure_port:
1696 err_configure_port:
1697 err_get_message_types:
1698 mutex_unlock(&ptp_state->lock);
1699 return err;
1700 }
1701
mlxsw_sp2_ptp_get_ts_info(struct mlxsw_sp * mlxsw_sp,struct kernel_ethtool_ts_info * info)1702 int mlxsw_sp2_ptp_get_ts_info(struct mlxsw_sp *mlxsw_sp,
1703 struct kernel_ethtool_ts_info *info)
1704 {
1705 info->phc_index = ptp_clock_index(mlxsw_sp->clock->ptp);
1706
1707 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1708 SOF_TIMESTAMPING_RX_HARDWARE |
1709 SOF_TIMESTAMPING_RAW_HARDWARE;
1710
1711 info->tx_types = BIT(HWTSTAMP_TX_OFF) |
1712 BIT(HWTSTAMP_TX_ON);
1713
1714 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1715 BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
1716 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
1717
1718 return 0;
1719 }
1720