1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * cpuid support routines 5 * 6 * derived from arch/x86/kvm/x86.c 7 * 8 * Copyright 2011 Red Hat, Inc. and/or its affiliates. 9 * Copyright IBM Corporation, 2008 10 */ 11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 12 13 #include <linux/kvm_host.h> 14 #include "linux/lockdep.h" 15 #include <linux/export.h> 16 #include <linux/vmalloc.h> 17 #include <linux/uaccess.h> 18 #include <linux/sched/stat.h> 19 20 #include <asm/processor.h> 21 #include <asm/user.h> 22 #include <asm/fpu/xstate.h> 23 #include <asm/sgx.h> 24 #include <asm/cpuid/api.h> 25 #include "cpuid.h" 26 #include "lapic.h" 27 #include "mmu.h" 28 #include "trace.h" 29 #include "pmu.h" 30 #include "xen.h" 31 32 /* 33 * Unlike "struct cpuinfo_x86.x86_capability", kvm_cpu_caps doesn't need to be 34 * aligned to sizeof(unsigned long) because it's not accessed via bitops. 35 */ 36 u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly; 37 EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_cpu_caps); 38 39 bool kvm_is_configuring_cpu_caps __read_mostly; 40 EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_is_configuring_cpu_caps); 41 42 struct cpuid_xstate_sizes { 43 u32 eax; 44 u32 ebx; 45 u32 ecx; 46 }; 47 48 static struct cpuid_xstate_sizes xstate_sizes[XFEATURE_MAX] __ro_after_init; 49 50 void __init kvm_init_xstate_sizes(void) 51 { 52 u32 ign; 53 int i; 54 55 for (i = XFEATURE_YMM; i < ARRAY_SIZE(xstate_sizes); i++) { 56 struct cpuid_xstate_sizes *xs = &xstate_sizes[i]; 57 58 cpuid_count(0xD, i, &xs->eax, &xs->ebx, &xs->ecx, &ign); 59 } 60 } 61 62 u32 xstate_required_size(u64 xstate_bv, bool compacted) 63 { 64 u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET; 65 int i; 66 67 xstate_bv &= XFEATURE_MASK_EXTEND; 68 for (i = XFEATURE_YMM; i < ARRAY_SIZE(xstate_sizes) && xstate_bv; i++) { 69 struct cpuid_xstate_sizes *xs = &xstate_sizes[i]; 70 u32 offset; 71 72 if (!(xstate_bv & BIT_ULL(i))) 73 continue; 74 75 /* ECX[1]: 64B alignment in compacted form */ 76 if (compacted) 77 offset = (xs->ecx & 0x2) ? ALIGN(ret, 64) : ret; 78 else 79 offset = xs->ebx; 80 ret = max(ret, offset + xs->eax); 81 xstate_bv &= ~BIT_ULL(i); 82 } 83 84 return ret; 85 } 86 87 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry2( 88 struct kvm_cpuid_entry2 *entries, int nent, u32 function, u64 index) 89 { 90 struct kvm_cpuid_entry2 *e; 91 int i; 92 93 /* 94 * KVM has a semi-arbitrary rule that querying the guest's CPUID model 95 * with IRQs disabled is disallowed. The CPUID model can legitimately 96 * have over one hundred entries, i.e. the lookup is slow, and IRQs are 97 * typically disabled in KVM only when KVM is in a performance critical 98 * path, e.g. the core VM-Enter/VM-Exit run loop. Nothing will break 99 * if this rule is violated, this assertion is purely to flag potential 100 * performance issues. If this fires, consider moving the lookup out 101 * of the hotpath, e.g. by caching information during CPUID updates. 102 */ 103 lockdep_assert_irqs_enabled(); 104 105 for (i = 0; i < nent; i++) { 106 e = &entries[i]; 107 108 if (e->function != function) 109 continue; 110 111 /* 112 * If the index isn't significant, use the first entry with a 113 * matching function. It's userspace's responsibility to not 114 * provide "duplicate" entries in all cases. 115 */ 116 if (!(e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) || e->index == index) 117 return e; 118 119 120 /* 121 * Similarly, use the first matching entry if KVM is doing a 122 * lookup (as opposed to emulating CPUID) for a function that's 123 * architecturally defined as not having a significant index. 124 */ 125 if (index == KVM_CPUID_INDEX_NOT_SIGNIFICANT) { 126 /* 127 * Direct lookups from KVM should not diverge from what 128 * KVM defines internally (the architectural behavior). 129 */ 130 WARN_ON_ONCE(cpuid_function_is_indexed(function)); 131 return e; 132 } 133 } 134 135 return NULL; 136 } 137 EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_find_cpuid_entry2); 138 139 static int kvm_check_cpuid(struct kvm_vcpu *vcpu) 140 { 141 struct kvm_cpuid_entry2 *best; 142 u64 xfeatures; 143 144 /* 145 * The existing code assumes virtual address is 48-bit or 57-bit in the 146 * canonical address checks; exit if it is ever changed. 147 */ 148 best = kvm_find_cpuid_entry(vcpu, 0x80000008); 149 if (best) { 150 int vaddr_bits = (best->eax & 0xff00) >> 8; 151 152 if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0) 153 return -EINVAL; 154 } 155 156 /* 157 * Exposing dynamic xfeatures to the guest requires additional 158 * enabling in the FPU, e.g. to expand the guest XSAVE state size. 159 */ 160 best = kvm_find_cpuid_entry_index(vcpu, 0xd, 0); 161 if (!best) 162 return 0; 163 164 xfeatures = best->eax | ((u64)best->edx << 32); 165 xfeatures &= XFEATURE_MASK_USER_DYNAMIC; 166 if (!xfeatures) 167 return 0; 168 169 return fpu_enable_guest_xfd_features(&vcpu->arch.guest_fpu, xfeatures); 170 } 171 172 static u32 kvm_apply_cpuid_pv_features_quirk(struct kvm_vcpu *vcpu); 173 static void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu); 174 175 /* Check whether the supplied CPUID data is equal to what is already set for the vCPU. */ 176 static int kvm_cpuid_check_equal(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2, 177 int nent) 178 { 179 struct kvm_cpuid_entry2 *orig; 180 int i; 181 182 /* 183 * Apply runtime CPUID updates to the incoming CPUID entries to avoid 184 * false positives due mismatches on KVM-owned feature flags. 185 * 186 * Note! @e2 and @nent track the _old_ CPUID entries! 187 */ 188 kvm_update_cpuid_runtime(vcpu); 189 kvm_apply_cpuid_pv_features_quirk(vcpu); 190 191 if (nent != vcpu->arch.cpuid_nent) 192 return -EINVAL; 193 194 for (i = 0; i < nent; i++) { 195 orig = &vcpu->arch.cpuid_entries[i]; 196 if (e2[i].function != orig->function || 197 e2[i].index != orig->index || 198 e2[i].flags != orig->flags || 199 e2[i].eax != orig->eax || e2[i].ebx != orig->ebx || 200 e2[i].ecx != orig->ecx || e2[i].edx != orig->edx) 201 return -EINVAL; 202 } 203 204 return 0; 205 } 206 207 static struct kvm_hypervisor_cpuid kvm_get_hypervisor_cpuid(struct kvm_vcpu *vcpu, 208 const char *sig) 209 { 210 struct kvm_hypervisor_cpuid cpuid = {}; 211 struct kvm_cpuid_entry2 *entry; 212 u32 base; 213 214 for_each_possible_cpuid_base_hypervisor(base) { 215 entry = kvm_find_cpuid_entry(vcpu, base); 216 217 if (entry) { 218 u32 signature[3]; 219 220 signature[0] = entry->ebx; 221 signature[1] = entry->ecx; 222 signature[2] = entry->edx; 223 224 if (!memcmp(signature, sig, sizeof(signature))) { 225 cpuid.base = base; 226 cpuid.limit = entry->eax; 227 break; 228 } 229 } 230 } 231 232 return cpuid; 233 } 234 235 static u32 kvm_apply_cpuid_pv_features_quirk(struct kvm_vcpu *vcpu) 236 { 237 struct kvm_hypervisor_cpuid kvm_cpuid; 238 struct kvm_cpuid_entry2 *best; 239 240 kvm_cpuid = kvm_get_hypervisor_cpuid(vcpu, KVM_SIGNATURE); 241 if (!kvm_cpuid.base) 242 return 0; 243 244 best = kvm_find_cpuid_entry(vcpu, kvm_cpuid.base | KVM_CPUID_FEATURES); 245 if (!best) 246 return 0; 247 248 if (kvm_hlt_in_guest(vcpu->kvm)) 249 best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT); 250 251 return best->eax; 252 } 253 254 /* 255 * Calculate guest's supported XCR0 taking into account guest CPUID data and 256 * KVM's supported XCR0 (comprised of host's XCR0 and KVM_SUPPORTED_XCR0). 257 */ 258 static u64 cpuid_get_supported_xcr0(struct kvm_vcpu *vcpu) 259 { 260 struct kvm_cpuid_entry2 *best; 261 262 best = kvm_find_cpuid_entry_index(vcpu, 0xd, 0); 263 if (!best) 264 return 0; 265 266 return (best->eax | ((u64)best->edx << 32)) & kvm_caps.supported_xcr0; 267 } 268 269 static u64 cpuid_get_supported_xss(struct kvm_vcpu *vcpu) 270 { 271 struct kvm_cpuid_entry2 *best; 272 273 best = kvm_find_cpuid_entry_index(vcpu, 0xd, 1); 274 if (!best) 275 return 0; 276 277 return (best->ecx | ((u64)best->edx << 32)) & kvm_caps.supported_xss; 278 } 279 280 static __always_inline void kvm_update_feature_runtime(struct kvm_vcpu *vcpu, 281 struct kvm_cpuid_entry2 *entry, 282 unsigned int x86_feature, 283 bool has_feature) 284 { 285 cpuid_entry_change(entry, x86_feature, has_feature); 286 guest_cpu_cap_change(vcpu, x86_feature, has_feature); 287 } 288 289 static void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu) 290 { 291 struct kvm_cpuid_entry2 *best; 292 293 vcpu->arch.cpuid_dynamic_bits_dirty = false; 294 295 best = kvm_find_cpuid_entry(vcpu, 1); 296 if (best) { 297 kvm_update_feature_runtime(vcpu, best, X86_FEATURE_OSXSAVE, 298 kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE)); 299 300 kvm_update_feature_runtime(vcpu, best, X86_FEATURE_APIC, 301 vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); 302 303 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)) 304 kvm_update_feature_runtime(vcpu, best, X86_FEATURE_MWAIT, 305 vcpu->arch.ia32_misc_enable_msr & 306 MSR_IA32_MISC_ENABLE_MWAIT); 307 } 308 309 best = kvm_find_cpuid_entry_index(vcpu, 7, 0); 310 if (best) 311 kvm_update_feature_runtime(vcpu, best, X86_FEATURE_OSPKE, 312 kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE)); 313 314 315 best = kvm_find_cpuid_entry_index(vcpu, 0xD, 0); 316 if (best) 317 best->ebx = xstate_required_size(vcpu->arch.xcr0, false); 318 319 best = kvm_find_cpuid_entry_index(vcpu, 0xD, 1); 320 if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) || 321 cpuid_entry_has(best, X86_FEATURE_XSAVEC))) 322 best->ebx = xstate_required_size(vcpu->arch.xcr0 | 323 vcpu->arch.ia32_xss, true); 324 } 325 326 static bool kvm_cpuid_has_hyperv(struct kvm_vcpu *vcpu) 327 { 328 #ifdef CONFIG_KVM_HYPERV 329 struct kvm_cpuid_entry2 *entry; 330 331 entry = kvm_find_cpuid_entry(vcpu, HYPERV_CPUID_INTERFACE); 332 return entry && entry->eax == HYPERV_CPUID_SIGNATURE_EAX; 333 #else 334 return false; 335 #endif 336 } 337 338 static bool guest_cpuid_is_amd_or_hygon(struct kvm_vcpu *vcpu) 339 { 340 struct kvm_cpuid_entry2 *entry; 341 342 entry = kvm_find_cpuid_entry(vcpu, 0); 343 if (!entry) 344 return false; 345 346 return is_guest_vendor_amd(entry->ebx, entry->ecx, entry->edx) || 347 is_guest_vendor_hygon(entry->ebx, entry->ecx, entry->edx); 348 } 349 350 /* 351 * This isn't truly "unsafe", but except for the cpu_caps initialization code, 352 * all register lookups should use __cpuid_entry_get_reg(), which provides 353 * compile-time validation of the input. 354 */ 355 static u32 cpuid_get_reg_unsafe(struct kvm_cpuid_entry2 *entry, u32 reg) 356 { 357 switch (reg) { 358 case CPUID_EAX: 359 return entry->eax; 360 case CPUID_EBX: 361 return entry->ebx; 362 case CPUID_ECX: 363 return entry->ecx; 364 case CPUID_EDX: 365 return entry->edx; 366 default: 367 WARN_ON_ONCE(1); 368 return 0; 369 } 370 } 371 372 static int cpuid_func_emulated(struct kvm_cpuid_entry2 *entry, u32 func, 373 bool include_partially_emulated); 374 375 void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu) 376 { 377 struct kvm_lapic *apic = vcpu->arch.apic; 378 struct kvm_cpuid_entry2 *best; 379 struct kvm_cpuid_entry2 *entry; 380 bool allow_gbpages; 381 int i; 382 383 memset(vcpu->arch.cpu_caps, 0, sizeof(vcpu->arch.cpu_caps)); 384 BUILD_BUG_ON(ARRAY_SIZE(reverse_cpuid) != NR_KVM_CPU_CAPS); 385 386 /* 387 * Reset guest capabilities to userspace's guest CPUID definition, i.e. 388 * honor userspace's definition for features that don't require KVM or 389 * hardware management/support (or that KVM simply doesn't care about). 390 */ 391 for (i = 0; i < NR_KVM_CPU_CAPS; i++) { 392 const struct cpuid_reg cpuid = reverse_cpuid[i]; 393 struct kvm_cpuid_entry2 emulated; 394 395 if (!cpuid.function) 396 continue; 397 398 entry = kvm_find_cpuid_entry_index(vcpu, cpuid.function, cpuid.index); 399 if (!entry) 400 continue; 401 402 cpuid_func_emulated(&emulated, cpuid.function, true); 403 404 /* 405 * A vCPU has a feature if it's supported by KVM and is enabled 406 * in guest CPUID. Note, this includes features that are 407 * supported by KVM but aren't advertised to userspace! 408 */ 409 vcpu->arch.cpu_caps[i] = kvm_cpu_caps[i] | 410 cpuid_get_reg_unsafe(&emulated, cpuid.reg); 411 vcpu->arch.cpu_caps[i] &= cpuid_get_reg_unsafe(entry, cpuid.reg); 412 } 413 414 kvm_update_cpuid_runtime(vcpu); 415 416 /* 417 * If TDP is enabled, let the guest use GBPAGES if they're supported in 418 * hardware. The hardware page walker doesn't let KVM disable GBPAGES, 419 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA 420 * walk for performance and complexity reasons. Not to mention KVM 421 * _can't_ solve the problem because GVA->GPA walks aren't visible to 422 * KVM once a TDP translation is installed. Mimic hardware behavior so 423 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF. 424 * If TDP is disabled, honor *only* guest CPUID as KVM has full control 425 * and can install smaller shadow pages if the host lacks 1GiB support. 426 */ 427 allow_gbpages = tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) : 428 guest_cpu_cap_has(vcpu, X86_FEATURE_GBPAGES); 429 guest_cpu_cap_change(vcpu, X86_FEATURE_GBPAGES, allow_gbpages); 430 431 best = kvm_find_cpuid_entry(vcpu, 1); 432 if (best && apic) { 433 if (cpuid_entry_has(best, X86_FEATURE_TSC_DEADLINE_TIMER)) 434 apic->lapic_timer.timer_mode_mask = 3 << 17; 435 else 436 apic->lapic_timer.timer_mode_mask = 1 << 17; 437 438 kvm_apic_set_version(vcpu); 439 } 440 441 vcpu->arch.guest_supported_xcr0 = cpuid_get_supported_xcr0(vcpu); 442 vcpu->arch.guest_supported_xss = cpuid_get_supported_xss(vcpu); 443 444 vcpu->arch.pv_cpuid.features = kvm_apply_cpuid_pv_features_quirk(vcpu); 445 446 vcpu->arch.is_amd_compatible = guest_cpuid_is_amd_or_hygon(vcpu); 447 vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu); 448 vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu); 449 450 kvm_pmu_refresh(vcpu); 451 452 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f) 453 vcpu->arch.cr4_guest_rsvd_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_) | 454 __cr4_reserved_bits(guest_cpu_cap_has, vcpu); 455 #undef __kvm_cpu_cap_has 456 457 kvm_hv_set_cpuid(vcpu, kvm_cpuid_has_hyperv(vcpu)); 458 459 /* Invoke the vendor callback only after the above state is updated. */ 460 kvm_x86_call(vcpu_after_set_cpuid)(vcpu); 461 462 /* 463 * Except for the MMU, which needs to do its thing any vendor specific 464 * adjustments to the reserved GPA bits. 465 */ 466 kvm_mmu_after_set_cpuid(vcpu); 467 468 kvm_make_request(KVM_REQ_RECALC_INTERCEPTS, vcpu); 469 } 470 471 int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu) 472 { 473 struct kvm_cpuid_entry2 *best; 474 475 best = kvm_find_cpuid_entry(vcpu, 0x80000000); 476 if (!best || best->eax < 0x80000008) 477 goto not_found; 478 best = kvm_find_cpuid_entry(vcpu, 0x80000008); 479 if (best) 480 return best->eax & 0xff; 481 not_found: 482 return 36; 483 } 484 485 int cpuid_query_maxguestphyaddr(struct kvm_vcpu *vcpu) 486 { 487 struct kvm_cpuid_entry2 *best; 488 489 best = kvm_find_cpuid_entry(vcpu, 0x80000000); 490 if (!best || best->eax < 0x80000008) 491 goto not_found; 492 best = kvm_find_cpuid_entry(vcpu, 0x80000008); 493 if (best) 494 return (best->eax >> 16) & 0xff; 495 not_found: 496 return 0; 497 } 498 499 /* 500 * This "raw" version returns the reserved GPA bits without any adjustments for 501 * encryption technologies that usurp bits. The raw mask should be used if and 502 * only if hardware does _not_ strip the usurped bits, e.g. in virtual MTRRs. 503 */ 504 u64 kvm_vcpu_reserved_gpa_bits_raw(struct kvm_vcpu *vcpu) 505 { 506 return rsvd_bits(cpuid_maxphyaddr(vcpu), 63); 507 } 508 509 static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2, 510 int nent) 511 { 512 u32 vcpu_caps[NR_KVM_CPU_CAPS]; 513 int r; 514 515 /* 516 * Apply pending runtime CPUID updates to the current CPUID entries to 517 * avoid false positives due to mismatches on KVM-owned feature flags. 518 */ 519 if (vcpu->arch.cpuid_dynamic_bits_dirty) 520 kvm_update_cpuid_runtime(vcpu); 521 522 /* 523 * Swap the existing (old) entries with the incoming (new) entries in 524 * order to massage the new entries, e.g. to account for dynamic bits 525 * that KVM controls, without losing the current guest CPUID, which KVM 526 * needs to preserve in order to unwind on failure. 527 * 528 * Similarly, save the vCPU's current cpu_caps so that the capabilities 529 * can be updated alongside the CPUID entries when performing runtime 530 * updates. Full initialization is done if and only if the vCPU hasn't 531 * run, i.e. only if userspace is potentially changing CPUID features. 532 */ 533 swap(vcpu->arch.cpuid_entries, e2); 534 swap(vcpu->arch.cpuid_nent, nent); 535 536 memcpy(vcpu_caps, vcpu->arch.cpu_caps, sizeof(vcpu_caps)); 537 BUILD_BUG_ON(sizeof(vcpu_caps) != sizeof(vcpu->arch.cpu_caps)); 538 539 /* 540 * KVM does not correctly handle changing guest CPUID after KVM_RUN or 541 * while L2 is active, as MAXPHYADDR, GBPAGES support, AMD reserved bit 542 * behavior, etc. aren't tracked in kvm_mmu_page_role, and L2 state 543 * can't be adjusted (without breaking L2 in some way). As a result, 544 * KVM may reuse SPs/SPTEs and/or run L2 with bad/misconfigured state. 545 * 546 * In practice, no sane VMM mucks with the core vCPU model on the fly. 547 * It would've been better to forbid any KVM_SET_CPUID{,2} calls after 548 * KVM_RUN or KVM_SET_NESTED_STATE altogether, but unfortunately some 549 * VMMs (e.g. QEMU) reuse vCPU fds for CPU hotplug/unplug and do 550 * KVM_SET_CPUID{,2} again. To support this legacy behavior, check 551 * whether the supplied CPUID data is equal to what's already set. 552 */ 553 if (!kvm_can_set_cpuid_and_feature_msrs(vcpu)) { 554 r = kvm_cpuid_check_equal(vcpu, e2, nent); 555 if (r) 556 goto err; 557 goto success; 558 } 559 560 #ifdef CONFIG_KVM_HYPERV 561 if (kvm_cpuid_has_hyperv(vcpu)) { 562 r = kvm_hv_vcpu_init(vcpu); 563 if (r) 564 goto err; 565 } 566 #endif 567 568 r = kvm_check_cpuid(vcpu); 569 if (r) 570 goto err; 571 572 #ifdef CONFIG_KVM_XEN 573 vcpu->arch.xen.cpuid = kvm_get_hypervisor_cpuid(vcpu, XEN_SIGNATURE); 574 #endif 575 kvm_vcpu_after_set_cpuid(vcpu); 576 577 success: 578 kvfree(e2); 579 return 0; 580 581 err: 582 memcpy(vcpu->arch.cpu_caps, vcpu_caps, sizeof(vcpu_caps)); 583 swap(vcpu->arch.cpuid_entries, e2); 584 swap(vcpu->arch.cpuid_nent, nent); 585 return r; 586 } 587 588 /* when an old userspace process fills a new kernel module */ 589 int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu, 590 struct kvm_cpuid *cpuid, 591 struct kvm_cpuid_entry __user *entries) 592 { 593 int r, i; 594 struct kvm_cpuid_entry *e = NULL; 595 struct kvm_cpuid_entry2 *e2 = NULL; 596 597 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 598 return -E2BIG; 599 600 if (cpuid->nent) { 601 e = vmemdup_array_user(entries, cpuid->nent, sizeof(*e)); 602 if (IS_ERR(e)) 603 return PTR_ERR(e); 604 605 e2 = kvmalloc_objs(*e2, cpuid->nent, GFP_KERNEL_ACCOUNT); 606 if (!e2) { 607 r = -ENOMEM; 608 goto out_free_cpuid; 609 } 610 } 611 for (i = 0; i < cpuid->nent; i++) { 612 e2[i].function = e[i].function; 613 e2[i].eax = e[i].eax; 614 e2[i].ebx = e[i].ebx; 615 e2[i].ecx = e[i].ecx; 616 e2[i].edx = e[i].edx; 617 e2[i].index = 0; 618 e2[i].flags = 0; 619 e2[i].padding[0] = 0; 620 e2[i].padding[1] = 0; 621 e2[i].padding[2] = 0; 622 } 623 624 r = kvm_set_cpuid(vcpu, e2, cpuid->nent); 625 if (r) 626 kvfree(e2); 627 628 out_free_cpuid: 629 kvfree(e); 630 631 return r; 632 } 633 634 int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu, 635 struct kvm_cpuid2 *cpuid, 636 struct kvm_cpuid_entry2 __user *entries) 637 { 638 struct kvm_cpuid_entry2 *e2 = NULL; 639 int r; 640 641 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 642 return -E2BIG; 643 644 if (cpuid->nent) { 645 e2 = vmemdup_array_user(entries, cpuid->nent, sizeof(*e2)); 646 if (IS_ERR(e2)) 647 return PTR_ERR(e2); 648 } 649 650 r = kvm_set_cpuid(vcpu, e2, cpuid->nent); 651 if (r) 652 kvfree(e2); 653 654 return r; 655 } 656 657 int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, 658 struct kvm_cpuid2 *cpuid, 659 struct kvm_cpuid_entry2 __user *entries) 660 { 661 if (cpuid->nent < vcpu->arch.cpuid_nent) 662 return -E2BIG; 663 664 if (vcpu->arch.cpuid_dynamic_bits_dirty) 665 kvm_update_cpuid_runtime(vcpu); 666 667 if (copy_to_user(entries, vcpu->arch.cpuid_entries, 668 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2))) 669 return -EFAULT; 670 671 cpuid->nent = vcpu->arch.cpuid_nent; 672 return 0; 673 } 674 675 static __always_inline u32 raw_cpuid_get(struct cpuid_reg cpuid) 676 { 677 struct kvm_cpuid_entry2 entry; 678 u32 base; 679 680 /* 681 * KVM only supports features defined by Intel (0x0), AMD (0x80000000), 682 * and Centaur (0xc0000000). WARN if a feature for new vendor base is 683 * defined, as this and other code would need to be updated. 684 */ 685 base = cpuid.function & 0xffff0000; 686 if (WARN_ON_ONCE(base && base != 0x80000000 && base != 0xc0000000)) 687 return 0; 688 689 if (cpuid_eax(base) < cpuid.function) 690 return 0; 691 692 cpuid_count(cpuid.function, cpuid.index, 693 &entry.eax, &entry.ebx, &entry.ecx, &entry.edx); 694 695 return *__cpuid_entry_get_reg(&entry, cpuid.reg); 696 } 697 698 /* 699 * For kernel-defined leafs, mask KVM's supported feature set with the kernel's 700 * capabilities as well as raw CPUID. For KVM-defined leafs, consult only raw 701 * CPUID, as KVM is the one and only authority (in the kernel). 702 */ 703 #define kvm_cpu_cap_init(leaf, feature_initializers...) \ 704 do { \ 705 const struct cpuid_reg cpuid = x86_feature_cpuid(leaf * 32); \ 706 const u32 __maybe_unused kvm_cpu_cap_init_in_progress = leaf; \ 707 const u32 *kernel_cpu_caps = boot_cpu_data.x86_capability; \ 708 u32 kvm_cpu_cap_passthrough = 0; \ 709 u32 kvm_cpu_cap_synthesized = 0; \ 710 u32 kvm_cpu_cap_emulated = 0; \ 711 u32 kvm_cpu_cap_features = 0; \ 712 \ 713 feature_initializers \ 714 \ 715 kvm_cpu_caps[leaf] = kvm_cpu_cap_features; \ 716 \ 717 if (leaf < NCAPINTS) \ 718 kvm_cpu_caps[leaf] &= kernel_cpu_caps[leaf]; \ 719 \ 720 kvm_cpu_caps[leaf] |= kvm_cpu_cap_passthrough; \ 721 kvm_cpu_caps[leaf] &= (raw_cpuid_get(cpuid) | \ 722 kvm_cpu_cap_synthesized); \ 723 kvm_cpu_caps[leaf] |= kvm_cpu_cap_emulated; \ 724 } while (0) 725 726 /* 727 * Assert that the feature bit being declared, e.g. via F(), is in the CPUID 728 * word that's being initialized. Exempt 0x8000_0001.EDX usage of 0x1.EDX 729 * features, as AMD duplicated many 0x1.EDX features into 0x8000_0001.EDX. 730 */ 731 #define KVM_VALIDATE_CPU_CAP_USAGE(name) \ 732 do { \ 733 u32 __leaf = __feature_leaf(X86_FEATURE_##name); \ 734 \ 735 BUILD_BUG_ON(__leaf != kvm_cpu_cap_init_in_progress); \ 736 } while (0) 737 738 #define F(name) \ 739 ({ \ 740 KVM_VALIDATE_CPU_CAP_USAGE(name); \ 741 kvm_cpu_cap_features |= feature_bit(name); \ 742 }) 743 744 /* Scattered Flag - For features that are scattered by cpufeatures.h. */ 745 #define SCATTERED_F(name) \ 746 ({ \ 747 BUILD_BUG_ON(X86_FEATURE_##name >= MAX_CPU_FEATURES); \ 748 KVM_VALIDATE_CPU_CAP_USAGE(name); \ 749 if (boot_cpu_has(X86_FEATURE_##name)) \ 750 F(name); \ 751 }) 752 753 /* Features that KVM supports only on 64-bit kernels. */ 754 #define X86_64_F(name) \ 755 ({ \ 756 KVM_VALIDATE_CPU_CAP_USAGE(name); \ 757 if (IS_ENABLED(CONFIG_X86_64)) \ 758 F(name); \ 759 }) 760 761 /* 762 * Emulated Feature - For features that KVM emulates in software irrespective 763 * of host CPU/kernel support. 764 */ 765 #define EMULATED_F(name) \ 766 ({ \ 767 kvm_cpu_cap_emulated |= feature_bit(name); \ 768 F(name); \ 769 }) 770 771 /* 772 * Synthesized Feature - For features that are synthesized into boot_cpu_data, 773 * i.e. may not be present in the raw CPUID, but can still be advertised to 774 * userspace. Primarily used for mitigation related feature flags. 775 */ 776 #define SYNTHESIZED_F(name) \ 777 ({ \ 778 kvm_cpu_cap_synthesized |= feature_bit(name); \ 779 \ 780 BUILD_BUG_ON(X86_FEATURE_##name >= MAX_CPU_FEATURES); \ 781 if (boot_cpu_has(X86_FEATURE_##name)) \ 782 F(name); \ 783 }) 784 785 /* 786 * Passthrough Feature - For features that KVM supports based purely on raw 787 * hardware CPUID, i.e. that KVM virtualizes even if the host kernel doesn't 788 * use the feature. Simply force set the feature in KVM's capabilities, raw 789 * CPUID support will be factored in by kvm_cpu_cap_mask(). 790 */ 791 #define PASSTHROUGH_F(name) \ 792 ({ \ 793 kvm_cpu_cap_passthrough |= feature_bit(name); \ 794 F(name); \ 795 }) 796 797 /* 798 * Aliased Features - For features in 0x8000_0001.EDX that are duplicates of 799 * identical 0x1.EDX features, and thus are aliased from 0x1 to 0x8000_0001. 800 */ 801 #define ALIASED_1_EDX_F(name) \ 802 ({ \ 803 BUILD_BUG_ON(__feature_leaf(X86_FEATURE_##name) != CPUID_1_EDX); \ 804 BUILD_BUG_ON(kvm_cpu_cap_init_in_progress != CPUID_8000_0001_EDX); \ 805 kvm_cpu_cap_features |= feature_bit(name); \ 806 }) 807 808 /* 809 * Vendor Features - For features that KVM supports, but are added in later 810 * because they require additional vendor enabling. 811 */ 812 #define VENDOR_F(name) \ 813 ({ \ 814 KVM_VALIDATE_CPU_CAP_USAGE(name); \ 815 }) 816 817 /* 818 * Runtime Features - For features that KVM dynamically sets/clears at runtime, 819 * e.g. when CR4 changes, but which are never advertised to userspace. 820 */ 821 #define RUNTIME_F(name) \ 822 ({ \ 823 KVM_VALIDATE_CPU_CAP_USAGE(name); \ 824 }) 825 826 /* 827 * Undefine the MSR bit macro to avoid token concatenation issues when 828 * processing X86_FEATURE_SPEC_CTRL_SSBD. 829 */ 830 #undef SPEC_CTRL_SSBD 831 832 /* DS is defined by ptrace-abi.h on 32-bit builds. */ 833 #undef DS 834 835 void kvm_initialize_cpu_caps(void) 836 { 837 memset(kvm_cpu_caps, 0, sizeof(kvm_cpu_caps)); 838 839 WARN_ON_ONCE(kvm_is_configuring_cpu_caps); 840 kvm_is_configuring_cpu_caps = true; 841 842 BUILD_BUG_ON(sizeof(kvm_cpu_caps) - (NKVMCAPINTS * sizeof(*kvm_cpu_caps)) > 843 sizeof(boot_cpu_data.x86_capability)); 844 845 kvm_cpu_cap_init(CPUID_1_ECX, 846 F(XMM3), 847 F(PCLMULQDQ), 848 VENDOR_F(DTES64), 849 /* 850 * NOTE: MONITOR (and MWAIT) are emulated as NOP, but *not* 851 * advertised to guests via CPUID! MWAIT is also technically a 852 * runtime flag thanks to IA32_MISC_ENABLES; mark it as such so 853 * that KVM is aware that it's a known, unadvertised flag. 854 */ 855 RUNTIME_F(MWAIT), 856 /* DS-CPL */ 857 VENDOR_F(VMX), 858 /* SMX, EST */ 859 /* TM2 */ 860 F(SSSE3), 861 /* CNXT-ID */ 862 /* Reserved */ 863 F(FMA), 864 F(CX16), 865 /* xTPR Update */ 866 F(PDCM), 867 F(PCID), 868 /* Reserved, DCA */ 869 F(XMM4_1), 870 F(XMM4_2), 871 EMULATED_F(X2APIC), 872 F(MOVBE), 873 F(POPCNT), 874 EMULATED_F(TSC_DEADLINE_TIMER), 875 F(AES), 876 F(XSAVE), 877 RUNTIME_F(OSXSAVE), 878 F(AVX), 879 F(F16C), 880 F(RDRAND), 881 EMULATED_F(HYPERVISOR), 882 ); 883 884 kvm_cpu_cap_init(CPUID_1_EDX, 885 F(FPU), 886 F(VME), 887 F(DE), 888 F(PSE), 889 F(TSC), 890 F(MSR), 891 F(PAE), 892 F(MCE), 893 F(CX8), 894 F(APIC), 895 /* Reserved */ 896 F(SEP), 897 F(MTRR), 898 F(PGE), 899 F(MCA), 900 F(CMOV), 901 F(PAT), 902 F(PSE36), 903 /* PSN */ 904 F(CLFLUSH), 905 /* Reserved */ 906 VENDOR_F(DS), 907 /* ACPI */ 908 F(MMX), 909 F(FXSR), 910 F(XMM), 911 F(XMM2), 912 F(SELFSNOOP), 913 /* HTT, TM, Reserved, PBE */ 914 ); 915 916 kvm_cpu_cap_init(CPUID_7_0_EBX, 917 F(FSGSBASE), 918 EMULATED_F(TSC_ADJUST), 919 F(SGX), 920 F(BMI1), 921 F(HLE), 922 F(AVX2), 923 F(FDP_EXCPTN_ONLY), 924 F(SMEP), 925 F(BMI2), 926 F(ERMS), 927 F(INVPCID), 928 F(RTM), 929 F(ZERO_FCS_FDS), 930 VENDOR_F(MPX), 931 F(AVX512F), 932 F(AVX512DQ), 933 F(RDSEED), 934 F(ADX), 935 F(SMAP), 936 F(AVX512IFMA), 937 F(CLFLUSHOPT), 938 F(CLWB), 939 VENDOR_F(INTEL_PT), 940 F(AVX512PF), 941 F(AVX512ER), 942 F(AVX512CD), 943 F(SHA_NI), 944 F(AVX512BW), 945 F(AVX512VL), 946 ); 947 948 kvm_cpu_cap_init(CPUID_7_ECX, 949 F(AVX512VBMI), 950 PASSTHROUGH_F(LA57), 951 F(PKU), 952 RUNTIME_F(OSPKE), 953 F(RDPID), 954 F(AVX512_VPOPCNTDQ), 955 F(UMIP), 956 F(AVX512_VBMI2), 957 F(GFNI), 958 F(VAES), 959 F(VPCLMULQDQ), 960 F(AVX512_VNNI), 961 F(AVX512_BITALG), 962 F(CLDEMOTE), 963 F(MOVDIRI), 964 F(MOVDIR64B), 965 VENDOR_F(WAITPKG), 966 F(SGX_LC), 967 F(BUS_LOCK_DETECT), 968 X86_64_F(SHSTK), 969 ); 970 971 /* 972 * PKU not yet implemented for shadow paging and requires OSPKE 973 * to be set on the host. Clear it if that is not the case 974 */ 975 if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE)) 976 kvm_cpu_cap_clear(X86_FEATURE_PKU); 977 978 /* 979 * Shadow Stacks aren't implemented in the Shadow MMU. Shadow Stack 980 * accesses require "magic" Writable=0,Dirty=1 protection, which KVM 981 * doesn't know how to emulate or map. 982 */ 983 if (!tdp_enabled) 984 kvm_cpu_cap_clear(X86_FEATURE_SHSTK); 985 986 kvm_cpu_cap_init(CPUID_7_EDX, 987 F(AVX512_4VNNIW), 988 F(AVX512_4FMAPS), 989 F(SPEC_CTRL), 990 F(SPEC_CTRL_SSBD), 991 EMULATED_F(ARCH_CAPABILITIES), 992 F(INTEL_STIBP), 993 F(MD_CLEAR), 994 F(AVX512_VP2INTERSECT), 995 F(FSRM), 996 F(SERIALIZE), 997 F(TSXLDTRK), 998 F(AVX512_FP16), 999 F(AMX_TILE), 1000 F(AMX_INT8), 1001 F(AMX_BF16), 1002 F(FLUSH_L1D), 1003 F(IBT), 1004 ); 1005 1006 /* 1007 * Disable support for IBT and SHSTK if KVM is configured to emulate 1008 * accesses to reserved GPAs, as KVM's emulator doesn't support IBT or 1009 * SHSTK, nor does KVM handle Shadow Stack #PFs (see above). 1010 */ 1011 if (allow_smaller_maxphyaddr) { 1012 kvm_cpu_cap_clear(X86_FEATURE_SHSTK); 1013 kvm_cpu_cap_clear(X86_FEATURE_IBT); 1014 } 1015 1016 if (boot_cpu_has(X86_FEATURE_AMD_IBPB_RET) && 1017 boot_cpu_has(X86_FEATURE_AMD_IBPB) && 1018 boot_cpu_has(X86_FEATURE_AMD_IBRS)) 1019 kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL); 1020 if (boot_cpu_has(X86_FEATURE_STIBP)) 1021 kvm_cpu_cap_set(X86_FEATURE_INTEL_STIBP); 1022 if (boot_cpu_has(X86_FEATURE_AMD_SSBD)) 1023 kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD); 1024 1025 kvm_cpu_cap_init(CPUID_7_1_EAX, 1026 F(SHA512), 1027 F(SM3), 1028 F(SM4), 1029 F(AVX_VNNI), 1030 F(AVX512_BF16), 1031 F(CMPCCXADD), 1032 F(FZRM), 1033 F(FSRS), 1034 F(FSRC), 1035 F(WRMSRNS), 1036 X86_64_F(LKGS), 1037 F(AMX_FP16), 1038 F(AVX_IFMA), 1039 F(LAM), 1040 F(MOVRS), 1041 ); 1042 1043 kvm_cpu_cap_init(CPUID_7_1_ECX, 1044 SCATTERED_F(MSR_IMM), 1045 ); 1046 1047 kvm_cpu_cap_init(CPUID_7_1_EDX, 1048 F(AVX_VNNI_INT8), 1049 F(AVX_NE_CONVERT), 1050 F(AMX_COMPLEX), 1051 F(AVX_VNNI_INT16), 1052 F(PREFETCHITI), 1053 F(AVX10), 1054 ); 1055 1056 kvm_cpu_cap_init(CPUID_7_2_EDX, 1057 F(INTEL_PSFD), 1058 F(IPRED_CTRL), 1059 F(RRSBA_CTRL), 1060 F(DDPD_U), 1061 F(BHI_CTRL), 1062 F(MCDT_NO), 1063 ); 1064 1065 kvm_cpu_cap_init(CPUID_D_1_EAX, 1066 F(XSAVEOPT), 1067 F(XSAVEC), 1068 F(XGETBV1), 1069 F(XSAVES), 1070 X86_64_F(XFD), 1071 ); 1072 1073 kvm_cpu_cap_init(CPUID_12_EAX, 1074 SCATTERED_F(SGX1), 1075 SCATTERED_F(SGX2), 1076 SCATTERED_F(SGX_EDECCSSA), 1077 ); 1078 1079 kvm_cpu_cap_init(CPUID_1E_1_EAX, 1080 F(AMX_INT8_ALIAS), 1081 F(AMX_BF16_ALIAS), 1082 F(AMX_COMPLEX_ALIAS), 1083 F(AMX_FP16_ALIAS), 1084 F(AMX_FP8), 1085 F(AMX_TF32), 1086 F(AMX_AVX512), 1087 F(AMX_MOVRS), 1088 ); 1089 1090 kvm_cpu_cap_init(CPUID_24_0_EBX, 1091 F(AVX10_128), 1092 F(AVX10_256), 1093 F(AVX10_512), 1094 ); 1095 1096 kvm_cpu_cap_init(CPUID_24_1_ECX, 1097 F(AVX10_VNNI_INT), 1098 ); 1099 1100 kvm_cpu_cap_init(CPUID_8000_0001_ECX, 1101 F(LAHF_LM), 1102 F(CMP_LEGACY), 1103 VENDOR_F(SVM), 1104 /* ExtApicSpace */ 1105 F(CR8_LEGACY), 1106 F(ABM), 1107 F(SSE4A), 1108 F(MISALIGNSSE), 1109 F(3DNOWPREFETCH), 1110 F(OSVW), 1111 /* IBS */ 1112 F(XOP), 1113 /* SKINIT, WDT, LWP */ 1114 F(FMA4), 1115 F(TBM), 1116 F(TOPOEXT), 1117 VENDOR_F(PERFCTR_CORE), 1118 ); 1119 1120 kvm_cpu_cap_init(CPUID_8000_0001_EDX, 1121 ALIASED_1_EDX_F(FPU), 1122 ALIASED_1_EDX_F(VME), 1123 ALIASED_1_EDX_F(DE), 1124 ALIASED_1_EDX_F(PSE), 1125 ALIASED_1_EDX_F(TSC), 1126 ALIASED_1_EDX_F(MSR), 1127 ALIASED_1_EDX_F(PAE), 1128 ALIASED_1_EDX_F(MCE), 1129 ALIASED_1_EDX_F(CX8), 1130 ALIASED_1_EDX_F(APIC), 1131 /* Reserved */ 1132 F(SYSCALL), 1133 ALIASED_1_EDX_F(MTRR), 1134 ALIASED_1_EDX_F(PGE), 1135 ALIASED_1_EDX_F(MCA), 1136 ALIASED_1_EDX_F(CMOV), 1137 ALIASED_1_EDX_F(PAT), 1138 ALIASED_1_EDX_F(PSE36), 1139 /* Reserved */ 1140 F(NX), 1141 /* Reserved */ 1142 F(MMXEXT), 1143 ALIASED_1_EDX_F(MMX), 1144 ALIASED_1_EDX_F(FXSR), 1145 F(FXSR_OPT), 1146 X86_64_F(GBPAGES), 1147 F(RDTSCP), 1148 /* Reserved */ 1149 X86_64_F(LM), 1150 F(3DNOWEXT), 1151 F(3DNOW), 1152 ); 1153 1154 if (!tdp_enabled && IS_ENABLED(CONFIG_X86_64)) 1155 kvm_cpu_cap_set(X86_FEATURE_GBPAGES); 1156 1157 kvm_cpu_cap_init(CPUID_8000_0007_EDX, 1158 SCATTERED_F(CONSTANT_TSC), 1159 ); 1160 1161 kvm_cpu_cap_init(CPUID_8000_0008_EBX, 1162 F(CLZERO), 1163 F(XSAVEERPTR), 1164 F(WBNOINVD), 1165 F(AMD_IBPB), 1166 F(AMD_IBRS), 1167 F(AMD_SSBD), 1168 F(VIRT_SSBD), 1169 F(AMD_SSB_NO), 1170 F(AMD_STIBP), 1171 F(AMD_STIBP_ALWAYS_ON), 1172 F(AMD_IBRS_SAME_MODE), 1173 PASSTHROUGH_F(EFER_LMSLE_MBZ), 1174 F(AMD_PSFD), 1175 F(AMD_IBPB_RET), 1176 ); 1177 1178 /* 1179 * AMD has separate bits for each SPEC_CTRL bit. 1180 * arch/x86/kernel/cpu/bugs.c is kind enough to 1181 * record that in cpufeatures so use them. 1182 */ 1183 if (boot_cpu_has(X86_FEATURE_IBPB)) { 1184 kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB); 1185 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL) && 1186 !boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) 1187 kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB_RET); 1188 } 1189 if (boot_cpu_has(X86_FEATURE_IBRS)) 1190 kvm_cpu_cap_set(X86_FEATURE_AMD_IBRS); 1191 if (boot_cpu_has(X86_FEATURE_STIBP)) 1192 kvm_cpu_cap_set(X86_FEATURE_AMD_STIBP); 1193 if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD)) 1194 kvm_cpu_cap_set(X86_FEATURE_AMD_SSBD); 1195 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS)) 1196 kvm_cpu_cap_set(X86_FEATURE_AMD_SSB_NO); 1197 /* 1198 * The preference is to use SPEC CTRL MSR instead of the 1199 * VIRT_SPEC MSR. 1200 */ 1201 if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) && 1202 !boot_cpu_has(X86_FEATURE_AMD_SSBD)) 1203 kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD); 1204 1205 /* All SVM features required additional vendor module enabling. */ 1206 kvm_cpu_cap_init(CPUID_8000_000A_EDX, 1207 VENDOR_F(NPT), 1208 VENDOR_F(VMCBCLEAN), 1209 VENDOR_F(FLUSHBYASID), 1210 VENDOR_F(NRIPS), 1211 VENDOR_F(TSCRATEMSR), 1212 VENDOR_F(V_VMSAVE_VMLOAD), 1213 VENDOR_F(LBRV), 1214 VENDOR_F(PAUSEFILTER), 1215 VENDOR_F(PFTHRESHOLD), 1216 VENDOR_F(VGIF), 1217 VENDOR_F(VNMI), 1218 VENDOR_F(SVME_ADDR_CHK), 1219 ); 1220 1221 kvm_cpu_cap_init(CPUID_8000_001F_EAX, 1222 VENDOR_F(SME), 1223 VENDOR_F(SEV), 1224 /* VM_PAGE_FLUSH */ 1225 VENDOR_F(SEV_ES), 1226 F(SME_COHERENT), 1227 ); 1228 1229 kvm_cpu_cap_init(CPUID_8000_0021_EAX, 1230 F(NO_NESTED_DATA_BP), 1231 F(WRMSR_XX_BASE_NS), 1232 /* 1233 * Synthesize "LFENCE is serializing" into the AMD-defined entry 1234 * in KVM's supported CPUID, i.e. if the feature is reported as 1235 * supported by the kernel. LFENCE_RDTSC was a Linux-defined 1236 * synthetic feature long before AMD joined the bandwagon, e.g. 1237 * LFENCE is serializing on most CPUs that support SSE2. On 1238 * CPUs that don't support AMD's leaf, ANDing with the raw host 1239 * CPUID will drop the flags, and reporting support in AMD's 1240 * leaf can make it easier for userspace to detect the feature. 1241 */ 1242 SYNTHESIZED_F(LFENCE_RDTSC), 1243 /* SmmPgCfgLock */ 1244 /* 4: Resv */ 1245 SYNTHESIZED_F(VERW_CLEAR), 1246 F(NULL_SEL_CLR_BASE), 1247 /* UpperAddressIgnore */ 1248 F(AUTOIBRS), 1249 EMULATED_F(NO_SMM_CTL_MSR), 1250 /* PrefetchCtlMsr */ 1251 /* GpOnUserCpuid */ 1252 /* EPSF */ 1253 F(PREFETCHI), 1254 F(AVX512_BMM), 1255 F(ERAPS), 1256 SYNTHESIZED_F(SBPB), 1257 SYNTHESIZED_F(IBPB_BRTYPE), 1258 SYNTHESIZED_F(SRSO_NO), 1259 F(SRSO_USER_KERNEL_NO), 1260 ); 1261 1262 kvm_cpu_cap_init(CPUID_8000_0021_ECX, 1263 SYNTHESIZED_F(TSA_SQ_NO), 1264 SYNTHESIZED_F(TSA_L1_NO), 1265 ); 1266 1267 kvm_cpu_cap_init(CPUID_8000_0022_EAX, 1268 F(PERFMON_V2), 1269 ); 1270 1271 if (!static_cpu_has_bug(X86_BUG_NULL_SEG)) 1272 kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE); 1273 1274 kvm_cpu_cap_init(CPUID_C000_0001_EDX, 1275 F(XSTORE), 1276 F(XSTORE_EN), 1277 F(XCRYPT), 1278 F(XCRYPT_EN), 1279 F(ACE2), 1280 F(ACE2_EN), 1281 F(PHE), 1282 F(PHE_EN), 1283 F(PMM), 1284 F(PMM_EN), 1285 ); 1286 1287 /* 1288 * Hide RDTSCP and RDPID if either feature is reported as supported but 1289 * probing MSR_TSC_AUX failed. This is purely a sanity check and 1290 * should never happen, but the guest will likely crash if RDTSCP or 1291 * RDPID is misreported, and KVM has botched MSR_TSC_AUX emulation in 1292 * the past. For example, the sanity check may fire if this instance of 1293 * KVM is running as L1 on top of an older, broken KVM. 1294 */ 1295 if (WARN_ON((kvm_cpu_cap_has(X86_FEATURE_RDTSCP) || 1296 kvm_cpu_cap_has(X86_FEATURE_RDPID)) && 1297 !kvm_is_supported_user_return_msr(MSR_TSC_AUX))) { 1298 kvm_cpu_cap_clear(X86_FEATURE_RDTSCP); 1299 kvm_cpu_cap_clear(X86_FEATURE_RDPID); 1300 } 1301 } 1302 EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_initialize_cpu_caps); 1303 1304 #undef F 1305 #undef SCATTERED_F 1306 #undef X86_64_F 1307 #undef EMULATED_F 1308 #undef SYNTHESIZED_F 1309 #undef PASSTHROUGH_F 1310 #undef ALIASED_1_EDX_F 1311 #undef VENDOR_F 1312 #undef RUNTIME_F 1313 1314 struct kvm_cpuid_array { 1315 struct kvm_cpuid_entry2 *entries; 1316 int maxnent; 1317 int nent; 1318 }; 1319 1320 static struct kvm_cpuid_entry2 *get_next_cpuid(struct kvm_cpuid_array *array) 1321 { 1322 if (array->nent >= array->maxnent) 1323 return NULL; 1324 1325 return &array->entries[array->nent++]; 1326 } 1327 1328 static struct kvm_cpuid_entry2 *do_host_cpuid(struct kvm_cpuid_array *array, 1329 u32 function, u32 index) 1330 { 1331 struct kvm_cpuid_entry2 *entry = get_next_cpuid(array); 1332 1333 if (!entry) 1334 return NULL; 1335 1336 memset(entry, 0, sizeof(*entry)); 1337 entry->function = function; 1338 entry->index = index; 1339 switch (function & 0xC0000000) { 1340 case 0x40000000: 1341 /* Hypervisor leaves are always synthesized by __do_cpuid_func. */ 1342 return entry; 1343 1344 case 0x80000000: 1345 /* 1346 * 0x80000021 is sometimes synthesized by __do_cpuid_func, which 1347 * would result in out-of-bounds calls to do_host_cpuid. 1348 */ 1349 { 1350 static int max_cpuid_80000000; 1351 if (!READ_ONCE(max_cpuid_80000000)) 1352 WRITE_ONCE(max_cpuid_80000000, cpuid_eax(0x80000000)); 1353 if (function > READ_ONCE(max_cpuid_80000000)) 1354 return entry; 1355 } 1356 break; 1357 1358 default: 1359 break; 1360 } 1361 1362 cpuid_count(entry->function, entry->index, 1363 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); 1364 1365 if (cpuid_function_is_indexed(function)) 1366 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 1367 1368 return entry; 1369 } 1370 1371 static int cpuid_func_emulated(struct kvm_cpuid_entry2 *entry, u32 func, 1372 bool include_partially_emulated) 1373 { 1374 memset(entry, 0, sizeof(*entry)); 1375 1376 entry->function = func; 1377 entry->index = 0; 1378 entry->flags = 0; 1379 1380 switch (func) { 1381 case 0: 1382 entry->eax = 7; 1383 return 1; 1384 case 1: 1385 entry->ecx = feature_bit(MOVBE); 1386 /* 1387 * KVM allows userspace to enumerate MONITOR+MWAIT support to 1388 * the guest, but the MWAIT feature flag is never advertised 1389 * to userspace because MONITOR+MWAIT aren't virtualized by 1390 * hardware, can't be faithfully emulated in software (KVM 1391 * emulates them as NOPs), and allowing the guest to execute 1392 * them natively requires enabling a per-VM capability. 1393 */ 1394 if (include_partially_emulated) 1395 entry->ecx |= feature_bit(MWAIT); 1396 return 1; 1397 case 7: 1398 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; 1399 entry->eax = 0; 1400 if (kvm_cpu_cap_has(X86_FEATURE_RDTSCP)) 1401 entry->ecx = feature_bit(RDPID); 1402 return 1; 1403 default: 1404 return 0; 1405 } 1406 } 1407 1408 static int __do_cpuid_func_emulated(struct kvm_cpuid_array *array, u32 func) 1409 { 1410 if (array->nent >= array->maxnent) 1411 return -E2BIG; 1412 1413 array->nent += cpuid_func_emulated(&array->entries[array->nent], func, false); 1414 return 0; 1415 } 1416 1417 static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) 1418 { 1419 struct kvm_cpuid_entry2 *entry; 1420 int r, i, max_idx; 1421 1422 /* all calls to cpuid_count() should be made on the same cpu */ 1423 get_cpu(); 1424 1425 r = -E2BIG; 1426 1427 entry = do_host_cpuid(array, function, 0); 1428 if (!entry) 1429 goto out; 1430 1431 switch (function) { 1432 case 0: 1433 /* Limited to the highest leaf implemented in KVM. */ 1434 entry->eax = min(entry->eax, 0x24U); 1435 break; 1436 case 1: 1437 cpuid_entry_override(entry, CPUID_1_EDX); 1438 cpuid_entry_override(entry, CPUID_1_ECX); 1439 break; 1440 case 2: 1441 /* 1442 * On ancient CPUs, function 2 entries are STATEFUL. That is, 1443 * CPUID(function=2, index=0) may return different results each 1444 * time, with the least-significant byte in EAX enumerating the 1445 * number of times software should do CPUID(2, 0). 1446 * 1447 * Modern CPUs, i.e. every CPU KVM has *ever* run on are less 1448 * idiotic. Intel's SDM states that EAX & 0xff "will always 1449 * return 01H. Software should ignore this value and not 1450 * interpret it as an informational descriptor", while AMD's 1451 * APM states that CPUID(2) is reserved. 1452 * 1453 * WARN if a frankenstein CPU that supports virtualization and 1454 * a stateful CPUID.0x2 is encountered. 1455 */ 1456 WARN_ON_ONCE((entry->eax & 0xff) > 1); 1457 break; 1458 /* functions 4 and 0x8000001d have additional index. */ 1459 case 4: 1460 case 0x8000001d: 1461 /* 1462 * Read entries until the cache type in the previous entry is 1463 * zero, i.e. indicates an invalid entry. 1464 */ 1465 for (i = 1; entry->eax & 0x1f; ++i) { 1466 entry = do_host_cpuid(array, function, i); 1467 if (!entry) 1468 goto out; 1469 } 1470 break; 1471 case 6: /* Thermal management */ 1472 entry->eax = 0x4; /* allow ARAT */ 1473 entry->ebx = 0; 1474 entry->ecx = 0; 1475 entry->edx = 0; 1476 break; 1477 /* function 7 has additional index. */ 1478 case 7: 1479 max_idx = entry->eax = min(entry->eax, 2u); 1480 cpuid_entry_override(entry, CPUID_7_0_EBX); 1481 cpuid_entry_override(entry, CPUID_7_ECX); 1482 cpuid_entry_override(entry, CPUID_7_EDX); 1483 1484 /* KVM only supports up to 0x7.2, capped above via min(). */ 1485 if (max_idx >= 1) { 1486 entry = do_host_cpuid(array, function, 1); 1487 if (!entry) 1488 goto out; 1489 1490 cpuid_entry_override(entry, CPUID_7_1_EAX); 1491 cpuid_entry_override(entry, CPUID_7_1_ECX); 1492 cpuid_entry_override(entry, CPUID_7_1_EDX); 1493 entry->ebx = 0; 1494 } 1495 if (max_idx >= 2) { 1496 entry = do_host_cpuid(array, function, 2); 1497 if (!entry) 1498 goto out; 1499 1500 cpuid_entry_override(entry, CPUID_7_2_EDX); 1501 entry->ecx = 0; 1502 entry->ebx = 0; 1503 entry->eax = 0; 1504 } 1505 break; 1506 case 0xa: { /* Architectural Performance Monitoring */ 1507 union cpuid10_eax eax = { }; 1508 union cpuid10_edx edx = { }; 1509 1510 if (!enable_pmu || !static_cpu_has(X86_FEATURE_ARCH_PERFMON)) { 1511 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1512 break; 1513 } 1514 1515 eax.split.version_id = kvm_pmu_cap.version; 1516 eax.split.num_counters = kvm_pmu_cap.num_counters_gp; 1517 eax.split.bit_width = kvm_pmu_cap.bit_width_gp; 1518 eax.split.mask_length = kvm_pmu_cap.events_mask_len; 1519 edx.split.num_counters_fixed = kvm_pmu_cap.num_counters_fixed; 1520 edx.split.bit_width_fixed = kvm_pmu_cap.bit_width_fixed; 1521 1522 if (kvm_pmu_cap.version) 1523 edx.split.anythread_deprecated = 1; 1524 1525 entry->eax = eax.full; 1526 entry->ebx = kvm_pmu_cap.events_mask; 1527 entry->ecx = 0; 1528 entry->edx = edx.full; 1529 break; 1530 } 1531 case 0x1f: 1532 case 0xb: 1533 /* 1534 * No topology; a valid topology is indicated by the presence 1535 * of subleaf 1. 1536 */ 1537 entry->eax = entry->ebx = entry->ecx = 0; 1538 break; 1539 case 0xd: { 1540 u64 permitted_xcr0 = kvm_get_filtered_xcr0(); 1541 u64 permitted_xss = kvm_caps.supported_xss; 1542 1543 entry->eax &= permitted_xcr0; 1544 entry->ebx = xstate_required_size(permitted_xcr0, false); 1545 entry->ecx = entry->ebx; 1546 entry->edx &= permitted_xcr0 >> 32; 1547 if (!permitted_xcr0) 1548 break; 1549 1550 entry = do_host_cpuid(array, function, 1); 1551 if (!entry) 1552 goto out; 1553 1554 cpuid_entry_override(entry, CPUID_D_1_EAX); 1555 if (entry->eax & (feature_bit(XSAVES) | feature_bit(XSAVEC))) 1556 entry->ebx = xstate_required_size(permitted_xcr0 | permitted_xss, 1557 true); 1558 else { 1559 WARN_ON_ONCE(permitted_xss != 0); 1560 entry->ebx = 0; 1561 } 1562 entry->ecx &= permitted_xss; 1563 entry->edx &= permitted_xss >> 32; 1564 1565 for (i = 2; i < 64; ++i) { 1566 bool s_state; 1567 if (permitted_xcr0 & BIT_ULL(i)) 1568 s_state = false; 1569 else if (permitted_xss & BIT_ULL(i)) 1570 s_state = true; 1571 else 1572 continue; 1573 1574 entry = do_host_cpuid(array, function, i); 1575 if (!entry) 1576 goto out; 1577 1578 /* 1579 * The supported check above should have filtered out 1580 * invalid sub-leafs. Only valid sub-leafs should 1581 * reach this point, and they should have a non-zero 1582 * save state size. Furthermore, check whether the 1583 * processor agrees with permitted_xcr0/permitted_xss 1584 * on whether this is an XCR0- or IA32_XSS-managed area. 1585 */ 1586 if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) { 1587 --array->nent; 1588 continue; 1589 } 1590 1591 if (!kvm_cpu_cap_has(X86_FEATURE_XFD)) 1592 entry->ecx &= ~BIT_ULL(2); 1593 entry->edx = 0; 1594 } 1595 break; 1596 } 1597 case 0x12: 1598 /* Intel SGX */ 1599 if (!kvm_cpu_cap_has(X86_FEATURE_SGX)) { 1600 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1601 break; 1602 } 1603 1604 /* 1605 * Index 0: Sub-features, MISCSELECT (a.k.a extended features) 1606 * and max enclave sizes. The SGX sub-features and MISCSELECT 1607 * are restricted by kernel and KVM capabilities (like most 1608 * feature flags), while enclave size is unrestricted. 1609 */ 1610 cpuid_entry_override(entry, CPUID_12_EAX); 1611 entry->ebx &= SGX_MISC_EXINFO; 1612 1613 entry = do_host_cpuid(array, function, 1); 1614 if (!entry) 1615 goto out; 1616 1617 /* 1618 * Index 1: SECS.ATTRIBUTES. ATTRIBUTES are restricted a la 1619 * feature flags. Advertise all supported flags, including 1620 * privileged attributes that require explicit opt-in from 1621 * userspace. ATTRIBUTES.XFRM is not adjusted as userspace is 1622 * expected to derive it from supported XCR0. 1623 */ 1624 entry->eax &= SGX_ATTR_PRIV_MASK | SGX_ATTR_UNPRIV_MASK; 1625 entry->ebx &= 0; 1626 break; 1627 /* Intel PT */ 1628 case 0x14: 1629 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT)) { 1630 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1631 break; 1632 } 1633 1634 for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) { 1635 if (!do_host_cpuid(array, function, i)) 1636 goto out; 1637 } 1638 break; 1639 /* Intel AMX TILE */ 1640 case 0x1d: 1641 if (!kvm_cpu_cap_has(X86_FEATURE_AMX_TILE)) { 1642 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1643 break; 1644 } 1645 1646 for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) { 1647 if (!do_host_cpuid(array, function, i)) 1648 goto out; 1649 } 1650 break; 1651 case 0x1e: /* TMUL information */ 1652 if (!kvm_cpu_cap_has(X86_FEATURE_AMX_TILE)) { 1653 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1654 break; 1655 } 1656 1657 max_idx = entry->eax = min(entry->eax, 1u); 1658 1659 /* KVM only supports up to 0x1e.0x1, capped above via min(). */ 1660 if (max_idx >= 1) { 1661 entry = do_host_cpuid(array, function, 1); 1662 if (!entry) 1663 goto out; 1664 1665 cpuid_entry_override(entry, CPUID_1E_1_EAX); 1666 entry->ebx = 0; 1667 entry->ecx = 0; 1668 entry->edx = 0; 1669 } 1670 break; 1671 case 0x24: { 1672 u8 avx10_version; 1673 1674 if (!kvm_cpu_cap_has(X86_FEATURE_AVX10)) { 1675 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1676 break; 1677 } 1678 1679 max_idx = entry->eax = min(entry->eax, 1u); 1680 /* 1681 * The AVX10 version is encoded in EBX[7:0]. Note, the version 1682 * is guaranteed to be >=1 if AVX10 is supported. Note #2, the 1683 * version needs to be captured before overriding EBX features! 1684 */ 1685 avx10_version = min_t(u8, entry->ebx & 0xff, 2); 1686 cpuid_entry_override(entry, CPUID_24_0_EBX); 1687 entry->ebx |= avx10_version; 1688 1689 entry->ecx = 0; 1690 entry->edx = 0; 1691 1692 /* KVM only supports up to 0x24.0x1, capped above via min(). */ 1693 if (max_idx >= 1) { 1694 entry = do_host_cpuid(array, function, 1); 1695 if (!entry) 1696 goto out; 1697 1698 cpuid_entry_override(entry, CPUID_24_1_ECX); 1699 entry->eax = 0; 1700 entry->ebx = 0; 1701 entry->edx = 0; 1702 } 1703 break; 1704 } 1705 case KVM_CPUID_SIGNATURE: { 1706 const u32 *sigptr = (const u32 *)KVM_SIGNATURE; 1707 entry->eax = KVM_CPUID_FEATURES; 1708 entry->ebx = sigptr[0]; 1709 entry->ecx = sigptr[1]; 1710 entry->edx = sigptr[2]; 1711 break; 1712 } 1713 case KVM_CPUID_FEATURES: 1714 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) | 1715 (1 << KVM_FEATURE_NOP_IO_DELAY) | 1716 (1 << KVM_FEATURE_CLOCKSOURCE2) | 1717 (1 << KVM_FEATURE_ASYNC_PF) | 1718 (1 << KVM_FEATURE_PV_EOI) | 1719 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) | 1720 (1 << KVM_FEATURE_PV_UNHALT) | 1721 (1 << KVM_FEATURE_PV_TLB_FLUSH) | 1722 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) | 1723 (1 << KVM_FEATURE_PV_SEND_IPI) | 1724 (1 << KVM_FEATURE_POLL_CONTROL) | 1725 (1 << KVM_FEATURE_PV_SCHED_YIELD) | 1726 (1 << KVM_FEATURE_ASYNC_PF_INT); 1727 1728 if (sched_info_on()) 1729 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME); 1730 1731 entry->ebx = 0; 1732 entry->ecx = 0; 1733 entry->edx = 0; 1734 break; 1735 case 0x80000000: 1736 entry->eax = min(entry->eax, 0x80000022); 1737 /* 1738 * Serializing LFENCE is reported in a multitude of ways, and 1739 * NullSegClearsBase is not reported in CPUID on Zen2; help 1740 * userspace by providing the CPUID leaf ourselves. 1741 * 1742 * However, only do it if the host has CPUID leaf 0x8000001d. 1743 * QEMU thinks that it can query the host blindly for that 1744 * CPUID leaf if KVM reports that it supports 0x8000001d or 1745 * above. The processor merrily returns values from the 1746 * highest Intel leaf which QEMU tries to use as the guest's 1747 * 0x8000001d. Even worse, this can result in an infinite 1748 * loop if said highest leaf has no subleaves indexed by ECX. 1749 */ 1750 if (entry->eax >= 0x8000001d && 1751 (static_cpu_has(X86_FEATURE_LFENCE_RDTSC) 1752 || !static_cpu_has_bug(X86_BUG_NULL_SEG))) 1753 entry->eax = max(entry->eax, 0x80000021); 1754 break; 1755 case 0x80000001: 1756 entry->ebx &= ~GENMASK(27, 16); 1757 cpuid_entry_override(entry, CPUID_8000_0001_EDX); 1758 cpuid_entry_override(entry, CPUID_8000_0001_ECX); 1759 break; 1760 case 0x80000005: 1761 /* Pass host L1 cache and TLB info. */ 1762 break; 1763 case 0x80000006: 1764 /* Drop reserved bits, pass host L2 cache and TLB info. */ 1765 entry->edx &= ~GENMASK(17, 16); 1766 break; 1767 case 0x80000007: /* Advanced power management */ 1768 cpuid_entry_override(entry, CPUID_8000_0007_EDX); 1769 1770 /* mask against host */ 1771 entry->edx &= boot_cpu_data.x86_power; 1772 entry->eax = entry->ebx = entry->ecx = 0; 1773 break; 1774 case 0x80000008: { 1775 /* 1776 * GuestPhysAddrSize (EAX[23:16]) is intended for software 1777 * use. 1778 * 1779 * KVM's ABI is to report the effective MAXPHYADDR for the 1780 * guest in PhysAddrSize (phys_as), and the maximum 1781 * *addressable* GPA in GuestPhysAddrSize (g_phys_as). 1782 * 1783 * GuestPhysAddrSize is valid if and only if TDP is enabled, 1784 * in which case the max GPA that can be addressed by KVM may 1785 * be less than the max GPA that can be legally generated by 1786 * the guest, e.g. if MAXPHYADDR>48 but the CPU doesn't 1787 * support 5-level TDP. 1788 */ 1789 unsigned int virt_as = max((entry->eax >> 8) & 0xff, 48U); 1790 unsigned int phys_as, g_phys_as; 1791 1792 /* 1793 * If TDP (NPT) is disabled use the adjusted host MAXPHYADDR as 1794 * the guest operates in the same PA space as the host, i.e. 1795 * reductions in MAXPHYADDR for memory encryption affect shadow 1796 * paging, too. 1797 * 1798 * If TDP is enabled, use the raw bare metal MAXPHYADDR as 1799 * reductions to the HPAs do not affect GPAs. The max 1800 * addressable GPA is the same as the max effective GPA, except 1801 * that it's capped at 48 bits if 5-level TDP isn't supported 1802 * (hardware processes bits 51:48 only when walking the fifth 1803 * level page table). 1804 */ 1805 if (!tdp_enabled) { 1806 phys_as = boot_cpu_data.x86_phys_bits; 1807 g_phys_as = 0; 1808 } else { 1809 phys_as = entry->eax & 0xff; 1810 g_phys_as = phys_as; 1811 if (kvm_mmu_get_max_tdp_level() < 5) 1812 g_phys_as = min(g_phys_as, 48U); 1813 } 1814 1815 entry->eax = phys_as | (virt_as << 8) | (g_phys_as << 16); 1816 entry->ecx &= ~(GENMASK(31, 16) | GENMASK(11, 8)); 1817 entry->edx = 0; 1818 cpuid_entry_override(entry, CPUID_8000_0008_EBX); 1819 break; 1820 } 1821 case 0x8000000A: 1822 if (!kvm_cpu_cap_has(X86_FEATURE_SVM)) { 1823 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1824 break; 1825 } 1826 entry->eax = 1; /* SVM revision 1 */ 1827 entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper 1828 ASID emulation to nested SVM */ 1829 entry->ecx = 0; /* Reserved */ 1830 cpuid_entry_override(entry, CPUID_8000_000A_EDX); 1831 break; 1832 case 0x80000019: 1833 entry->ecx = entry->edx = 0; 1834 break; 1835 case 0x8000001a: 1836 entry->eax &= GENMASK(2, 0); 1837 entry->ebx = entry->ecx = entry->edx = 0; 1838 break; 1839 case 0x8000001e: 1840 /* Do not return host topology information. */ 1841 entry->eax = entry->ebx = entry->ecx = 0; 1842 entry->edx = 0; /* reserved */ 1843 break; 1844 case 0x8000001F: 1845 if (!kvm_cpu_cap_has(X86_FEATURE_SEV)) { 1846 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1847 } else { 1848 cpuid_entry_override(entry, CPUID_8000_001F_EAX); 1849 /* Clear NumVMPL since KVM does not support VMPL. */ 1850 entry->ebx &= ~GENMASK(31, 12); 1851 /* 1852 * Enumerate '0' for "PA bits reduction", the adjusted 1853 * MAXPHYADDR is enumerated directly (see 0x80000008). 1854 */ 1855 entry->ebx &= ~GENMASK(11, 6); 1856 } 1857 break; 1858 case 0x80000020: 1859 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1860 break; 1861 case 0x80000021: 1862 entry->edx = 0; 1863 cpuid_entry_override(entry, CPUID_8000_0021_EAX); 1864 1865 if (kvm_cpu_cap_has(X86_FEATURE_ERAPS)) 1866 entry->ebx &= GENMASK(23, 16); 1867 else 1868 entry->ebx = 0; 1869 1870 cpuid_entry_override(entry, CPUID_8000_0021_ECX); 1871 break; 1872 /* AMD Extended Performance Monitoring and Debug */ 1873 case 0x80000022: { 1874 union cpuid_0x80000022_ebx ebx = { }; 1875 1876 entry->ecx = entry->edx = 0; 1877 if (!enable_pmu || !kvm_cpu_cap_has(X86_FEATURE_PERFMON_V2)) { 1878 entry->eax = entry->ebx = 0; 1879 break; 1880 } 1881 1882 cpuid_entry_override(entry, CPUID_8000_0022_EAX); 1883 1884 ebx.split.num_core_pmc = kvm_pmu_cap.num_counters_gp; 1885 entry->ebx = ebx.full; 1886 break; 1887 } 1888 /*Add support for Centaur's CPUID instruction*/ 1889 case 0xC0000000: 1890 /*Just support up to 0xC0000004 now*/ 1891 entry->eax = min(entry->eax, 0xC0000004); 1892 break; 1893 case 0xC0000001: 1894 cpuid_entry_override(entry, CPUID_C000_0001_EDX); 1895 break; 1896 case 3: /* Processor serial number */ 1897 case 5: /* MONITOR/MWAIT */ 1898 case 0xC0000002: 1899 case 0xC0000003: 1900 case 0xC0000004: 1901 default: 1902 entry->eax = entry->ebx = entry->ecx = entry->edx = 0; 1903 break; 1904 } 1905 1906 r = 0; 1907 1908 out: 1909 put_cpu(); 1910 1911 return r; 1912 } 1913 1914 static int do_cpuid_func(struct kvm_cpuid_array *array, u32 func, 1915 unsigned int type) 1916 { 1917 if (type == KVM_GET_EMULATED_CPUID) 1918 return __do_cpuid_func_emulated(array, func); 1919 1920 return __do_cpuid_func(array, func); 1921 } 1922 1923 #define CENTAUR_CPUID_SIGNATURE 0xC0000000 1924 1925 static int get_cpuid_func(struct kvm_cpuid_array *array, u32 func, 1926 unsigned int type) 1927 { 1928 u32 limit; 1929 int r; 1930 1931 if (func == CENTAUR_CPUID_SIGNATURE && 1932 boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR && 1933 boot_cpu_data.x86_vendor != X86_VENDOR_ZHAOXIN) 1934 return 0; 1935 1936 r = do_cpuid_func(array, func, type); 1937 if (r) 1938 return r; 1939 1940 limit = array->entries[array->nent - 1].eax; 1941 for (func = func + 1; func <= limit; ++func) { 1942 r = do_cpuid_func(array, func, type); 1943 if (r) 1944 break; 1945 } 1946 1947 return r; 1948 } 1949 1950 static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries, 1951 __u32 num_entries, unsigned int ioctl_type) 1952 { 1953 int i; 1954 __u32 pad[3]; 1955 1956 if (ioctl_type != KVM_GET_EMULATED_CPUID) 1957 return false; 1958 1959 /* 1960 * We want to make sure that ->padding is being passed clean from 1961 * userspace in case we want to use it for something in the future. 1962 * 1963 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we 1964 * have to give ourselves satisfied only with the emulated side. /me 1965 * sheds a tear. 1966 */ 1967 for (i = 0; i < num_entries; i++) { 1968 if (copy_from_user(pad, entries[i].padding, sizeof(pad))) 1969 return true; 1970 1971 if (pad[0] || pad[1] || pad[2]) 1972 return true; 1973 } 1974 return false; 1975 } 1976 1977 int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid, 1978 struct kvm_cpuid_entry2 __user *entries, 1979 unsigned int type) 1980 { 1981 static const u32 funcs[] = { 1982 0, 0x80000000, CENTAUR_CPUID_SIGNATURE, KVM_CPUID_SIGNATURE, 1983 }; 1984 1985 struct kvm_cpuid_array array = { 1986 .nent = 0, 1987 }; 1988 int r, i; 1989 1990 if (cpuid->nent < 1) 1991 return -E2BIG; 1992 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) 1993 cpuid->nent = KVM_MAX_CPUID_ENTRIES; 1994 1995 if (sanity_check_entries(entries, cpuid->nent, type)) 1996 return -EINVAL; 1997 1998 array.entries = kvzalloc_objs(struct kvm_cpuid_entry2, cpuid->nent); 1999 if (!array.entries) 2000 return -ENOMEM; 2001 2002 array.maxnent = cpuid->nent; 2003 2004 for (i = 0; i < ARRAY_SIZE(funcs); i++) { 2005 r = get_cpuid_func(&array, funcs[i], type); 2006 if (r) 2007 goto out_free; 2008 } 2009 cpuid->nent = array.nent; 2010 2011 if (copy_to_user(entries, array.entries, 2012 array.nent * sizeof(struct kvm_cpuid_entry2))) 2013 r = -EFAULT; 2014 2015 out_free: 2016 kvfree(array.entries); 2017 return r; 2018 } 2019 2020 /* 2021 * Intel CPUID semantics treats any query for an out-of-range leaf as if the 2022 * highest basic leaf (i.e. CPUID.0H:EAX) were requested. AMD CPUID semantics 2023 * returns all zeroes for any undefined leaf, whether or not the leaf is in 2024 * range. Centaur/VIA follows Intel semantics. 2025 * 2026 * A leaf is considered out-of-range if its function is higher than the maximum 2027 * supported leaf of its associated class or if its associated class does not 2028 * exist. 2029 * 2030 * There are three primary classes to be considered, with their respective 2031 * ranges described as "<base> - <top>[,<base2> - <top2>] inclusive. A primary 2032 * class exists if a guest CPUID entry for its <base> leaf exists. For a given 2033 * class, CPUID.<base>.EAX contains the max supported leaf for the class. 2034 * 2035 * - Basic: 0x00000000 - 0x3fffffff, 0x50000000 - 0x7fffffff 2036 * - Hypervisor: 0x40000000 - 0x4fffffff 2037 * - Extended: 0x80000000 - 0xbfffffff 2038 * - Centaur: 0xc0000000 - 0xcfffffff 2039 * 2040 * The Hypervisor class is further subdivided into sub-classes that each act as 2041 * their own independent class associated with a 0x100 byte range. E.g. if Qemu 2042 * is advertising support for both HyperV and KVM, the resulting Hypervisor 2043 * CPUID sub-classes are: 2044 * 2045 * - HyperV: 0x40000000 - 0x400000ff 2046 * - KVM: 0x40000100 - 0x400001ff 2047 */ 2048 static struct kvm_cpuid_entry2 * 2049 get_out_of_range_cpuid_entry(struct kvm_vcpu *vcpu, u32 *fn_ptr, u32 index) 2050 { 2051 struct kvm_cpuid_entry2 *basic, *class; 2052 u32 function = *fn_ptr; 2053 2054 basic = kvm_find_cpuid_entry(vcpu, 0); 2055 if (!basic) 2056 return NULL; 2057 2058 if (is_guest_vendor_amd(basic->ebx, basic->ecx, basic->edx) || 2059 is_guest_vendor_hygon(basic->ebx, basic->ecx, basic->edx)) 2060 return NULL; 2061 2062 if (function >= 0x40000000 && function <= 0x4fffffff) 2063 class = kvm_find_cpuid_entry(vcpu, function & 0xffffff00); 2064 else if (function >= 0xc0000000) 2065 class = kvm_find_cpuid_entry(vcpu, 0xc0000000); 2066 else 2067 class = kvm_find_cpuid_entry(vcpu, function & 0x80000000); 2068 2069 if (class && function <= class->eax) 2070 return NULL; 2071 2072 /* 2073 * Leaf specific adjustments are also applied when redirecting to the 2074 * max basic entry, e.g. if the max basic leaf is 0xb but there is no 2075 * entry for CPUID.0xb.index (see below), then the output value for EDX 2076 * needs to be pulled from CPUID.0xb.1. 2077 */ 2078 *fn_ptr = basic->eax; 2079 2080 /* 2081 * The class does not exist or the requested function is out of range; 2082 * the effective CPUID entry is the max basic leaf. Note, the index of 2083 * the original requested leaf is observed! 2084 */ 2085 return kvm_find_cpuid_entry_index(vcpu, basic->eax, index); 2086 } 2087 2088 bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, 2089 u32 *ecx, u32 *edx, bool exact_only) 2090 { 2091 u32 orig_function = *eax, function = *eax, index = *ecx; 2092 struct kvm_cpuid_entry2 *entry; 2093 bool exact, used_max_basic = false; 2094 2095 if (vcpu->arch.cpuid_dynamic_bits_dirty) 2096 kvm_update_cpuid_runtime(vcpu); 2097 2098 entry = kvm_find_cpuid_entry_index(vcpu, function, index); 2099 exact = !!entry; 2100 2101 if (!entry && !exact_only) { 2102 entry = get_out_of_range_cpuid_entry(vcpu, &function, index); 2103 used_max_basic = !!entry; 2104 } 2105 2106 if (entry) { 2107 *eax = entry->eax; 2108 *ebx = entry->ebx; 2109 *ecx = entry->ecx; 2110 *edx = entry->edx; 2111 if (function == 7 && index == 0) { 2112 u64 data; 2113 if ((*ebx & (feature_bit(RTM) | feature_bit(HLE))) && 2114 !kvm_msr_read(vcpu, MSR_IA32_TSX_CTRL, &data) && 2115 (data & TSX_CTRL_CPUID_CLEAR)) 2116 *ebx &= ~(feature_bit(RTM) | feature_bit(HLE)); 2117 } else if (function == 0x80000007) { 2118 if (kvm_hv_invtsc_suppressed(vcpu)) 2119 *edx &= ~feature_bit(CONSTANT_TSC); 2120 } else if (IS_ENABLED(CONFIG_KVM_XEN) && 2121 kvm_xen_is_tsc_leaf(vcpu, function)) { 2122 /* 2123 * Update guest TSC frequency information if necessary. 2124 * Ignore failures, there is no sane value that can be 2125 * provided if KVM can't get the TSC frequency. 2126 */ 2127 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) 2128 kvm_guest_time_update(vcpu); 2129 2130 if (index == 1) { 2131 *ecx = vcpu->arch.pvclock_tsc_mul; 2132 *edx = vcpu->arch.pvclock_tsc_shift; 2133 } else if (index == 2) { 2134 *eax = vcpu->arch.hw_tsc_khz; 2135 } 2136 } 2137 } else { 2138 *eax = *ebx = *ecx = *edx = 0; 2139 /* 2140 * When leaf 0BH or 1FH is defined, CL is pass-through 2141 * and EDX is always the x2APIC ID, even for undefined 2142 * subleaves. Index 1 will exist iff the leaf is 2143 * implemented, so we pass through CL iff leaf 1 2144 * exists. EDX can be copied from any existing index. 2145 */ 2146 if (function == 0xb || function == 0x1f) { 2147 entry = kvm_find_cpuid_entry_index(vcpu, function, 1); 2148 if (entry) { 2149 *ecx = index & 0xff; 2150 *edx = entry->edx; 2151 } 2152 } 2153 } 2154 trace_kvm_cpuid(orig_function, index, *eax, *ebx, *ecx, *edx, exact, 2155 used_max_basic); 2156 return exact; 2157 } 2158 EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_cpuid); 2159 2160 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu) 2161 { 2162 u32 eax, ebx, ecx, edx; 2163 2164 if (!is_smm(vcpu) && cpuid_fault_enabled(vcpu) && 2165 !kvm_require_cpl(vcpu, 0)) 2166 return 1; 2167 2168 eax = kvm_rax_read(vcpu); 2169 ecx = kvm_rcx_read(vcpu); 2170 kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false); 2171 kvm_rax_write(vcpu, eax); 2172 kvm_rbx_write(vcpu, ebx); 2173 kvm_rcx_write(vcpu, ecx); 2174 kvm_rdx_write(vcpu, edx); 2175 return kvm_skip_emulated_instruction(vcpu); 2176 } 2177 EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_emulate_cpuid); 2178