xref: /linux/sound/soc/intel/boards/cht_bsw_rt5672.c (revision b2128290c29902315e632ea59e0504d6bc9e9b42)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
4  *                     Cherrytrail and Braswell, with RT5672 codec.
5  *
6  *  Copyright (C) 2014 Intel Corp
7  *  Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
8  *          Mengdong Lin <mengdong.lin@intel.com>
9  */
10 
11 #include <linux/gpio/consumer.h>
12 #include <linux/input.h>
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/string.h>
18 #include <sound/pcm.h>
19 #include <sound/pcm_params.h>
20 #include <sound/soc.h>
21 #include <sound/jack.h>
22 #include <sound/soc-acpi.h>
23 #include "../../codecs/rt5670.h"
24 #include "../atom/sst-atom-controls.h"
25 #include "../common/soc-intel-quirks.h"
26 
27 
28 /* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
29 #define CHT_PLAT_CLK_3_HZ	19200000
30 #define CHT_CODEC_DAI	"rt5670-aif1"
31 
32 struct cht_mc_private {
33 	struct snd_soc_jack headset;
34 	char codec_name[SND_ACPI_I2C_ID_LEN];
35 	struct clk *mclk;
36 	bool use_ssp0;
37 };
38 
39 /* Headset jack detection DAPM pins */
40 static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
41 	{
42 		.pin = "Headset Mic",
43 		.mask = SND_JACK_MICROPHONE,
44 	},
45 	{
46 		.pin = "Headphone",
47 		.mask = SND_JACK_HEADPHONE,
48 	},
49 };
50 
51 static int platform_clock_control(struct snd_soc_dapm_widget *w,
52 		struct snd_kcontrol *k, int  event)
53 {
54 	struct snd_soc_card *card = snd_soc_dapm_to_card(w->dapm);
55 	struct snd_soc_dai *codec_dai;
56 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
57 	int ret;
58 
59 	codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
60 	if (!codec_dai) {
61 		dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
62 		return -EIO;
63 	}
64 
65 	if (SND_SOC_DAPM_EVENT_ON(event)) {
66 		ret = clk_prepare_enable(ctx->mclk);
67 		if (ret < 0) {
68 			dev_err(card->dev,
69 				"could not configure MCLK state: %d\n", ret);
70 			return ret;
71 		}
72 
73 		/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
74 		ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
75 				CHT_PLAT_CLK_3_HZ, 48000 * 512);
76 		if (ret < 0) {
77 			dev_err(card->dev, "can't set codec pll: %d\n", ret);
78 			clk_disable_unprepare(ctx->mclk);
79 			return ret;
80 		}
81 
82 		/* set codec sysclk source to PLL */
83 		ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
84 			48000 * 512, SND_SOC_CLOCK_IN);
85 		if (ret < 0) {
86 			dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
87 			clk_disable_unprepare(ctx->mclk);
88 			return ret;
89 		}
90 	} else {
91 		/* Set codec sysclk source to its internal clock because codec
92 		 * PLL will be off when idle and MCLK will also be off by ACPI
93 		 * when codec is runtime suspended. Codec needs clock for jack
94 		 * detection and button press.
95 		 */
96 		ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
97 					     48000 * 512, SND_SOC_CLOCK_IN);
98 		if (ret < 0) {
99 			dev_err(card->dev, "failed to set codec sysclk: %d\n", ret);
100 			return ret;
101 		}
102 
103 		clk_disable_unprepare(ctx->mclk);
104 	}
105 	return 0;
106 }
107 
108 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
109 	SND_SOC_DAPM_HP("Headphone", NULL),
110 	SND_SOC_DAPM_MIC("Headset Mic", NULL),
111 	SND_SOC_DAPM_MIC("Int Mic", NULL),
112 	SND_SOC_DAPM_SPK("Ext Spk", NULL),
113 	SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
114 			platform_clock_control, SND_SOC_DAPM_PRE_PMU |
115 			SND_SOC_DAPM_POST_PMD),
116 };
117 
118 static const struct snd_soc_dapm_route cht_audio_map[] = {
119 	{"IN1P", NULL, "Headset Mic"},
120 	{"IN1N", NULL, "Headset Mic"},
121 	{"DMIC L1", NULL, "Int Mic"},
122 	{"DMIC R1", NULL, "Int Mic"},
123 	{"Headphone", NULL, "HPOL"},
124 	{"Headphone", NULL, "HPOR"},
125 	{"Ext Spk", NULL, "SPOLP"},
126 	{"Ext Spk", NULL, "SPOLN"},
127 	{"Ext Spk", NULL, "SPORP"},
128 	{"Ext Spk", NULL, "SPORN"},
129 	{"Headphone", NULL, "Platform Clock"},
130 	{"Headset Mic", NULL, "Platform Clock"},
131 	{"Int Mic", NULL, "Platform Clock"},
132 	{"Ext Spk", NULL, "Platform Clock"},
133 };
134 
135 static const struct snd_soc_dapm_route cht_audio_ssp0_map[] = {
136 	{"AIF1 Playback", NULL, "ssp0 Tx"},
137 	{"ssp0 Tx", NULL, "modem_out"},
138 	{"modem_in", NULL, "ssp0 Rx"},
139 	{"ssp0 Rx", NULL, "AIF1 Capture"},
140 };
141 
142 static const struct snd_soc_dapm_route cht_audio_ssp2_map[] = {
143 	{"AIF1 Playback", NULL, "ssp2 Tx"},
144 	{"ssp2 Tx", NULL, "codec_out0"},
145 	{"ssp2 Tx", NULL, "codec_out1"},
146 	{"codec_in0", NULL, "ssp2 Rx"},
147 	{"codec_in1", NULL, "ssp2 Rx"},
148 	{"ssp2 Rx", NULL, "AIF1 Capture"},
149 };
150 
151 static const struct snd_kcontrol_new cht_mc_controls[] = {
152 	SOC_DAPM_PIN_SWITCH("Headphone"),
153 	SOC_DAPM_PIN_SWITCH("Headset Mic"),
154 	SOC_DAPM_PIN_SWITCH("Int Mic"),
155 	SOC_DAPM_PIN_SWITCH("Ext Spk"),
156 };
157 
158 static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
159 					struct snd_pcm_hw_params *params)
160 {
161 	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
162 	struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
163 	int ret;
164 
165 	/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
166 	ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
167 				  CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
168 	if (ret < 0) {
169 		dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
170 		return ret;
171 	}
172 
173 	/* set codec sysclk source to PLL */
174 	ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
175 				     params_rate(params) * 512,
176 				     SND_SOC_CLOCK_IN);
177 	if (ret < 0) {
178 		dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
179 		return ret;
180 	}
181 	return 0;
182 }
183 
184 static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
185 
186 static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
187 	{ "headset-gpios", &headset_gpios, 1 },
188 	{},
189 };
190 
191 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
192 {
193 	int ret;
194 	struct snd_soc_dapm_context *dapm = snd_soc_card_to_dapm(runtime->card);
195 	struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(runtime, 0);
196 	struct snd_soc_component *component = codec_dai->component;
197 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
198 
199 	if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
200 		dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
201 
202 	/* Select codec ASRC clock source to track I2S1 clock, because codec
203 	 * is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
204 	 * be supported by RT5672. Otherwise, ASRC will be disabled and cause
205 	 * noise.
206 	 */
207 	rt5670_sel_asrc_clk_src(component,
208 				RT5670_DA_STEREO_FILTER
209 				| RT5670_DA_MONO_L_FILTER
210 				| RT5670_DA_MONO_R_FILTER
211 				| RT5670_AD_STEREO_FILTER
212 				| RT5670_AD_MONO_L_FILTER
213 				| RT5670_AD_MONO_R_FILTER,
214 				RT5670_CLK_SEL_I2S1_ASRC);
215 
216 	if (ctx->use_ssp0) {
217 		ret = snd_soc_dapm_add_routes(dapm,
218 					      cht_audio_ssp0_map,
219 					      ARRAY_SIZE(cht_audio_ssp0_map));
220 	} else {
221 		ret = snd_soc_dapm_add_routes(dapm,
222 					      cht_audio_ssp2_map,
223 					      ARRAY_SIZE(cht_audio_ssp2_map));
224 	}
225 	if (ret)
226 		return ret;
227 
228 	ret = snd_soc_card_jack_new_pins(runtime->card, "Headset",
229 					 SND_JACK_HEADSET | SND_JACK_BTN_0 |
230 					 SND_JACK_BTN_1 | SND_JACK_BTN_2,
231 					 &ctx->headset,
232 					 cht_bsw_headset_pins,
233 					 ARRAY_SIZE(cht_bsw_headset_pins));
234         if (ret)
235                 return ret;
236 
237 	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
238 	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
239 	snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
240 
241 	rt5670_set_jack_detect(component, &ctx->headset);
242 
243 	/*
244 	 * The firmware might enable the clock at boot (this information
245 	 * may or may not be reflected in the enable clock register).
246 	 * To change the rate we must disable the clock first to cover
247 	 * these cases. Due to Common Clock Framework restrictions that
248 	 * do not allow to disable a clock that has not been enabled, we
249 	 * need to enable the clock first.
250 	 */
251 	ret = clk_prepare_enable(ctx->mclk);
252 	if (!ret)
253 		clk_disable_unprepare(ctx->mclk);
254 
255 	ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
256 	if (ret) {
257 		dev_err(runtime->dev, "unable to set MCLK rate\n");
258 		return ret;
259 	}
260 
261 	return 0;
262 }
263 
264 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
265 			    struct snd_pcm_hw_params *params)
266 {
267 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(rtd->card);
268 	struct snd_interval *rate = hw_param_interval(params,
269 			SNDRV_PCM_HW_PARAM_RATE);
270 	struct snd_interval *channels = hw_param_interval(params,
271 						SNDRV_PCM_HW_PARAM_CHANNELS);
272 	int ret, bits;
273 
274 	/* The DSP will convert the FE rate to 48k, stereo, 24bits */
275 	rate->min = rate->max = 48000;
276 	channels->min = channels->max = 2;
277 
278 	if (ctx->use_ssp0) {
279 		/* set SSP0 to 16-bit */
280 		params_set_format(params, SNDRV_PCM_FORMAT_S16_LE);
281 		bits = 16;
282 	} else {
283 		/* set SSP2 to 24-bit */
284 		params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
285 		bits = 24;
286 	}
287 
288 	/*
289 	 * The default mode for the cpu-dai is TDM 4 slot. The default mode
290 	 * for the codec-dai is I2S. So we need to either set the cpu-dai to
291 	 * I2S mode to match the codec-dai, or set the codec-dai to TDM 4 slot
292 	 * (or program both to yet another mode).
293 	 * One board, the Lenovo Miix 2 10, uses not 1 but 2 codecs connected
294 	 * to SSP2. The second piggy-backed, output-only codec is inside the
295 	 * keyboard-dock (which has extra speakers). Unlike the main rt5672
296 	 * codec, we cannot configure this codec, it is hard coded to use
297 	 * 2 channel 24 bit I2S. For this to work we must use I2S mode on this
298 	 * board. Since we only support 2 channels anyways, there is no need
299 	 * for TDM on any cht-bsw-rt5672 designs. So we use I2S 2ch everywhere.
300 	 */
301 	ret = snd_soc_dai_set_fmt(snd_soc_rtd_to_cpu(rtd, 0),
302 				  SND_SOC_DAIFMT_I2S     |
303 				  SND_SOC_DAIFMT_NB_NF   |
304 				  SND_SOC_DAIFMT_BP_FP);
305 	if (ret < 0) {
306 		dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
307 		return ret;
308 	}
309 
310 	ret = snd_soc_dai_set_tdm_slot(snd_soc_rtd_to_cpu(rtd, 0), 0x3, 0x3, 2, bits);
311 	if (ret < 0) {
312 		dev_err(rtd->dev, "can't set I2S config, err %d\n", ret);
313 		return ret;
314 	}
315 
316 	return 0;
317 }
318 
319 static int cht_aif1_startup(struct snd_pcm_substream *substream)
320 {
321 	return snd_pcm_hw_constraint_single(substream->runtime,
322 			SNDRV_PCM_HW_PARAM_RATE, 48000);
323 }
324 
325 static const struct snd_soc_ops cht_aif1_ops = {
326 	.startup = cht_aif1_startup,
327 };
328 
329 static const struct snd_soc_ops cht_be_ssp2_ops = {
330 	.hw_params = cht_aif1_hw_params,
331 };
332 
333 SND_SOC_DAILINK_DEF(dummy,
334 	DAILINK_COMP_ARRAY(COMP_DUMMY()));
335 
336 SND_SOC_DAILINK_DEF(media,
337 	DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
338 
339 SND_SOC_DAILINK_DEF(deepbuffer,
340 	DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
341 
342 SND_SOC_DAILINK_DEF(ssp2_port,
343 	DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
344 SND_SOC_DAILINK_DEF(ssp2_codec,
345 	DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
346 				      "rt5670-aif1")));
347 
348 SND_SOC_DAILINK_DEF(platform,
349 	DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
350 
351 static struct snd_soc_dai_link cht_dailink[] = {
352 	/* Front End DAI links */
353 	[MERR_DPCM_AUDIO] = {
354 		.name = "Audio Port",
355 		.stream_name = "Audio",
356 		.nonatomic = true,
357 		.dynamic = 1,
358 		.ops = &cht_aif1_ops,
359 		SND_SOC_DAILINK_REG(media, dummy, platform),
360 	},
361 	[MERR_DPCM_DEEP_BUFFER] = {
362 		.name = "Deep-Buffer Audio Port",
363 		.stream_name = "Deep-Buffer Audio",
364 		.nonatomic = true,
365 		.dynamic = 1,
366 		.playback_only = 1,
367 		.ops = &cht_aif1_ops,
368 		SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
369 	},
370 
371 	/* Back End DAI links */
372 	{
373 		/* SSP2 - Codec */
374 		.name = "SSP2-Codec",
375 		.id = 0,
376 		.no_pcm = 1,
377 		.init = cht_codec_init,
378 		.be_hw_params_fixup = cht_codec_fixup,
379 		.ops = &cht_be_ssp2_ops,
380 		SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
381 	},
382 };
383 
384 static int cht_suspend_pre(struct snd_soc_card *card)
385 {
386 	struct snd_soc_component *component;
387 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
388 
389 	for_each_card_components(card, component) {
390 		if (!strncmp(component->name,
391 			     ctx->codec_name, sizeof(ctx->codec_name))) {
392 
393 			dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
394 			rt5670_jack_suspend(component);
395 			break;
396 		}
397 	}
398 	return 0;
399 }
400 
401 static int cht_resume_post(struct snd_soc_card *card)
402 {
403 	struct snd_soc_component *component;
404 	struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
405 
406 	for_each_card_components(card, component) {
407 		if (!strncmp(component->name,
408 			     ctx->codec_name, sizeof(ctx->codec_name))) {
409 
410 			dev_dbg(component->dev, "enabling jack detect for resume.\n");
411 			rt5670_jack_resume(component);
412 			break;
413 		}
414 	}
415 
416 	return 0;
417 }
418 
419 /* use space before codec name to simplify card ID, and simplify driver name */
420 #define SOF_CARD_NAME "bytcht rt5672" /* card name will be 'sof-bytcht rt5672' */
421 #define SOF_DRIVER_NAME "SOF"
422 
423 #define CARD_NAME "cht-bsw-rt5672"
424 #define DRIVER_NAME NULL /* card name will be used for driver name */
425 
426 /* SoC card */
427 static struct snd_soc_card snd_soc_card_cht = {
428 	.owner = THIS_MODULE,
429 	.dai_link = cht_dailink,
430 	.num_links = ARRAY_SIZE(cht_dailink),
431 	.dapm_widgets = cht_dapm_widgets,
432 	.num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
433 	.dapm_routes = cht_audio_map,
434 	.num_dapm_routes = ARRAY_SIZE(cht_audio_map),
435 	.controls = cht_mc_controls,
436 	.num_controls = ARRAY_SIZE(cht_mc_controls),
437 	.suspend_pre = cht_suspend_pre,
438 	.resume_post = cht_resume_post,
439 };
440 
441 #define RT5672_I2C_DEFAULT	"i2c-10EC5670:00"
442 
443 static int snd_cht_mc_probe(struct platform_device *pdev)
444 {
445 	int ret_val = 0;
446 	struct cht_mc_private *drv;
447 	struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
448 	const char *platform_name;
449 	struct device *dev = &pdev->dev;
450 	struct acpi_device *adev;
451 	bool sof_parent;
452 	int dai_index = 0;
453 	int i;
454 
455 	drv = devm_kzalloc(dev, sizeof(*drv), GFP_KERNEL);
456 	if (!drv)
457 		return -ENOMEM;
458 
459 	strscpy(drv->codec_name, RT5672_I2C_DEFAULT, sizeof(drv->codec_name));
460 
461 	/* find index of codec dai */
462 	for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
463 		if (cht_dailink[i].num_codecs &&
464 		    !strcmp(cht_dailink[i].codecs->name, RT5672_I2C_DEFAULT)) {
465 			dai_index = i;
466 			break;
467 		}
468 	}
469 
470 	/* fixup codec name based on HID */
471 	adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
472 	if (adev) {
473 		snprintf(drv->codec_name, sizeof(drv->codec_name),
474 			 "i2c-%s", acpi_dev_name(adev));
475 		cht_dailink[dai_index].codecs->name = drv->codec_name;
476 	}  else {
477 		dev_err(dev, "Error cannot find '%s' dev\n", mach->id);
478 		return -ENOENT;
479 	}
480 
481 	acpi_dev_put(adev);
482 
483 	/* Use SSP0 on Bay Trail CR devices */
484 	if (soc_intel_is_byt() && mach->mach_params.acpi_ipc_irq_index == 0) {
485 		cht_dailink[dai_index].cpus->dai_name = "ssp0-port";
486 		drv->use_ssp0 = true;
487 	}
488 
489 	/* override platform name, if required */
490 	snd_soc_card_cht.dev = dev;
491 	platform_name = mach->mach_params.platform;
492 
493 	ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
494 							platform_name);
495 	if (ret_val)
496 		return ret_val;
497 
498 	snd_soc_card_cht.components = rt5670_components();
499 
500 	drv->mclk = devm_clk_get(dev, "pmc_plt_clk_3");
501 	if (IS_ERR(drv->mclk)) {
502 		dev_err(dev,
503 			"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
504 			PTR_ERR(drv->mclk));
505 		return PTR_ERR(drv->mclk);
506 	}
507 	snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
508 
509 	sof_parent = snd_soc_acpi_sof_parent(dev);
510 
511 	/* set card and driver name */
512 	if (sof_parent) {
513 		snd_soc_card_cht.name = SOF_CARD_NAME;
514 		snd_soc_card_cht.driver_name = SOF_DRIVER_NAME;
515 	} else {
516 		snd_soc_card_cht.name = CARD_NAME;
517 		snd_soc_card_cht.driver_name = DRIVER_NAME;
518 	}
519 
520 	/* set pm ops */
521 	if (sof_parent)
522 		pdev->dev.driver->pm = &snd_soc_pm_ops;
523 
524 	/* register the soc card */
525 	ret_val = devm_snd_soc_register_card(dev, &snd_soc_card_cht);
526 	if (ret_val) {
527 		dev_err(dev,
528 			"snd_soc_register_card failed %d\n", ret_val);
529 		return ret_val;
530 	}
531 	platform_set_drvdata(pdev, &snd_soc_card_cht);
532 	return ret_val;
533 }
534 
535 static struct platform_driver snd_cht_mc_driver = {
536 	.driver = {
537 		.name = "cht-bsw-rt5672",
538 	},
539 	.probe = snd_cht_mc_probe,
540 };
541 
542 module_platform_driver(snd_cht_mc_driver);
543 
544 MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
545 MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
546 MODULE_LICENSE("GPL v2");
547 MODULE_ALIAS("platform:cht-bsw-rt5672");
548