1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
3
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5
6 #include <linux/module.h>
7 #include <linux/types.h>
8 #include <linux/init.h>
9 #include <linux/pci.h>
10 #include <linux/vmalloc.h>
11 #include <linux/pagemap.h>
12 #include <linux/delay.h>
13 #include <linux/netdevice.h>
14 #include <linux/interrupt.h>
15 #include <linux/tcp.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/ethtool.h>
21 #include <linux/if_vlan.h>
22 #include <linux/cpu.h>
23 #include <linux/smp.h>
24 #include <linux/pm_qos.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/prefetch.h>
27 #include <linux/suspend.h>
28
29 #include "e1000.h"
30 #define CREATE_TRACE_POINTS
31 #include "e1000e_trace.h"
32
33 char e1000e_driver_name[] = "e1000e";
34
35 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
36 static int debug = -1;
37 module_param(debug, int, 0);
38 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
39
40 static const struct e1000_info *e1000_info_tbl[] = {
41 [board_82571] = &e1000_82571_info,
42 [board_82572] = &e1000_82572_info,
43 [board_82573] = &e1000_82573_info,
44 [board_82574] = &e1000_82574_info,
45 [board_82583] = &e1000_82583_info,
46 [board_80003es2lan] = &e1000_es2_info,
47 [board_ich8lan] = &e1000_ich8_info,
48 [board_ich9lan] = &e1000_ich9_info,
49 [board_ich10lan] = &e1000_ich10_info,
50 [board_pchlan] = &e1000_pch_info,
51 [board_pch2lan] = &e1000_pch2_info,
52 [board_pch_lpt] = &e1000_pch_lpt_info,
53 [board_pch_spt] = &e1000_pch_spt_info,
54 [board_pch_cnp] = &e1000_pch_cnp_info,
55 [board_pch_tgp] = &e1000_pch_tgp_info,
56 [board_pch_adp] = &e1000_pch_adp_info,
57 [board_pch_mtp] = &e1000_pch_mtp_info,
58 };
59
60 struct e1000_reg_info {
61 u32 ofs;
62 char *name;
63 };
64
65 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
66 /* General Registers */
67 {E1000_CTRL, "CTRL"},
68 {E1000_STATUS, "STATUS"},
69 {E1000_CTRL_EXT, "CTRL_EXT"},
70
71 /* Interrupt Registers */
72 {E1000_ICR, "ICR"},
73
74 /* Rx Registers */
75 {E1000_RCTL, "RCTL"},
76 {E1000_RDLEN(0), "RDLEN"},
77 {E1000_RDH(0), "RDH"},
78 {E1000_RDT(0), "RDT"},
79 {E1000_RDTR, "RDTR"},
80 {E1000_RXDCTL(0), "RXDCTL"},
81 {E1000_ERT, "ERT"},
82 {E1000_RDBAL(0), "RDBAL"},
83 {E1000_RDBAH(0), "RDBAH"},
84 {E1000_RDFH, "RDFH"},
85 {E1000_RDFT, "RDFT"},
86 {E1000_RDFHS, "RDFHS"},
87 {E1000_RDFTS, "RDFTS"},
88 {E1000_RDFPC, "RDFPC"},
89
90 /* Tx Registers */
91 {E1000_TCTL, "TCTL"},
92 {E1000_TDBAL(0), "TDBAL"},
93 {E1000_TDBAH(0), "TDBAH"},
94 {E1000_TDLEN(0), "TDLEN"},
95 {E1000_TDH(0), "TDH"},
96 {E1000_TDT(0), "TDT"},
97 {E1000_TIDV, "TIDV"},
98 {E1000_TXDCTL(0), "TXDCTL"},
99 {E1000_TADV, "TADV"},
100 {E1000_TARC(0), "TARC"},
101 {E1000_TDFH, "TDFH"},
102 {E1000_TDFT, "TDFT"},
103 {E1000_TDFHS, "TDFHS"},
104 {E1000_TDFTS, "TDFTS"},
105 {E1000_TDFPC, "TDFPC"},
106
107 /* List Terminator */
108 {0, NULL}
109 };
110
111 /**
112 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
113 * @hw: pointer to the HW structure
114 *
115 * When updating the MAC CSR registers, the Manageability Engine (ME) could
116 * be accessing the registers at the same time. Normally, this is handled in
117 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
118 * accesses later than it should which could result in the register to have
119 * an incorrect value. Workaround this by checking the FWSM register which
120 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
121 * and try again a number of times.
122 **/
__ew32_prepare(struct e1000_hw * hw)123 static void __ew32_prepare(struct e1000_hw *hw)
124 {
125 s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
126
127 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
128 udelay(50);
129 }
130
__ew32(struct e1000_hw * hw,unsigned long reg,u32 val)131 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
132 {
133 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
134 __ew32_prepare(hw);
135
136 writel(val, hw->hw_addr + reg);
137 }
138
139 /**
140 * e1000_regdump - register printout routine
141 * @hw: pointer to the HW structure
142 * @reginfo: pointer to the register info table
143 **/
e1000_regdump(struct e1000_hw * hw,struct e1000_reg_info * reginfo)144 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
145 {
146 int n = 0;
147 char rname[16];
148 u32 regs[8];
149
150 switch (reginfo->ofs) {
151 case E1000_RXDCTL(0):
152 for (n = 0; n < 2; n++)
153 regs[n] = __er32(hw, E1000_RXDCTL(n));
154 break;
155 case E1000_TXDCTL(0):
156 for (n = 0; n < 2; n++)
157 regs[n] = __er32(hw, E1000_TXDCTL(n));
158 break;
159 case E1000_TARC(0):
160 for (n = 0; n < 2; n++)
161 regs[n] = __er32(hw, E1000_TARC(n));
162 break;
163 default:
164 pr_info("%-15s %08x\n",
165 reginfo->name, __er32(hw, reginfo->ofs));
166 return;
167 }
168
169 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
170 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
171 }
172
e1000e_dump_ps_pages(struct e1000_adapter * adapter,struct e1000_buffer * bi)173 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
174 struct e1000_buffer *bi)
175 {
176 int i;
177 struct e1000_ps_page *ps_page;
178
179 for (i = 0; i < adapter->rx_ps_pages; i++) {
180 ps_page = &bi->ps_pages[i];
181
182 if (ps_page->page) {
183 pr_info("packet dump for ps_page %d:\n", i);
184 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
185 16, 1, page_address(ps_page->page),
186 PAGE_SIZE, true);
187 }
188 }
189 }
190
191 /**
192 * e1000e_dump - Print registers, Tx-ring and Rx-ring
193 * @adapter: board private structure
194 **/
e1000e_dump(struct e1000_adapter * adapter)195 static void e1000e_dump(struct e1000_adapter *adapter)
196 {
197 struct net_device *netdev = adapter->netdev;
198 struct e1000_hw *hw = &adapter->hw;
199 struct e1000_reg_info *reginfo;
200 struct e1000_ring *tx_ring = adapter->tx_ring;
201 struct e1000_tx_desc *tx_desc;
202 struct my_u0 {
203 __le64 a;
204 __le64 b;
205 } *u0;
206 struct e1000_buffer *buffer_info;
207 struct e1000_ring *rx_ring = adapter->rx_ring;
208 union e1000_rx_desc_packet_split *rx_desc_ps;
209 union e1000_rx_desc_extended *rx_desc;
210 struct my_u1 {
211 __le64 a;
212 __le64 b;
213 __le64 c;
214 __le64 d;
215 } *u1;
216 u32 staterr;
217 int i = 0;
218
219 if (!netif_msg_hw(adapter))
220 return;
221
222 /* Print netdevice Info */
223 if (netdev) {
224 dev_info(&adapter->pdev->dev, "Net device Info\n");
225 pr_info("Device Name state trans_start\n");
226 pr_info("%-15s %016lX %016lX\n", netdev->name,
227 netdev->state, dev_trans_start(netdev));
228 }
229
230 /* Print Registers */
231 dev_info(&adapter->pdev->dev, "Register Dump\n");
232 pr_info(" Register Name Value\n");
233 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
234 reginfo->name; reginfo++) {
235 e1000_regdump(hw, reginfo);
236 }
237
238 /* Print Tx Ring Summary */
239 if (!netdev || !netif_running(netdev))
240 return;
241
242 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
243 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
244 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
245 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
246 0, tx_ring->next_to_use, tx_ring->next_to_clean,
247 (unsigned long long)buffer_info->dma,
248 buffer_info->length,
249 buffer_info->next_to_watch,
250 (unsigned long long)buffer_info->time_stamp);
251
252 /* Print Tx Ring */
253 if (!netif_msg_tx_done(adapter))
254 goto rx_ring_summary;
255
256 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
257
258 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
259 *
260 * Legacy Transmit Descriptor
261 * +--------------------------------------------------------------+
262 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
263 * +--------------------------------------------------------------+
264 * 8 | Special | CSS | Status | CMD | CSO | Length |
265 * +--------------------------------------------------------------+
266 * 63 48 47 36 35 32 31 24 23 16 15 0
267 *
268 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
269 * 63 48 47 40 39 32 31 16 15 8 7 0
270 * +----------------------------------------------------------------+
271 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
272 * +----------------------------------------------------------------+
273 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
274 * +----------------------------------------------------------------+
275 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
276 *
277 * Extended Data Descriptor (DTYP=0x1)
278 * +----------------------------------------------------------------+
279 * 0 | Buffer Address [63:0] |
280 * +----------------------------------------------------------------+
281 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
282 * +----------------------------------------------------------------+
283 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
284 */
285 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
286 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
287 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
288 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
289 const char *next_desc;
290 tx_desc = E1000_TX_DESC(*tx_ring, i);
291 buffer_info = &tx_ring->buffer_info[i];
292 u0 = (struct my_u0 *)tx_desc;
293 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
294 next_desc = " NTC/U";
295 else if (i == tx_ring->next_to_use)
296 next_desc = " NTU";
297 else if (i == tx_ring->next_to_clean)
298 next_desc = " NTC";
299 else
300 next_desc = "";
301 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
302 (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
303 ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
304 i,
305 (unsigned long long)le64_to_cpu(u0->a),
306 (unsigned long long)le64_to_cpu(u0->b),
307 (unsigned long long)buffer_info->dma,
308 buffer_info->length, buffer_info->next_to_watch,
309 (unsigned long long)buffer_info->time_stamp,
310 buffer_info->skb, next_desc);
311
312 if (netif_msg_pktdata(adapter) && buffer_info->skb)
313 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
314 16, 1, buffer_info->skb->data,
315 buffer_info->skb->len, true);
316 }
317
318 /* Print Rx Ring Summary */
319 rx_ring_summary:
320 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
321 pr_info("Queue [NTU] [NTC]\n");
322 pr_info(" %5d %5X %5X\n",
323 0, rx_ring->next_to_use, rx_ring->next_to_clean);
324
325 /* Print Rx Ring */
326 if (!netif_msg_rx_status(adapter))
327 return;
328
329 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
330 switch (adapter->rx_ps_pages) {
331 case 1:
332 case 2:
333 case 3:
334 /* [Extended] Packet Split Receive Descriptor Format
335 *
336 * +-----------------------------------------------------+
337 * 0 | Buffer Address 0 [63:0] |
338 * +-----------------------------------------------------+
339 * 8 | Buffer Address 1 [63:0] |
340 * +-----------------------------------------------------+
341 * 16 | Buffer Address 2 [63:0] |
342 * +-----------------------------------------------------+
343 * 24 | Buffer Address 3 [63:0] |
344 * +-----------------------------------------------------+
345 */
346 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
347 /* [Extended] Receive Descriptor (Write-Back) Format
348 *
349 * 63 48 47 32 31 13 12 8 7 4 3 0
350 * +------------------------------------------------------+
351 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
352 * | Checksum | Ident | | Queue | | Type |
353 * +------------------------------------------------------+
354 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
355 * +------------------------------------------------------+
356 * 63 48 47 32 31 20 19 0
357 */
358 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
359 for (i = 0; i < rx_ring->count; i++) {
360 const char *next_desc;
361 buffer_info = &rx_ring->buffer_info[i];
362 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
363 u1 = (struct my_u1 *)rx_desc_ps;
364 staterr =
365 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
366
367 if (i == rx_ring->next_to_use)
368 next_desc = " NTU";
369 else if (i == rx_ring->next_to_clean)
370 next_desc = " NTC";
371 else
372 next_desc = "";
373
374 if (staterr & E1000_RXD_STAT_DD) {
375 /* Descriptor Done */
376 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
377 "RWB", i,
378 (unsigned long long)le64_to_cpu(u1->a),
379 (unsigned long long)le64_to_cpu(u1->b),
380 (unsigned long long)le64_to_cpu(u1->c),
381 (unsigned long long)le64_to_cpu(u1->d),
382 buffer_info->skb, next_desc);
383 } else {
384 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
385 "R ", i,
386 (unsigned long long)le64_to_cpu(u1->a),
387 (unsigned long long)le64_to_cpu(u1->b),
388 (unsigned long long)le64_to_cpu(u1->c),
389 (unsigned long long)le64_to_cpu(u1->d),
390 (unsigned long long)buffer_info->dma,
391 buffer_info->skb, next_desc);
392
393 if (netif_msg_pktdata(adapter))
394 e1000e_dump_ps_pages(adapter,
395 buffer_info);
396 }
397 }
398 break;
399 default:
400 case 0:
401 /* Extended Receive Descriptor (Read) Format
402 *
403 * +-----------------------------------------------------+
404 * 0 | Buffer Address [63:0] |
405 * +-----------------------------------------------------+
406 * 8 | Reserved |
407 * +-----------------------------------------------------+
408 */
409 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
410 /* Extended Receive Descriptor (Write-Back) Format
411 *
412 * 63 48 47 32 31 24 23 4 3 0
413 * +------------------------------------------------------+
414 * | RSS Hash | | | |
415 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
416 * | Packet | IP | | | Type |
417 * | Checksum | Ident | | | |
418 * +------------------------------------------------------+
419 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
420 * +------------------------------------------------------+
421 * 63 48 47 32 31 20 19 0
422 */
423 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
424
425 for (i = 0; i < rx_ring->count; i++) {
426 const char *next_desc;
427
428 buffer_info = &rx_ring->buffer_info[i];
429 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
430 u1 = (struct my_u1 *)rx_desc;
431 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
432
433 if (i == rx_ring->next_to_use)
434 next_desc = " NTU";
435 else if (i == rx_ring->next_to_clean)
436 next_desc = " NTC";
437 else
438 next_desc = "";
439
440 if (staterr & E1000_RXD_STAT_DD) {
441 /* Descriptor Done */
442 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
443 "RWB", i,
444 (unsigned long long)le64_to_cpu(u1->a),
445 (unsigned long long)le64_to_cpu(u1->b),
446 buffer_info->skb, next_desc);
447 } else {
448 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
449 "R ", i,
450 (unsigned long long)le64_to_cpu(u1->a),
451 (unsigned long long)le64_to_cpu(u1->b),
452 (unsigned long long)buffer_info->dma,
453 buffer_info->skb, next_desc);
454
455 if (netif_msg_pktdata(adapter) &&
456 buffer_info->skb)
457 print_hex_dump(KERN_INFO, "",
458 DUMP_PREFIX_ADDRESS, 16,
459 1,
460 buffer_info->skb->data,
461 adapter->rx_buffer_len,
462 true);
463 }
464 }
465 }
466 }
467
468 /**
469 * e1000_desc_unused - calculate if we have unused descriptors
470 * @ring: pointer to ring struct to perform calculation on
471 **/
e1000_desc_unused(struct e1000_ring * ring)472 static int e1000_desc_unused(struct e1000_ring *ring)
473 {
474 if (ring->next_to_clean > ring->next_to_use)
475 return ring->next_to_clean - ring->next_to_use - 1;
476
477 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
478 }
479
480 /**
481 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
482 * @adapter: board private structure
483 * @hwtstamps: time stamp structure to update
484 * @systim: unsigned 64bit system time value.
485 *
486 * Convert the system time value stored in the RX/TXSTMP registers into a
487 * hwtstamp which can be used by the upper level time stamping functions.
488 *
489 * The 'systim_lock' spinlock is used to protect the consistency of the
490 * system time value. This is needed because reading the 64 bit time
491 * value involves reading two 32 bit registers. The first read latches the
492 * value.
493 **/
e1000e_systim_to_hwtstamp(struct e1000_adapter * adapter,struct skb_shared_hwtstamps * hwtstamps,u64 systim)494 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
495 struct skb_shared_hwtstamps *hwtstamps,
496 u64 systim)
497 {
498 u64 ns;
499 unsigned long flags;
500
501 spin_lock_irqsave(&adapter->systim_lock, flags);
502 ns = timecounter_cyc2time(&adapter->tc, systim);
503 spin_unlock_irqrestore(&adapter->systim_lock, flags);
504
505 memset(hwtstamps, 0, sizeof(*hwtstamps));
506 hwtstamps->hwtstamp = ns_to_ktime(ns);
507 }
508
509 /**
510 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
511 * @adapter: board private structure
512 * @status: descriptor extended error and status field
513 * @skb: particular skb to include time stamp
514 *
515 * If the time stamp is valid, convert it into the timecounter ns value
516 * and store that result into the shhwtstamps structure which is passed
517 * up the network stack.
518 **/
e1000e_rx_hwtstamp(struct e1000_adapter * adapter,u32 status,struct sk_buff * skb)519 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
520 struct sk_buff *skb)
521 {
522 struct e1000_hw *hw = &adapter->hw;
523 u64 rxstmp;
524
525 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
526 !(status & E1000_RXDEXT_STATERR_TST) ||
527 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
528 return;
529
530 /* The Rx time stamp registers contain the time stamp. No other
531 * received packet will be time stamped until the Rx time stamp
532 * registers are read. Because only one packet can be time stamped
533 * at a time, the register values must belong to this packet and
534 * therefore none of the other additional attributes need to be
535 * compared.
536 */
537 rxstmp = (u64)er32(RXSTMPL);
538 rxstmp |= (u64)er32(RXSTMPH) << 32;
539 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
540
541 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
542 }
543
544 /**
545 * e1000_receive_skb - helper function to handle Rx indications
546 * @adapter: board private structure
547 * @netdev: pointer to netdev struct
548 * @staterr: descriptor extended error and status field as written by hardware
549 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
550 * @skb: pointer to sk_buff to be indicated to stack
551 **/
e1000_receive_skb(struct e1000_adapter * adapter,struct net_device * netdev,struct sk_buff * skb,u32 staterr,__le16 vlan)552 static void e1000_receive_skb(struct e1000_adapter *adapter,
553 struct net_device *netdev, struct sk_buff *skb,
554 u32 staterr, __le16 vlan)
555 {
556 u16 tag = le16_to_cpu(vlan);
557
558 e1000e_rx_hwtstamp(adapter, staterr, skb);
559
560 skb->protocol = eth_type_trans(skb, netdev);
561
562 if (staterr & E1000_RXD_STAT_VP)
563 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
564
565 napi_gro_receive(&adapter->napi, skb);
566 }
567
568 /**
569 * e1000_rx_checksum - Receive Checksum Offload
570 * @adapter: board private structure
571 * @status_err: receive descriptor status and error fields
572 * @skb: socket buffer with received data
573 **/
e1000_rx_checksum(struct e1000_adapter * adapter,u32 status_err,struct sk_buff * skb)574 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
575 struct sk_buff *skb)
576 {
577 u16 status = (u16)status_err;
578 u8 errors = (u8)(status_err >> 24);
579
580 skb_checksum_none_assert(skb);
581
582 /* Rx checksum disabled */
583 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
584 return;
585
586 /* Ignore Checksum bit is set */
587 if (status & E1000_RXD_STAT_IXSM)
588 return;
589
590 /* TCP/UDP checksum error bit or IP checksum error bit is set */
591 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
592 /* let the stack verify checksum errors */
593 adapter->hw_csum_err++;
594 return;
595 }
596
597 /* TCP/UDP Checksum has not been calculated */
598 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
599 return;
600
601 /* It must be a TCP or UDP packet with a valid checksum */
602 skb->ip_summed = CHECKSUM_UNNECESSARY;
603 adapter->hw_csum_good++;
604 }
605
e1000e_update_rdt_wa(struct e1000_ring * rx_ring,unsigned int i)606 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
607 {
608 struct e1000_adapter *adapter = rx_ring->adapter;
609 struct e1000_hw *hw = &adapter->hw;
610
611 __ew32_prepare(hw);
612 writel(i, rx_ring->tail);
613
614 if (unlikely(i != readl(rx_ring->tail))) {
615 u32 rctl = er32(RCTL);
616
617 ew32(RCTL, rctl & ~E1000_RCTL_EN);
618 e_err("ME firmware caused invalid RDT - resetting\n");
619 schedule_work(&adapter->reset_task);
620 }
621 }
622
e1000e_update_tdt_wa(struct e1000_ring * tx_ring,unsigned int i)623 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
624 {
625 struct e1000_adapter *adapter = tx_ring->adapter;
626 struct e1000_hw *hw = &adapter->hw;
627
628 __ew32_prepare(hw);
629 writel(i, tx_ring->tail);
630
631 if (unlikely(i != readl(tx_ring->tail))) {
632 u32 tctl = er32(TCTL);
633
634 ew32(TCTL, tctl & ~E1000_TCTL_EN);
635 e_err("ME firmware caused invalid TDT - resetting\n");
636 schedule_work(&adapter->reset_task);
637 }
638 }
639
640 /**
641 * e1000_alloc_rx_buffers - Replace used receive buffers
642 * @rx_ring: Rx descriptor ring
643 * @cleaned_count: number to reallocate
644 * @gfp: flags for allocation
645 **/
e1000_alloc_rx_buffers(struct e1000_ring * rx_ring,int cleaned_count,gfp_t gfp)646 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
647 int cleaned_count, gfp_t gfp)
648 {
649 struct e1000_adapter *adapter = rx_ring->adapter;
650 struct net_device *netdev = adapter->netdev;
651 struct pci_dev *pdev = adapter->pdev;
652 union e1000_rx_desc_extended *rx_desc;
653 struct e1000_buffer *buffer_info;
654 struct sk_buff *skb;
655 unsigned int i;
656 unsigned int bufsz = adapter->rx_buffer_len;
657
658 i = rx_ring->next_to_use;
659 buffer_info = &rx_ring->buffer_info[i];
660
661 while (cleaned_count--) {
662 skb = buffer_info->skb;
663 if (skb) {
664 skb_trim(skb, 0);
665 goto map_skb;
666 }
667
668 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
669 if (!skb) {
670 /* Better luck next round */
671 adapter->alloc_rx_buff_failed++;
672 break;
673 }
674
675 buffer_info->skb = skb;
676 map_skb:
677 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
678 adapter->rx_buffer_len,
679 DMA_FROM_DEVICE);
680 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
681 dev_err(&pdev->dev, "Rx DMA map failed\n");
682 adapter->rx_dma_failed++;
683 break;
684 }
685
686 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
687 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
688
689 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
690 /* Force memory writes to complete before letting h/w
691 * know there are new descriptors to fetch. (Only
692 * applicable for weak-ordered memory model archs,
693 * such as IA-64).
694 */
695 wmb();
696 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
697 e1000e_update_rdt_wa(rx_ring, i);
698 else
699 writel(i, rx_ring->tail);
700 }
701 i++;
702 if (i == rx_ring->count)
703 i = 0;
704 buffer_info = &rx_ring->buffer_info[i];
705 }
706
707 rx_ring->next_to_use = i;
708 }
709
710 /**
711 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
712 * @rx_ring: Rx descriptor ring
713 * @cleaned_count: number to reallocate
714 * @gfp: flags for allocation
715 **/
e1000_alloc_rx_buffers_ps(struct e1000_ring * rx_ring,int cleaned_count,gfp_t gfp)716 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
717 int cleaned_count, gfp_t gfp)
718 {
719 struct e1000_adapter *adapter = rx_ring->adapter;
720 struct net_device *netdev = adapter->netdev;
721 struct pci_dev *pdev = adapter->pdev;
722 union e1000_rx_desc_packet_split *rx_desc;
723 struct e1000_buffer *buffer_info;
724 struct e1000_ps_page *ps_page;
725 struct sk_buff *skb;
726 unsigned int i, j;
727
728 i = rx_ring->next_to_use;
729 buffer_info = &rx_ring->buffer_info[i];
730
731 while (cleaned_count--) {
732 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
733
734 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
735 ps_page = &buffer_info->ps_pages[j];
736 if (j >= adapter->rx_ps_pages) {
737 /* all unused desc entries get hw null ptr */
738 rx_desc->read.buffer_addr[j + 1] =
739 ~cpu_to_le64(0);
740 continue;
741 }
742 if (!ps_page->page) {
743 ps_page->page = alloc_page(gfp);
744 if (!ps_page->page) {
745 adapter->alloc_rx_buff_failed++;
746 goto no_buffers;
747 }
748 ps_page->dma = dma_map_page(&pdev->dev,
749 ps_page->page,
750 0, PAGE_SIZE,
751 DMA_FROM_DEVICE);
752 if (dma_mapping_error(&pdev->dev,
753 ps_page->dma)) {
754 dev_err(&adapter->pdev->dev,
755 "Rx DMA page map failed\n");
756 adapter->rx_dma_failed++;
757 goto no_buffers;
758 }
759 }
760 /* Refresh the desc even if buffer_addrs
761 * didn't change because each write-back
762 * erases this info.
763 */
764 rx_desc->read.buffer_addr[j + 1] =
765 cpu_to_le64(ps_page->dma);
766 }
767
768 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
769 gfp);
770
771 if (!skb) {
772 adapter->alloc_rx_buff_failed++;
773 break;
774 }
775
776 buffer_info->skb = skb;
777 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
778 adapter->rx_ps_bsize0,
779 DMA_FROM_DEVICE);
780 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
781 dev_err(&pdev->dev, "Rx DMA map failed\n");
782 adapter->rx_dma_failed++;
783 /* cleanup skb */
784 dev_kfree_skb_any(skb);
785 buffer_info->skb = NULL;
786 break;
787 }
788
789 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
790
791 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
792 /* Force memory writes to complete before letting h/w
793 * know there are new descriptors to fetch. (Only
794 * applicable for weak-ordered memory model archs,
795 * such as IA-64).
796 */
797 wmb();
798 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
799 e1000e_update_rdt_wa(rx_ring, i << 1);
800 else
801 writel(i << 1, rx_ring->tail);
802 }
803
804 i++;
805 if (i == rx_ring->count)
806 i = 0;
807 buffer_info = &rx_ring->buffer_info[i];
808 }
809
810 no_buffers:
811 rx_ring->next_to_use = i;
812 }
813
814 /**
815 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
816 * @rx_ring: Rx descriptor ring
817 * @cleaned_count: number of buffers to allocate this pass
818 * @gfp: flags for allocation
819 **/
820
e1000_alloc_jumbo_rx_buffers(struct e1000_ring * rx_ring,int cleaned_count,gfp_t gfp)821 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
822 int cleaned_count, gfp_t gfp)
823 {
824 struct e1000_adapter *adapter = rx_ring->adapter;
825 struct net_device *netdev = adapter->netdev;
826 struct pci_dev *pdev = adapter->pdev;
827 union e1000_rx_desc_extended *rx_desc;
828 struct e1000_buffer *buffer_info;
829 struct sk_buff *skb;
830 unsigned int i;
831 unsigned int bufsz = 256 - 16; /* for skb_reserve */
832
833 i = rx_ring->next_to_use;
834 buffer_info = &rx_ring->buffer_info[i];
835
836 while (cleaned_count--) {
837 skb = buffer_info->skb;
838 if (skb) {
839 skb_trim(skb, 0);
840 goto check_page;
841 }
842
843 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
844 if (unlikely(!skb)) {
845 /* Better luck next round */
846 adapter->alloc_rx_buff_failed++;
847 break;
848 }
849
850 buffer_info->skb = skb;
851 check_page:
852 /* allocate a new page if necessary */
853 if (!buffer_info->page) {
854 buffer_info->page = alloc_page(gfp);
855 if (unlikely(!buffer_info->page)) {
856 adapter->alloc_rx_buff_failed++;
857 break;
858 }
859 }
860
861 if (!buffer_info->dma) {
862 buffer_info->dma = dma_map_page(&pdev->dev,
863 buffer_info->page, 0,
864 PAGE_SIZE,
865 DMA_FROM_DEVICE);
866 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
867 adapter->alloc_rx_buff_failed++;
868 break;
869 }
870 }
871
872 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
873 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
874
875 if (unlikely(++i == rx_ring->count))
876 i = 0;
877 buffer_info = &rx_ring->buffer_info[i];
878 }
879
880 if (likely(rx_ring->next_to_use != i)) {
881 rx_ring->next_to_use = i;
882 if (unlikely(i-- == 0))
883 i = (rx_ring->count - 1);
884
885 /* Force memory writes to complete before letting h/w
886 * know there are new descriptors to fetch. (Only
887 * applicable for weak-ordered memory model archs,
888 * such as IA-64).
889 */
890 wmb();
891 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
892 e1000e_update_rdt_wa(rx_ring, i);
893 else
894 writel(i, rx_ring->tail);
895 }
896 }
897
e1000_rx_hash(struct net_device * netdev,__le32 rss,struct sk_buff * skb)898 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
899 struct sk_buff *skb)
900 {
901 if (netdev->features & NETIF_F_RXHASH)
902 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
903 }
904
905 /**
906 * e1000_clean_rx_irq - Send received data up the network stack
907 * @rx_ring: Rx descriptor ring
908 * @work_done: output parameter for indicating completed work
909 * @work_to_do: how many packets we can clean
910 *
911 * the return value indicates whether actual cleaning was done, there
912 * is no guarantee that everything was cleaned
913 **/
e1000_clean_rx_irq(struct e1000_ring * rx_ring,int * work_done,int work_to_do)914 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
915 int work_to_do)
916 {
917 struct e1000_adapter *adapter = rx_ring->adapter;
918 struct net_device *netdev = adapter->netdev;
919 struct pci_dev *pdev = adapter->pdev;
920 struct e1000_hw *hw = &adapter->hw;
921 union e1000_rx_desc_extended *rx_desc, *next_rxd;
922 struct e1000_buffer *buffer_info, *next_buffer;
923 u32 length, staterr;
924 unsigned int i;
925 int cleaned_count = 0;
926 bool cleaned = false;
927 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
928
929 i = rx_ring->next_to_clean;
930 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
931 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
932 buffer_info = &rx_ring->buffer_info[i];
933
934 while (staterr & E1000_RXD_STAT_DD) {
935 struct sk_buff *skb;
936
937 if (*work_done >= work_to_do)
938 break;
939 (*work_done)++;
940 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
941
942 skb = buffer_info->skb;
943 buffer_info->skb = NULL;
944
945 prefetch(skb->data - NET_IP_ALIGN);
946
947 i++;
948 if (i == rx_ring->count)
949 i = 0;
950 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
951 prefetch(next_rxd);
952
953 next_buffer = &rx_ring->buffer_info[i];
954
955 cleaned = true;
956 cleaned_count++;
957 dma_unmap_single(&pdev->dev, buffer_info->dma,
958 adapter->rx_buffer_len, DMA_FROM_DEVICE);
959 buffer_info->dma = 0;
960
961 length = le16_to_cpu(rx_desc->wb.upper.length);
962
963 /* !EOP means multiple descriptors were used to store a single
964 * packet, if that's the case we need to toss it. In fact, we
965 * need to toss every packet with the EOP bit clear and the
966 * next frame that _does_ have the EOP bit set, as it is by
967 * definition only a frame fragment
968 */
969 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
970 adapter->flags2 |= FLAG2_IS_DISCARDING;
971
972 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
973 /* All receives must fit into a single buffer */
974 e_dbg("Receive packet consumed multiple buffers\n");
975 /* recycle */
976 buffer_info->skb = skb;
977 if (staterr & E1000_RXD_STAT_EOP)
978 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
979 goto next_desc;
980 }
981
982 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
983 !(netdev->features & NETIF_F_RXALL))) {
984 /* recycle */
985 buffer_info->skb = skb;
986 goto next_desc;
987 }
988
989 /* adjust length to remove Ethernet CRC */
990 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
991 /* If configured to store CRC, don't subtract FCS,
992 * but keep the FCS bytes out of the total_rx_bytes
993 * counter
994 */
995 if (netdev->features & NETIF_F_RXFCS)
996 total_rx_bytes -= 4;
997 else
998 length -= 4;
999 }
1000
1001 total_rx_bytes += length;
1002 total_rx_packets++;
1003
1004 /* code added for copybreak, this should improve
1005 * performance for small packets with large amounts
1006 * of reassembly being done in the stack
1007 */
1008 if (length < copybreak) {
1009 struct sk_buff *new_skb =
1010 napi_alloc_skb(&adapter->napi, length);
1011 if (new_skb) {
1012 skb_copy_to_linear_data_offset(new_skb,
1013 -NET_IP_ALIGN,
1014 (skb->data -
1015 NET_IP_ALIGN),
1016 (length +
1017 NET_IP_ALIGN));
1018 /* save the skb in buffer_info as good */
1019 buffer_info->skb = skb;
1020 skb = new_skb;
1021 }
1022 /* else just continue with the old one */
1023 }
1024 /* end copybreak code */
1025 skb_put(skb, length);
1026
1027 /* Receive Checksum Offload */
1028 e1000_rx_checksum(adapter, staterr, skb);
1029
1030 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1031
1032 e1000_receive_skb(adapter, netdev, skb, staterr,
1033 rx_desc->wb.upper.vlan);
1034
1035 next_desc:
1036 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1037
1038 /* return some buffers to hardware, one at a time is too slow */
1039 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1040 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1041 GFP_ATOMIC);
1042 cleaned_count = 0;
1043 }
1044
1045 /* use prefetched values */
1046 rx_desc = next_rxd;
1047 buffer_info = next_buffer;
1048
1049 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1050 }
1051 rx_ring->next_to_clean = i;
1052
1053 cleaned_count = e1000_desc_unused(rx_ring);
1054 if (cleaned_count)
1055 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1056
1057 adapter->total_rx_bytes += total_rx_bytes;
1058 adapter->total_rx_packets += total_rx_packets;
1059 return cleaned;
1060 }
1061
e1000_put_txbuf(struct e1000_ring * tx_ring,struct e1000_buffer * buffer_info,bool drop)1062 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1063 struct e1000_buffer *buffer_info,
1064 bool drop)
1065 {
1066 struct e1000_adapter *adapter = tx_ring->adapter;
1067
1068 if (buffer_info->dma) {
1069 if (buffer_info->mapped_as_page)
1070 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1071 buffer_info->length, DMA_TO_DEVICE);
1072 else
1073 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1074 buffer_info->length, DMA_TO_DEVICE);
1075 buffer_info->dma = 0;
1076 }
1077 if (buffer_info->skb) {
1078 if (drop)
1079 dev_kfree_skb_any(buffer_info->skb);
1080 else
1081 dev_consume_skb_any(buffer_info->skb);
1082 buffer_info->skb = NULL;
1083 }
1084 buffer_info->time_stamp = 0;
1085 }
1086
e1000_print_hw_hang(struct work_struct * work)1087 static void e1000_print_hw_hang(struct work_struct *work)
1088 {
1089 struct e1000_adapter *adapter = container_of(work,
1090 struct e1000_adapter,
1091 print_hang_task);
1092 struct net_device *netdev = adapter->netdev;
1093 struct e1000_ring *tx_ring = adapter->tx_ring;
1094 unsigned int i = tx_ring->next_to_clean;
1095 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1096 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1097 struct e1000_hw *hw = &adapter->hw;
1098 u16 phy_status, phy_1000t_status, phy_ext_status;
1099 u16 pci_status;
1100
1101 if (test_bit(__E1000_DOWN, &adapter->state))
1102 return;
1103
1104 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1105 /* May be block on write-back, flush and detect again
1106 * flush pending descriptor writebacks to memory
1107 */
1108 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1109 /* execute the writes immediately */
1110 e1e_flush();
1111 /* Due to rare timing issues, write to TIDV again to ensure
1112 * the write is successful
1113 */
1114 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1115 /* execute the writes immediately */
1116 e1e_flush();
1117 adapter->tx_hang_recheck = true;
1118 return;
1119 }
1120 adapter->tx_hang_recheck = false;
1121
1122 if (er32(TDH(0)) == er32(TDT(0))) {
1123 e_dbg("false hang detected, ignoring\n");
1124 return;
1125 }
1126
1127 /* Real hang detected */
1128 netif_stop_queue(netdev);
1129
1130 e1e_rphy(hw, MII_BMSR, &phy_status);
1131 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1132 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1133
1134 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1135
1136 /* detected Hardware unit hang */
1137 e_err("Detected Hardware Unit Hang:\n"
1138 " TDH <%x>\n"
1139 " TDT <%x>\n"
1140 " next_to_use <%x>\n"
1141 " next_to_clean <%x>\n"
1142 "buffer_info[next_to_clean]:\n"
1143 " time_stamp <%lx>\n"
1144 " next_to_watch <%x>\n"
1145 " jiffies <%lx>\n"
1146 " next_to_watch.status <%x>\n"
1147 "MAC Status <%x>\n"
1148 "PHY Status <%x>\n"
1149 "PHY 1000BASE-T Status <%x>\n"
1150 "PHY Extended Status <%x>\n"
1151 "PCI Status <%x>\n",
1152 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1153 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1154 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1155 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1156
1157 e1000e_dump(adapter);
1158
1159 /* Suggest workaround for known h/w issue */
1160 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1161 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1162 }
1163
1164 /**
1165 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1166 * @work: pointer to work struct
1167 *
1168 * This work function polls the TSYNCTXCTL valid bit to determine when a
1169 * timestamp has been taken for the current stored skb. The timestamp must
1170 * be for this skb because only one such packet is allowed in the queue.
1171 */
e1000e_tx_hwtstamp_work(struct work_struct * work)1172 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1173 {
1174 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1175 tx_hwtstamp_work);
1176 struct e1000_hw *hw = &adapter->hw;
1177
1178 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1179 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1180 struct skb_shared_hwtstamps shhwtstamps;
1181 u64 txstmp;
1182
1183 txstmp = er32(TXSTMPL);
1184 txstmp |= (u64)er32(TXSTMPH) << 32;
1185
1186 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1187
1188 /* Clear the global tx_hwtstamp_skb pointer and force writes
1189 * prior to notifying the stack of a Tx timestamp.
1190 */
1191 adapter->tx_hwtstamp_skb = NULL;
1192 wmb(); /* force write prior to skb_tstamp_tx */
1193
1194 skb_tstamp_tx(skb, &shhwtstamps);
1195 dev_consume_skb_any(skb);
1196 } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1197 + adapter->tx_timeout_factor * HZ)) {
1198 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1199 adapter->tx_hwtstamp_skb = NULL;
1200 adapter->tx_hwtstamp_timeouts++;
1201 e_warn("clearing Tx timestamp hang\n");
1202 } else {
1203 /* reschedule to check later */
1204 schedule_work(&adapter->tx_hwtstamp_work);
1205 }
1206 }
1207
1208 /**
1209 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1210 * @tx_ring: Tx descriptor ring
1211 *
1212 * the return value indicates whether actual cleaning was done, there
1213 * is no guarantee that everything was cleaned
1214 **/
e1000_clean_tx_irq(struct e1000_ring * tx_ring)1215 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1216 {
1217 struct e1000_adapter *adapter = tx_ring->adapter;
1218 struct net_device *netdev = adapter->netdev;
1219 struct e1000_hw *hw = &adapter->hw;
1220 struct e1000_tx_desc *tx_desc, *eop_desc;
1221 struct e1000_buffer *buffer_info;
1222 unsigned int i, eop;
1223 unsigned int count = 0;
1224 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1225 unsigned int bytes_compl = 0, pkts_compl = 0;
1226
1227 i = tx_ring->next_to_clean;
1228 eop = tx_ring->buffer_info[i].next_to_watch;
1229 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1230
1231 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1232 (count < tx_ring->count)) {
1233 bool cleaned = false;
1234
1235 dma_rmb(); /* read buffer_info after eop_desc */
1236 for (; !cleaned; count++) {
1237 tx_desc = E1000_TX_DESC(*tx_ring, i);
1238 buffer_info = &tx_ring->buffer_info[i];
1239 cleaned = (i == eop);
1240
1241 if (cleaned) {
1242 total_tx_packets += buffer_info->segs;
1243 total_tx_bytes += buffer_info->bytecount;
1244 if (buffer_info->skb) {
1245 bytes_compl += buffer_info->skb->len;
1246 pkts_compl++;
1247 }
1248 }
1249
1250 e1000_put_txbuf(tx_ring, buffer_info, false);
1251 tx_desc->upper.data = 0;
1252
1253 i++;
1254 if (i == tx_ring->count)
1255 i = 0;
1256 }
1257
1258 if (i == tx_ring->next_to_use)
1259 break;
1260 eop = tx_ring->buffer_info[i].next_to_watch;
1261 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1262 }
1263
1264 tx_ring->next_to_clean = i;
1265
1266 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1267
1268 #define TX_WAKE_THRESHOLD 32
1269 if (count && netif_carrier_ok(netdev) &&
1270 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1271 /* Make sure that anybody stopping the queue after this
1272 * sees the new next_to_clean.
1273 */
1274 smp_mb();
1275
1276 if (netif_queue_stopped(netdev) &&
1277 !(test_bit(__E1000_DOWN, &adapter->state))) {
1278 netif_wake_queue(netdev);
1279 ++adapter->restart_queue;
1280 }
1281 }
1282
1283 if (adapter->detect_tx_hung) {
1284 /* Detect a transmit hang in hardware, this serializes the
1285 * check with the clearing of time_stamp and movement of i
1286 */
1287 adapter->detect_tx_hung = false;
1288 if (tx_ring->buffer_info[i].time_stamp &&
1289 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1290 + (adapter->tx_timeout_factor * HZ)) &&
1291 !(er32(STATUS) & E1000_STATUS_TXOFF))
1292 schedule_work(&adapter->print_hang_task);
1293 else
1294 adapter->tx_hang_recheck = false;
1295 }
1296 adapter->total_tx_bytes += total_tx_bytes;
1297 adapter->total_tx_packets += total_tx_packets;
1298 return count < tx_ring->count;
1299 }
1300
1301 /**
1302 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1303 * @rx_ring: Rx descriptor ring
1304 * @work_done: output parameter for indicating completed work
1305 * @work_to_do: how many packets we can clean
1306 *
1307 * the return value indicates whether actual cleaning was done, there
1308 * is no guarantee that everything was cleaned
1309 **/
e1000_clean_rx_irq_ps(struct e1000_ring * rx_ring,int * work_done,int work_to_do)1310 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1311 int work_to_do)
1312 {
1313 struct e1000_adapter *adapter = rx_ring->adapter;
1314 struct e1000_hw *hw = &adapter->hw;
1315 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1316 struct net_device *netdev = adapter->netdev;
1317 struct pci_dev *pdev = adapter->pdev;
1318 struct e1000_buffer *buffer_info, *next_buffer;
1319 struct e1000_ps_page *ps_page;
1320 struct sk_buff *skb;
1321 unsigned int i, j;
1322 u32 length, staterr;
1323 int cleaned_count = 0;
1324 bool cleaned = false;
1325 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1326
1327 i = rx_ring->next_to_clean;
1328 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1329 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1330 buffer_info = &rx_ring->buffer_info[i];
1331
1332 while (staterr & E1000_RXD_STAT_DD) {
1333 if (*work_done >= work_to_do)
1334 break;
1335 (*work_done)++;
1336 skb = buffer_info->skb;
1337 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1338
1339 /* in the packet split case this is header only */
1340 prefetch(skb->data - NET_IP_ALIGN);
1341
1342 i++;
1343 if (i == rx_ring->count)
1344 i = 0;
1345 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1346 prefetch(next_rxd);
1347
1348 next_buffer = &rx_ring->buffer_info[i];
1349
1350 cleaned = true;
1351 cleaned_count++;
1352 dma_unmap_single(&pdev->dev, buffer_info->dma,
1353 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1354 buffer_info->dma = 0;
1355
1356 /* see !EOP comment in other Rx routine */
1357 if (!(staterr & E1000_RXD_STAT_EOP))
1358 adapter->flags2 |= FLAG2_IS_DISCARDING;
1359
1360 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1361 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1362 dev_kfree_skb_irq(skb);
1363 if (staterr & E1000_RXD_STAT_EOP)
1364 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1365 goto next_desc;
1366 }
1367
1368 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1369 !(netdev->features & NETIF_F_RXALL))) {
1370 dev_kfree_skb_irq(skb);
1371 goto next_desc;
1372 }
1373
1374 length = le16_to_cpu(rx_desc->wb.middle.length0);
1375
1376 if (!length) {
1377 e_dbg("Last part of the packet spanning multiple descriptors\n");
1378 dev_kfree_skb_irq(skb);
1379 goto next_desc;
1380 }
1381
1382 /* Good Receive */
1383 skb_put(skb, length);
1384
1385 {
1386 /* this looks ugly, but it seems compiler issues make
1387 * it more efficient than reusing j
1388 */
1389 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1390
1391 /* page alloc/put takes too long and effects small
1392 * packet throughput, so unsplit small packets and
1393 * save the alloc/put
1394 */
1395 if (l1 && (l1 <= copybreak) &&
1396 ((length + l1) <= adapter->rx_ps_bsize0)) {
1397 ps_page = &buffer_info->ps_pages[0];
1398
1399 dma_sync_single_for_cpu(&pdev->dev,
1400 ps_page->dma,
1401 PAGE_SIZE,
1402 DMA_FROM_DEVICE);
1403 memcpy(skb_tail_pointer(skb),
1404 page_address(ps_page->page), l1);
1405 dma_sync_single_for_device(&pdev->dev,
1406 ps_page->dma,
1407 PAGE_SIZE,
1408 DMA_FROM_DEVICE);
1409
1410 /* remove the CRC */
1411 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1412 if (!(netdev->features & NETIF_F_RXFCS))
1413 l1 -= 4;
1414 }
1415
1416 skb_put(skb, l1);
1417 goto copydone;
1418 } /* if */
1419 }
1420
1421 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1422 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1423 if (!length)
1424 break;
1425
1426 ps_page = &buffer_info->ps_pages[j];
1427 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1428 DMA_FROM_DEVICE);
1429 ps_page->dma = 0;
1430 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1431 ps_page->page = NULL;
1432 skb->len += length;
1433 skb->data_len += length;
1434 skb->truesize += PAGE_SIZE;
1435 }
1436
1437 /* strip the ethernet crc, problem is we're using pages now so
1438 * this whole operation can get a little cpu intensive
1439 */
1440 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1441 if (!(netdev->features & NETIF_F_RXFCS))
1442 pskb_trim(skb, skb->len - 4);
1443 }
1444
1445 copydone:
1446 total_rx_bytes += skb->len;
1447 total_rx_packets++;
1448
1449 e1000_rx_checksum(adapter, staterr, skb);
1450
1451 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1452
1453 if (rx_desc->wb.upper.header_status &
1454 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1455 adapter->rx_hdr_split++;
1456
1457 e1000_receive_skb(adapter, netdev, skb, staterr,
1458 rx_desc->wb.middle.vlan);
1459
1460 next_desc:
1461 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1462 buffer_info->skb = NULL;
1463
1464 /* return some buffers to hardware, one at a time is too slow */
1465 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1466 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1467 GFP_ATOMIC);
1468 cleaned_count = 0;
1469 }
1470
1471 /* use prefetched values */
1472 rx_desc = next_rxd;
1473 buffer_info = next_buffer;
1474
1475 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1476 }
1477 rx_ring->next_to_clean = i;
1478
1479 cleaned_count = e1000_desc_unused(rx_ring);
1480 if (cleaned_count)
1481 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1482
1483 adapter->total_rx_bytes += total_rx_bytes;
1484 adapter->total_rx_packets += total_rx_packets;
1485 return cleaned;
1486 }
1487
e1000_consume_page(struct e1000_buffer * bi,struct sk_buff * skb,u16 length)1488 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1489 u16 length)
1490 {
1491 bi->page = NULL;
1492 skb->len += length;
1493 skb->data_len += length;
1494 skb->truesize += PAGE_SIZE;
1495 }
1496
1497 /**
1498 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1499 * @rx_ring: Rx descriptor ring
1500 * @work_done: output parameter for indicating completed work
1501 * @work_to_do: how many packets we can clean
1502 *
1503 * the return value indicates whether actual cleaning was done, there
1504 * is no guarantee that everything was cleaned
1505 **/
e1000_clean_jumbo_rx_irq(struct e1000_ring * rx_ring,int * work_done,int work_to_do)1506 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1507 int work_to_do)
1508 {
1509 struct e1000_adapter *adapter = rx_ring->adapter;
1510 struct net_device *netdev = adapter->netdev;
1511 struct pci_dev *pdev = adapter->pdev;
1512 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1513 struct e1000_buffer *buffer_info, *next_buffer;
1514 u32 length, staterr;
1515 unsigned int i;
1516 int cleaned_count = 0;
1517 bool cleaned = false;
1518 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1519 struct skb_shared_info *shinfo;
1520
1521 i = rx_ring->next_to_clean;
1522 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1523 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1524 buffer_info = &rx_ring->buffer_info[i];
1525
1526 while (staterr & E1000_RXD_STAT_DD) {
1527 struct sk_buff *skb;
1528
1529 if (*work_done >= work_to_do)
1530 break;
1531 (*work_done)++;
1532 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1533
1534 skb = buffer_info->skb;
1535 buffer_info->skb = NULL;
1536
1537 ++i;
1538 if (i == rx_ring->count)
1539 i = 0;
1540 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1541 prefetch(next_rxd);
1542
1543 next_buffer = &rx_ring->buffer_info[i];
1544
1545 cleaned = true;
1546 cleaned_count++;
1547 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1548 DMA_FROM_DEVICE);
1549 buffer_info->dma = 0;
1550
1551 length = le16_to_cpu(rx_desc->wb.upper.length);
1552
1553 /* errors is only valid for DD + EOP descriptors */
1554 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1555 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1556 !(netdev->features & NETIF_F_RXALL)))) {
1557 /* recycle both page and skb */
1558 buffer_info->skb = skb;
1559 /* an error means any chain goes out the window too */
1560 if (rx_ring->rx_skb_top)
1561 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1562 rx_ring->rx_skb_top = NULL;
1563 goto next_desc;
1564 }
1565 #define rxtop (rx_ring->rx_skb_top)
1566 if (!(staterr & E1000_RXD_STAT_EOP)) {
1567 /* this descriptor is only the beginning (or middle) */
1568 if (!rxtop) {
1569 /* this is the beginning of a chain */
1570 rxtop = skb;
1571 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1572 0, length);
1573 } else {
1574 /* this is the middle of a chain */
1575 shinfo = skb_shinfo(rxtop);
1576 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1577 buffer_info->page, 0,
1578 length);
1579 /* re-use the skb, only consumed the page */
1580 buffer_info->skb = skb;
1581 }
1582 e1000_consume_page(buffer_info, rxtop, length);
1583 goto next_desc;
1584 } else {
1585 if (rxtop) {
1586 /* end of the chain */
1587 shinfo = skb_shinfo(rxtop);
1588 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1589 buffer_info->page, 0,
1590 length);
1591 /* re-use the current skb, we only consumed the
1592 * page
1593 */
1594 buffer_info->skb = skb;
1595 skb = rxtop;
1596 rxtop = NULL;
1597 e1000_consume_page(buffer_info, skb, length);
1598 } else {
1599 /* no chain, got EOP, this buf is the packet
1600 * copybreak to save the put_page/alloc_page
1601 */
1602 if (length <= copybreak &&
1603 skb_tailroom(skb) >= length) {
1604 memcpy(skb_tail_pointer(skb),
1605 page_address(buffer_info->page),
1606 length);
1607 /* re-use the page, so don't erase
1608 * buffer_info->page
1609 */
1610 skb_put(skb, length);
1611 } else {
1612 skb_fill_page_desc(skb, 0,
1613 buffer_info->page, 0,
1614 length);
1615 e1000_consume_page(buffer_info, skb,
1616 length);
1617 }
1618 }
1619 }
1620
1621 /* Receive Checksum Offload */
1622 e1000_rx_checksum(adapter, staterr, skb);
1623
1624 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1625
1626 /* probably a little skewed due to removing CRC */
1627 total_rx_bytes += skb->len;
1628 total_rx_packets++;
1629
1630 /* eth type trans needs skb->data to point to something */
1631 if (!pskb_may_pull(skb, ETH_HLEN)) {
1632 e_err("pskb_may_pull failed.\n");
1633 dev_kfree_skb_irq(skb);
1634 goto next_desc;
1635 }
1636
1637 e1000_receive_skb(adapter, netdev, skb, staterr,
1638 rx_desc->wb.upper.vlan);
1639
1640 next_desc:
1641 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1642
1643 /* return some buffers to hardware, one at a time is too slow */
1644 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1645 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1646 GFP_ATOMIC);
1647 cleaned_count = 0;
1648 }
1649
1650 /* use prefetched values */
1651 rx_desc = next_rxd;
1652 buffer_info = next_buffer;
1653
1654 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1655 }
1656 rx_ring->next_to_clean = i;
1657
1658 cleaned_count = e1000_desc_unused(rx_ring);
1659 if (cleaned_count)
1660 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1661
1662 adapter->total_rx_bytes += total_rx_bytes;
1663 adapter->total_rx_packets += total_rx_packets;
1664 return cleaned;
1665 }
1666
1667 /**
1668 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1669 * @rx_ring: Rx descriptor ring
1670 **/
e1000_clean_rx_ring(struct e1000_ring * rx_ring)1671 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1672 {
1673 struct e1000_adapter *adapter = rx_ring->adapter;
1674 struct e1000_buffer *buffer_info;
1675 struct e1000_ps_page *ps_page;
1676 struct pci_dev *pdev = adapter->pdev;
1677 unsigned int i, j;
1678
1679 /* Free all the Rx ring sk_buffs */
1680 for (i = 0; i < rx_ring->count; i++) {
1681 buffer_info = &rx_ring->buffer_info[i];
1682 if (buffer_info->dma) {
1683 if (adapter->clean_rx == e1000_clean_rx_irq)
1684 dma_unmap_single(&pdev->dev, buffer_info->dma,
1685 adapter->rx_buffer_len,
1686 DMA_FROM_DEVICE);
1687 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1688 dma_unmap_page(&pdev->dev, buffer_info->dma,
1689 PAGE_SIZE, DMA_FROM_DEVICE);
1690 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1691 dma_unmap_single(&pdev->dev, buffer_info->dma,
1692 adapter->rx_ps_bsize0,
1693 DMA_FROM_DEVICE);
1694 buffer_info->dma = 0;
1695 }
1696
1697 if (buffer_info->page) {
1698 put_page(buffer_info->page);
1699 buffer_info->page = NULL;
1700 }
1701
1702 if (buffer_info->skb) {
1703 dev_kfree_skb(buffer_info->skb);
1704 buffer_info->skb = NULL;
1705 }
1706
1707 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1708 ps_page = &buffer_info->ps_pages[j];
1709 if (!ps_page->page)
1710 break;
1711 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1712 DMA_FROM_DEVICE);
1713 ps_page->dma = 0;
1714 put_page(ps_page->page);
1715 ps_page->page = NULL;
1716 }
1717 }
1718
1719 /* there also may be some cached data from a chained receive */
1720 if (rx_ring->rx_skb_top) {
1721 dev_kfree_skb(rx_ring->rx_skb_top);
1722 rx_ring->rx_skb_top = NULL;
1723 }
1724
1725 /* Zero out the descriptor ring */
1726 memset(rx_ring->desc, 0, rx_ring->size);
1727
1728 rx_ring->next_to_clean = 0;
1729 rx_ring->next_to_use = 0;
1730 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1731 }
1732
e1000e_downshift_workaround(struct work_struct * work)1733 static void e1000e_downshift_workaround(struct work_struct *work)
1734 {
1735 struct e1000_adapter *adapter = container_of(work,
1736 struct e1000_adapter,
1737 downshift_task);
1738
1739 if (test_bit(__E1000_DOWN, &adapter->state))
1740 return;
1741
1742 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1743 }
1744
1745 /**
1746 * e1000_intr_msi - Interrupt Handler
1747 * @irq: interrupt number
1748 * @data: pointer to a network interface device structure
1749 **/
e1000_intr_msi(int __always_unused irq,void * data)1750 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1751 {
1752 struct net_device *netdev = data;
1753 struct e1000_adapter *adapter = netdev_priv(netdev);
1754 struct e1000_hw *hw = &adapter->hw;
1755 u32 icr = er32(ICR);
1756
1757 /* read ICR disables interrupts using IAM */
1758 if (icr & E1000_ICR_LSC) {
1759 hw->mac.get_link_status = true;
1760 /* ICH8 workaround-- Call gig speed drop workaround on cable
1761 * disconnect (LSC) before accessing any PHY registers
1762 */
1763 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1764 (!(er32(STATUS) & E1000_STATUS_LU)))
1765 schedule_work(&adapter->downshift_task);
1766
1767 /* 80003ES2LAN workaround-- For packet buffer work-around on
1768 * link down event; disable receives here in the ISR and reset
1769 * adapter in watchdog
1770 */
1771 if (netif_carrier_ok(netdev) &&
1772 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1773 /* disable receives */
1774 u32 rctl = er32(RCTL);
1775
1776 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1777 adapter->flags |= FLAG_RESTART_NOW;
1778 }
1779 /* guard against interrupt when we're going down */
1780 if (!test_bit(__E1000_DOWN, &adapter->state))
1781 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1782 }
1783
1784 /* Reset on uncorrectable ECC error */
1785 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1786 u32 pbeccsts = er32(PBECCSTS);
1787
1788 adapter->corr_errors +=
1789 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1790 adapter->uncorr_errors +=
1791 FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
1792
1793 /* Do the reset outside of interrupt context */
1794 schedule_work(&adapter->reset_task);
1795
1796 /* return immediately since reset is imminent */
1797 return IRQ_HANDLED;
1798 }
1799
1800 if (napi_schedule_prep(&adapter->napi)) {
1801 adapter->total_tx_bytes = 0;
1802 adapter->total_tx_packets = 0;
1803 adapter->total_rx_bytes = 0;
1804 adapter->total_rx_packets = 0;
1805 __napi_schedule(&adapter->napi);
1806 }
1807
1808 return IRQ_HANDLED;
1809 }
1810
1811 /**
1812 * e1000_intr - Interrupt Handler
1813 * @irq: interrupt number
1814 * @data: pointer to a network interface device structure
1815 **/
e1000_intr(int __always_unused irq,void * data)1816 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1817 {
1818 struct net_device *netdev = data;
1819 struct e1000_adapter *adapter = netdev_priv(netdev);
1820 struct e1000_hw *hw = &adapter->hw;
1821 u32 rctl, icr = er32(ICR);
1822
1823 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1824 return IRQ_NONE; /* Not our interrupt */
1825
1826 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1827 * not set, then the adapter didn't send an interrupt
1828 */
1829 if (!(icr & E1000_ICR_INT_ASSERTED))
1830 return IRQ_NONE;
1831
1832 /* Interrupt Auto-Mask...upon reading ICR,
1833 * interrupts are masked. No need for the
1834 * IMC write
1835 */
1836
1837 if (icr & E1000_ICR_LSC) {
1838 hw->mac.get_link_status = true;
1839 /* ICH8 workaround-- Call gig speed drop workaround on cable
1840 * disconnect (LSC) before accessing any PHY registers
1841 */
1842 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1843 (!(er32(STATUS) & E1000_STATUS_LU)))
1844 schedule_work(&adapter->downshift_task);
1845
1846 /* 80003ES2LAN workaround--
1847 * For packet buffer work-around on link down event;
1848 * disable receives here in the ISR and
1849 * reset adapter in watchdog
1850 */
1851 if (netif_carrier_ok(netdev) &&
1852 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1853 /* disable receives */
1854 rctl = er32(RCTL);
1855 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1856 adapter->flags |= FLAG_RESTART_NOW;
1857 }
1858 /* guard against interrupt when we're going down */
1859 if (!test_bit(__E1000_DOWN, &adapter->state))
1860 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1861 }
1862
1863 /* Reset on uncorrectable ECC error */
1864 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1865 u32 pbeccsts = er32(PBECCSTS);
1866
1867 adapter->corr_errors +=
1868 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1869 adapter->uncorr_errors +=
1870 FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
1871
1872 /* Do the reset outside of interrupt context */
1873 schedule_work(&adapter->reset_task);
1874
1875 /* return immediately since reset is imminent */
1876 return IRQ_HANDLED;
1877 }
1878
1879 if (napi_schedule_prep(&adapter->napi)) {
1880 adapter->total_tx_bytes = 0;
1881 adapter->total_tx_packets = 0;
1882 adapter->total_rx_bytes = 0;
1883 adapter->total_rx_packets = 0;
1884 __napi_schedule(&adapter->napi);
1885 }
1886
1887 return IRQ_HANDLED;
1888 }
1889
e1000_msix_other(int __always_unused irq,void * data)1890 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1891 {
1892 struct net_device *netdev = data;
1893 struct e1000_adapter *adapter = netdev_priv(netdev);
1894 struct e1000_hw *hw = &adapter->hw;
1895 u32 icr = er32(ICR);
1896
1897 if (icr & adapter->eiac_mask)
1898 ew32(ICS, (icr & adapter->eiac_mask));
1899
1900 if (icr & E1000_ICR_LSC) {
1901 hw->mac.get_link_status = true;
1902 /* guard against interrupt when we're going down */
1903 if (!test_bit(__E1000_DOWN, &adapter->state))
1904 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1905 }
1906
1907 if (!test_bit(__E1000_DOWN, &adapter->state))
1908 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1909
1910 return IRQ_HANDLED;
1911 }
1912
e1000_intr_msix_tx(int __always_unused irq,void * data)1913 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1914 {
1915 struct net_device *netdev = data;
1916 struct e1000_adapter *adapter = netdev_priv(netdev);
1917 struct e1000_hw *hw = &adapter->hw;
1918 struct e1000_ring *tx_ring = adapter->tx_ring;
1919
1920 adapter->total_tx_bytes = 0;
1921 adapter->total_tx_packets = 0;
1922
1923 if (!e1000_clean_tx_irq(tx_ring))
1924 /* Ring was not completely cleaned, so fire another interrupt */
1925 ew32(ICS, tx_ring->ims_val);
1926
1927 if (!test_bit(__E1000_DOWN, &adapter->state))
1928 ew32(IMS, adapter->tx_ring->ims_val);
1929
1930 return IRQ_HANDLED;
1931 }
1932
e1000_intr_msix_rx(int __always_unused irq,void * data)1933 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1934 {
1935 struct net_device *netdev = data;
1936 struct e1000_adapter *adapter = netdev_priv(netdev);
1937 struct e1000_ring *rx_ring = adapter->rx_ring;
1938
1939 /* Write the ITR value calculated at the end of the
1940 * previous interrupt.
1941 */
1942 if (rx_ring->set_itr) {
1943 u32 itr = rx_ring->itr_val ?
1944 1000000000 / (rx_ring->itr_val * 256) : 0;
1945
1946 writel(itr, rx_ring->itr_register);
1947 rx_ring->set_itr = 0;
1948 }
1949
1950 if (napi_schedule_prep(&adapter->napi)) {
1951 adapter->total_rx_bytes = 0;
1952 adapter->total_rx_packets = 0;
1953 __napi_schedule(&adapter->napi);
1954 }
1955 return IRQ_HANDLED;
1956 }
1957
1958 /**
1959 * e1000_configure_msix - Configure MSI-X hardware
1960 * @adapter: board private structure
1961 *
1962 * e1000_configure_msix sets up the hardware to properly
1963 * generate MSI-X interrupts.
1964 **/
e1000_configure_msix(struct e1000_adapter * adapter)1965 static void e1000_configure_msix(struct e1000_adapter *adapter)
1966 {
1967 struct e1000_hw *hw = &adapter->hw;
1968 struct e1000_ring *rx_ring = adapter->rx_ring;
1969 struct e1000_ring *tx_ring = adapter->tx_ring;
1970 int vector = 0;
1971 u32 ctrl_ext, ivar = 0;
1972
1973 adapter->eiac_mask = 0;
1974
1975 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1976 if (hw->mac.type == e1000_82574) {
1977 u32 rfctl = er32(RFCTL);
1978
1979 rfctl |= E1000_RFCTL_ACK_DIS;
1980 ew32(RFCTL, rfctl);
1981 }
1982
1983 /* Configure Rx vector */
1984 rx_ring->ims_val = E1000_IMS_RXQ0;
1985 adapter->eiac_mask |= rx_ring->ims_val;
1986 if (rx_ring->itr_val)
1987 writel(1000000000 / (rx_ring->itr_val * 256),
1988 rx_ring->itr_register);
1989 else
1990 writel(1, rx_ring->itr_register);
1991 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1992
1993 /* Configure Tx vector */
1994 tx_ring->ims_val = E1000_IMS_TXQ0;
1995 vector++;
1996 if (tx_ring->itr_val)
1997 writel(1000000000 / (tx_ring->itr_val * 256),
1998 tx_ring->itr_register);
1999 else
2000 writel(1, tx_ring->itr_register);
2001 adapter->eiac_mask |= tx_ring->ims_val;
2002 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2003
2004 /* set vector for Other Causes, e.g. link changes */
2005 vector++;
2006 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2007 if (rx_ring->itr_val)
2008 writel(1000000000 / (rx_ring->itr_val * 256),
2009 hw->hw_addr + E1000_EITR_82574(vector));
2010 else
2011 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2012
2013 /* Cause Tx interrupts on every write back */
2014 ivar |= BIT(31);
2015
2016 ew32(IVAR, ivar);
2017
2018 /* enable MSI-X PBA support */
2019 ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2020 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2021 ew32(CTRL_EXT, ctrl_ext);
2022 e1e_flush();
2023 }
2024
e1000e_reset_interrupt_capability(struct e1000_adapter * adapter)2025 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2026 {
2027 if (adapter->msix_entries) {
2028 pci_disable_msix(adapter->pdev);
2029 kfree(adapter->msix_entries);
2030 adapter->msix_entries = NULL;
2031 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2032 pci_disable_msi(adapter->pdev);
2033 adapter->flags &= ~FLAG_MSI_ENABLED;
2034 }
2035 }
2036
2037 /**
2038 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2039 * @adapter: board private structure
2040 *
2041 * Attempt to configure interrupts using the best available
2042 * capabilities of the hardware and kernel.
2043 **/
e1000e_set_interrupt_capability(struct e1000_adapter * adapter)2044 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2045 {
2046 int err;
2047 int i;
2048
2049 switch (adapter->int_mode) {
2050 case E1000E_INT_MODE_MSIX:
2051 if (adapter->flags & FLAG_HAS_MSIX) {
2052 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2053 adapter->msix_entries = kzalloc_objs(struct msix_entry,
2054 adapter->num_vectors);
2055 if (adapter->msix_entries) {
2056 struct e1000_adapter *a = adapter;
2057
2058 for (i = 0; i < adapter->num_vectors; i++)
2059 adapter->msix_entries[i].entry = i;
2060
2061 err = pci_enable_msix_range(a->pdev,
2062 a->msix_entries,
2063 a->num_vectors,
2064 a->num_vectors);
2065 if (err > 0)
2066 return;
2067 }
2068 /* MSI-X failed, so fall through and try MSI */
2069 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2070 e1000e_reset_interrupt_capability(adapter);
2071 }
2072 adapter->int_mode = E1000E_INT_MODE_MSI;
2073 fallthrough;
2074 case E1000E_INT_MODE_MSI:
2075 if (!pci_enable_msi(adapter->pdev)) {
2076 adapter->flags |= FLAG_MSI_ENABLED;
2077 } else {
2078 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2079 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2080 }
2081 fallthrough;
2082 case E1000E_INT_MODE_LEGACY:
2083 /* Don't do anything; this is the system default */
2084 break;
2085 }
2086
2087 /* store the number of vectors being used */
2088 adapter->num_vectors = 1;
2089 }
2090
2091 /**
2092 * e1000_request_msix - Initialize MSI-X interrupts
2093 * @adapter: board private structure
2094 *
2095 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2096 * kernel.
2097 **/
e1000_request_msix(struct e1000_adapter * adapter)2098 static int e1000_request_msix(struct e1000_adapter *adapter)
2099 {
2100 struct net_device *netdev = adapter->netdev;
2101 int err = 0, vector = 0;
2102
2103 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2104 snprintf(adapter->rx_ring->name,
2105 sizeof(adapter->rx_ring->name) - 1,
2106 "%.14s-rx-0", netdev->name);
2107 else
2108 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2109 err = request_irq(adapter->msix_entries[vector].vector,
2110 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2111 netdev);
2112 if (err)
2113 return err;
2114 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2115 E1000_EITR_82574(vector);
2116 adapter->rx_ring->itr_val = adapter->itr;
2117 vector++;
2118
2119 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2120 snprintf(adapter->tx_ring->name,
2121 sizeof(adapter->tx_ring->name) - 1,
2122 "%.14s-tx-0", netdev->name);
2123 else
2124 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2125 err = request_irq(adapter->msix_entries[vector].vector,
2126 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2127 netdev);
2128 if (err)
2129 return err;
2130 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2131 E1000_EITR_82574(vector);
2132 adapter->tx_ring->itr_val = adapter->itr;
2133 vector++;
2134
2135 err = request_irq(adapter->msix_entries[vector].vector,
2136 e1000_msix_other, 0, netdev->name, netdev);
2137 if (err)
2138 return err;
2139
2140 e1000_configure_msix(adapter);
2141
2142 return 0;
2143 }
2144
2145 /**
2146 * e1000_request_irq - initialize interrupts
2147 * @adapter: board private structure
2148 *
2149 * Attempts to configure interrupts using the best available
2150 * capabilities of the hardware and kernel.
2151 **/
e1000_request_irq(struct e1000_adapter * adapter)2152 static int e1000_request_irq(struct e1000_adapter *adapter)
2153 {
2154 struct net_device *netdev = adapter->netdev;
2155 int err;
2156
2157 if (adapter->msix_entries) {
2158 err = e1000_request_msix(adapter);
2159 if (!err)
2160 return err;
2161 /* fall back to MSI */
2162 e1000e_reset_interrupt_capability(adapter);
2163 adapter->int_mode = E1000E_INT_MODE_MSI;
2164 e1000e_set_interrupt_capability(adapter);
2165 }
2166 if (adapter->flags & FLAG_MSI_ENABLED) {
2167 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2168 netdev->name, netdev);
2169 if (!err)
2170 return err;
2171
2172 /* fall back to legacy interrupt */
2173 e1000e_reset_interrupt_capability(adapter);
2174 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2175 }
2176
2177 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2178 netdev->name, netdev);
2179 if (err)
2180 e_err("Unable to allocate interrupt, Error: %d\n", err);
2181
2182 return err;
2183 }
2184
e1000_free_irq(struct e1000_adapter * adapter)2185 static void e1000_free_irq(struct e1000_adapter *adapter)
2186 {
2187 struct net_device *netdev = adapter->netdev;
2188
2189 if (adapter->msix_entries) {
2190 int vector = 0;
2191
2192 free_irq(adapter->msix_entries[vector].vector, netdev);
2193 vector++;
2194
2195 free_irq(adapter->msix_entries[vector].vector, netdev);
2196 vector++;
2197
2198 /* Other Causes interrupt vector */
2199 free_irq(adapter->msix_entries[vector].vector, netdev);
2200 return;
2201 }
2202
2203 free_irq(adapter->pdev->irq, netdev);
2204 }
2205
2206 /**
2207 * e1000_irq_disable - Mask off interrupt generation on the NIC
2208 * @adapter: board private structure
2209 **/
e1000_irq_disable(struct e1000_adapter * adapter)2210 static void e1000_irq_disable(struct e1000_adapter *adapter)
2211 {
2212 struct e1000_hw *hw = &adapter->hw;
2213
2214 ew32(IMC, ~0);
2215 if (adapter->msix_entries)
2216 ew32(EIAC_82574, 0);
2217 e1e_flush();
2218
2219 if (adapter->msix_entries) {
2220 int i;
2221
2222 for (i = 0; i < adapter->num_vectors; i++)
2223 synchronize_irq(adapter->msix_entries[i].vector);
2224 } else {
2225 synchronize_irq(adapter->pdev->irq);
2226 }
2227 }
2228
2229 /**
2230 * e1000_irq_enable - Enable default interrupt generation settings
2231 * @adapter: board private structure
2232 **/
e1000_irq_enable(struct e1000_adapter * adapter)2233 static void e1000_irq_enable(struct e1000_adapter *adapter)
2234 {
2235 struct e1000_hw *hw = &adapter->hw;
2236
2237 if (adapter->msix_entries) {
2238 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2239 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2240 IMS_OTHER_MASK);
2241 } else if (hw->mac.type >= e1000_pch_lpt) {
2242 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2243 } else {
2244 ew32(IMS, IMS_ENABLE_MASK);
2245 }
2246 e1e_flush();
2247 }
2248
2249 /**
2250 * e1000e_get_hw_control - get control of the h/w from f/w
2251 * @adapter: address of board private structure
2252 *
2253 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2254 * For ASF and Pass Through versions of f/w this means that
2255 * the driver is loaded. For AMT version (only with 82573)
2256 * of the f/w this means that the network i/f is open.
2257 **/
e1000e_get_hw_control(struct e1000_adapter * adapter)2258 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2259 {
2260 struct e1000_hw *hw = &adapter->hw;
2261 u32 ctrl_ext;
2262 u32 swsm;
2263
2264 /* Let firmware know the driver has taken over */
2265 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2266 swsm = er32(SWSM);
2267 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2268 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2269 ctrl_ext = er32(CTRL_EXT);
2270 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2271 }
2272 }
2273
2274 /**
2275 * e1000e_release_hw_control - release control of the h/w to f/w
2276 * @adapter: address of board private structure
2277 *
2278 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2279 * For ASF and Pass Through versions of f/w this means that the
2280 * driver is no longer loaded. For AMT version (only with 82573) i
2281 * of the f/w this means that the network i/f is closed.
2282 *
2283 **/
e1000e_release_hw_control(struct e1000_adapter * adapter)2284 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2285 {
2286 struct e1000_hw *hw = &adapter->hw;
2287 u32 ctrl_ext;
2288 u32 swsm;
2289
2290 /* Let firmware taken over control of h/w */
2291 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2292 swsm = er32(SWSM);
2293 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2294 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2295 ctrl_ext = er32(CTRL_EXT);
2296 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2297 }
2298 }
2299
2300 /**
2301 * e1000_alloc_ring_dma - allocate memory for a ring structure
2302 * @adapter: board private structure
2303 * @ring: ring struct for which to allocate dma
2304 **/
e1000_alloc_ring_dma(struct e1000_adapter * adapter,struct e1000_ring * ring)2305 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2306 struct e1000_ring *ring)
2307 {
2308 struct pci_dev *pdev = adapter->pdev;
2309
2310 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2311 GFP_KERNEL);
2312 if (!ring->desc)
2313 return -ENOMEM;
2314
2315 return 0;
2316 }
2317
2318 /**
2319 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2320 * @tx_ring: Tx descriptor ring
2321 *
2322 * Return 0 on success, negative on failure
2323 **/
e1000e_setup_tx_resources(struct e1000_ring * tx_ring)2324 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2325 {
2326 struct e1000_adapter *adapter = tx_ring->adapter;
2327 int err = -ENOMEM, size;
2328
2329 size = sizeof(struct e1000_buffer) * tx_ring->count;
2330 tx_ring->buffer_info = vzalloc(size);
2331 if (!tx_ring->buffer_info)
2332 goto err;
2333
2334 /* round up to nearest 4K */
2335 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2336 tx_ring->size = ALIGN(tx_ring->size, 4096);
2337
2338 err = e1000_alloc_ring_dma(adapter, tx_ring);
2339 if (err)
2340 goto err;
2341
2342 tx_ring->next_to_use = 0;
2343 tx_ring->next_to_clean = 0;
2344
2345 return 0;
2346 err:
2347 vfree(tx_ring->buffer_info);
2348 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2349 return err;
2350 }
2351
2352 /**
2353 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2354 * @rx_ring: Rx descriptor ring
2355 *
2356 * Returns 0 on success, negative on failure
2357 **/
e1000e_setup_rx_resources(struct e1000_ring * rx_ring)2358 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2359 {
2360 struct e1000_adapter *adapter = rx_ring->adapter;
2361 struct e1000_buffer *buffer_info;
2362 int i, size, desc_len, err = -ENOMEM;
2363
2364 size = sizeof(struct e1000_buffer) * rx_ring->count;
2365 rx_ring->buffer_info = vzalloc(size);
2366 if (!rx_ring->buffer_info)
2367 goto err;
2368
2369 for (i = 0; i < rx_ring->count; i++) {
2370 buffer_info = &rx_ring->buffer_info[i];
2371 buffer_info->ps_pages = kzalloc_objs(struct e1000_ps_page,
2372 PS_PAGE_BUFFERS);
2373 if (!buffer_info->ps_pages)
2374 goto err_pages;
2375 }
2376
2377 desc_len = sizeof(union e1000_rx_desc_packet_split);
2378
2379 /* Round up to nearest 4K */
2380 rx_ring->size = rx_ring->count * desc_len;
2381 rx_ring->size = ALIGN(rx_ring->size, 4096);
2382
2383 err = e1000_alloc_ring_dma(adapter, rx_ring);
2384 if (err)
2385 goto err_pages;
2386
2387 rx_ring->next_to_clean = 0;
2388 rx_ring->next_to_use = 0;
2389 rx_ring->rx_skb_top = NULL;
2390
2391 return 0;
2392
2393 err_pages:
2394 for (i = 0; i < rx_ring->count; i++) {
2395 buffer_info = &rx_ring->buffer_info[i];
2396 kfree(buffer_info->ps_pages);
2397 }
2398 err:
2399 vfree(rx_ring->buffer_info);
2400 e_err("Unable to allocate memory for the receive descriptor ring\n");
2401 return err;
2402 }
2403
2404 /**
2405 * e1000_clean_tx_ring - Free Tx Buffers
2406 * @tx_ring: Tx descriptor ring
2407 **/
e1000_clean_tx_ring(struct e1000_ring * tx_ring)2408 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2409 {
2410 struct e1000_adapter *adapter = tx_ring->adapter;
2411 struct e1000_buffer *buffer_info;
2412 unsigned long size;
2413 unsigned int i;
2414
2415 for (i = 0; i < tx_ring->count; i++) {
2416 buffer_info = &tx_ring->buffer_info[i];
2417 e1000_put_txbuf(tx_ring, buffer_info, false);
2418 }
2419
2420 netdev_reset_queue(adapter->netdev);
2421 size = sizeof(struct e1000_buffer) * tx_ring->count;
2422 memset(tx_ring->buffer_info, 0, size);
2423
2424 memset(tx_ring->desc, 0, tx_ring->size);
2425
2426 tx_ring->next_to_use = 0;
2427 tx_ring->next_to_clean = 0;
2428 }
2429
2430 /**
2431 * e1000e_free_tx_resources - Free Tx Resources per Queue
2432 * @tx_ring: Tx descriptor ring
2433 *
2434 * Free all transmit software resources
2435 **/
e1000e_free_tx_resources(struct e1000_ring * tx_ring)2436 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2437 {
2438 struct e1000_adapter *adapter = tx_ring->adapter;
2439 struct pci_dev *pdev = adapter->pdev;
2440
2441 e1000_clean_tx_ring(tx_ring);
2442
2443 vfree(tx_ring->buffer_info);
2444 tx_ring->buffer_info = NULL;
2445
2446 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2447 tx_ring->dma);
2448 tx_ring->desc = NULL;
2449 }
2450
2451 /**
2452 * e1000e_free_rx_resources - Free Rx Resources
2453 * @rx_ring: Rx descriptor ring
2454 *
2455 * Free all receive software resources
2456 **/
e1000e_free_rx_resources(struct e1000_ring * rx_ring)2457 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2458 {
2459 struct e1000_adapter *adapter = rx_ring->adapter;
2460 struct pci_dev *pdev = adapter->pdev;
2461 int i;
2462
2463 e1000_clean_rx_ring(rx_ring);
2464
2465 for (i = 0; i < rx_ring->count; i++)
2466 kfree(rx_ring->buffer_info[i].ps_pages);
2467
2468 vfree(rx_ring->buffer_info);
2469 rx_ring->buffer_info = NULL;
2470
2471 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2472 rx_ring->dma);
2473 rx_ring->desc = NULL;
2474 }
2475
2476 /**
2477 * e1000_update_itr - update the dynamic ITR value based on statistics
2478 * @itr_setting: current adapter->itr
2479 * @packets: the number of packets during this measurement interval
2480 * @bytes: the number of bytes during this measurement interval
2481 *
2482 * Stores a new ITR value based on packets and byte
2483 * counts during the last interrupt. The advantage of per interrupt
2484 * computation is faster updates and more accurate ITR for the current
2485 * traffic pattern. Constants in this function were computed
2486 * based on theoretical maximum wire speed and thresholds were set based
2487 * on testing data as well as attempting to minimize response time
2488 * while increasing bulk throughput. This functionality is controlled
2489 * by the InterruptThrottleRate module parameter.
2490 **/
e1000_update_itr(u16 itr_setting,int packets,int bytes)2491 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2492 {
2493 unsigned int retval = itr_setting;
2494
2495 if (packets == 0)
2496 return itr_setting;
2497
2498 switch (itr_setting) {
2499 case lowest_latency:
2500 /* handle TSO and jumbo frames */
2501 if (bytes / packets > 8000)
2502 retval = bulk_latency;
2503 else if ((packets < 5) && (bytes > 512))
2504 retval = low_latency;
2505 break;
2506 case low_latency: /* 50 usec aka 20000 ints/s */
2507 if (bytes > 10000) {
2508 /* this if handles the TSO accounting */
2509 if (bytes / packets > 8000)
2510 retval = bulk_latency;
2511 else if ((packets < 10) || ((bytes / packets) > 1200))
2512 retval = bulk_latency;
2513 else if ((packets > 35))
2514 retval = lowest_latency;
2515 } else if (bytes / packets > 2000) {
2516 retval = bulk_latency;
2517 } else if (packets <= 2 && bytes < 512) {
2518 retval = lowest_latency;
2519 }
2520 break;
2521 case bulk_latency: /* 250 usec aka 4000 ints/s */
2522 if (bytes > 25000) {
2523 if (packets > 35)
2524 retval = low_latency;
2525 } else if (bytes < 6000) {
2526 retval = low_latency;
2527 }
2528 break;
2529 }
2530
2531 return retval;
2532 }
2533
e1000_set_itr(struct e1000_adapter * adapter)2534 static void e1000_set_itr(struct e1000_adapter *adapter)
2535 {
2536 u16 current_itr;
2537 u32 new_itr = adapter->itr;
2538
2539 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2540 if (adapter->link_speed != SPEED_1000) {
2541 new_itr = 4000;
2542 goto set_itr_now;
2543 }
2544
2545 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2546 new_itr = 0;
2547 goto set_itr_now;
2548 }
2549
2550 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2551 adapter->total_tx_packets,
2552 adapter->total_tx_bytes);
2553 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2554 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2555 adapter->tx_itr = low_latency;
2556
2557 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2558 adapter->total_rx_packets,
2559 adapter->total_rx_bytes);
2560 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2561 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2562 adapter->rx_itr = low_latency;
2563
2564 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2565
2566 /* counts and packets in update_itr are dependent on these numbers */
2567 switch (current_itr) {
2568 case lowest_latency:
2569 new_itr = 70000;
2570 break;
2571 case low_latency:
2572 new_itr = 20000; /* aka hwitr = ~200 */
2573 break;
2574 case bulk_latency:
2575 new_itr = 4000;
2576 break;
2577 default:
2578 break;
2579 }
2580
2581 set_itr_now:
2582 if (new_itr != adapter->itr) {
2583 /* this attempts to bias the interrupt rate towards Bulk
2584 * by adding intermediate steps when interrupt rate is
2585 * increasing
2586 */
2587 new_itr = new_itr > adapter->itr ?
2588 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2589 adapter->itr = new_itr;
2590 adapter->rx_ring->itr_val = new_itr;
2591 if (adapter->msix_entries)
2592 adapter->rx_ring->set_itr = 1;
2593 else
2594 e1000e_write_itr(adapter, new_itr);
2595 }
2596 }
2597
2598 /**
2599 * e1000e_write_itr - write the ITR value to the appropriate registers
2600 * @adapter: address of board private structure
2601 * @itr: new ITR value to program
2602 *
2603 * e1000e_write_itr determines if the adapter is in MSI-X mode
2604 * and, if so, writes the EITR registers with the ITR value.
2605 * Otherwise, it writes the ITR value into the ITR register.
2606 **/
e1000e_write_itr(struct e1000_adapter * adapter,u32 itr)2607 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2608 {
2609 struct e1000_hw *hw = &adapter->hw;
2610 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2611
2612 if (adapter->msix_entries) {
2613 int vector;
2614
2615 for (vector = 0; vector < adapter->num_vectors; vector++)
2616 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2617 } else {
2618 ew32(ITR, new_itr);
2619 }
2620 }
2621
2622 /**
2623 * e1000_alloc_queues - Allocate memory for all rings
2624 * @adapter: board private structure to initialize
2625 **/
e1000_alloc_queues(struct e1000_adapter * adapter)2626 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2627 {
2628 int size = sizeof(struct e1000_ring);
2629
2630 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2631 if (!adapter->tx_ring)
2632 goto err;
2633 adapter->tx_ring->count = adapter->tx_ring_count;
2634 adapter->tx_ring->adapter = adapter;
2635
2636 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2637 if (!adapter->rx_ring)
2638 goto err;
2639 adapter->rx_ring->count = adapter->rx_ring_count;
2640 adapter->rx_ring->adapter = adapter;
2641
2642 return 0;
2643 err:
2644 e_err("Unable to allocate memory for queues\n");
2645 kfree(adapter->rx_ring);
2646 kfree(adapter->tx_ring);
2647 return -ENOMEM;
2648 }
2649
2650 /**
2651 * e1000e_poll - NAPI Rx polling callback
2652 * @napi: struct associated with this polling callback
2653 * @budget: number of packets driver is allowed to process this poll
2654 **/
e1000e_poll(struct napi_struct * napi,int budget)2655 static int e1000e_poll(struct napi_struct *napi, int budget)
2656 {
2657 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2658 napi);
2659 struct e1000_hw *hw = &adapter->hw;
2660 struct net_device *poll_dev = adapter->netdev;
2661 int tx_cleaned = 1, work_done = 0;
2662
2663 adapter = netdev_priv(poll_dev);
2664
2665 if (!adapter->msix_entries ||
2666 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2667 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2668
2669 adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2670
2671 if (!tx_cleaned || work_done == budget)
2672 return budget;
2673
2674 /* Exit the polling mode, but don't re-enable interrupts if stack might
2675 * poll us due to busy-polling
2676 */
2677 if (likely(napi_complete_done(napi, work_done))) {
2678 if (adapter->itr_setting & 3)
2679 e1000_set_itr(adapter);
2680 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2681 if (adapter->msix_entries)
2682 ew32(IMS, adapter->rx_ring->ims_val);
2683 else
2684 e1000_irq_enable(adapter);
2685 }
2686 }
2687
2688 return work_done;
2689 }
2690
e1000_vlan_rx_add_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)2691 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2692 __always_unused __be16 proto, u16 vid)
2693 {
2694 struct e1000_adapter *adapter = netdev_priv(netdev);
2695 struct e1000_hw *hw = &adapter->hw;
2696 u32 vfta, index;
2697
2698 /* don't update vlan cookie if already programmed */
2699 if ((adapter->hw.mng_cookie.status &
2700 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2701 (vid == adapter->mng_vlan_id))
2702 return 0;
2703
2704 /* add VID to filter table */
2705 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2706 index = (vid >> 5) & 0x7F;
2707 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2708 vfta |= BIT((vid & 0x1F));
2709 hw->mac.ops.write_vfta(hw, index, vfta);
2710 }
2711
2712 set_bit(vid, adapter->active_vlans);
2713
2714 return 0;
2715 }
2716
e1000_vlan_rx_kill_vid(struct net_device * netdev,__always_unused __be16 proto,u16 vid)2717 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2718 __always_unused __be16 proto, u16 vid)
2719 {
2720 struct e1000_adapter *adapter = netdev_priv(netdev);
2721 struct e1000_hw *hw = &adapter->hw;
2722 u32 vfta, index;
2723
2724 if ((adapter->hw.mng_cookie.status &
2725 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2726 (vid == adapter->mng_vlan_id)) {
2727 /* release control to f/w */
2728 e1000e_release_hw_control(adapter);
2729 return 0;
2730 }
2731
2732 /* remove VID from filter table */
2733 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2734 index = (vid >> 5) & 0x7F;
2735 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2736 vfta &= ~BIT((vid & 0x1F));
2737 hw->mac.ops.write_vfta(hw, index, vfta);
2738 }
2739
2740 clear_bit(vid, adapter->active_vlans);
2741
2742 return 0;
2743 }
2744
2745 /**
2746 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2747 * @adapter: board private structure to initialize
2748 **/
e1000e_vlan_filter_disable(struct e1000_adapter * adapter)2749 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2750 {
2751 struct net_device *netdev = adapter->netdev;
2752 struct e1000_hw *hw = &adapter->hw;
2753 u32 rctl;
2754
2755 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2756 /* disable VLAN receive filtering */
2757 rctl = er32(RCTL);
2758 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2759 ew32(RCTL, rctl);
2760
2761 if (adapter->mng_vlan_id != E1000_MNG_VLAN_NONE) {
2762 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2763 adapter->mng_vlan_id);
2764 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2765 }
2766 }
2767 }
2768
2769 /**
2770 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2771 * @adapter: board private structure to initialize
2772 **/
e1000e_vlan_filter_enable(struct e1000_adapter * adapter)2773 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2774 {
2775 struct e1000_hw *hw = &adapter->hw;
2776 u32 rctl;
2777
2778 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2779 /* enable VLAN receive filtering */
2780 rctl = er32(RCTL);
2781 rctl |= E1000_RCTL_VFE;
2782 rctl &= ~E1000_RCTL_CFIEN;
2783 ew32(RCTL, rctl);
2784 }
2785 }
2786
2787 /**
2788 * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2789 * @adapter: board private structure to initialize
2790 **/
e1000e_vlan_strip_disable(struct e1000_adapter * adapter)2791 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2792 {
2793 struct e1000_hw *hw = &adapter->hw;
2794 u32 ctrl;
2795
2796 /* disable VLAN tag insert/strip */
2797 ctrl = er32(CTRL);
2798 ctrl &= ~E1000_CTRL_VME;
2799 ew32(CTRL, ctrl);
2800 }
2801
2802 /**
2803 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2804 * @adapter: board private structure to initialize
2805 **/
e1000e_vlan_strip_enable(struct e1000_adapter * adapter)2806 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2807 {
2808 struct e1000_hw *hw = &adapter->hw;
2809 u32 ctrl;
2810
2811 /* enable VLAN tag insert/strip */
2812 ctrl = er32(CTRL);
2813 ctrl |= E1000_CTRL_VME;
2814 ew32(CTRL, ctrl);
2815 }
2816
e1000_update_mng_vlan(struct e1000_adapter * adapter)2817 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2818 {
2819 struct net_device *netdev = adapter->netdev;
2820 u16 vid = adapter->hw.mng_cookie.vlan_id;
2821 u16 old_vid = adapter->mng_vlan_id;
2822
2823 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2824 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2825 adapter->mng_vlan_id = vid;
2826 }
2827
2828 if (old_vid != E1000_MNG_VLAN_NONE && vid != old_vid)
2829 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2830 }
2831
e1000_restore_vlan(struct e1000_adapter * adapter)2832 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2833 {
2834 u16 vid;
2835
2836 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2837
2838 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2839 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2840 }
2841
e1000_init_manageability_pt(struct e1000_adapter * adapter)2842 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2843 {
2844 struct e1000_hw *hw = &adapter->hw;
2845 u32 manc, manc2h, mdef, i, j;
2846
2847 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2848 return;
2849
2850 manc = er32(MANC);
2851
2852 /* enable receiving management packets to the host. this will probably
2853 * generate destination unreachable messages from the host OS, but
2854 * the packets will be handled on SMBUS
2855 */
2856 manc |= E1000_MANC_EN_MNG2HOST;
2857 manc2h = er32(MANC2H);
2858
2859 switch (hw->mac.type) {
2860 default:
2861 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2862 break;
2863 case e1000_82574:
2864 case e1000_82583:
2865 /* Check if IPMI pass-through decision filter already exists;
2866 * if so, enable it.
2867 */
2868 for (i = 0, j = 0; i < 8; i++) {
2869 mdef = er32(MDEF(i));
2870
2871 /* Ignore filters with anything other than IPMI ports */
2872 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2873 continue;
2874
2875 /* Enable this decision filter in MANC2H */
2876 if (mdef)
2877 manc2h |= BIT(i);
2878
2879 j |= mdef;
2880 }
2881
2882 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2883 break;
2884
2885 /* Create new decision filter in an empty filter */
2886 for (i = 0, j = 0; i < 8; i++)
2887 if (er32(MDEF(i)) == 0) {
2888 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2889 E1000_MDEF_PORT_664));
2890 manc2h |= BIT(1);
2891 j++;
2892 break;
2893 }
2894
2895 if (!j)
2896 e_warn("Unable to create IPMI pass-through filter\n");
2897 break;
2898 }
2899
2900 ew32(MANC2H, manc2h);
2901 ew32(MANC, manc);
2902 }
2903
2904 /**
2905 * e1000_configure_tx - Configure Transmit Unit after Reset
2906 * @adapter: board private structure
2907 *
2908 * Configure the Tx unit of the MAC after a reset.
2909 **/
e1000_configure_tx(struct e1000_adapter * adapter)2910 static void e1000_configure_tx(struct e1000_adapter *adapter)
2911 {
2912 struct e1000_hw *hw = &adapter->hw;
2913 struct e1000_ring *tx_ring = adapter->tx_ring;
2914 u64 tdba;
2915 u32 tdlen, tctl, tarc;
2916
2917 /* Setup the HW Tx Head and Tail descriptor pointers */
2918 tdba = tx_ring->dma;
2919 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2920 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2921 ew32(TDBAH(0), (tdba >> 32));
2922 ew32(TDLEN(0), tdlen);
2923 ew32(TDH(0), 0);
2924 ew32(TDT(0), 0);
2925 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2926 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2927
2928 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2929 e1000e_update_tdt_wa(tx_ring, 0);
2930
2931 /* Set the Tx Interrupt Delay register */
2932 ew32(TIDV, adapter->tx_int_delay);
2933 /* Tx irq moderation */
2934 ew32(TADV, adapter->tx_abs_int_delay);
2935
2936 if (adapter->flags2 & FLAG2_DMA_BURST) {
2937 u32 txdctl = er32(TXDCTL(0));
2938
2939 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2940 E1000_TXDCTL_WTHRESH);
2941 /* set up some performance related parameters to encourage the
2942 * hardware to use the bus more efficiently in bursts, depends
2943 * on the tx_int_delay to be enabled,
2944 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2945 * hthresh = 1 ==> prefetch when one or more available
2946 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2947 * BEWARE: this seems to work but should be considered first if
2948 * there are Tx hangs or other Tx related bugs
2949 */
2950 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2951 ew32(TXDCTL(0), txdctl);
2952 }
2953 /* erratum work around: set txdctl the same for both queues */
2954 ew32(TXDCTL(1), er32(TXDCTL(0)));
2955
2956 /* Program the Transmit Control Register */
2957 tctl = er32(TCTL);
2958 tctl &= ~E1000_TCTL_CT;
2959 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2960 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2961
2962 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2963 tarc = er32(TARC(0));
2964 /* set the speed mode bit, we'll clear it if we're not at
2965 * gigabit link later
2966 */
2967 #define SPEED_MODE_BIT BIT(21)
2968 tarc |= SPEED_MODE_BIT;
2969 ew32(TARC(0), tarc);
2970 }
2971
2972 /* errata: program both queues to unweighted RR */
2973 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2974 tarc = er32(TARC(0));
2975 tarc |= 1;
2976 ew32(TARC(0), tarc);
2977 tarc = er32(TARC(1));
2978 tarc |= 1;
2979 ew32(TARC(1), tarc);
2980 }
2981
2982 /* Setup Transmit Descriptor Settings for eop descriptor */
2983 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2984
2985 /* only set IDE if we are delaying interrupts using the timers */
2986 if (adapter->tx_int_delay)
2987 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2988
2989 /* enable Report Status bit */
2990 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2991
2992 ew32(TCTL, tctl);
2993
2994 hw->mac.ops.config_collision_dist(hw);
2995
2996 /* SPT and KBL Si errata workaround to avoid data corruption */
2997 if (hw->mac.type == e1000_pch_spt) {
2998 u32 reg_val;
2999
3000 reg_val = er32(IOSFPC);
3001 reg_val |= E1000_RCTL_RDMTS_HEX;
3002 ew32(IOSFPC, reg_val);
3003
3004 reg_val = er32(TARC(0));
3005 /* SPT and KBL Si errata workaround to avoid Tx hang.
3006 * Dropping the number of outstanding requests from
3007 * 3 to 2 in order to avoid a buffer overrun.
3008 */
3009 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3010 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3011 ew32(TARC(0), reg_val);
3012 }
3013 }
3014
3015 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3016 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3017
3018 /**
3019 * e1000_setup_rctl - configure the receive control registers
3020 * @adapter: Board private structure
3021 **/
e1000_setup_rctl(struct e1000_adapter * adapter)3022 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3023 {
3024 struct e1000_hw *hw = &adapter->hw;
3025 u32 rctl, rfctl;
3026 u32 pages = 0;
3027
3028 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3029 * If jumbo frames not set, program related MAC/PHY registers
3030 * to h/w defaults
3031 */
3032 if (hw->mac.type >= e1000_pch2lan) {
3033 s32 ret_val;
3034
3035 if (adapter->netdev->mtu > ETH_DATA_LEN)
3036 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3037 else
3038 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3039
3040 if (ret_val)
3041 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3042 }
3043
3044 /* Program MC offset vector base */
3045 rctl = er32(RCTL);
3046 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3047 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3048 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3049 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3050
3051 /* Do not Store bad packets */
3052 rctl &= ~E1000_RCTL_SBP;
3053
3054 /* Enable Long Packet receive */
3055 if (adapter->netdev->mtu <= ETH_DATA_LEN)
3056 rctl &= ~E1000_RCTL_LPE;
3057 else
3058 rctl |= E1000_RCTL_LPE;
3059
3060 /* Some systems expect that the CRC is included in SMBUS traffic. The
3061 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3062 * host memory when this is enabled
3063 */
3064 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3065 rctl |= E1000_RCTL_SECRC;
3066
3067 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3068 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3069 u16 phy_data;
3070
3071 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3072 phy_data &= 0xfff8;
3073 phy_data |= BIT(2);
3074 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3075
3076 e1e_rphy(hw, 22, &phy_data);
3077 phy_data &= 0x0fff;
3078 phy_data |= BIT(14);
3079 e1e_wphy(hw, 0x10, 0x2823);
3080 e1e_wphy(hw, 0x11, 0x0003);
3081 e1e_wphy(hw, 22, phy_data);
3082 }
3083
3084 /* Setup buffer sizes */
3085 rctl &= ~E1000_RCTL_SZ_4096;
3086 rctl |= E1000_RCTL_BSEX;
3087 switch (adapter->rx_buffer_len) {
3088 case 2048:
3089 default:
3090 rctl |= E1000_RCTL_SZ_2048;
3091 rctl &= ~E1000_RCTL_BSEX;
3092 break;
3093 case 4096:
3094 rctl |= E1000_RCTL_SZ_4096;
3095 break;
3096 case 8192:
3097 rctl |= E1000_RCTL_SZ_8192;
3098 break;
3099 case 16384:
3100 rctl |= E1000_RCTL_SZ_16384;
3101 break;
3102 }
3103
3104 /* Enable Extended Status in all Receive Descriptors */
3105 rfctl = er32(RFCTL);
3106 rfctl |= E1000_RFCTL_EXTEN;
3107 ew32(RFCTL, rfctl);
3108
3109 /* 82571 and greater support packet-split where the protocol
3110 * header is placed in skb->data and the packet data is
3111 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3112 * In the case of a non-split, skb->data is linearly filled,
3113 * followed by the page buffers. Therefore, skb->data is
3114 * sized to hold the largest protocol header.
3115 *
3116 * allocations using alloc_page take too long for regular MTU
3117 * so only enable packet split for jumbo frames
3118 *
3119 * Using pages when the page size is greater than 16k wastes
3120 * a lot of memory, since we allocate 3 pages at all times
3121 * per packet.
3122 */
3123 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3124 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3125 adapter->rx_ps_pages = pages;
3126 else
3127 adapter->rx_ps_pages = 0;
3128
3129 if (adapter->rx_ps_pages) {
3130 u32 psrctl = 0;
3131
3132 /* Enable Packet split descriptors */
3133 rctl |= E1000_RCTL_DTYP_PS;
3134
3135 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3136
3137 switch (adapter->rx_ps_pages) {
3138 case 3:
3139 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3140 fallthrough;
3141 case 2:
3142 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3143 fallthrough;
3144 case 1:
3145 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3146 break;
3147 }
3148
3149 ew32(PSRCTL, psrctl);
3150 }
3151
3152 /* This is useful for sniffing bad packets. */
3153 if (adapter->netdev->features & NETIF_F_RXALL) {
3154 /* UPE and MPE will be handled by normal PROMISC logic
3155 * in e1000e_set_rx_mode
3156 */
3157 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3158 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3159 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3160
3161 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3162 E1000_RCTL_DPF | /* Allow filtered pause */
3163 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3164 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3165 * and that breaks VLANs.
3166 */
3167 }
3168
3169 ew32(RCTL, rctl);
3170 /* just started the receive unit, no need to restart */
3171 adapter->flags &= ~FLAG_RESTART_NOW;
3172 }
3173
3174 /**
3175 * e1000_configure_rx - Configure Receive Unit after Reset
3176 * @adapter: board private structure
3177 *
3178 * Configure the Rx unit of the MAC after a reset.
3179 **/
e1000_configure_rx(struct e1000_adapter * adapter)3180 static void e1000_configure_rx(struct e1000_adapter *adapter)
3181 {
3182 struct e1000_hw *hw = &adapter->hw;
3183 struct e1000_ring *rx_ring = adapter->rx_ring;
3184 u64 rdba;
3185 u32 rdlen, rctl, rxcsum, ctrl_ext;
3186
3187 if (adapter->rx_ps_pages) {
3188 /* this is a 32 byte descriptor */
3189 rdlen = rx_ring->count *
3190 sizeof(union e1000_rx_desc_packet_split);
3191 adapter->clean_rx = e1000_clean_rx_irq_ps;
3192 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3193 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3194 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3195 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3196 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3197 } else {
3198 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3199 adapter->clean_rx = e1000_clean_rx_irq;
3200 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3201 }
3202
3203 /* disable receives while setting up the descriptors */
3204 rctl = er32(RCTL);
3205 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3206 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3207 e1e_flush();
3208 usleep_range(10000, 11000);
3209
3210 if (adapter->flags2 & FLAG2_DMA_BURST) {
3211 /* set the writeback threshold (only takes effect if the RDTR
3212 * is set). set GRAN=1 and write back up to 0x4 worth, and
3213 * enable prefetching of 0x20 Rx descriptors
3214 * granularity = 01
3215 * wthresh = 04,
3216 * hthresh = 04,
3217 * pthresh = 0x20
3218 */
3219 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3220 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3221 }
3222
3223 /* set the Receive Delay Timer Register */
3224 ew32(RDTR, adapter->rx_int_delay);
3225
3226 /* irq moderation */
3227 ew32(RADV, adapter->rx_abs_int_delay);
3228 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3229 e1000e_write_itr(adapter, adapter->itr);
3230
3231 ctrl_ext = er32(CTRL_EXT);
3232 /* Auto-Mask interrupts upon ICR access */
3233 ctrl_ext |= E1000_CTRL_EXT_IAME;
3234 ew32(IAM, 0xffffffff);
3235 ew32(CTRL_EXT, ctrl_ext);
3236 e1e_flush();
3237
3238 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3239 * the Base and Length of the Rx Descriptor Ring
3240 */
3241 rdba = rx_ring->dma;
3242 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3243 ew32(RDBAH(0), (rdba >> 32));
3244 ew32(RDLEN(0), rdlen);
3245 ew32(RDH(0), 0);
3246 ew32(RDT(0), 0);
3247 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3248 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3249
3250 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3251 e1000e_update_rdt_wa(rx_ring, 0);
3252
3253 /* Enable Receive Checksum Offload for TCP and UDP */
3254 rxcsum = er32(RXCSUM);
3255 if (adapter->netdev->features & NETIF_F_RXCSUM)
3256 rxcsum |= E1000_RXCSUM_TUOFL;
3257 else
3258 rxcsum &= ~E1000_RXCSUM_TUOFL;
3259 ew32(RXCSUM, rxcsum);
3260
3261 /* With jumbo frames, excessive C-state transition latencies result
3262 * in dropped transactions.
3263 */
3264 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3265 u32 lat =
3266 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3267 adapter->max_frame_size) * 8 / 1000;
3268
3269 if (adapter->flags & FLAG_IS_ICH) {
3270 u32 rxdctl = er32(RXDCTL(0));
3271
3272 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3273 }
3274
3275 dev_info(&adapter->pdev->dev,
3276 "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3277 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3278 } else {
3279 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3280 PM_QOS_DEFAULT_VALUE);
3281 }
3282
3283 /* Enable Receives */
3284 ew32(RCTL, rctl);
3285 }
3286
3287 /**
3288 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3289 * @netdev: network interface device structure
3290 *
3291 * Writes multicast address list to the MTA hash table.
3292 * Returns: -ENOMEM on failure
3293 * 0 on no addresses written
3294 * X on writing X addresses to MTA
3295 */
e1000e_write_mc_addr_list(struct net_device * netdev)3296 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3297 {
3298 struct e1000_adapter *adapter = netdev_priv(netdev);
3299 struct e1000_hw *hw = &adapter->hw;
3300 struct netdev_hw_addr *ha;
3301 u8 *mta_list;
3302 int i;
3303
3304 if (netdev_mc_empty(netdev)) {
3305 /* nothing to program, so clear mc list */
3306 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3307 return 0;
3308 }
3309
3310 mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3311 if (!mta_list)
3312 return -ENOMEM;
3313
3314 /* update_mc_addr_list expects a packed array of only addresses. */
3315 i = 0;
3316 netdev_for_each_mc_addr(ha, netdev)
3317 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3318
3319 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3320 kfree(mta_list);
3321
3322 return netdev_mc_count(netdev);
3323 }
3324
3325 /**
3326 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3327 * @netdev: network interface device structure
3328 *
3329 * Writes unicast address list to the RAR table.
3330 * Returns: -ENOMEM on failure/insufficient address space
3331 * 0 on no addresses written
3332 * X on writing X addresses to the RAR table
3333 **/
e1000e_write_uc_addr_list(struct net_device * netdev)3334 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3335 {
3336 struct e1000_adapter *adapter = netdev_priv(netdev);
3337 struct e1000_hw *hw = &adapter->hw;
3338 unsigned int rar_entries;
3339 int count = 0;
3340
3341 rar_entries = hw->mac.ops.rar_get_count(hw);
3342
3343 /* save a rar entry for our hardware address */
3344 rar_entries--;
3345
3346 /* save a rar entry for the LAA workaround */
3347 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3348 rar_entries--;
3349
3350 /* return ENOMEM indicating insufficient memory for addresses */
3351 if (netdev_uc_count(netdev) > rar_entries)
3352 return -ENOMEM;
3353
3354 if (!netdev_uc_empty(netdev) && rar_entries) {
3355 struct netdev_hw_addr *ha;
3356
3357 /* write the addresses in reverse order to avoid write
3358 * combining
3359 */
3360 netdev_for_each_uc_addr(ha, netdev) {
3361 int ret_val;
3362
3363 if (!rar_entries)
3364 break;
3365 ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3366 if (ret_val < 0)
3367 return -ENOMEM;
3368 count++;
3369 }
3370 }
3371
3372 /* zero out the remaining RAR entries not used above */
3373 for (; rar_entries > 0; rar_entries--) {
3374 ew32(RAH(rar_entries), 0);
3375 ew32(RAL(rar_entries), 0);
3376 }
3377 e1e_flush();
3378
3379 return count;
3380 }
3381
3382 /**
3383 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3384 * @netdev: network interface device structure
3385 *
3386 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3387 * address list or the network interface flags are updated. This routine is
3388 * responsible for configuring the hardware for proper unicast, multicast,
3389 * promiscuous mode, and all-multi behavior.
3390 **/
e1000e_set_rx_mode(struct net_device * netdev)3391 static void e1000e_set_rx_mode(struct net_device *netdev)
3392 {
3393 struct e1000_adapter *adapter = netdev_priv(netdev);
3394 struct e1000_hw *hw = &adapter->hw;
3395 u32 rctl;
3396
3397 if (pm_runtime_suspended(netdev->dev.parent))
3398 return;
3399
3400 /* Check for Promiscuous and All Multicast modes */
3401 rctl = er32(RCTL);
3402
3403 /* clear the affected bits */
3404 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3405
3406 if (netdev->flags & IFF_PROMISC) {
3407 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3408 /* Do not hardware filter VLANs in promisc mode */
3409 e1000e_vlan_filter_disable(adapter);
3410 } else {
3411 int count;
3412
3413 if (netdev->flags & IFF_ALLMULTI) {
3414 rctl |= E1000_RCTL_MPE;
3415 } else {
3416 /* Write addresses to the MTA, if the attempt fails
3417 * then we should just turn on promiscuous mode so
3418 * that we can at least receive multicast traffic
3419 */
3420 count = e1000e_write_mc_addr_list(netdev);
3421 if (count < 0)
3422 rctl |= E1000_RCTL_MPE;
3423 }
3424 e1000e_vlan_filter_enable(adapter);
3425 /* Write addresses to available RAR registers, if there is not
3426 * sufficient space to store all the addresses then enable
3427 * unicast promiscuous mode
3428 */
3429 count = e1000e_write_uc_addr_list(netdev);
3430 if (count < 0)
3431 rctl |= E1000_RCTL_UPE;
3432 }
3433
3434 ew32(RCTL, rctl);
3435
3436 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3437 e1000e_vlan_strip_enable(adapter);
3438 else
3439 e1000e_vlan_strip_disable(adapter);
3440 }
3441
e1000e_setup_rss_hash(struct e1000_adapter * adapter)3442 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3443 {
3444 struct e1000_hw *hw = &adapter->hw;
3445 u32 mrqc, rxcsum;
3446 u32 rss_key[10];
3447 int i;
3448
3449 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3450 for (i = 0; i < 10; i++)
3451 ew32(RSSRK(i), rss_key[i]);
3452
3453 /* Direct all traffic to queue 0 */
3454 for (i = 0; i < 32; i++)
3455 ew32(RETA(i), 0);
3456
3457 /* Disable raw packet checksumming so that RSS hash is placed in
3458 * descriptor on writeback.
3459 */
3460 rxcsum = er32(RXCSUM);
3461 rxcsum |= E1000_RXCSUM_PCSD;
3462
3463 ew32(RXCSUM, rxcsum);
3464
3465 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3466 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3467 E1000_MRQC_RSS_FIELD_IPV6 |
3468 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3469 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3470
3471 ew32(MRQC, mrqc);
3472 }
3473
3474 /**
3475 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3476 * @adapter: board private structure
3477 * @timinca: pointer to returned time increment attributes
3478 *
3479 * Get attributes for incrementing the System Time Register SYSTIML/H at
3480 * the default base frequency, and set the cyclecounter shift value.
3481 **/
e1000e_get_base_timinca(struct e1000_adapter * adapter,u32 * timinca)3482 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3483 {
3484 struct e1000_hw *hw = &adapter->hw;
3485 u32 incvalue, incperiod, shift;
3486
3487 /* Make sure clock is enabled on I217/I218/I219 before checking
3488 * the frequency
3489 */
3490 if ((hw->mac.type >= e1000_pch_lpt) &&
3491 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3492 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3493 u32 fextnvm7 = er32(FEXTNVM7);
3494
3495 if (!(fextnvm7 & BIT(0))) {
3496 ew32(FEXTNVM7, fextnvm7 | BIT(0));
3497 e1e_flush();
3498 }
3499 }
3500
3501 switch (hw->mac.type) {
3502 case e1000_pch2lan:
3503 /* Stable 96MHz frequency */
3504 incperiod = INCPERIOD_96MHZ;
3505 incvalue = INCVALUE_96MHZ;
3506 shift = INCVALUE_SHIFT_96MHZ;
3507 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3508 break;
3509 case e1000_pch_lpt:
3510 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3511 /* Stable 96MHz frequency */
3512 incperiod = INCPERIOD_96MHZ;
3513 incvalue = INCVALUE_96MHZ;
3514 shift = INCVALUE_SHIFT_96MHZ;
3515 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3516 } else {
3517 /* Stable 25MHz frequency */
3518 incperiod = INCPERIOD_25MHZ;
3519 incvalue = INCVALUE_25MHZ;
3520 shift = INCVALUE_SHIFT_25MHZ;
3521 adapter->cc.shift = shift;
3522 }
3523 break;
3524 case e1000_pch_spt:
3525 /* Stable 24MHz frequency */
3526 incperiod = INCPERIOD_24MHZ;
3527 incvalue = INCVALUE_24MHZ;
3528 shift = INCVALUE_SHIFT_24MHZ;
3529 adapter->cc.shift = shift;
3530 break;
3531 case e1000_pch_cnp:
3532 case e1000_pch_tgp:
3533 case e1000_pch_adp:
3534 case e1000_pch_nvp:
3535 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3536 /* Stable 24MHz frequency */
3537 incperiod = INCPERIOD_24MHZ;
3538 incvalue = INCVALUE_24MHZ;
3539 shift = INCVALUE_SHIFT_24MHZ;
3540 adapter->cc.shift = shift;
3541 } else {
3542 /* Stable 38400KHz frequency */
3543 incperiod = INCPERIOD_38400KHZ;
3544 incvalue = INCVALUE_38400KHZ;
3545 shift = INCVALUE_SHIFT_38400KHZ;
3546 adapter->cc.shift = shift;
3547 }
3548 break;
3549 case e1000_pch_mtp:
3550 case e1000_pch_lnp:
3551 case e1000_pch_ptp:
3552 /* System firmware can misreport this value, so set it to a
3553 * stable 38400KHz frequency.
3554 */
3555 incperiod = INCPERIOD_38400KHZ;
3556 incvalue = INCVALUE_38400KHZ;
3557 shift = INCVALUE_SHIFT_38400KHZ;
3558 adapter->cc.shift = shift;
3559 break;
3560 case e1000_82574:
3561 case e1000_82583:
3562 /* Stable 25MHz frequency */
3563 incperiod = INCPERIOD_25MHZ;
3564 incvalue = INCVALUE_25MHZ;
3565 shift = INCVALUE_SHIFT_25MHZ;
3566 adapter->cc.shift = shift;
3567 break;
3568 default:
3569 return -EINVAL;
3570 }
3571
3572 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3573 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3574
3575 return 0;
3576 }
3577
3578 /**
3579 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3580 * @adapter: board private structure
3581 * @config: timestamp configuration
3582 * @extack: netlink extended ACK for error report
3583 *
3584 * Outgoing time stamping can be enabled and disabled. Play nice and
3585 * disable it when requested, although it shouldn't cause any overhead
3586 * when no packet needs it. At most one packet in the queue may be
3587 * marked for time stamping, otherwise it would be impossible to tell
3588 * for sure to which packet the hardware time stamp belongs.
3589 *
3590 * Incoming time stamping has to be configured via the hardware filters.
3591 * Not all combinations are supported, in particular event type has to be
3592 * specified. Matching the kind of event packet is not supported, with the
3593 * exception of "all V2 events regardless of level 2 or 4".
3594 **/
e1000e_config_hwtstamp(struct e1000_adapter * adapter,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)3595 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3596 struct kernel_hwtstamp_config *config,
3597 struct netlink_ext_ack *extack)
3598 {
3599 struct e1000_hw *hw = &adapter->hw;
3600 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3601 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3602 u32 rxmtrl = 0;
3603 u16 rxudp = 0;
3604 bool is_l4 = false;
3605 bool is_l2 = false;
3606 u32 regval;
3607
3608 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
3609 NL_SET_ERR_MSG(extack, "No HW timestamp support");
3610 return -EINVAL;
3611 }
3612
3613 switch (config->tx_type) {
3614 case HWTSTAMP_TX_OFF:
3615 tsync_tx_ctl = 0;
3616 break;
3617 case HWTSTAMP_TX_ON:
3618 break;
3619 default:
3620 NL_SET_ERR_MSG(extack, "Unsupported TX HW timestamp type");
3621 return -ERANGE;
3622 }
3623
3624 switch (config->rx_filter) {
3625 case HWTSTAMP_FILTER_NONE:
3626 tsync_rx_ctl = 0;
3627 break;
3628 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3629 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3630 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3631 is_l4 = true;
3632 break;
3633 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3634 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3635 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3636 is_l4 = true;
3637 break;
3638 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3639 /* Also time stamps V2 L2 Path Delay Request/Response */
3640 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3641 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3642 is_l2 = true;
3643 break;
3644 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3645 /* Also time stamps V2 L2 Path Delay Request/Response. */
3646 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3647 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3648 is_l2 = true;
3649 break;
3650 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3651 /* Hardware cannot filter just V2 L4 Sync messages */
3652 fallthrough;
3653 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3654 /* Also time stamps V2 Path Delay Request/Response. */
3655 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3656 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3657 is_l2 = true;
3658 is_l4 = true;
3659 break;
3660 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3661 /* Hardware cannot filter just V2 L4 Delay Request messages */
3662 fallthrough;
3663 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3664 /* Also time stamps V2 Path Delay Request/Response. */
3665 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3666 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3667 is_l2 = true;
3668 is_l4 = true;
3669 break;
3670 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3671 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3672 /* Hardware cannot filter just V2 L4 or L2 Event messages */
3673 fallthrough;
3674 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3675 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3676 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3677 is_l2 = true;
3678 is_l4 = true;
3679 break;
3680 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3681 /* For V1, the hardware can only filter Sync messages or
3682 * Delay Request messages but not both so fall-through to
3683 * time stamp all packets.
3684 */
3685 fallthrough;
3686 case HWTSTAMP_FILTER_NTP_ALL:
3687 case HWTSTAMP_FILTER_ALL:
3688 is_l2 = true;
3689 is_l4 = true;
3690 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3691 config->rx_filter = HWTSTAMP_FILTER_ALL;
3692 break;
3693 default:
3694 NL_SET_ERR_MSG(extack, "Unsupported RX HW timestamp filter");
3695 return -ERANGE;
3696 }
3697
3698 adapter->hwtstamp_config = *config;
3699
3700 /* enable/disable Tx h/w time stamping */
3701 regval = er32(TSYNCTXCTL);
3702 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3703 regval |= tsync_tx_ctl;
3704 ew32(TSYNCTXCTL, regval);
3705 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3706 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3707 NL_SET_ERR_MSG(extack,
3708 "Timesync Tx Control register not set as expected");
3709 return -EAGAIN;
3710 }
3711
3712 /* enable/disable Rx h/w time stamping */
3713 regval = er32(TSYNCRXCTL);
3714 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3715 regval |= tsync_rx_ctl;
3716 ew32(TSYNCRXCTL, regval);
3717 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3718 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3719 (regval & (E1000_TSYNCRXCTL_ENABLED |
3720 E1000_TSYNCRXCTL_TYPE_MASK))) {
3721 NL_SET_ERR_MSG(extack,
3722 "Timesync Rx Control register not set as expected");
3723 return -EAGAIN;
3724 }
3725
3726 /* L2: define ethertype filter for time stamped packets */
3727 if (is_l2)
3728 rxmtrl |= ETH_P_1588;
3729
3730 /* define which PTP packets get time stamped */
3731 ew32(RXMTRL, rxmtrl);
3732
3733 /* Filter by destination port */
3734 if (is_l4) {
3735 rxudp = PTP_EV_PORT;
3736 cpu_to_be16s(&rxudp);
3737 }
3738 ew32(RXUDP, rxudp);
3739
3740 e1e_flush();
3741
3742 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3743 er32(RXSTMPH);
3744 er32(TXSTMPH);
3745
3746 return 0;
3747 }
3748
3749 /**
3750 * e1000_configure - configure the hardware for Rx and Tx
3751 * @adapter: private board structure
3752 **/
e1000_configure(struct e1000_adapter * adapter)3753 static void e1000_configure(struct e1000_adapter *adapter)
3754 {
3755 struct e1000_ring *rx_ring = adapter->rx_ring;
3756
3757 e1000e_set_rx_mode(adapter->netdev);
3758
3759 e1000_restore_vlan(adapter);
3760 e1000_init_manageability_pt(adapter);
3761
3762 e1000_configure_tx(adapter);
3763
3764 if (adapter->netdev->features & NETIF_F_RXHASH)
3765 e1000e_setup_rss_hash(adapter);
3766 e1000_setup_rctl(adapter);
3767 e1000_configure_rx(adapter);
3768 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3769 }
3770
3771 /**
3772 * e1000e_power_up_phy - restore link in case the phy was powered down
3773 * @adapter: address of board private structure
3774 *
3775 * The phy may be powered down to save power and turn off link when the
3776 * driver is unloaded and wake on lan is not enabled (among others)
3777 * *** this routine MUST be followed by a call to e1000e_reset ***
3778 **/
e1000e_power_up_phy(struct e1000_adapter * adapter)3779 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3780 {
3781 if (adapter->hw.phy.ops.power_up)
3782 adapter->hw.phy.ops.power_up(&adapter->hw);
3783
3784 adapter->hw.mac.ops.setup_link(&adapter->hw);
3785 }
3786
3787 /**
3788 * e1000_power_down_phy - Power down the PHY
3789 * @adapter: board private structure
3790 *
3791 * Power down the PHY so no link is implied when interface is down.
3792 * The PHY cannot be powered down if management or WoL is active.
3793 */
e1000_power_down_phy(struct e1000_adapter * adapter)3794 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3795 {
3796 if (adapter->hw.phy.ops.power_down)
3797 adapter->hw.phy.ops.power_down(&adapter->hw);
3798 }
3799
3800 /**
3801 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3802 * @adapter: board private structure
3803 *
3804 * We want to clear all pending descriptors from the TX ring.
3805 * zeroing happens when the HW reads the regs. We assign the ring itself as
3806 * the data of the next descriptor. We don't care about the data we are about
3807 * to reset the HW.
3808 */
e1000_flush_tx_ring(struct e1000_adapter * adapter)3809 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3810 {
3811 struct e1000_hw *hw = &adapter->hw;
3812 struct e1000_ring *tx_ring = adapter->tx_ring;
3813 struct e1000_tx_desc *tx_desc = NULL;
3814 u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3815 u16 size = 512;
3816
3817 tctl = er32(TCTL);
3818 ew32(TCTL, tctl | E1000_TCTL_EN);
3819 tdt = er32(TDT(0));
3820 BUG_ON(tdt != tx_ring->next_to_use);
3821 tx_desc = E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3822 tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3823
3824 tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3825 tx_desc->upper.data = 0;
3826 /* flush descriptors to memory before notifying the HW */
3827 wmb();
3828 tx_ring->next_to_use++;
3829 if (tx_ring->next_to_use == tx_ring->count)
3830 tx_ring->next_to_use = 0;
3831 ew32(TDT(0), tx_ring->next_to_use);
3832 usleep_range(200, 250);
3833 }
3834
3835 /**
3836 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3837 * @adapter: board private structure
3838 *
3839 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3840 */
e1000_flush_rx_ring(struct e1000_adapter * adapter)3841 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3842 {
3843 u32 rctl, rxdctl;
3844 struct e1000_hw *hw = &adapter->hw;
3845
3846 rctl = er32(RCTL);
3847 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3848 e1e_flush();
3849 usleep_range(100, 150);
3850
3851 rxdctl = er32(RXDCTL(0));
3852 /* zero the lower 14 bits (prefetch and host thresholds) */
3853 rxdctl &= 0xffffc000;
3854
3855 /* update thresholds: prefetch threshold to 31, host threshold to 1
3856 * and make sure the granularity is "descriptors" and not "cache lines"
3857 */
3858 rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3859
3860 ew32(RXDCTL(0), rxdctl);
3861 /* momentarily enable the RX ring for the changes to take effect */
3862 ew32(RCTL, rctl | E1000_RCTL_EN);
3863 e1e_flush();
3864 usleep_range(100, 150);
3865 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3866 }
3867
3868 /**
3869 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3870 * @adapter: board private structure
3871 *
3872 * In i219, the descriptor rings must be emptied before resetting the HW
3873 * or before changing the device state to D3 during runtime (runtime PM).
3874 *
3875 * Failure to do this will cause the HW to enter a unit hang state which can
3876 * only be released by PCI reset on the device
3877 *
3878 */
3879
e1000_flush_desc_rings(struct e1000_adapter * adapter)3880 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3881 {
3882 u16 hang_state;
3883 u32 fext_nvm11, tdlen;
3884 struct e1000_hw *hw = &adapter->hw;
3885
3886 /* First, disable MULR fix in FEXTNVM11 */
3887 fext_nvm11 = er32(FEXTNVM11);
3888 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3889 ew32(FEXTNVM11, fext_nvm11);
3890 /* do nothing if we're not in faulty state, or if the queue is empty */
3891 tdlen = er32(TDLEN(0));
3892 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3893 &hang_state);
3894 if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3895 return;
3896 e1000_flush_tx_ring(adapter);
3897 /* recheck, maybe the fault is caused by the rx ring */
3898 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3899 &hang_state);
3900 if (hang_state & FLUSH_DESC_REQUIRED)
3901 e1000_flush_rx_ring(adapter);
3902 }
3903
3904 /**
3905 * e1000e_systim_reset - reset the timesync registers after a hardware reset
3906 * @adapter: board private structure
3907 *
3908 * When the MAC is reset, all hardware bits for timesync will be reset to the
3909 * default values. This function will restore the settings last in place.
3910 * Since the clock SYSTIME registers are reset, we will simply restore the
3911 * cyclecounter to the kernel real clock time.
3912 **/
e1000e_systim_reset(struct e1000_adapter * adapter)3913 static void e1000e_systim_reset(struct e1000_adapter *adapter)
3914 {
3915 struct ptp_clock_info *info = &adapter->ptp_clock_info;
3916 struct e1000_hw *hw = &adapter->hw;
3917 struct netlink_ext_ack extack = {};
3918 unsigned long flags;
3919 u32 timinca;
3920 s32 ret_val;
3921
3922 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3923 return;
3924
3925 if (info->adjfine) {
3926 /* restore the previous ptp frequency delta */
3927 ret_val = info->adjfine(info, adapter->ptp_delta);
3928 } else {
3929 /* set the default base frequency if no adjustment possible */
3930 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3931 if (!ret_val)
3932 ew32(TIMINCA, timinca);
3933 }
3934
3935 if (ret_val) {
3936 dev_warn(&adapter->pdev->dev,
3937 "Failed to restore TIMINCA clock rate delta: %d\n",
3938 ret_val);
3939 return;
3940 }
3941
3942 /* reset the systim ns time counter */
3943 spin_lock_irqsave(&adapter->systim_lock, flags);
3944 timecounter_init(&adapter->tc, &adapter->cc,
3945 ktime_to_ns(ktime_get_real()));
3946 spin_unlock_irqrestore(&adapter->systim_lock, flags);
3947
3948 /* restore the previous hwtstamp configuration settings */
3949 ret_val = e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config,
3950 &extack);
3951 if (ret_val) {
3952 if (extack._msg)
3953 e_err("%s\n", extack._msg);
3954 }
3955 }
3956
3957 /**
3958 * e1000e_reset - bring the hardware into a known good state
3959 * @adapter: board private structure
3960 *
3961 * This function boots the hardware and enables some settings that
3962 * require a configuration cycle of the hardware - those cannot be
3963 * set/changed during runtime. After reset the device needs to be
3964 * properly configured for Rx, Tx etc.
3965 */
e1000e_reset(struct e1000_adapter * adapter)3966 void e1000e_reset(struct e1000_adapter *adapter)
3967 {
3968 struct e1000_mac_info *mac = &adapter->hw.mac;
3969 struct e1000_fc_info *fc = &adapter->hw.fc;
3970 struct e1000_hw *hw = &adapter->hw;
3971 u32 tx_space, min_tx_space, min_rx_space;
3972 u32 pba = adapter->pba;
3973 u16 hwm;
3974
3975 /* reset Packet Buffer Allocation to default */
3976 ew32(PBA, pba);
3977
3978 if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3979 /* To maintain wire speed transmits, the Tx FIFO should be
3980 * large enough to accommodate two full transmit packets,
3981 * rounded up to the next 1KB and expressed in KB. Likewise,
3982 * the Rx FIFO should be large enough to accommodate at least
3983 * one full receive packet and is similarly rounded up and
3984 * expressed in KB.
3985 */
3986 pba = er32(PBA);
3987 /* upper 16 bits has Tx packet buffer allocation size in KB */
3988 tx_space = pba >> 16;
3989 /* lower 16 bits has Rx packet buffer allocation size in KB */
3990 pba &= 0xffff;
3991 /* the Tx fifo also stores 16 bytes of information about the Tx
3992 * but don't include ethernet FCS because hardware appends it
3993 */
3994 min_tx_space = (adapter->max_frame_size +
3995 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3996 min_tx_space = ALIGN(min_tx_space, 1024);
3997 min_tx_space >>= 10;
3998 /* software strips receive CRC, so leave room for it */
3999 min_rx_space = adapter->max_frame_size;
4000 min_rx_space = ALIGN(min_rx_space, 1024);
4001 min_rx_space >>= 10;
4002
4003 /* If current Tx allocation is less than the min Tx FIFO size,
4004 * and the min Tx FIFO size is less than the current Rx FIFO
4005 * allocation, take space away from current Rx allocation
4006 */
4007 if ((tx_space < min_tx_space) &&
4008 ((min_tx_space - tx_space) < pba)) {
4009 pba -= min_tx_space - tx_space;
4010
4011 /* if short on Rx space, Rx wins and must trump Tx
4012 * adjustment
4013 */
4014 if (pba < min_rx_space)
4015 pba = min_rx_space;
4016 }
4017
4018 ew32(PBA, pba);
4019 }
4020
4021 /* flow control settings
4022 *
4023 * The high water mark must be low enough to fit one full frame
4024 * (or the size used for early receive) above it in the Rx FIFO.
4025 * Set it to the lower of:
4026 * - 90% of the Rx FIFO size, and
4027 * - the full Rx FIFO size minus one full frame
4028 */
4029 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4030 fc->pause_time = 0xFFFF;
4031 else
4032 fc->pause_time = E1000_FC_PAUSE_TIME;
4033 fc->send_xon = true;
4034 fc->current_mode = fc->requested_mode;
4035
4036 switch (hw->mac.type) {
4037 case e1000_ich9lan:
4038 case e1000_ich10lan:
4039 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4040 pba = 14;
4041 ew32(PBA, pba);
4042 fc->high_water = 0x2800;
4043 fc->low_water = fc->high_water - 8;
4044 break;
4045 }
4046 fallthrough;
4047 default:
4048 hwm = min(((pba << 10) * 9 / 10),
4049 ((pba << 10) - adapter->max_frame_size));
4050
4051 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4052 fc->low_water = fc->high_water - 8;
4053 break;
4054 case e1000_pchlan:
4055 /* Workaround PCH LOM adapter hangs with certain network
4056 * loads. If hangs persist, try disabling Tx flow control.
4057 */
4058 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4059 fc->high_water = 0x3500;
4060 fc->low_water = 0x1500;
4061 } else {
4062 fc->high_water = 0x5000;
4063 fc->low_water = 0x3000;
4064 }
4065 fc->refresh_time = 0x1000;
4066 break;
4067 case e1000_pch2lan:
4068 case e1000_pch_lpt:
4069 case e1000_pch_spt:
4070 case e1000_pch_cnp:
4071 case e1000_pch_tgp:
4072 case e1000_pch_adp:
4073 case e1000_pch_mtp:
4074 case e1000_pch_lnp:
4075 case e1000_pch_ptp:
4076 case e1000_pch_nvp:
4077 fc->refresh_time = 0xFFFF;
4078 fc->pause_time = 0xFFFF;
4079
4080 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4081 fc->high_water = 0x05C20;
4082 fc->low_water = 0x05048;
4083 break;
4084 }
4085
4086 pba = 14;
4087 ew32(PBA, pba);
4088 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4089 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4090 break;
4091 }
4092
4093 /* Alignment of Tx data is on an arbitrary byte boundary with the
4094 * maximum size per Tx descriptor limited only to the transmit
4095 * allocation of the packet buffer minus 96 bytes with an upper
4096 * limit of 24KB due to receive synchronization limitations.
4097 */
4098 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4099 24 << 10);
4100
4101 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4102 * fit in receive buffer.
4103 */
4104 if (adapter->itr_setting & 0x3) {
4105 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4106 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4107 dev_info(&adapter->pdev->dev,
4108 "Interrupt Throttle Rate off\n");
4109 adapter->flags2 |= FLAG2_DISABLE_AIM;
4110 e1000e_write_itr(adapter, 0);
4111 }
4112 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4113 dev_info(&adapter->pdev->dev,
4114 "Interrupt Throttle Rate on\n");
4115 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4116 adapter->itr = 20000;
4117 e1000e_write_itr(adapter, adapter->itr);
4118 }
4119 }
4120
4121 if (hw->mac.type >= e1000_pch_spt)
4122 e1000_flush_desc_rings(adapter);
4123 /* Allow time for pending master requests to run */
4124 mac->ops.reset_hw(hw);
4125
4126 /* For parts with AMT enabled, let the firmware know
4127 * that the network interface is in control
4128 */
4129 if (adapter->flags & FLAG_HAS_AMT)
4130 e1000e_get_hw_control(adapter);
4131
4132 ew32(WUC, 0);
4133
4134 if (mac->ops.init_hw(hw))
4135 e_err("Hardware Error\n");
4136
4137 e1000_update_mng_vlan(adapter);
4138
4139 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4140 ew32(VET, ETH_P_8021Q);
4141
4142 e1000e_reset_adaptive(hw);
4143
4144 /* restore systim and hwtstamp settings */
4145 e1000e_systim_reset(adapter);
4146
4147 /* Set EEE advertisement as appropriate */
4148 if (adapter->flags2 & FLAG2_HAS_EEE) {
4149 s32 ret_val;
4150 u16 adv_addr;
4151
4152 switch (hw->phy.type) {
4153 case e1000_phy_82579:
4154 adv_addr = I82579_EEE_ADVERTISEMENT;
4155 break;
4156 case e1000_phy_i217:
4157 adv_addr = I217_EEE_ADVERTISEMENT;
4158 break;
4159 default:
4160 dev_err(&adapter->pdev->dev,
4161 "Invalid PHY type setting EEE advertisement\n");
4162 return;
4163 }
4164
4165 ret_val = hw->phy.ops.acquire(hw);
4166 if (ret_val) {
4167 dev_err(&adapter->pdev->dev,
4168 "EEE advertisement - unable to acquire PHY\n");
4169 return;
4170 }
4171
4172 e1000_write_emi_reg_locked(hw, adv_addr,
4173 hw->dev_spec.ich8lan.eee_disable ?
4174 0 : adapter->eee_advert);
4175
4176 hw->phy.ops.release(hw);
4177 }
4178
4179 if (!netif_running(adapter->netdev) &&
4180 !test_bit(__E1000_TESTING, &adapter->state))
4181 e1000_power_down_phy(adapter);
4182
4183 e1000_get_phy_info(hw);
4184
4185 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4186 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4187 u16 phy_data = 0;
4188 /* speed up time to link by disabling smart power down, ignore
4189 * the return value of this function because there is nothing
4190 * different we would do if it failed
4191 */
4192 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4193 phy_data &= ~IGP02E1000_PM_SPD;
4194 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4195 }
4196 if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4197 u32 reg;
4198
4199 /* Fextnvm7 @ 0xe4[2] = 1 */
4200 reg = er32(FEXTNVM7);
4201 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4202 ew32(FEXTNVM7, reg);
4203 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4204 reg = er32(FEXTNVM9);
4205 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4206 E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4207 ew32(FEXTNVM9, reg);
4208 }
4209
4210 }
4211
4212 /**
4213 * e1000e_trigger_lsc - trigger an LSC interrupt
4214 * @adapter: board private structure
4215 *
4216 * Fire a link status change interrupt to start the watchdog.
4217 **/
e1000e_trigger_lsc(struct e1000_adapter * adapter)4218 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4219 {
4220 struct e1000_hw *hw = &adapter->hw;
4221
4222 if (adapter->msix_entries)
4223 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4224 else
4225 ew32(ICS, E1000_ICS_LSC);
4226 }
4227
e1000e_up(struct e1000_adapter * adapter)4228 void e1000e_up(struct e1000_adapter *adapter)
4229 {
4230 /* hardware has been reset, we need to reload some things */
4231 e1000_configure(adapter);
4232
4233 clear_bit(__E1000_DOWN, &adapter->state);
4234
4235 if (adapter->msix_entries)
4236 e1000_configure_msix(adapter);
4237 e1000_irq_enable(adapter);
4238
4239 /* Tx queue started by watchdog timer when link is up */
4240
4241 e1000e_trigger_lsc(adapter);
4242 }
4243
e1000e_flush_descriptors(struct e1000_adapter * adapter)4244 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4245 {
4246 struct e1000_hw *hw = &adapter->hw;
4247
4248 if (!(adapter->flags2 & FLAG2_DMA_BURST))
4249 return;
4250
4251 /* flush pending descriptor writebacks to memory */
4252 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4253 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4254
4255 /* execute the writes immediately */
4256 e1e_flush();
4257
4258 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4259 * write is successful
4260 */
4261 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4262 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4263
4264 /* execute the writes immediately */
4265 e1e_flush();
4266 }
4267
4268 static void e1000e_update_stats(struct e1000_adapter *adapter);
4269
4270 /**
4271 * e1000e_down - quiesce the device and optionally reset the hardware
4272 * @adapter: board private structure
4273 * @reset: boolean flag to reset the hardware or not
4274 */
e1000e_down(struct e1000_adapter * adapter,bool reset)4275 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4276 {
4277 struct net_device *netdev = adapter->netdev;
4278 struct e1000_hw *hw = &adapter->hw;
4279 u32 tctl, rctl;
4280
4281 /* signal that we're down so the interrupt handler does not
4282 * reschedule our watchdog timer
4283 */
4284 set_bit(__E1000_DOWN, &adapter->state);
4285
4286 netif_carrier_off(netdev);
4287
4288 /* disable receives in the hardware */
4289 rctl = er32(RCTL);
4290 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4291 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4292 /* flush and sleep below */
4293
4294 netif_stop_queue(netdev);
4295
4296 /* disable transmits in the hardware */
4297 tctl = er32(TCTL);
4298 tctl &= ~E1000_TCTL_EN;
4299 ew32(TCTL, tctl);
4300
4301 /* flush both disables and wait for them to finish */
4302 e1e_flush();
4303 usleep_range(10000, 11000);
4304
4305 e1000_irq_disable(adapter);
4306
4307 napi_synchronize(&adapter->napi);
4308
4309 timer_delete_sync(&adapter->watchdog_timer);
4310 timer_delete_sync(&adapter->phy_info_timer);
4311
4312 spin_lock(&adapter->stats64_lock);
4313 e1000e_update_stats(adapter);
4314 spin_unlock(&adapter->stats64_lock);
4315
4316 e1000e_flush_descriptors(adapter);
4317
4318 adapter->link_speed = 0;
4319 adapter->link_duplex = 0;
4320
4321 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4322 if ((hw->mac.type >= e1000_pch2lan) &&
4323 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4324 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4325 e_dbg("failed to disable jumbo frame workaround mode\n");
4326
4327 if (!pci_channel_offline(adapter->pdev)) {
4328 if (reset)
4329 e1000e_reset(adapter);
4330 else if (hw->mac.type >= e1000_pch_spt)
4331 e1000_flush_desc_rings(adapter);
4332 }
4333 e1000_clean_tx_ring(adapter->tx_ring);
4334 e1000_clean_rx_ring(adapter->rx_ring);
4335 }
4336
e1000e_reinit_locked(struct e1000_adapter * adapter)4337 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4338 {
4339 might_sleep();
4340 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4341 usleep_range(1000, 1100);
4342 e1000e_down(adapter, true);
4343 e1000e_up(adapter);
4344 clear_bit(__E1000_RESETTING, &adapter->state);
4345 }
4346
4347 /**
4348 * e1000e_sanitize_systim - sanitize raw cycle counter reads
4349 * @hw: pointer to the HW structure
4350 * @systim: PHC time value read, sanitized and returned
4351 * @sts: structure to hold system time before and after reading SYSTIML,
4352 * may be NULL
4353 *
4354 * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4355 * check to see that the time is incrementing at a reasonable
4356 * rate and is a multiple of incvalue.
4357 **/
e1000e_sanitize_systim(struct e1000_hw * hw,u64 systim,struct ptp_system_timestamp * sts)4358 static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4359 struct ptp_system_timestamp *sts)
4360 {
4361 u64 time_delta, rem, temp;
4362 u64 systim_next;
4363 u32 incvalue;
4364 int i;
4365
4366 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4367 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4368 /* latch SYSTIMH on read of SYSTIML */
4369 ptp_read_system_prets(sts);
4370 systim_next = (u64)er32(SYSTIML);
4371 ptp_read_system_postts(sts);
4372 systim_next |= (u64)er32(SYSTIMH) << 32;
4373
4374 time_delta = systim_next - systim;
4375 temp = time_delta;
4376 /* VMWare users have seen incvalue of zero, don't div / 0 */
4377 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4378
4379 systim = systim_next;
4380
4381 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4382 break;
4383 }
4384
4385 return systim;
4386 }
4387
4388 /**
4389 * e1000e_read_systim - read SYSTIM register
4390 * @adapter: board private structure
4391 * @sts: structure which will contain system time before and after reading
4392 * SYSTIML, may be NULL
4393 **/
e1000e_read_systim(struct e1000_adapter * adapter,struct ptp_system_timestamp * sts)4394 u64 e1000e_read_systim(struct e1000_adapter *adapter,
4395 struct ptp_system_timestamp *sts)
4396 {
4397 struct e1000_hw *hw = &adapter->hw;
4398 u32 systimel, systimel_2, systimeh;
4399 u64 systim;
4400 /* SYSTIMH latching upon SYSTIML read does not work well.
4401 * This means that if SYSTIML overflows after we read it but before
4402 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4403 * will experience a huge non linear increment in the systime value
4404 * to fix that we test for overflow and if true, we re-read systime.
4405 */
4406 ptp_read_system_prets(sts);
4407 systimel = er32(SYSTIML);
4408 ptp_read_system_postts(sts);
4409 systimeh = er32(SYSTIMH);
4410 /* Is systimel is so large that overflow is possible? */
4411 if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4412 ptp_read_system_prets(sts);
4413 systimel_2 = er32(SYSTIML);
4414 ptp_read_system_postts(sts);
4415 if (systimel > systimel_2) {
4416 /* There was an overflow, read again SYSTIMH, and use
4417 * systimel_2
4418 */
4419 systimeh = er32(SYSTIMH);
4420 systimel = systimel_2;
4421 }
4422 }
4423 systim = (u64)systimel;
4424 systim |= (u64)systimeh << 32;
4425
4426 if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4427 systim = e1000e_sanitize_systim(hw, systim, sts);
4428
4429 return systim;
4430 }
4431
4432 /**
4433 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4434 * @cc: cyclecounter structure
4435 **/
e1000e_cyclecounter_read(struct cyclecounter * cc)4436 static u64 e1000e_cyclecounter_read(struct cyclecounter *cc)
4437 {
4438 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4439 cc);
4440
4441 return e1000e_read_systim(adapter, NULL);
4442 }
4443
4444 /**
4445 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4446 * @adapter: board private structure to initialize
4447 *
4448 * e1000_sw_init initializes the Adapter private data structure.
4449 * Fields are initialized based on PCI device information and
4450 * OS network device settings (MTU size).
4451 **/
e1000_sw_init(struct e1000_adapter * adapter)4452 static int e1000_sw_init(struct e1000_adapter *adapter)
4453 {
4454 struct net_device *netdev = adapter->netdev;
4455
4456 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4457 adapter->rx_ps_bsize0 = 128;
4458 adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4459 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4460 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4461 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4462
4463 spin_lock_init(&adapter->stats64_lock);
4464
4465 e1000e_set_interrupt_capability(adapter);
4466
4467 if (e1000_alloc_queues(adapter))
4468 return -ENOMEM;
4469
4470 /* Setup hardware time stamping cyclecounter */
4471 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4472 adapter->cc.read = e1000e_cyclecounter_read;
4473 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4474 adapter->cc.mult = 1;
4475 /* cc.shift set in e1000e_get_base_tininca() */
4476
4477 spin_lock_init(&adapter->systim_lock);
4478 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4479 }
4480
4481 /* Explicitly disable IRQ since the NIC can be in any state. */
4482 e1000_irq_disable(adapter);
4483
4484 set_bit(__E1000_DOWN, &adapter->state);
4485 return 0;
4486 }
4487
4488 /**
4489 * e1000_intr_msi_test - Interrupt Handler
4490 * @irq: interrupt number
4491 * @data: pointer to a network interface device structure
4492 **/
e1000_intr_msi_test(int __always_unused irq,void * data)4493 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4494 {
4495 struct net_device *netdev = data;
4496 struct e1000_adapter *adapter = netdev_priv(netdev);
4497 struct e1000_hw *hw = &adapter->hw;
4498 u32 icr = er32(ICR);
4499
4500 e_dbg("icr is %08X\n", icr);
4501 if (icr & E1000_ICR_RXSEQ) {
4502 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4503 /* Force memory writes to complete before acknowledging the
4504 * interrupt is handled.
4505 */
4506 wmb();
4507 }
4508
4509 return IRQ_HANDLED;
4510 }
4511
4512 /**
4513 * e1000_test_msi_interrupt - Returns 0 for successful test
4514 * @adapter: board private struct
4515 *
4516 * code flow taken from tg3.c
4517 **/
e1000_test_msi_interrupt(struct e1000_adapter * adapter)4518 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4519 {
4520 struct net_device *netdev = adapter->netdev;
4521 struct e1000_hw *hw = &adapter->hw;
4522 int err;
4523
4524 /* poll_enable hasn't been called yet, so don't need disable */
4525 /* clear any pending events */
4526 er32(ICR);
4527
4528 /* free the real vector and request a test handler */
4529 e1000_free_irq(adapter);
4530 e1000e_reset_interrupt_capability(adapter);
4531
4532 /* Assume that the test fails, if it succeeds then the test
4533 * MSI irq handler will unset this flag
4534 */
4535 adapter->flags |= FLAG_MSI_TEST_FAILED;
4536
4537 err = pci_enable_msi(adapter->pdev);
4538 if (err)
4539 goto msi_test_failed;
4540
4541 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4542 netdev->name, netdev);
4543 if (err) {
4544 pci_disable_msi(adapter->pdev);
4545 goto msi_test_failed;
4546 }
4547
4548 /* Force memory writes to complete before enabling and firing an
4549 * interrupt.
4550 */
4551 wmb();
4552
4553 e1000_irq_enable(adapter);
4554
4555 /* fire an unusual interrupt on the test handler */
4556 ew32(ICS, E1000_ICS_RXSEQ);
4557 e1e_flush();
4558 msleep(100);
4559
4560 e1000_irq_disable(adapter);
4561
4562 rmb(); /* read flags after interrupt has been fired */
4563
4564 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4565 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4566 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4567 } else {
4568 e_dbg("MSI interrupt test succeeded!\n");
4569 }
4570
4571 free_irq(adapter->pdev->irq, netdev);
4572 pci_disable_msi(adapter->pdev);
4573
4574 msi_test_failed:
4575 e1000e_set_interrupt_capability(adapter);
4576 return e1000_request_irq(adapter);
4577 }
4578
4579 /**
4580 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4581 * @adapter: board private struct
4582 *
4583 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4584 **/
e1000_test_msi(struct e1000_adapter * adapter)4585 static int e1000_test_msi(struct e1000_adapter *adapter)
4586 {
4587 int err;
4588 u16 pci_cmd;
4589
4590 if (!(adapter->flags & FLAG_MSI_ENABLED))
4591 return 0;
4592
4593 /* disable SERR in case the MSI write causes a master abort */
4594 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4595 if (pci_cmd & PCI_COMMAND_SERR)
4596 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4597 pci_cmd & ~PCI_COMMAND_SERR);
4598
4599 err = e1000_test_msi_interrupt(adapter);
4600
4601 /* re-enable SERR */
4602 if (pci_cmd & PCI_COMMAND_SERR) {
4603 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4604 pci_cmd |= PCI_COMMAND_SERR;
4605 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4606 }
4607
4608 return err;
4609 }
4610
4611 /**
4612 * e1000e_open - Called when a network interface is made active
4613 * @netdev: network interface device structure
4614 *
4615 * Returns 0 on success, negative value on failure
4616 *
4617 * The open entry point is called when a network interface is made
4618 * active by the system (IFF_UP). At this point all resources needed
4619 * for transmit and receive operations are allocated, the interrupt
4620 * handler is registered with the OS, the watchdog timer is started,
4621 * and the stack is notified that the interface is ready.
4622 **/
e1000e_open(struct net_device * netdev)4623 int e1000e_open(struct net_device *netdev)
4624 {
4625 struct e1000_adapter *adapter = netdev_priv(netdev);
4626 struct e1000_hw *hw = &adapter->hw;
4627 struct pci_dev *pdev = adapter->pdev;
4628 int err;
4629 int irq;
4630
4631 /* disallow open during test */
4632 if (test_bit(__E1000_TESTING, &adapter->state))
4633 return -EBUSY;
4634
4635 pm_runtime_get_sync(&pdev->dev);
4636
4637 netif_carrier_off(netdev);
4638 netif_stop_queue(netdev);
4639
4640 /* allocate transmit descriptors */
4641 err = e1000e_setup_tx_resources(adapter->tx_ring);
4642 if (err)
4643 goto err_setup_tx;
4644
4645 /* allocate receive descriptors */
4646 err = e1000e_setup_rx_resources(adapter->rx_ring);
4647 if (err)
4648 goto err_setup_rx;
4649
4650 /* If AMT is enabled, let the firmware know that the network
4651 * interface is now open and reset the part to a known state.
4652 */
4653 if (adapter->flags & FLAG_HAS_AMT) {
4654 e1000e_get_hw_control(adapter);
4655 e1000e_reset(adapter);
4656 }
4657
4658 e1000e_power_up_phy(adapter);
4659
4660 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4661 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4662 e1000_update_mng_vlan(adapter);
4663
4664 /* DMA latency requirement to workaround jumbo issue */
4665 cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4666
4667 /* before we allocate an interrupt, we must be ready to handle it.
4668 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4669 * as soon as we call pci_request_irq, so we have to setup our
4670 * clean_rx handler before we do so.
4671 */
4672 e1000_configure(adapter);
4673
4674 err = e1000_request_irq(adapter);
4675 if (err)
4676 goto err_req_irq;
4677
4678 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4679 * ignore e1000e MSI messages, which means we need to test our MSI
4680 * interrupt now
4681 */
4682 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4683 err = e1000_test_msi(adapter);
4684 if (err) {
4685 e_err("Interrupt allocation failed\n");
4686 goto err_req_irq;
4687 }
4688 }
4689
4690 /* From here on the code is the same as e1000e_up() */
4691 clear_bit(__E1000_DOWN, &adapter->state);
4692
4693 if (adapter->int_mode == E1000E_INT_MODE_MSIX)
4694 irq = adapter->msix_entries[0].vector;
4695 else
4696 irq = adapter->pdev->irq;
4697
4698 netif_napi_set_irq(&adapter->napi, irq);
4699 napi_enable(&adapter->napi);
4700 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, &adapter->napi);
4701 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, &adapter->napi);
4702
4703 e1000_irq_enable(adapter);
4704
4705 adapter->tx_hang_recheck = false;
4706
4707 hw->mac.get_link_status = true;
4708 pm_runtime_put(&pdev->dev);
4709
4710 e1000e_trigger_lsc(adapter);
4711
4712 return 0;
4713
4714 err_req_irq:
4715 cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4716 e1000e_release_hw_control(adapter);
4717 e1000_power_down_phy(adapter);
4718 e1000e_free_rx_resources(adapter->rx_ring);
4719 err_setup_rx:
4720 e1000e_free_tx_resources(adapter->tx_ring);
4721 err_setup_tx:
4722 e1000e_reset(adapter);
4723 pm_runtime_put_sync(&pdev->dev);
4724
4725 return err;
4726 }
4727
4728 /**
4729 * e1000e_close - Disables a network interface
4730 * @netdev: network interface device structure
4731 *
4732 * Returns 0, this is not allowed to fail
4733 *
4734 * The close entry point is called when an interface is de-activated
4735 * by the OS. The hardware is still under the drivers control, but
4736 * needs to be disabled. A global MAC reset is issued to stop the
4737 * hardware, and all transmit and receive resources are freed.
4738 **/
e1000e_close(struct net_device * netdev)4739 int e1000e_close(struct net_device *netdev)
4740 {
4741 struct e1000_adapter *adapter = netdev_priv(netdev);
4742 struct pci_dev *pdev = adapter->pdev;
4743 int count = E1000_CHECK_RESET_COUNT;
4744
4745 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4746 usleep_range(10000, 11000);
4747
4748 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4749
4750 pm_runtime_get_sync(&pdev->dev);
4751
4752 if (netif_device_present(netdev)) {
4753 e1000e_down(adapter, true);
4754 e1000_free_irq(adapter);
4755
4756 /* Link status message must follow this format */
4757 netdev_info(netdev, "NIC Link is Down\n");
4758 }
4759
4760 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, NULL);
4761 netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, NULL);
4762 napi_disable(&adapter->napi);
4763
4764 e1000e_free_tx_resources(adapter->tx_ring);
4765 e1000e_free_rx_resources(adapter->rx_ring);
4766
4767 /* kill manageability vlan ID if supported, but not if a vlan with
4768 * the same ID is registered on the host OS (let 8021q kill it)
4769 */
4770 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4771 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4772 adapter->mng_vlan_id);
4773
4774 /* If AMT is enabled, let the firmware know that the network
4775 * interface is now closed
4776 */
4777 if ((adapter->flags & FLAG_HAS_AMT) &&
4778 !test_bit(__E1000_TESTING, &adapter->state))
4779 e1000e_release_hw_control(adapter);
4780
4781 cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4782
4783 pm_runtime_put_sync(&pdev->dev);
4784
4785 return 0;
4786 }
4787
4788 /**
4789 * e1000_set_mac - Change the Ethernet Address of the NIC
4790 * @netdev: network interface device structure
4791 * @p: pointer to an address structure
4792 *
4793 * Returns 0 on success, negative on failure
4794 **/
e1000_set_mac(struct net_device * netdev,void * p)4795 static int e1000_set_mac(struct net_device *netdev, void *p)
4796 {
4797 struct e1000_adapter *adapter = netdev_priv(netdev);
4798 struct e1000_hw *hw = &adapter->hw;
4799 struct sockaddr *addr = p;
4800
4801 if (!is_valid_ether_addr(addr->sa_data))
4802 return -EADDRNOTAVAIL;
4803
4804 eth_hw_addr_set(netdev, addr->sa_data);
4805 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4806
4807 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4808
4809 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4810 /* activate the work around */
4811 e1000e_set_laa_state_82571(&adapter->hw, 1);
4812
4813 /* Hold a copy of the LAA in RAR[14] This is done so that
4814 * between the time RAR[0] gets clobbered and the time it
4815 * gets fixed (in e1000_watchdog), the actual LAA is in one
4816 * of the RARs and no incoming packets directed to this port
4817 * are dropped. Eventually the LAA will be in RAR[0] and
4818 * RAR[14]
4819 */
4820 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4821 adapter->hw.mac.rar_entry_count - 1);
4822 }
4823
4824 return 0;
4825 }
4826
4827 /**
4828 * e1000e_update_phy_task - work thread to update phy
4829 * @work: pointer to our work struct
4830 *
4831 * this worker thread exists because we must acquire a
4832 * semaphore to read the phy, which we could msleep while
4833 * waiting for it, and we can't msleep in a timer.
4834 **/
e1000e_update_phy_task(struct work_struct * work)4835 static void e1000e_update_phy_task(struct work_struct *work)
4836 {
4837 struct e1000_adapter *adapter = container_of(work,
4838 struct e1000_adapter,
4839 update_phy_task);
4840 struct e1000_hw *hw = &adapter->hw;
4841
4842 if (test_bit(__E1000_DOWN, &adapter->state))
4843 return;
4844
4845 e1000_get_phy_info(hw);
4846
4847 /* Enable EEE on 82579 after link up */
4848 if (hw->phy.type >= e1000_phy_82579)
4849 e1000_set_eee_pchlan(hw);
4850 }
4851
4852 /**
4853 * e1000_update_phy_info - timre call-back to update PHY info
4854 * @t: pointer to timer_list containing private info adapter
4855 *
4856 * Need to wait a few seconds after link up to get diagnostic information from
4857 * the phy
4858 **/
e1000_update_phy_info(struct timer_list * t)4859 static void e1000_update_phy_info(struct timer_list *t)
4860 {
4861 struct e1000_adapter *adapter = timer_container_of(adapter, t,
4862 phy_info_timer);
4863
4864 if (test_bit(__E1000_DOWN, &adapter->state))
4865 return;
4866
4867 schedule_work(&adapter->update_phy_task);
4868 }
4869
4870 /**
4871 * e1000e_update_phy_stats - Update the PHY statistics counters
4872 * @adapter: board private structure
4873 *
4874 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4875 **/
e1000e_update_phy_stats(struct e1000_adapter * adapter)4876 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4877 {
4878 struct e1000_hw *hw = &adapter->hw;
4879 s32 ret_val;
4880 u16 phy_data;
4881
4882 ret_val = hw->phy.ops.acquire(hw);
4883 if (ret_val)
4884 return;
4885
4886 /* A page set is expensive so check if already on desired page.
4887 * If not, set to the page with the PHY status registers.
4888 */
4889 hw->phy.addr = 1;
4890 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4891 &phy_data);
4892 if (ret_val)
4893 goto release;
4894 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4895 ret_val = hw->phy.ops.set_page(hw,
4896 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4897 if (ret_val)
4898 goto release;
4899 }
4900
4901 /* Single Collision Count */
4902 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4903 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4904 if (!ret_val)
4905 adapter->stats.scc += phy_data;
4906
4907 /* Excessive Collision Count */
4908 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4909 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4910 if (!ret_val)
4911 adapter->stats.ecol += phy_data;
4912
4913 /* Multiple Collision Count */
4914 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4915 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4916 if (!ret_val)
4917 adapter->stats.mcc += phy_data;
4918
4919 /* Late Collision Count */
4920 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4921 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4922 if (!ret_val)
4923 adapter->stats.latecol += phy_data;
4924
4925 /* Collision Count - also used for adaptive IFS */
4926 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4927 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4928 if (!ret_val)
4929 hw->mac.collision_delta = phy_data;
4930
4931 /* Defer Count */
4932 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4933 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4934 if (!ret_val)
4935 adapter->stats.dc += phy_data;
4936
4937 /* Transmit with no CRS */
4938 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4939 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4940 if (!ret_val)
4941 adapter->stats.tncrs += phy_data;
4942
4943 release:
4944 hw->phy.ops.release(hw);
4945 }
4946
4947 /**
4948 * e1000e_update_stats - Update the board statistics counters
4949 * @adapter: board private structure
4950 **/
e1000e_update_stats(struct e1000_adapter * adapter)4951 static void e1000e_update_stats(struct e1000_adapter *adapter)
4952 {
4953 struct net_device *netdev = adapter->netdev;
4954 struct e1000_hw *hw = &adapter->hw;
4955 struct pci_dev *pdev = adapter->pdev;
4956
4957 /* Prevent stats update while adapter is being reset, or if the pci
4958 * connection is down.
4959 */
4960 if (adapter->link_speed == 0)
4961 return;
4962 if (pci_channel_offline(pdev))
4963 return;
4964
4965 adapter->stats.crcerrs += er32(CRCERRS);
4966 adapter->stats.gprc += er32(GPRC);
4967 adapter->stats.gorc += er32(GORCL);
4968 er32(GORCH); /* Clear gorc */
4969 adapter->stats.bprc += er32(BPRC);
4970 adapter->stats.mprc += er32(MPRC);
4971 adapter->stats.roc += er32(ROC);
4972
4973 adapter->stats.mpc += er32(MPC);
4974
4975 /* Half-duplex statistics */
4976 if (adapter->link_duplex == HALF_DUPLEX) {
4977 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4978 e1000e_update_phy_stats(adapter);
4979 } else {
4980 adapter->stats.scc += er32(SCC);
4981 adapter->stats.ecol += er32(ECOL);
4982 adapter->stats.mcc += er32(MCC);
4983 adapter->stats.latecol += er32(LATECOL);
4984 adapter->stats.dc += er32(DC);
4985
4986 hw->mac.collision_delta = er32(COLC);
4987
4988 if ((hw->mac.type != e1000_82574) &&
4989 (hw->mac.type != e1000_82583))
4990 adapter->stats.tncrs += er32(TNCRS);
4991 }
4992 adapter->stats.colc += hw->mac.collision_delta;
4993 }
4994
4995 adapter->stats.xonrxc += er32(XONRXC);
4996 adapter->stats.xontxc += er32(XONTXC);
4997 adapter->stats.xoffrxc += er32(XOFFRXC);
4998 adapter->stats.xofftxc += er32(XOFFTXC);
4999 adapter->stats.gptc += er32(GPTC);
5000 adapter->stats.gotc += er32(GOTCL);
5001 er32(GOTCH); /* Clear gotc */
5002 adapter->stats.rnbc += er32(RNBC);
5003 adapter->stats.ruc += er32(RUC);
5004
5005 adapter->stats.mptc += er32(MPTC);
5006 adapter->stats.bptc += er32(BPTC);
5007
5008 /* used for adaptive IFS */
5009
5010 hw->mac.tx_packet_delta = er32(TPT);
5011 adapter->stats.tpt += hw->mac.tx_packet_delta;
5012
5013 adapter->stats.algnerrc += er32(ALGNERRC);
5014 adapter->stats.rxerrc += er32(RXERRC);
5015 adapter->stats.cexterr += er32(CEXTERR);
5016 adapter->stats.tsctc += er32(TSCTC);
5017 adapter->stats.tsctfc += er32(TSCTFC);
5018
5019 /* Fill out the OS statistics structure */
5020 netdev->stats.multicast = adapter->stats.mprc;
5021 netdev->stats.collisions = adapter->stats.colc;
5022
5023 /* Rx Errors */
5024
5025 /* RLEC on some newer hardware can be incorrect so build
5026 * our own version based on RUC and ROC
5027 */
5028 netdev->stats.rx_errors = adapter->stats.rxerrc +
5029 adapter->stats.crcerrs + adapter->stats.algnerrc +
5030 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5031 netdev->stats.rx_length_errors = adapter->stats.ruc +
5032 adapter->stats.roc;
5033 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5034 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5035 netdev->stats.rx_missed_errors = adapter->stats.mpc;
5036
5037 /* Tx Errors */
5038 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5039 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5040 netdev->stats.tx_window_errors = adapter->stats.latecol;
5041 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5042
5043 /* Tx Dropped needs to be maintained elsewhere */
5044
5045 /* Management Stats */
5046 adapter->stats.mgptc += er32(MGTPTC);
5047 adapter->stats.mgprc += er32(MGTPRC);
5048 adapter->stats.mgpdc += er32(MGTPDC);
5049
5050 /* Correctable ECC Errors */
5051 if (hw->mac.type >= e1000_pch_lpt) {
5052 u32 pbeccsts = er32(PBECCSTS);
5053
5054 adapter->corr_errors +=
5055 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5056 adapter->uncorr_errors +=
5057 FIELD_GET(E1000_PBECCSTS_UNCORR_ERR_CNT_MASK, pbeccsts);
5058 }
5059 }
5060
5061 /**
5062 * e1000_phy_read_status - Update the PHY register status snapshot
5063 * @adapter: board private structure
5064 **/
e1000_phy_read_status(struct e1000_adapter * adapter)5065 static void e1000_phy_read_status(struct e1000_adapter *adapter)
5066 {
5067 struct e1000_hw *hw = &adapter->hw;
5068 struct e1000_phy_regs *phy = &adapter->phy_regs;
5069
5070 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5071 (er32(STATUS) & E1000_STATUS_LU) &&
5072 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5073 int ret_val;
5074
5075 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5076 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5077 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5078 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5079 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5080 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5081 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5082 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5083 if (ret_val)
5084 e_warn("Error reading PHY register\n");
5085 } else {
5086 /* Do not read PHY registers if link is not up
5087 * Set values to typical power-on defaults
5088 */
5089 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5090 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5091 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5092 BMSR_ERCAP);
5093 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5094 ADVERTISE_ALL | ADVERTISE_CSMA);
5095 phy->lpa = 0;
5096 phy->expansion = EXPANSION_ENABLENPAGE;
5097 phy->ctrl1000 = ADVERTISE_1000FULL;
5098 phy->stat1000 = 0;
5099 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5100 }
5101 }
5102
e1000_print_link_info(struct e1000_adapter * adapter)5103 static void e1000_print_link_info(struct e1000_adapter *adapter)
5104 {
5105 struct e1000_hw *hw = &adapter->hw;
5106 u32 ctrl = er32(CTRL);
5107
5108 /* Link status message must follow this format for user tools */
5109 netdev_info(adapter->netdev,
5110 "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5111 adapter->link_speed,
5112 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5113 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5114 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5115 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5116 }
5117
e1000e_has_link(struct e1000_adapter * adapter)5118 static bool e1000e_has_link(struct e1000_adapter *adapter)
5119 {
5120 struct e1000_hw *hw = &adapter->hw;
5121 bool link_active = false;
5122 s32 ret_val = 0;
5123
5124 /* get_link_status is set on LSC (link status) interrupt or
5125 * Rx sequence error interrupt. get_link_status will stay
5126 * true until the check_for_link establishes link
5127 * for copper adapters ONLY
5128 */
5129 switch (hw->phy.media_type) {
5130 case e1000_media_type_copper:
5131 if (hw->mac.get_link_status) {
5132 ret_val = hw->mac.ops.check_for_link(hw);
5133 link_active = !hw->mac.get_link_status;
5134 } else {
5135 link_active = true;
5136 }
5137 break;
5138 case e1000_media_type_fiber:
5139 ret_val = hw->mac.ops.check_for_link(hw);
5140 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5141 break;
5142 case e1000_media_type_internal_serdes:
5143 ret_val = hw->mac.ops.check_for_link(hw);
5144 link_active = hw->mac.serdes_has_link;
5145 break;
5146 default:
5147 case e1000_media_type_unknown:
5148 break;
5149 }
5150
5151 if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5152 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5153 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5154 e_info("Gigabit has been disabled, downgrading speed\n");
5155 }
5156
5157 return link_active;
5158 }
5159
e1000e_enable_receives(struct e1000_adapter * adapter)5160 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5161 {
5162 /* make sure the receive unit is started */
5163 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5164 (adapter->flags & FLAG_RESTART_NOW)) {
5165 struct e1000_hw *hw = &adapter->hw;
5166 u32 rctl = er32(RCTL);
5167
5168 ew32(RCTL, rctl | E1000_RCTL_EN);
5169 adapter->flags &= ~FLAG_RESTART_NOW;
5170 }
5171 }
5172
e1000e_check_82574_phy_workaround(struct e1000_adapter * adapter)5173 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5174 {
5175 struct e1000_hw *hw = &adapter->hw;
5176
5177 /* With 82574 controllers, PHY needs to be checked periodically
5178 * for hung state and reset, if two calls return true
5179 */
5180 if (e1000_check_phy_82574(hw))
5181 adapter->phy_hang_count++;
5182 else
5183 adapter->phy_hang_count = 0;
5184
5185 if (adapter->phy_hang_count > 1) {
5186 adapter->phy_hang_count = 0;
5187 e_dbg("PHY appears hung - resetting\n");
5188 schedule_work(&adapter->reset_task);
5189 }
5190 }
5191
5192 /**
5193 * e1000_watchdog - Timer Call-back
5194 * @t: pointer to timer_list containing private info adapter
5195 **/
e1000_watchdog(struct timer_list * t)5196 static void e1000_watchdog(struct timer_list *t)
5197 {
5198 struct e1000_adapter *adapter = timer_container_of(adapter, t,
5199 watchdog_timer);
5200
5201 /* Do the rest outside of interrupt context */
5202 schedule_work(&adapter->watchdog_task);
5203
5204 /* TODO: make this use queue_delayed_work() */
5205 }
5206
e1000_watchdog_task(struct work_struct * work)5207 static void e1000_watchdog_task(struct work_struct *work)
5208 {
5209 struct e1000_adapter *adapter = container_of(work,
5210 struct e1000_adapter,
5211 watchdog_task);
5212 struct net_device *netdev = adapter->netdev;
5213 struct e1000_mac_info *mac = &adapter->hw.mac;
5214 struct e1000_phy_info *phy = &adapter->hw.phy;
5215 struct e1000_ring *tx_ring = adapter->tx_ring;
5216 u32 dmoff_exit_timeout = 100, tries = 0;
5217 struct e1000_hw *hw = &adapter->hw;
5218 u32 link, tctl, pcim_state;
5219
5220 if (test_bit(__E1000_DOWN, &adapter->state))
5221 return;
5222
5223 link = e1000e_has_link(adapter);
5224 if ((netif_carrier_ok(netdev)) && link) {
5225 /* Cancel scheduled suspend requests. */
5226 pm_runtime_resume(netdev->dev.parent);
5227
5228 e1000e_enable_receives(adapter);
5229 goto link_up;
5230 }
5231
5232 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5233 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5234 e1000_update_mng_vlan(adapter);
5235
5236 if (link) {
5237 if (!netif_carrier_ok(netdev)) {
5238 bool txb2b = true;
5239
5240 /* Cancel scheduled suspend requests. */
5241 pm_runtime_resume(netdev->dev.parent);
5242
5243 /* Checking if MAC is in DMoff state*/
5244 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {
5245 pcim_state = er32(STATUS);
5246 while (pcim_state & E1000_STATUS_PCIM_STATE) {
5247 if (tries++ == dmoff_exit_timeout) {
5248 e_dbg("Error in exiting dmoff\n");
5249 break;
5250 }
5251 usleep_range(10000, 20000);
5252 pcim_state = er32(STATUS);
5253
5254 /* Checking if MAC exited DMoff state */
5255 if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5256 e1000_phy_hw_reset(&adapter->hw);
5257 }
5258 }
5259
5260 /* update snapshot of PHY registers on LSC */
5261 e1000_phy_read_status(adapter);
5262 mac->ops.get_link_up_info(&adapter->hw,
5263 &adapter->link_speed,
5264 &adapter->link_duplex);
5265 e1000_print_link_info(adapter);
5266
5267 /* check if SmartSpeed worked */
5268 e1000e_check_downshift(hw);
5269 if (phy->speed_downgraded)
5270 netdev_warn(netdev,
5271 "Link Speed was downgraded by SmartSpeed\n");
5272
5273 /* On supported PHYs, check for duplex mismatch only
5274 * if link has autonegotiated at 10/100 half
5275 */
5276 if ((hw->phy.type == e1000_phy_igp_3 ||
5277 hw->phy.type == e1000_phy_bm) &&
5278 hw->mac.autoneg &&
5279 (adapter->link_speed == SPEED_10 ||
5280 adapter->link_speed == SPEED_100) &&
5281 (adapter->link_duplex == HALF_DUPLEX)) {
5282 u16 autoneg_exp;
5283
5284 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5285
5286 if (!(autoneg_exp & EXPANSION_NWAY))
5287 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
5288 }
5289
5290 /* adjust timeout factor according to speed/duplex */
5291 adapter->tx_timeout_factor = 1;
5292 switch (adapter->link_speed) {
5293 case SPEED_10:
5294 txb2b = false;
5295 adapter->tx_timeout_factor = 16;
5296 break;
5297 case SPEED_100:
5298 txb2b = false;
5299 adapter->tx_timeout_factor = 10;
5300 break;
5301 }
5302
5303 /* workaround: re-program speed mode bit after
5304 * link-up event
5305 */
5306 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5307 !txb2b) {
5308 u32 tarc0;
5309
5310 tarc0 = er32(TARC(0));
5311 tarc0 &= ~SPEED_MODE_BIT;
5312 ew32(TARC(0), tarc0);
5313 }
5314
5315 /* enable transmits in the hardware, need to do this
5316 * after setting TARC(0)
5317 */
5318 tctl = er32(TCTL);
5319 tctl |= E1000_TCTL_EN;
5320 ew32(TCTL, tctl);
5321
5322 /* Perform any post-link-up configuration before
5323 * reporting link up.
5324 */
5325 if (phy->ops.cfg_on_link_up)
5326 phy->ops.cfg_on_link_up(hw);
5327
5328 netif_wake_queue(netdev);
5329 netif_carrier_on(netdev);
5330
5331 if (!test_bit(__E1000_DOWN, &adapter->state))
5332 mod_timer(&adapter->phy_info_timer,
5333 round_jiffies(jiffies + 2 * HZ));
5334 }
5335 } else {
5336 if (netif_carrier_ok(netdev)) {
5337 adapter->link_speed = 0;
5338 adapter->link_duplex = 0;
5339 /* Link status message must follow this format */
5340 netdev_info(netdev, "NIC Link is Down\n");
5341 netif_carrier_off(netdev);
5342 netif_stop_queue(netdev);
5343 if (!test_bit(__E1000_DOWN, &adapter->state))
5344 mod_timer(&adapter->phy_info_timer,
5345 round_jiffies(jiffies + 2 * HZ));
5346
5347 /* 8000ES2LAN requires a Rx packet buffer work-around
5348 * on link down event; reset the controller to flush
5349 * the Rx packet buffer.
5350 */
5351 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5352 adapter->flags |= FLAG_RESTART_NOW;
5353 else
5354 pm_schedule_suspend(netdev->dev.parent,
5355 LINK_TIMEOUT);
5356 }
5357 }
5358
5359 link_up:
5360 spin_lock(&adapter->stats64_lock);
5361 e1000e_update_stats(adapter);
5362
5363 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5364 adapter->tpt_old = adapter->stats.tpt;
5365 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5366 adapter->colc_old = adapter->stats.colc;
5367
5368 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5369 adapter->gorc_old = adapter->stats.gorc;
5370 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5371 adapter->gotc_old = adapter->stats.gotc;
5372 spin_unlock(&adapter->stats64_lock);
5373
5374 /* If the link is lost the controller stops DMA, but
5375 * if there is queued Tx work it cannot be done. So
5376 * reset the controller to flush the Tx packet buffers.
5377 */
5378 if (!netif_carrier_ok(netdev) &&
5379 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5380 adapter->flags |= FLAG_RESTART_NOW;
5381
5382 /* If reset is necessary, do it outside of interrupt context. */
5383 if (adapter->flags & FLAG_RESTART_NOW) {
5384 schedule_work(&adapter->reset_task);
5385 /* return immediately since reset is imminent */
5386 return;
5387 }
5388
5389 e1000e_update_adaptive(&adapter->hw);
5390
5391 /* Simple mode for Interrupt Throttle Rate (ITR) */
5392 if (adapter->itr_setting == 4) {
5393 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5394 * Total asymmetrical Tx or Rx gets ITR=8000;
5395 * everyone else is between 2000-8000.
5396 */
5397 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5398 u32 dif = (adapter->gotc > adapter->gorc ?
5399 adapter->gotc - adapter->gorc :
5400 adapter->gorc - adapter->gotc) / 10000;
5401 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5402
5403 e1000e_write_itr(adapter, itr);
5404 }
5405
5406 /* Cause software interrupt to ensure Rx ring is cleaned */
5407 if (adapter->msix_entries)
5408 ew32(ICS, adapter->rx_ring->ims_val);
5409 else
5410 ew32(ICS, E1000_ICS_RXDMT0);
5411
5412 /* flush pending descriptors to memory before detecting Tx hang */
5413 e1000e_flush_descriptors(adapter);
5414
5415 /* Force detection of hung controller every watchdog period */
5416 adapter->detect_tx_hung = true;
5417
5418 /* With 82571 controllers, LAA may be overwritten due to controller
5419 * reset from the other port. Set the appropriate LAA in RAR[0]
5420 */
5421 if (e1000e_get_laa_state_82571(hw))
5422 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5423
5424 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5425 e1000e_check_82574_phy_workaround(adapter);
5426
5427 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5428 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5429 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5430 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5431 er32(RXSTMPH);
5432 adapter->rx_hwtstamp_cleared++;
5433 } else {
5434 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5435 }
5436 }
5437
5438 /* Reset the timer */
5439 if (!test_bit(__E1000_DOWN, &adapter->state))
5440 mod_timer(&adapter->watchdog_timer,
5441 round_jiffies(jiffies + 2 * HZ));
5442 }
5443
5444 #define E1000_TX_FLAGS_CSUM 0x00000001
5445 #define E1000_TX_FLAGS_VLAN 0x00000002
5446 #define E1000_TX_FLAGS_TSO 0x00000004
5447 #define E1000_TX_FLAGS_IPV4 0x00000008
5448 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5449 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5450 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5451 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5452
e1000_tso(struct e1000_ring * tx_ring,struct sk_buff * skb,__be16 protocol)5453 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5454 __be16 protocol)
5455 {
5456 struct e1000_context_desc *context_desc;
5457 struct e1000_buffer *buffer_info;
5458 unsigned int i;
5459 u32 cmd_length = 0;
5460 u16 ipcse = 0, mss;
5461 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5462 int err;
5463
5464 if (!skb_is_gso(skb))
5465 return 0;
5466
5467 err = skb_cow_head(skb, 0);
5468 if (err < 0)
5469 return err;
5470
5471 hdr_len = skb_tcp_all_headers(skb);
5472 mss = skb_shinfo(skb)->gso_size;
5473 if (protocol == htons(ETH_P_IP)) {
5474 struct iphdr *iph = ip_hdr(skb);
5475 iph->tot_len = 0;
5476 iph->check = 0;
5477 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5478 0, IPPROTO_TCP, 0);
5479 cmd_length = E1000_TXD_CMD_IP;
5480 ipcse = skb_transport_offset(skb) - 1;
5481 } else if (skb_is_gso_v6(skb)) {
5482 tcp_v6_gso_csum_prep(skb);
5483 ipcse = 0;
5484 }
5485 ipcss = skb_network_offset(skb);
5486 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5487 tucss = skb_transport_offset(skb);
5488 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5489
5490 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5491 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5492
5493 i = tx_ring->next_to_use;
5494 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5495 buffer_info = &tx_ring->buffer_info[i];
5496
5497 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5498 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5499 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5500 context_desc->upper_setup.tcp_fields.tucss = tucss;
5501 context_desc->upper_setup.tcp_fields.tucso = tucso;
5502 context_desc->upper_setup.tcp_fields.tucse = 0;
5503 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5504 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5505 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5506
5507 buffer_info->time_stamp = jiffies;
5508 buffer_info->next_to_watch = i;
5509
5510 i++;
5511 if (i == tx_ring->count)
5512 i = 0;
5513 tx_ring->next_to_use = i;
5514
5515 return 1;
5516 }
5517
e1000_tx_csum(struct e1000_ring * tx_ring,struct sk_buff * skb,__be16 protocol)5518 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5519 __be16 protocol)
5520 {
5521 struct e1000_adapter *adapter = tx_ring->adapter;
5522 struct e1000_context_desc *context_desc;
5523 struct e1000_buffer *buffer_info;
5524 unsigned int i;
5525 u8 css;
5526 u32 cmd_len = E1000_TXD_CMD_DEXT;
5527
5528 if (skb->ip_summed != CHECKSUM_PARTIAL)
5529 return false;
5530
5531 switch (protocol) {
5532 case cpu_to_be16(ETH_P_IP):
5533 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5534 cmd_len |= E1000_TXD_CMD_TCP;
5535 break;
5536 case cpu_to_be16(ETH_P_IPV6):
5537 /* XXX not handling all IPV6 headers */
5538 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5539 cmd_len |= E1000_TXD_CMD_TCP;
5540 break;
5541 default:
5542 if (unlikely(net_ratelimit()))
5543 e_warn("checksum_partial proto=%x!\n",
5544 be16_to_cpu(protocol));
5545 break;
5546 }
5547
5548 css = skb_checksum_start_offset(skb);
5549
5550 i = tx_ring->next_to_use;
5551 buffer_info = &tx_ring->buffer_info[i];
5552 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5553
5554 context_desc->lower_setup.ip_config = 0;
5555 context_desc->upper_setup.tcp_fields.tucss = css;
5556 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5557 context_desc->upper_setup.tcp_fields.tucse = 0;
5558 context_desc->tcp_seg_setup.data = 0;
5559 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5560
5561 buffer_info->time_stamp = jiffies;
5562 buffer_info->next_to_watch = i;
5563
5564 i++;
5565 if (i == tx_ring->count)
5566 i = 0;
5567 tx_ring->next_to_use = i;
5568
5569 return true;
5570 }
5571
e1000_tx_map(struct e1000_ring * tx_ring,struct sk_buff * skb,unsigned int first,unsigned int max_per_txd,unsigned int nr_frags)5572 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5573 unsigned int first, unsigned int max_per_txd,
5574 unsigned int nr_frags)
5575 {
5576 struct e1000_adapter *adapter = tx_ring->adapter;
5577 struct pci_dev *pdev = adapter->pdev;
5578 struct e1000_buffer *buffer_info;
5579 unsigned int len = skb_headlen(skb);
5580 unsigned int offset = 0, size, count = 0, i;
5581 unsigned int f, bytecount, segs;
5582
5583 i = tx_ring->next_to_use;
5584
5585 while (len) {
5586 buffer_info = &tx_ring->buffer_info[i];
5587 size = min(len, max_per_txd);
5588
5589 buffer_info->length = size;
5590 buffer_info->time_stamp = jiffies;
5591 buffer_info->next_to_watch = i;
5592 buffer_info->dma = dma_map_single(&pdev->dev,
5593 skb->data + offset,
5594 size, DMA_TO_DEVICE);
5595 buffer_info->mapped_as_page = false;
5596 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5597 goto dma_error;
5598
5599 len -= size;
5600 offset += size;
5601 count++;
5602
5603 if (len) {
5604 i++;
5605 if (i == tx_ring->count)
5606 i = 0;
5607 }
5608 }
5609
5610 for (f = 0; f < nr_frags; f++) {
5611 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5612
5613 len = skb_frag_size(frag);
5614 offset = 0;
5615
5616 while (len) {
5617 i++;
5618 if (i == tx_ring->count)
5619 i = 0;
5620
5621 buffer_info = &tx_ring->buffer_info[i];
5622 size = min(len, max_per_txd);
5623
5624 buffer_info->length = size;
5625 buffer_info->time_stamp = jiffies;
5626 buffer_info->next_to_watch = i;
5627 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5628 offset, size,
5629 DMA_TO_DEVICE);
5630 buffer_info->mapped_as_page = true;
5631 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5632 goto dma_error;
5633
5634 len -= size;
5635 offset += size;
5636 count++;
5637 }
5638 }
5639
5640 segs = skb_shinfo(skb)->gso_segs ? : 1;
5641 /* multiply data chunks by size of headers */
5642 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5643
5644 tx_ring->buffer_info[i].skb = skb;
5645 tx_ring->buffer_info[i].segs = segs;
5646 tx_ring->buffer_info[i].bytecount = bytecount;
5647 tx_ring->buffer_info[first].next_to_watch = i;
5648
5649 return count;
5650
5651 dma_error:
5652 dev_err(&pdev->dev, "Tx DMA map failed\n");
5653 buffer_info->dma = 0;
5654 if (count)
5655 count--;
5656
5657 while (count--) {
5658 if (i == 0)
5659 i += tx_ring->count;
5660 i--;
5661 buffer_info = &tx_ring->buffer_info[i];
5662 e1000_put_txbuf(tx_ring, buffer_info, true);
5663 }
5664
5665 return 0;
5666 }
5667
e1000_tx_queue(struct e1000_ring * tx_ring,int tx_flags,int count)5668 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5669 {
5670 struct e1000_adapter *adapter = tx_ring->adapter;
5671 struct e1000_tx_desc *tx_desc = NULL;
5672 struct e1000_buffer *buffer_info;
5673 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5674 unsigned int i;
5675
5676 if (tx_flags & E1000_TX_FLAGS_TSO) {
5677 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5678 E1000_TXD_CMD_TSE;
5679 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5680
5681 if (tx_flags & E1000_TX_FLAGS_IPV4)
5682 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5683 }
5684
5685 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5686 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5687 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5688 }
5689
5690 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5691 txd_lower |= E1000_TXD_CMD_VLE;
5692 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5693 }
5694
5695 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5696 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5697
5698 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5699 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5700 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5701 }
5702
5703 i = tx_ring->next_to_use;
5704
5705 do {
5706 buffer_info = &tx_ring->buffer_info[i];
5707 tx_desc = E1000_TX_DESC(*tx_ring, i);
5708 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5709 tx_desc->lower.data = cpu_to_le32(txd_lower |
5710 buffer_info->length);
5711 tx_desc->upper.data = cpu_to_le32(txd_upper);
5712
5713 i++;
5714 if (i == tx_ring->count)
5715 i = 0;
5716 } while (--count > 0);
5717
5718 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5719
5720 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5721 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5722 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5723
5724 /* Force memory writes to complete before letting h/w
5725 * know there are new descriptors to fetch. (Only
5726 * applicable for weak-ordered memory model archs,
5727 * such as IA-64).
5728 */
5729 wmb();
5730
5731 tx_ring->next_to_use = i;
5732 }
5733
5734 #define MINIMUM_DHCP_PACKET_SIZE 282
e1000_transfer_dhcp_info(struct e1000_adapter * adapter,struct sk_buff * skb)5735 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5736 struct sk_buff *skb)
5737 {
5738 struct e1000_hw *hw = &adapter->hw;
5739 u16 length, offset;
5740
5741 if (skb_vlan_tag_present(skb) &&
5742 !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5743 (adapter->hw.mng_cookie.status &
5744 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5745 return 0;
5746
5747 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5748 return 0;
5749
5750 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5751 return 0;
5752
5753 {
5754 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5755 struct udphdr *udp;
5756
5757 if (ip->protocol != IPPROTO_UDP)
5758 return 0;
5759
5760 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5761 if (ntohs(udp->dest) != 67)
5762 return 0;
5763
5764 offset = (u8 *)udp + 8 - skb->data;
5765 length = skb->len - offset;
5766 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5767 }
5768
5769 return 0;
5770 }
5771
__e1000_maybe_stop_tx(struct e1000_ring * tx_ring,int size)5772 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5773 {
5774 struct e1000_adapter *adapter = tx_ring->adapter;
5775
5776 netif_stop_queue(adapter->netdev);
5777 /* Herbert's original patch had:
5778 * smp_mb__after_netif_stop_queue();
5779 * but since that doesn't exist yet, just open code it.
5780 */
5781 smp_mb();
5782
5783 /* We need to check again in a case another CPU has just
5784 * made room available.
5785 */
5786 if (e1000_desc_unused(tx_ring) < size)
5787 return -EBUSY;
5788
5789 /* A reprieve! */
5790 netif_start_queue(adapter->netdev);
5791 ++adapter->restart_queue;
5792 return 0;
5793 }
5794
e1000_maybe_stop_tx(struct e1000_ring * tx_ring,int size)5795 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5796 {
5797 BUG_ON(size > tx_ring->count);
5798
5799 if (e1000_desc_unused(tx_ring) >= size)
5800 return 0;
5801 return __e1000_maybe_stop_tx(tx_ring, size);
5802 }
5803
e1000_xmit_frame(struct sk_buff * skb,struct net_device * netdev)5804 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5805 struct net_device *netdev)
5806 {
5807 struct e1000_adapter *adapter = netdev_priv(netdev);
5808 struct e1000_ring *tx_ring = adapter->tx_ring;
5809 unsigned int first;
5810 unsigned int tx_flags = 0;
5811 unsigned int len = skb_headlen(skb);
5812 unsigned int nr_frags;
5813 unsigned int mss;
5814 int count = 0;
5815 int tso;
5816 unsigned int f;
5817 __be16 protocol = vlan_get_protocol(skb);
5818
5819 if (test_bit(__E1000_DOWN, &adapter->state)) {
5820 dev_kfree_skb_any(skb);
5821 return NETDEV_TX_OK;
5822 }
5823
5824 if (skb->len <= 0) {
5825 dev_kfree_skb_any(skb);
5826 return NETDEV_TX_OK;
5827 }
5828
5829 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5830 * pad skb in order to meet this minimum size requirement
5831 */
5832 if (skb_put_padto(skb, 17))
5833 return NETDEV_TX_OK;
5834
5835 mss = skb_shinfo(skb)->gso_size;
5836 if (mss) {
5837 u8 hdr_len;
5838
5839 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5840 * points to just header, pull a few bytes of payload from
5841 * frags into skb->data
5842 */
5843 hdr_len = skb_tcp_all_headers(skb);
5844 /* we do this workaround for ES2LAN, but it is un-necessary,
5845 * avoiding it could save a lot of cycles
5846 */
5847 if (skb->data_len && (hdr_len == len)) {
5848 unsigned int pull_size;
5849
5850 pull_size = min_t(unsigned int, 4, skb->data_len);
5851 if (!__pskb_pull_tail(skb, pull_size)) {
5852 e_err("__pskb_pull_tail failed.\n");
5853 dev_kfree_skb_any(skb);
5854 return NETDEV_TX_OK;
5855 }
5856 len = skb_headlen(skb);
5857 }
5858 }
5859
5860 /* reserve a descriptor for the offload context */
5861 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5862 count++;
5863 count++;
5864
5865 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5866
5867 nr_frags = skb_shinfo(skb)->nr_frags;
5868 for (f = 0; f < nr_frags; f++)
5869 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5870 adapter->tx_fifo_limit);
5871
5872 if (adapter->hw.mac.tx_pkt_filtering)
5873 e1000_transfer_dhcp_info(adapter, skb);
5874
5875 /* need: count + 2 desc gap to keep tail from touching
5876 * head, otherwise try next time
5877 */
5878 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5879 return NETDEV_TX_BUSY;
5880
5881 if (skb_vlan_tag_present(skb)) {
5882 tx_flags |= E1000_TX_FLAGS_VLAN;
5883 tx_flags |= (skb_vlan_tag_get(skb) <<
5884 E1000_TX_FLAGS_VLAN_SHIFT);
5885 }
5886
5887 first = tx_ring->next_to_use;
5888
5889 tso = e1000_tso(tx_ring, skb, protocol);
5890 if (tso < 0) {
5891 dev_kfree_skb_any(skb);
5892 return NETDEV_TX_OK;
5893 }
5894
5895 if (tso)
5896 tx_flags |= E1000_TX_FLAGS_TSO;
5897 else if (e1000_tx_csum(tx_ring, skb, protocol))
5898 tx_flags |= E1000_TX_FLAGS_CSUM;
5899
5900 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5901 * 82571 hardware supports TSO capabilities for IPv6 as well...
5902 * no longer assume, we must.
5903 */
5904 if (protocol == htons(ETH_P_IP))
5905 tx_flags |= E1000_TX_FLAGS_IPV4;
5906
5907 if (unlikely(skb->no_fcs))
5908 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5909
5910 /* if count is 0 then mapping error has occurred */
5911 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5912 nr_frags);
5913 if (count) {
5914 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5915 (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5916 if (!adapter->tx_hwtstamp_skb) {
5917 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5918 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5919 adapter->tx_hwtstamp_skb = skb_get(skb);
5920 adapter->tx_hwtstamp_start = jiffies;
5921 schedule_work(&adapter->tx_hwtstamp_work);
5922 } else {
5923 adapter->tx_hwtstamp_skipped++;
5924 }
5925 }
5926
5927 skb_tx_timestamp(skb);
5928
5929 netdev_sent_queue(netdev, skb->len);
5930 e1000_tx_queue(tx_ring, tx_flags, count);
5931 /* Make sure there is space in the ring for the next send. */
5932 e1000_maybe_stop_tx(tx_ring,
5933 ((MAX_SKB_FRAGS + 1) *
5934 DIV_ROUND_UP(PAGE_SIZE,
5935 adapter->tx_fifo_limit) + 4));
5936
5937 if (!netdev_xmit_more() ||
5938 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5939 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5940 e1000e_update_tdt_wa(tx_ring,
5941 tx_ring->next_to_use);
5942 else
5943 writel(tx_ring->next_to_use, tx_ring->tail);
5944 }
5945 } else {
5946 dev_kfree_skb_any(skb);
5947 tx_ring->buffer_info[first].time_stamp = 0;
5948 tx_ring->next_to_use = first;
5949 }
5950
5951 return NETDEV_TX_OK;
5952 }
5953
5954 /**
5955 * e1000_tx_timeout - Respond to a Tx Hang
5956 * @netdev: network interface device structure
5957 * @txqueue: index of the hung queue (unused)
5958 **/
e1000_tx_timeout(struct net_device * netdev,unsigned int __always_unused txqueue)5959 static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
5960 {
5961 struct e1000_adapter *adapter = netdev_priv(netdev);
5962
5963 /* Do the reset outside of interrupt context */
5964 adapter->tx_timeout_count++;
5965 schedule_work(&adapter->reset_task);
5966 }
5967
e1000_reset_task(struct work_struct * work)5968 static void e1000_reset_task(struct work_struct *work)
5969 {
5970 struct e1000_adapter *adapter;
5971 adapter = container_of(work, struct e1000_adapter, reset_task);
5972
5973 rtnl_lock();
5974 /* don't run the task if already down */
5975 if (test_bit(__E1000_DOWN, &adapter->state)) {
5976 rtnl_unlock();
5977 return;
5978 }
5979
5980 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5981 e1000e_dump(adapter);
5982 e_err("Reset adapter unexpectedly\n");
5983 }
5984 e1000e_reinit_locked(adapter);
5985 rtnl_unlock();
5986 }
5987
5988 /**
5989 * e1000e_get_stats64 - Get System Network Statistics
5990 * @netdev: network interface device structure
5991 * @stats: rtnl_link_stats64 pointer
5992 *
5993 * Returns the address of the device statistics structure.
5994 **/
e1000e_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)5995 void e1000e_get_stats64(struct net_device *netdev,
5996 struct rtnl_link_stats64 *stats)
5997 {
5998 struct e1000_adapter *adapter = netdev_priv(netdev);
5999
6000 spin_lock(&adapter->stats64_lock);
6001 e1000e_update_stats(adapter);
6002 /* Fill out the OS statistics structure */
6003 stats->rx_bytes = adapter->stats.gorc;
6004 stats->rx_packets = adapter->stats.gprc;
6005 stats->tx_bytes = adapter->stats.gotc;
6006 stats->tx_packets = adapter->stats.gptc;
6007 stats->multicast = adapter->stats.mprc;
6008 stats->collisions = adapter->stats.colc;
6009
6010 /* Rx Errors */
6011
6012 /* RLEC on some newer hardware can be incorrect so build
6013 * our own version based on RUC and ROC
6014 */
6015 stats->rx_errors = adapter->stats.rxerrc +
6016 adapter->stats.crcerrs + adapter->stats.algnerrc +
6017 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
6018 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
6019 stats->rx_crc_errors = adapter->stats.crcerrs;
6020 stats->rx_frame_errors = adapter->stats.algnerrc;
6021 stats->rx_missed_errors = adapter->stats.mpc;
6022
6023 /* Tx Errors */
6024 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6025 stats->tx_aborted_errors = adapter->stats.ecol;
6026 stats->tx_window_errors = adapter->stats.latecol;
6027 stats->tx_carrier_errors = adapter->stats.tncrs;
6028
6029 /* Tx Dropped needs to be maintained elsewhere */
6030
6031 spin_unlock(&adapter->stats64_lock);
6032 }
6033
6034 /**
6035 * e1000_change_mtu - Change the Maximum Transfer Unit
6036 * @netdev: network interface device structure
6037 * @new_mtu: new value for maximum frame size
6038 *
6039 * Returns 0 on success, negative on failure
6040 **/
e1000_change_mtu(struct net_device * netdev,int new_mtu)6041 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6042 {
6043 struct e1000_adapter *adapter = netdev_priv(netdev);
6044 int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6045
6046 /* Jumbo frame support */
6047 if ((new_mtu > ETH_DATA_LEN) &&
6048 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6049 e_err("Jumbo Frames not supported.\n");
6050 return -EINVAL;
6051 }
6052
6053 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6054 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6055 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6056 (new_mtu > ETH_DATA_LEN)) {
6057 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6058 return -EINVAL;
6059 }
6060
6061 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6062 usleep_range(1000, 1100);
6063 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6064 adapter->max_frame_size = max_frame;
6065 netdev_dbg(netdev, "changing MTU from %d to %d\n",
6066 netdev->mtu, new_mtu);
6067 WRITE_ONCE(netdev->mtu, new_mtu);
6068
6069 pm_runtime_get_sync(netdev->dev.parent);
6070
6071 if (netif_running(netdev))
6072 e1000e_down(adapter, true);
6073
6074 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6075 * means we reserve 2 more, this pushes us to allocate from the next
6076 * larger slab size.
6077 * i.e. RXBUFFER_2048 --> size-4096 slab
6078 * However with the new *_jumbo_rx* routines, jumbo receives will use
6079 * fragmented skbs
6080 */
6081
6082 if (max_frame <= 2048)
6083 adapter->rx_buffer_len = 2048;
6084 else
6085 adapter->rx_buffer_len = 4096;
6086
6087 /* adjust allocation if LPE protects us, and we aren't using SBP */
6088 if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6089 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6090
6091 if (netif_running(netdev))
6092 e1000e_up(adapter);
6093 else
6094 e1000e_reset(adapter);
6095
6096 pm_runtime_put_sync(netdev->dev.parent);
6097
6098 clear_bit(__E1000_RESETTING, &adapter->state);
6099
6100 return 0;
6101 }
6102
e1000_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)6103 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6104 {
6105 struct e1000_adapter *adapter = netdev_priv(netdev);
6106 struct mii_ioctl_data *data = if_mii(ifr);
6107
6108 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6109 return -EOPNOTSUPP;
6110
6111 switch (cmd) {
6112 case SIOCGMIIPHY:
6113 data->phy_id = adapter->hw.phy.addr;
6114 break;
6115 case SIOCGMIIREG:
6116 e1000_phy_read_status(adapter);
6117
6118 switch (data->reg_num & 0x1F) {
6119 case MII_BMCR:
6120 data->val_out = adapter->phy_regs.bmcr;
6121 break;
6122 case MII_BMSR:
6123 data->val_out = adapter->phy_regs.bmsr;
6124 break;
6125 case MII_PHYSID1:
6126 data->val_out = (adapter->hw.phy.id >> 16);
6127 break;
6128 case MII_PHYSID2:
6129 data->val_out = (adapter->hw.phy.id & 0xFFFF);
6130 break;
6131 case MII_ADVERTISE:
6132 data->val_out = adapter->phy_regs.advertise;
6133 break;
6134 case MII_LPA:
6135 data->val_out = adapter->phy_regs.lpa;
6136 break;
6137 case MII_EXPANSION:
6138 data->val_out = adapter->phy_regs.expansion;
6139 break;
6140 case MII_CTRL1000:
6141 data->val_out = adapter->phy_regs.ctrl1000;
6142 break;
6143 case MII_STAT1000:
6144 data->val_out = adapter->phy_regs.stat1000;
6145 break;
6146 case MII_ESTATUS:
6147 data->val_out = adapter->phy_regs.estatus;
6148 break;
6149 default:
6150 return -EIO;
6151 }
6152 break;
6153 case SIOCSMIIREG:
6154 default:
6155 return -EOPNOTSUPP;
6156 }
6157 return 0;
6158 }
6159
6160 /**
6161 * e1000e_hwtstamp_set - control hardware time stamping
6162 * @netdev: network interface device structure
6163 * @config: timestamp configuration
6164 * @extack: netlink extended ACK report
6165 *
6166 * Outgoing time stamping can be enabled and disabled. Play nice and
6167 * disable it when requested, although it shouldn't cause any overhead
6168 * when no packet needs it. At most one packet in the queue may be
6169 * marked for time stamping, otherwise it would be impossible to tell
6170 * for sure to which packet the hardware time stamp belongs.
6171 *
6172 * Incoming time stamping has to be configured via the hardware filters.
6173 * Not all combinations are supported, in particular event type has to be
6174 * specified. Matching the kind of event packet is not supported, with the
6175 * exception of "all V2 events regardless of level 2 or 4".
6176 **/
e1000e_hwtstamp_set(struct net_device * netdev,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)6177 static int e1000e_hwtstamp_set(struct net_device *netdev,
6178 struct kernel_hwtstamp_config *config,
6179 struct netlink_ext_ack *extack)
6180 {
6181 struct e1000_adapter *adapter = netdev_priv(netdev);
6182 int ret_val;
6183
6184 ret_val = e1000e_config_hwtstamp(adapter, config, extack);
6185 if (ret_val)
6186 return ret_val;
6187
6188 switch (config->rx_filter) {
6189 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6190 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6191 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6192 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6193 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6194 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6195 /* With V2 type filters which specify a Sync or Delay Request,
6196 * Path Delay Request/Response messages are also time stamped
6197 * by hardware so notify the caller the requested packets plus
6198 * some others are time stamped.
6199 */
6200 config->rx_filter = HWTSTAMP_FILTER_SOME;
6201 break;
6202 default:
6203 break;
6204 }
6205
6206 return 0;
6207 }
6208
e1000e_hwtstamp_get(struct net_device * netdev,struct kernel_hwtstamp_config * kernel_config)6209 static int e1000e_hwtstamp_get(struct net_device *netdev,
6210 struct kernel_hwtstamp_config *kernel_config)
6211 {
6212 struct e1000_adapter *adapter = netdev_priv(netdev);
6213
6214 *kernel_config = adapter->hwtstamp_config;
6215
6216 return 0;
6217 }
6218
e1000_init_phy_wakeup(struct e1000_adapter * adapter,u32 wufc)6219 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6220 {
6221 struct e1000_hw *hw = &adapter->hw;
6222 u32 i, mac_reg, wuc;
6223 u16 phy_reg, wuc_enable;
6224 int retval;
6225
6226 /* copy MAC RARs to PHY RARs */
6227 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6228
6229 retval = hw->phy.ops.acquire(hw);
6230 if (retval) {
6231 e_err("Could not acquire PHY\n");
6232 return retval;
6233 }
6234
6235 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6236 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6237 if (retval)
6238 goto release;
6239
6240 /* copy MAC MTA to PHY MTA - only needed for pchlan */
6241 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6242 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6243 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6244 (u16)(mac_reg & 0xFFFF));
6245 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6246 (u16)((mac_reg >> 16) & 0xFFFF));
6247 }
6248
6249 /* configure PHY Rx Control register */
6250 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6251 mac_reg = er32(RCTL);
6252 if (mac_reg & E1000_RCTL_UPE)
6253 phy_reg |= BM_RCTL_UPE;
6254 if (mac_reg & E1000_RCTL_MPE)
6255 phy_reg |= BM_RCTL_MPE;
6256 phy_reg &= ~(BM_RCTL_MO_MASK);
6257 if (mac_reg & E1000_RCTL_MO_3)
6258 phy_reg |= (FIELD_GET(E1000_RCTL_MO_3, mac_reg)
6259 << BM_RCTL_MO_SHIFT);
6260 if (mac_reg & E1000_RCTL_BAM)
6261 phy_reg |= BM_RCTL_BAM;
6262 if (mac_reg & E1000_RCTL_PMCF)
6263 phy_reg |= BM_RCTL_PMCF;
6264 mac_reg = er32(CTRL);
6265 if (mac_reg & E1000_CTRL_RFCE)
6266 phy_reg |= BM_RCTL_RFCE;
6267 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6268
6269 wuc = E1000_WUC_PME_EN;
6270 if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6271 wuc |= E1000_WUC_APME;
6272
6273 /* enable PHY wakeup in MAC register */
6274 ew32(WUFC, wufc);
6275 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6276 E1000_WUC_PME_STATUS | wuc));
6277
6278 /* configure and enable PHY wakeup in PHY registers */
6279 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6280 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6281
6282 /* activate PHY wakeup */
6283 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6284 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6285 if (retval)
6286 e_err("Could not set PHY Host Wakeup bit\n");
6287 release:
6288 hw->phy.ops.release(hw);
6289
6290 return retval;
6291 }
6292
e1000e_flush_lpic(struct pci_dev * pdev)6293 static void e1000e_flush_lpic(struct pci_dev *pdev)
6294 {
6295 struct net_device *netdev = pci_get_drvdata(pdev);
6296 struct e1000_adapter *adapter = netdev_priv(netdev);
6297 struct e1000_hw *hw = &adapter->hw;
6298 u32 ret_val;
6299
6300 pm_runtime_get_sync(netdev->dev.parent);
6301
6302 ret_val = hw->phy.ops.acquire(hw);
6303 if (ret_val)
6304 goto fl_out;
6305
6306 pr_info("EEE TX LPI TIMER: %08X\n",
6307 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6308
6309 hw->phy.ops.release(hw);
6310
6311 fl_out:
6312 pm_runtime_put_sync(netdev->dev.parent);
6313 }
6314
6315 /* S0ix implementation */
e1000e_s0ix_entry_flow(struct e1000_adapter * adapter)6316 static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6317 {
6318 struct e1000_hw *hw = &adapter->hw;
6319 u32 mac_data;
6320 u16 phy_data;
6321
6322 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6323 hw->mac.type >= e1000_pch_adp) {
6324 /* Request ME configure the device for S0ix */
6325 mac_data = er32(H2ME);
6326 mac_data |= E1000_H2ME_START_DPG;
6327 mac_data &= ~E1000_H2ME_EXIT_DPG;
6328 trace_e1000e_trace_mac_register(mac_data);
6329 ew32(H2ME, mac_data);
6330 } else {
6331 /* Request driver configure the device to S0ix */
6332 /* Disable the periodic inband message,
6333 * don't request PCIe clock in K1 page770_17[10:9] = 10b
6334 */
6335 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6336 phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6337 phy_data |= BIT(10);
6338 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6339
6340 /* Make sure we don't exit K1 every time a new packet arrives
6341 * 772_29[5] = 1 CS_Mode_Stay_In_K1
6342 */
6343 e1e_rphy(hw, I217_CGFREG, &phy_data);
6344 phy_data |= BIT(5);
6345 e1e_wphy(hw, I217_CGFREG, phy_data);
6346
6347 /* Change the MAC/PHY interface to SMBus
6348 * Force the SMBus in PHY page769_23[0] = 1
6349 * Force the SMBus in MAC CTRL_EXT[11] = 1
6350 */
6351 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6352 phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6353 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6354 mac_data = er32(CTRL_EXT);
6355 mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6356 ew32(CTRL_EXT, mac_data);
6357
6358 /* DFT control: PHY bit: page769_20[0] = 1
6359 * page769_20[7] - PHY PLL stop
6360 * page769_20[8] - PHY go to the electrical idle
6361 * page769_20[9] - PHY serdes disable
6362 * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6363 */
6364 e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6365 phy_data |= BIT(0);
6366 phy_data |= BIT(7);
6367 phy_data |= BIT(8);
6368 phy_data |= BIT(9);
6369 e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6370
6371 mac_data = er32(EXTCNF_CTRL);
6372 mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6373 ew32(EXTCNF_CTRL, mac_data);
6374
6375 /* Disable disconnected cable conditioning for Power Gating */
6376 mac_data = er32(DPGFR);
6377 mac_data |= BIT(2);
6378 ew32(DPGFR, mac_data);
6379
6380 /* Enable the Dynamic Clock Gating in the DMA and MAC */
6381 mac_data = er32(CTRL_EXT);
6382 mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6383 ew32(CTRL_EXT, mac_data);
6384 }
6385
6386 /* Enable the Dynamic Power Gating in the MAC */
6387 mac_data = er32(FEXTNVM7);
6388 mac_data |= BIT(22);
6389 ew32(FEXTNVM7, mac_data);
6390
6391 /* Don't wake from dynamic Power Gating with clock request */
6392 mac_data = er32(FEXTNVM12);
6393 mac_data |= BIT(12);
6394 ew32(FEXTNVM12, mac_data);
6395
6396 /* Ungate PGCB clock */
6397 mac_data = er32(FEXTNVM9);
6398 mac_data &= ~BIT(28);
6399 ew32(FEXTNVM9, mac_data);
6400
6401 /* Enable K1 off to enable mPHY Power Gating */
6402 mac_data = er32(FEXTNVM6);
6403 mac_data |= BIT(31);
6404 ew32(FEXTNVM6, mac_data);
6405
6406 /* Enable mPHY power gating for any link and speed */
6407 mac_data = er32(FEXTNVM8);
6408 mac_data |= BIT(9);
6409 ew32(FEXTNVM8, mac_data);
6410
6411 /* No MAC DPG gating SLP_S0 in modern standby
6412 * Switch the logic of the lanphypc to use PMC counter
6413 */
6414 mac_data = er32(FEXTNVM5);
6415 mac_data |= BIT(7);
6416 ew32(FEXTNVM5, mac_data);
6417
6418 /* Disable the time synchronization clock */
6419 mac_data = er32(FEXTNVM7);
6420 mac_data |= BIT(31);
6421 mac_data &= ~BIT(0);
6422 ew32(FEXTNVM7, mac_data);
6423
6424 /* Dynamic Power Gating Enable */
6425 mac_data = er32(CTRL_EXT);
6426 mac_data |= BIT(3);
6427 ew32(CTRL_EXT, mac_data);
6428
6429 /* Check MAC Tx/Rx packet buffer pointers.
6430 * Reset MAC Tx/Rx packet buffer pointers to suppress any
6431 * pending traffic indication that would prevent power gating.
6432 */
6433 mac_data = er32(TDFH);
6434 if (mac_data)
6435 ew32(TDFH, 0);
6436 mac_data = er32(TDFT);
6437 if (mac_data)
6438 ew32(TDFT, 0);
6439 mac_data = er32(TDFHS);
6440 if (mac_data)
6441 ew32(TDFHS, 0);
6442 mac_data = er32(TDFTS);
6443 if (mac_data)
6444 ew32(TDFTS, 0);
6445 mac_data = er32(TDFPC);
6446 if (mac_data)
6447 ew32(TDFPC, 0);
6448 mac_data = er32(RDFH);
6449 if (mac_data)
6450 ew32(RDFH, 0);
6451 mac_data = er32(RDFT);
6452 if (mac_data)
6453 ew32(RDFT, 0);
6454 mac_data = er32(RDFHS);
6455 if (mac_data)
6456 ew32(RDFHS, 0);
6457 mac_data = er32(RDFTS);
6458 if (mac_data)
6459 ew32(RDFTS, 0);
6460 mac_data = er32(RDFPC);
6461 if (mac_data)
6462 ew32(RDFPC, 0);
6463 }
6464
e1000e_s0ix_exit_flow(struct e1000_adapter * adapter)6465 static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6466 {
6467 struct e1000_hw *hw = &adapter->hw;
6468 bool firmware_bug = false;
6469 u32 mac_data;
6470 u16 phy_data;
6471 u32 i = 0;
6472
6473 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID &&
6474 hw->mac.type >= e1000_pch_adp) {
6475 /* Keep the GPT clock enabled for CSME */
6476 mac_data = er32(FEXTNVM);
6477 mac_data |= BIT(3);
6478 ew32(FEXTNVM, mac_data);
6479 /* Request ME unconfigure the device from S0ix */
6480 mac_data = er32(H2ME);
6481 mac_data &= ~E1000_H2ME_START_DPG;
6482 mac_data |= E1000_H2ME_EXIT_DPG;
6483 trace_e1000e_trace_mac_register(mac_data);
6484 ew32(H2ME, mac_data);
6485
6486 /* Poll up to 2.5 seconds for ME to unconfigure DPG.
6487 * If this takes more than 1 second, show a warning indicating a
6488 * firmware bug
6489 */
6490 while (!(er32(EXFWSM) & E1000_EXFWSM_DPG_EXIT_DONE)) {
6491 if (i > 100 && !firmware_bug)
6492 firmware_bug = true;
6493
6494 if (i++ == 250) {
6495 e_dbg("Timeout (firmware bug): %d msec\n",
6496 i * 10);
6497 break;
6498 }
6499
6500 usleep_range(10000, 11000);
6501 }
6502 if (firmware_bug)
6503 e_warn("DPG_EXIT_DONE took %d msec. This is a firmware bug\n",
6504 i * 10);
6505 else
6506 e_dbg("DPG_EXIT_DONE cleared after %d msec\n", i * 10);
6507 } else {
6508 /* Request driver unconfigure the device from S0ix */
6509
6510 /* Cancel disable disconnected cable conditioning
6511 * for Power Gating
6512 */
6513 mac_data = er32(DPGFR);
6514 mac_data &= ~BIT(2);
6515 ew32(DPGFR, mac_data);
6516
6517 /* Disable the Dynamic Clock Gating in the DMA and MAC */
6518 mac_data = er32(CTRL_EXT);
6519 mac_data &= 0xFFF7FFFF;
6520 ew32(CTRL_EXT, mac_data);
6521
6522 /* Enable the periodic inband message,
6523 * Request PCIe clock in K1 page770_17[10:9] =01b
6524 */
6525 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6526 phy_data &= 0xFBFF;
6527 phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6528 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6529
6530 /* Return back configuration
6531 * 772_29[5] = 0 CS_Mode_Stay_In_K1
6532 */
6533 e1e_rphy(hw, I217_CGFREG, &phy_data);
6534 phy_data &= 0xFFDF;
6535 e1e_wphy(hw, I217_CGFREG, phy_data);
6536
6537 /* Change the MAC/PHY interface to Kumeran
6538 * Unforce the SMBus in PHY page769_23[0] = 0
6539 * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6540 */
6541 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6542 phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6543 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6544 mac_data = er32(CTRL_EXT);
6545 mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6546 ew32(CTRL_EXT, mac_data);
6547 }
6548
6549 /* Disable Dynamic Power Gating */
6550 mac_data = er32(CTRL_EXT);
6551 mac_data &= 0xFFFFFFF7;
6552 ew32(CTRL_EXT, mac_data);
6553
6554 /* Enable the time synchronization clock */
6555 mac_data = er32(FEXTNVM7);
6556 mac_data &= ~BIT(31);
6557 mac_data |= BIT(0);
6558 ew32(FEXTNVM7, mac_data);
6559
6560 /* Disable the Dynamic Power Gating in the MAC */
6561 mac_data = er32(FEXTNVM7);
6562 mac_data &= 0xFFBFFFFF;
6563 ew32(FEXTNVM7, mac_data);
6564
6565 /* Disable mPHY power gating for any link and speed */
6566 mac_data = er32(FEXTNVM8);
6567 mac_data &= ~BIT(9);
6568 ew32(FEXTNVM8, mac_data);
6569
6570 /* Disable K1 off */
6571 mac_data = er32(FEXTNVM6);
6572 mac_data &= ~BIT(31);
6573 ew32(FEXTNVM6, mac_data);
6574
6575 /* Disable Ungate PGCB clock */
6576 mac_data = er32(FEXTNVM9);
6577 mac_data |= BIT(28);
6578 ew32(FEXTNVM9, mac_data);
6579
6580 /* Cancel not waking from dynamic
6581 * Power Gating with clock request
6582 */
6583 mac_data = er32(FEXTNVM12);
6584 mac_data &= ~BIT(12);
6585 ew32(FEXTNVM12, mac_data);
6586
6587 /* Revert the lanphypc logic to use the internal Gbe counter
6588 * and not the PMC counter
6589 */
6590 mac_data = er32(FEXTNVM5);
6591 mac_data &= 0xFFFFFF7F;
6592 ew32(FEXTNVM5, mac_data);
6593 }
6594
e1000e_pm_freeze(struct device * dev)6595 static int e1000e_pm_freeze(struct device *dev)
6596 {
6597 struct net_device *netdev = dev_get_drvdata(dev);
6598 struct e1000_adapter *adapter = netdev_priv(netdev);
6599 bool present;
6600
6601 rtnl_lock();
6602
6603 present = netif_device_present(netdev);
6604 netif_device_detach(netdev);
6605
6606 if (present && netif_running(netdev)) {
6607 int count = E1000_CHECK_RESET_COUNT;
6608
6609 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6610 usleep_range(10000, 11000);
6611
6612 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6613
6614 /* Quiesce the device without resetting the hardware */
6615 e1000e_down(adapter, false);
6616 e1000_free_irq(adapter);
6617 }
6618 rtnl_unlock();
6619
6620 e1000e_reset_interrupt_capability(adapter);
6621
6622 /* Allow time for pending master requests to run */
6623 e1000e_disable_pcie_master(&adapter->hw);
6624
6625 return 0;
6626 }
6627
__e1000_shutdown(struct pci_dev * pdev,bool runtime)6628 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6629 {
6630 struct net_device *netdev = pci_get_drvdata(pdev);
6631 struct e1000_adapter *adapter = netdev_priv(netdev);
6632 struct e1000_hw *hw = &adapter->hw;
6633 u32 ctrl, ctrl_ext, rctl, status, wufc;
6634 int retval = 0;
6635
6636 /* Runtime suspend should only enable wakeup for link changes */
6637 if (runtime)
6638 wufc = E1000_WUFC_LNKC;
6639 else if (device_may_wakeup(&pdev->dev))
6640 wufc = adapter->wol;
6641 else
6642 wufc = 0;
6643
6644 status = er32(STATUS);
6645 if (status & E1000_STATUS_LU)
6646 wufc &= ~E1000_WUFC_LNKC;
6647
6648 if (wufc) {
6649 e1000_setup_rctl(adapter);
6650 e1000e_set_rx_mode(netdev);
6651
6652 /* turn on all-multi mode if wake on multicast is enabled */
6653 if (wufc & E1000_WUFC_MC) {
6654 rctl = er32(RCTL);
6655 rctl |= E1000_RCTL_MPE;
6656 ew32(RCTL, rctl);
6657 }
6658
6659 ctrl = er32(CTRL);
6660 ctrl |= E1000_CTRL_ADVD3WUC;
6661 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6662 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6663 ew32(CTRL, ctrl);
6664
6665 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6666 adapter->hw.phy.media_type ==
6667 e1000_media_type_internal_serdes) {
6668 /* keep the laser running in D3 */
6669 ctrl_ext = er32(CTRL_EXT);
6670 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6671 ew32(CTRL_EXT, ctrl_ext);
6672 }
6673
6674 if (!runtime)
6675 e1000e_power_up_phy(adapter);
6676
6677 if (adapter->flags & FLAG_IS_ICH)
6678 e1000_suspend_workarounds_ich8lan(&adapter->hw);
6679
6680 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6681 /* enable wakeup by the PHY */
6682 retval = e1000_init_phy_wakeup(adapter, wufc);
6683 if (retval) {
6684 e_err("Failed to enable wakeup\n");
6685 goto skip_phy_configurations;
6686 }
6687 } else {
6688 /* enable wakeup by the MAC */
6689 ew32(WUFC, wufc);
6690 ew32(WUC, E1000_WUC_PME_EN);
6691 }
6692 } else {
6693 ew32(WUC, 0);
6694 ew32(WUFC, 0);
6695
6696 e1000_power_down_phy(adapter);
6697 }
6698
6699 if (adapter->hw.phy.type == e1000_phy_igp_3) {
6700 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6701 } else if (hw->mac.type >= e1000_pch_lpt) {
6702 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC))) {
6703 /* ULP does not support wake from unicast, multicast
6704 * or broadcast.
6705 */
6706 retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6707 if (retval) {
6708 e_err("Failed to enable ULP\n");
6709 goto skip_phy_configurations;
6710 }
6711 }
6712 }
6713
6714 /* Ensure that the appropriate bits are set in LPI_CTRL
6715 * for EEE in Sx
6716 */
6717 if ((hw->phy.type >= e1000_phy_i217) &&
6718 adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6719 u16 lpi_ctrl = 0;
6720
6721 retval = hw->phy.ops.acquire(hw);
6722 if (!retval) {
6723 retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6724 &lpi_ctrl);
6725 if (!retval) {
6726 if (adapter->eee_advert &
6727 hw->dev_spec.ich8lan.eee_lp_ability &
6728 I82579_EEE_100_SUPPORTED)
6729 lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6730 if (adapter->eee_advert &
6731 hw->dev_spec.ich8lan.eee_lp_ability &
6732 I82579_EEE_1000_SUPPORTED)
6733 lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6734
6735 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6736 lpi_ctrl);
6737 }
6738 }
6739 hw->phy.ops.release(hw);
6740 }
6741
6742 skip_phy_configurations:
6743 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6744 * would have already happened in close and is redundant.
6745 */
6746 e1000e_release_hw_control(adapter);
6747
6748 pci_clear_master(pdev);
6749
6750 /* The pci-e switch on some quad port adapters will report a
6751 * correctable error when the MAC transitions from D0 to D3. To
6752 * prevent this we need to mask off the correctable errors on the
6753 * downstream port of the pci-e switch.
6754 *
6755 * We don't have the associated upstream bridge while assigning
6756 * the PCI device into guest. For example, the KVM on power is
6757 * one of the cases.
6758 */
6759 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6760 struct pci_dev *us_dev = pdev->bus->self;
6761 u16 devctl;
6762
6763 if (!us_dev)
6764 return 0;
6765
6766 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6767 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6768 (devctl & ~PCI_EXP_DEVCTL_CERE));
6769
6770 pci_save_state(pdev);
6771 pci_prepare_to_sleep(pdev);
6772
6773 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6774 }
6775
6776 return 0;
6777 }
6778
6779 /**
6780 * __e1000e_disable_aspm - Disable ASPM states
6781 * @pdev: pointer to PCI device struct
6782 * @state: bit-mask of ASPM states to disable
6783 * @locked: indication if this context holds pci_bus_sem locked.
6784 *
6785 * Some devices *must* have certain ASPM states disabled per hardware errata.
6786 **/
__e1000e_disable_aspm(struct pci_dev * pdev,u16 state,int locked)6787 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6788 {
6789 struct pci_dev *parent = pdev->bus->self;
6790 u16 aspm_dis_mask = 0;
6791 u16 pdev_aspmc, parent_aspmc;
6792
6793 switch (state) {
6794 case PCIE_LINK_STATE_L0S:
6795 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6796 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6797 fallthrough; /* can't have L1 without L0s */
6798 case PCIE_LINK_STATE_L1:
6799 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6800 break;
6801 default:
6802 return;
6803 }
6804
6805 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6806 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6807
6808 if (parent) {
6809 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6810 &parent_aspmc);
6811 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6812 }
6813
6814 /* Nothing to do if the ASPM states to be disabled already are */
6815 if (!(pdev_aspmc & aspm_dis_mask) &&
6816 (!parent || !(parent_aspmc & aspm_dis_mask)))
6817 return;
6818
6819 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6820 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6821 "L0s" : "",
6822 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6823 "L1" : "");
6824
6825 #ifdef CONFIG_PCIEASPM
6826 if (locked)
6827 pci_disable_link_state_locked(pdev, state);
6828 else
6829 pci_disable_link_state(pdev, state);
6830
6831 /* Double-check ASPM control. If not disabled by the above, the
6832 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6833 * not enabled); override by writing PCI config space directly.
6834 */
6835 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6836 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6837
6838 if (!(aspm_dis_mask & pdev_aspmc))
6839 return;
6840 #endif
6841
6842 /* Both device and parent should have the same ASPM setting.
6843 * Disable ASPM in downstream component first and then upstream.
6844 */
6845 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6846
6847 if (parent)
6848 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6849 aspm_dis_mask);
6850 }
6851
6852 /**
6853 * e1000e_disable_aspm - Disable ASPM states.
6854 * @pdev: pointer to PCI device struct
6855 * @state: bit-mask of ASPM states to disable
6856 *
6857 * This function acquires the pci_bus_sem!
6858 * Some devices *must* have certain ASPM states disabled per hardware errata.
6859 **/
e1000e_disable_aspm(struct pci_dev * pdev,u16 state)6860 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6861 {
6862 __e1000e_disable_aspm(pdev, state, 0);
6863 }
6864
6865 /**
6866 * e1000e_disable_aspm_locked - Disable ASPM states.
6867 * @pdev: pointer to PCI device struct
6868 * @state: bit-mask of ASPM states to disable
6869 *
6870 * This function must be called with pci_bus_sem acquired!
6871 * Some devices *must* have certain ASPM states disabled per hardware errata.
6872 **/
e1000e_disable_aspm_locked(struct pci_dev * pdev,u16 state)6873 static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6874 {
6875 __e1000e_disable_aspm(pdev, state, 1);
6876 }
6877
e1000e_pm_thaw(struct device * dev)6878 static int e1000e_pm_thaw(struct device *dev)
6879 {
6880 struct net_device *netdev = dev_get_drvdata(dev);
6881 struct e1000_adapter *adapter = netdev_priv(netdev);
6882 int rc = 0;
6883
6884 e1000e_set_interrupt_capability(adapter);
6885
6886 rtnl_lock();
6887 if (netif_running(netdev)) {
6888 rc = e1000_request_irq(adapter);
6889 if (rc)
6890 goto err_irq;
6891
6892 e1000e_up(adapter);
6893 }
6894
6895 netif_device_attach(netdev);
6896 err_irq:
6897 rtnl_unlock();
6898
6899 return rc;
6900 }
6901
__e1000_resume(struct pci_dev * pdev)6902 static int __e1000_resume(struct pci_dev *pdev)
6903 {
6904 struct net_device *netdev = pci_get_drvdata(pdev);
6905 struct e1000_adapter *adapter = netdev_priv(netdev);
6906 struct e1000_hw *hw = &adapter->hw;
6907 u16 aspm_disable_flag = 0;
6908
6909 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6910 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6911 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6912 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6913 if (aspm_disable_flag)
6914 e1000e_disable_aspm(pdev, aspm_disable_flag);
6915
6916 pci_set_master(pdev);
6917
6918 if (hw->mac.type >= e1000_pch2lan)
6919 e1000_resume_workarounds_pchlan(&adapter->hw);
6920
6921 e1000e_power_up_phy(adapter);
6922
6923 /* report the system wakeup cause from S3/S4 */
6924 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6925 u16 phy_data;
6926
6927 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6928 if (phy_data) {
6929 e_info("PHY Wakeup cause - %s\n",
6930 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6931 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6932 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6933 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6934 phy_data & E1000_WUS_LNKC ?
6935 "Link Status Change" : "other");
6936 }
6937 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6938 } else {
6939 u32 wus = er32(WUS);
6940
6941 if (wus) {
6942 e_info("MAC Wakeup cause - %s\n",
6943 wus & E1000_WUS_EX ? "Unicast Packet" :
6944 wus & E1000_WUS_MC ? "Multicast Packet" :
6945 wus & E1000_WUS_BC ? "Broadcast Packet" :
6946 wus & E1000_WUS_MAG ? "Magic Packet" :
6947 wus & E1000_WUS_LNKC ? "Link Status Change" :
6948 "other");
6949 }
6950 ew32(WUS, ~0);
6951 }
6952
6953 e1000e_reset(adapter);
6954
6955 e1000_init_manageability_pt(adapter);
6956
6957 /* If the controller has AMT, do not set DRV_LOAD until the interface
6958 * is up. For all other cases, let the f/w know that the h/w is now
6959 * under the control of the driver.
6960 */
6961 if (!(adapter->flags & FLAG_HAS_AMT))
6962 e1000e_get_hw_control(adapter);
6963
6964 return 0;
6965 }
6966
e1000e_pm_prepare(struct device * dev)6967 static int e1000e_pm_prepare(struct device *dev)
6968 {
6969 return pm_runtime_suspended(dev) &&
6970 pm_suspend_via_firmware();
6971 }
6972
e1000e_pm_suspend(struct device * dev)6973 static int e1000e_pm_suspend(struct device *dev)
6974 {
6975 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6976 struct e1000_adapter *adapter = netdev_priv(netdev);
6977 struct pci_dev *pdev = to_pci_dev(dev);
6978 int rc;
6979
6980 e1000e_flush_lpic(pdev);
6981
6982 e1000e_pm_freeze(dev);
6983
6984 rc = __e1000_shutdown(pdev, false);
6985 if (!rc) {
6986 /* Introduce S0ix implementation */
6987 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
6988 e1000e_s0ix_entry_flow(adapter);
6989 }
6990
6991 return 0;
6992 }
6993
e1000e_pm_resume(struct device * dev)6994 static int e1000e_pm_resume(struct device *dev)
6995 {
6996 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6997 struct e1000_adapter *adapter = netdev_priv(netdev);
6998 struct pci_dev *pdev = to_pci_dev(dev);
6999 int rc;
7000
7001 /* Introduce S0ix implementation */
7002 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
7003 e1000e_s0ix_exit_flow(adapter);
7004
7005 rc = __e1000_resume(pdev);
7006 if (rc)
7007 return rc;
7008
7009 return e1000e_pm_thaw(dev);
7010 }
7011
e1000e_pm_runtime_idle(struct device * dev)7012 static __maybe_unused int e1000e_pm_runtime_idle(struct device *dev)
7013 {
7014 struct net_device *netdev = dev_get_drvdata(dev);
7015 struct e1000_adapter *adapter = netdev_priv(netdev);
7016 u16 eee_lp;
7017
7018 eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
7019
7020 if (!e1000e_has_link(adapter)) {
7021 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
7022 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
7023 }
7024
7025 return -EBUSY;
7026 }
7027
e1000e_pm_runtime_resume(struct device * dev)7028 static int e1000e_pm_runtime_resume(struct device *dev)
7029 {
7030 struct pci_dev *pdev = to_pci_dev(dev);
7031 struct net_device *netdev = pci_get_drvdata(pdev);
7032 struct e1000_adapter *adapter = netdev_priv(netdev);
7033 int rc;
7034
7035 pdev->pme_poll = true;
7036
7037 rc = __e1000_resume(pdev);
7038 if (rc)
7039 return rc;
7040
7041 if (netdev->flags & IFF_UP)
7042 e1000e_up(adapter);
7043
7044 return rc;
7045 }
7046
e1000e_pm_runtime_suspend(struct device * dev)7047 static int e1000e_pm_runtime_suspend(struct device *dev)
7048 {
7049 struct pci_dev *pdev = to_pci_dev(dev);
7050 struct net_device *netdev = pci_get_drvdata(pdev);
7051 struct e1000_adapter *adapter = netdev_priv(netdev);
7052
7053 if (netdev->flags & IFF_UP) {
7054 int count = E1000_CHECK_RESET_COUNT;
7055
7056 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
7057 usleep_range(10000, 11000);
7058
7059 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
7060
7061 /* Down the device without resetting the hardware */
7062 e1000e_down(adapter, false);
7063 }
7064
7065 if (__e1000_shutdown(pdev, true)) {
7066 e1000e_pm_runtime_resume(dev);
7067 return -EBUSY;
7068 }
7069
7070 return 0;
7071 }
7072
e1000_shutdown(struct pci_dev * pdev)7073 static void e1000_shutdown(struct pci_dev *pdev)
7074 {
7075 e1000e_flush_lpic(pdev);
7076
7077 e1000e_pm_freeze(&pdev->dev);
7078
7079 __e1000_shutdown(pdev, false);
7080 }
7081
7082 #ifdef CONFIG_NET_POLL_CONTROLLER
7083
e1000_intr_msix(int __always_unused irq,void * data)7084 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
7085 {
7086 struct net_device *netdev = data;
7087 struct e1000_adapter *adapter = netdev_priv(netdev);
7088
7089 if (adapter->msix_entries) {
7090 int vector, msix_irq;
7091
7092 vector = 0;
7093 msix_irq = adapter->msix_entries[vector].vector;
7094 if (disable_hardirq(msix_irq))
7095 e1000_intr_msix_rx(msix_irq, netdev);
7096 enable_irq(msix_irq);
7097
7098 vector++;
7099 msix_irq = adapter->msix_entries[vector].vector;
7100 if (disable_hardirq(msix_irq))
7101 e1000_intr_msix_tx(msix_irq, netdev);
7102 enable_irq(msix_irq);
7103
7104 vector++;
7105 msix_irq = adapter->msix_entries[vector].vector;
7106 if (disable_hardirq(msix_irq))
7107 e1000_msix_other(msix_irq, netdev);
7108 enable_irq(msix_irq);
7109 }
7110
7111 return IRQ_HANDLED;
7112 }
7113
7114 /**
7115 * e1000_netpoll
7116 * @netdev: network interface device structure
7117 *
7118 * Polling 'interrupt' - used by things like netconsole to send skbs
7119 * without having to re-enable interrupts. It's not called while
7120 * the interrupt routine is executing.
7121 */
e1000_netpoll(struct net_device * netdev)7122 static void e1000_netpoll(struct net_device *netdev)
7123 {
7124 struct e1000_adapter *adapter = netdev_priv(netdev);
7125
7126 switch (adapter->int_mode) {
7127 case E1000E_INT_MODE_MSIX:
7128 e1000_intr_msix(adapter->pdev->irq, netdev);
7129 break;
7130 case E1000E_INT_MODE_MSI:
7131 if (disable_hardirq(adapter->pdev->irq))
7132 e1000_intr_msi(adapter->pdev->irq, netdev);
7133 enable_irq(adapter->pdev->irq);
7134 break;
7135 default: /* E1000E_INT_MODE_LEGACY */
7136 if (disable_hardirq(adapter->pdev->irq))
7137 e1000_intr(adapter->pdev->irq, netdev);
7138 enable_irq(adapter->pdev->irq);
7139 break;
7140 }
7141 }
7142 #endif
7143
7144 /**
7145 * e1000_io_error_detected - called when PCI error is detected
7146 * @pdev: Pointer to PCI device
7147 * @state: The current pci connection state
7148 *
7149 * This function is called after a PCI bus error affecting
7150 * this device has been detected.
7151 */
e1000_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)7152 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7153 pci_channel_state_t state)
7154 {
7155 e1000e_pm_freeze(&pdev->dev);
7156
7157 if (state == pci_channel_io_perm_failure)
7158 return PCI_ERS_RESULT_DISCONNECT;
7159
7160 pci_disable_device(pdev);
7161
7162 /* Request a slot reset. */
7163 return PCI_ERS_RESULT_NEED_RESET;
7164 }
7165
7166 /**
7167 * e1000_io_slot_reset - called after the pci bus has been reset.
7168 * @pdev: Pointer to PCI device
7169 *
7170 * Restart the card from scratch, as if from a cold-boot. Implementation
7171 * resembles the first-half of the e1000e_pm_resume routine.
7172 */
e1000_io_slot_reset(struct pci_dev * pdev)7173 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7174 {
7175 struct net_device *netdev = pci_get_drvdata(pdev);
7176 struct e1000_adapter *adapter = netdev_priv(netdev);
7177 struct e1000_hw *hw = &adapter->hw;
7178 u16 aspm_disable_flag = 0;
7179 int err;
7180 pci_ers_result_t result;
7181
7182 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7183 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7184 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7185 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7186 if (aspm_disable_flag)
7187 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7188
7189 err = pci_enable_device_mem(pdev);
7190 if (err) {
7191 dev_err(&pdev->dev,
7192 "Cannot re-enable PCI device after reset.\n");
7193 result = PCI_ERS_RESULT_DISCONNECT;
7194 } else {
7195 pci_restore_state(pdev);
7196 pci_set_master(pdev);
7197
7198 pci_enable_wake(pdev, PCI_D3hot, 0);
7199 pci_enable_wake(pdev, PCI_D3cold, 0);
7200
7201 e1000e_reset(adapter);
7202 ew32(WUS, ~0);
7203 result = PCI_ERS_RESULT_RECOVERED;
7204 }
7205
7206 return result;
7207 }
7208
7209 /**
7210 * e1000_io_resume - called when traffic can start flowing again.
7211 * @pdev: Pointer to PCI device
7212 *
7213 * This callback is called when the error recovery driver tells us that
7214 * its OK to resume normal operation. Implementation resembles the
7215 * second-half of the e1000e_pm_resume routine.
7216 */
e1000_io_resume(struct pci_dev * pdev)7217 static void e1000_io_resume(struct pci_dev *pdev)
7218 {
7219 struct net_device *netdev = pci_get_drvdata(pdev);
7220 struct e1000_adapter *adapter = netdev_priv(netdev);
7221
7222 e1000_init_manageability_pt(adapter);
7223
7224 e1000e_pm_thaw(&pdev->dev);
7225
7226 /* If the controller has AMT, do not set DRV_LOAD until the interface
7227 * is up. For all other cases, let the f/w know that the h/w is now
7228 * under the control of the driver.
7229 */
7230 if (!(adapter->flags & FLAG_HAS_AMT))
7231 e1000e_get_hw_control(adapter);
7232 }
7233
e1000_print_device_info(struct e1000_adapter * adapter)7234 static void e1000_print_device_info(struct e1000_adapter *adapter)
7235 {
7236 struct e1000_hw *hw = &adapter->hw;
7237 struct net_device *netdev = adapter->netdev;
7238 u32 ret_val;
7239 u8 pba_str[E1000_PBANUM_LENGTH];
7240
7241 /* print bus type/speed/width info */
7242 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7243 /* bus width */
7244 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7245 "Width x1"),
7246 /* MAC address */
7247 netdev->dev_addr);
7248 e_info("Intel(R) PRO/%s Network Connection\n",
7249 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7250 ret_val = e1000_read_pba_string_generic(hw, pba_str,
7251 E1000_PBANUM_LENGTH);
7252 if (ret_val)
7253 strscpy((char *)pba_str, "Unknown", sizeof(pba_str));
7254 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7255 hw->mac.type, hw->phy.type, pba_str);
7256 }
7257
e1000_eeprom_checks(struct e1000_adapter * adapter)7258 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7259 {
7260 struct e1000_hw *hw = &adapter->hw;
7261 int ret_val;
7262 u16 buf = 0;
7263
7264 if (hw->mac.type != e1000_82573)
7265 return;
7266
7267 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7268 le16_to_cpus(&buf);
7269 if (!ret_val && (!(buf & BIT(0)))) {
7270 /* Deep Smart Power Down (DSPD) */
7271 dev_warn(&adapter->pdev->dev,
7272 "Warning: detected DSPD enabled in EEPROM\n");
7273 }
7274 }
7275
e1000_fix_features(struct net_device * netdev,netdev_features_t features)7276 static netdev_features_t e1000_fix_features(struct net_device *netdev,
7277 netdev_features_t features)
7278 {
7279 struct e1000_adapter *adapter = netdev_priv(netdev);
7280 struct e1000_hw *hw = &adapter->hw;
7281
7282 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7283 if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7284 features &= ~NETIF_F_RXFCS;
7285
7286 /* Since there is no support for separate Rx/Tx vlan accel
7287 * enable/disable make sure Tx flag is always in same state as Rx.
7288 */
7289 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7290 features |= NETIF_F_HW_VLAN_CTAG_TX;
7291 else
7292 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7293
7294 return features;
7295 }
7296
e1000_set_features(struct net_device * netdev,netdev_features_t features)7297 static int e1000_set_features(struct net_device *netdev,
7298 netdev_features_t features)
7299 {
7300 struct e1000_adapter *adapter = netdev_priv(netdev);
7301 netdev_features_t changed = features ^ netdev->features;
7302
7303 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7304 adapter->flags |= FLAG_TSO_FORCE;
7305
7306 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7307 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7308 NETIF_F_RXALL)))
7309 return 0;
7310
7311 if (changed & NETIF_F_RXFCS) {
7312 if (features & NETIF_F_RXFCS) {
7313 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7314 } else {
7315 /* We need to take it back to defaults, which might mean
7316 * stripping is still disabled at the adapter level.
7317 */
7318 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7319 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7320 else
7321 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7322 }
7323 }
7324
7325 netdev->features = features;
7326
7327 if (netif_running(netdev))
7328 e1000e_reinit_locked(adapter);
7329 else
7330 e1000e_reset(adapter);
7331
7332 return 1;
7333 }
7334
7335 static const struct net_device_ops e1000e_netdev_ops = {
7336 .ndo_open = e1000e_open,
7337 .ndo_stop = e1000e_close,
7338 .ndo_start_xmit = e1000_xmit_frame,
7339 .ndo_get_stats64 = e1000e_get_stats64,
7340 .ndo_set_rx_mode = e1000e_set_rx_mode,
7341 .ndo_set_mac_address = e1000_set_mac,
7342 .ndo_change_mtu = e1000_change_mtu,
7343 .ndo_eth_ioctl = e1000_ioctl,
7344 .ndo_tx_timeout = e1000_tx_timeout,
7345 .ndo_validate_addr = eth_validate_addr,
7346
7347 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
7348 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
7349 #ifdef CONFIG_NET_POLL_CONTROLLER
7350 .ndo_poll_controller = e1000_netpoll,
7351 #endif
7352 .ndo_set_features = e1000_set_features,
7353 .ndo_fix_features = e1000_fix_features,
7354 .ndo_features_check = passthru_features_check,
7355 .ndo_hwtstamp_get = e1000e_hwtstamp_get,
7356 .ndo_hwtstamp_set = e1000e_hwtstamp_set,
7357 };
7358
7359 /**
7360 * e1000_probe - Device Initialization Routine
7361 * @pdev: PCI device information struct
7362 * @ent: entry in e1000_pci_tbl
7363 *
7364 * Returns 0 on success, negative on failure
7365 *
7366 * e1000_probe initializes an adapter identified by a pci_dev structure.
7367 * The OS initialization, configuring of the adapter private structure,
7368 * and a hardware reset occur.
7369 **/
e1000_probe(struct pci_dev * pdev,const struct pci_device_id * ent)7370 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7371 {
7372 struct net_device *netdev;
7373 struct e1000_adapter *adapter;
7374 struct e1000_hw *hw;
7375 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7376 resource_size_t mmio_start, mmio_len;
7377 resource_size_t flash_start, flash_len;
7378 static int cards_found;
7379 u16 aspm_disable_flag = 0;
7380 u16 eeprom_data = 0;
7381 u16 eeprom_apme_mask = E1000_EEPROM_APME;
7382 int bars, i, err;
7383 s32 ret_val = 0;
7384
7385 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7386 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7387 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7388 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7389 if (aspm_disable_flag)
7390 e1000e_disable_aspm(pdev, aspm_disable_flag);
7391
7392 err = pci_enable_device_mem(pdev);
7393 if (err)
7394 return err;
7395
7396 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7397 if (err) {
7398 dev_err(&pdev->dev,
7399 "No usable DMA configuration, aborting\n");
7400 goto err_dma;
7401 }
7402
7403 bars = pci_select_bars(pdev, IORESOURCE_MEM);
7404 err = pci_request_selected_regions_exclusive(pdev, bars,
7405 e1000e_driver_name);
7406 if (err)
7407 goto err_pci_reg;
7408
7409 pci_set_master(pdev);
7410 /* PCI config space info */
7411 err = pci_save_state(pdev);
7412 if (err)
7413 goto err_alloc_etherdev;
7414
7415 err = -ENOMEM;
7416 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7417 if (!netdev)
7418 goto err_alloc_etherdev;
7419
7420 SET_NETDEV_DEV(netdev, &pdev->dev);
7421
7422 netdev->irq = pdev->irq;
7423
7424 pci_set_drvdata(pdev, netdev);
7425 adapter = netdev_priv(netdev);
7426 hw = &adapter->hw;
7427 adapter->netdev = netdev;
7428 adapter->pdev = pdev;
7429 adapter->ei = ei;
7430 adapter->pba = ei->pba;
7431 adapter->flags = ei->flags;
7432 adapter->flags2 = ei->flags2;
7433 adapter->hw.adapter = adapter;
7434 adapter->hw.mac.type = ei->mac;
7435 adapter->max_hw_frame_size = ei->max_hw_frame_size;
7436 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7437
7438 mmio_start = pci_resource_start(pdev, 0);
7439 mmio_len = pci_resource_len(pdev, 0);
7440
7441 err = -EIO;
7442 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7443 if (!adapter->hw.hw_addr)
7444 goto err_ioremap;
7445
7446 if ((adapter->flags & FLAG_HAS_FLASH) &&
7447 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7448 (hw->mac.type < e1000_pch_spt)) {
7449 flash_start = pci_resource_start(pdev, 1);
7450 flash_len = pci_resource_len(pdev, 1);
7451 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7452 if (!adapter->hw.flash_address)
7453 goto err_flashmap;
7454 }
7455
7456 /* Set default EEE advertisement */
7457 if (adapter->flags2 & FLAG2_HAS_EEE)
7458 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7459
7460 /* construct the net_device struct */
7461 netdev->netdev_ops = &e1000e_netdev_ops;
7462 e1000e_set_ethtool_ops(netdev);
7463 netdev->watchdog_timeo = 5 * HZ;
7464 netif_napi_add(netdev, &adapter->napi, e1000e_poll);
7465 strscpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7466
7467 netdev->mem_start = mmio_start;
7468 netdev->mem_end = mmio_start + mmio_len;
7469
7470 adapter->bd_number = cards_found++;
7471
7472 e1000e_check_options(adapter);
7473
7474 /* setup adapter struct */
7475 err = e1000_sw_init(adapter);
7476 if (err)
7477 goto err_sw_init;
7478
7479 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7480 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7481 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7482
7483 err = ei->get_variants(adapter);
7484 if (err)
7485 goto err_hw_init;
7486
7487 if ((adapter->flags & FLAG_IS_ICH) &&
7488 (adapter->flags & FLAG_READ_ONLY_NVM) &&
7489 (hw->mac.type < e1000_pch_spt))
7490 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7491
7492 hw->mac.ops.get_bus_info(&adapter->hw);
7493
7494 adapter->hw.phy.autoneg_wait_to_complete = 0;
7495
7496 /* Copper options */
7497 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7498 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7499 adapter->hw.phy.disable_polarity_correction = 0;
7500 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7501 }
7502
7503 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7504 dev_info(&pdev->dev,
7505 "PHY reset is blocked due to SOL/IDER session.\n");
7506
7507 /* Set initial default active device features */
7508 netdev->features = (NETIF_F_SG |
7509 NETIF_F_HW_VLAN_CTAG_RX |
7510 NETIF_F_HW_VLAN_CTAG_TX |
7511 NETIF_F_TSO |
7512 NETIF_F_TSO6 |
7513 NETIF_F_RXHASH |
7514 NETIF_F_RXCSUM |
7515 NETIF_F_HW_CSUM);
7516
7517 /* disable TSO for pcie and 10/100 speeds to avoid
7518 * some hardware issues and for i219 to fix transfer
7519 * speed being capped at 60%
7520 */
7521 if (!(adapter->flags & FLAG_TSO_FORCE)) {
7522 switch (adapter->link_speed) {
7523 case SPEED_10:
7524 case SPEED_100:
7525 e_info("10/100 speed: disabling TSO\n");
7526 netdev->features &= ~NETIF_F_TSO;
7527 netdev->features &= ~NETIF_F_TSO6;
7528 break;
7529 case SPEED_1000:
7530 netdev->features |= NETIF_F_TSO;
7531 netdev->features |= NETIF_F_TSO6;
7532 break;
7533 default:
7534 /* oops */
7535 break;
7536 }
7537 if (hw->mac.type == e1000_pch_spt) {
7538 netdev->features &= ~NETIF_F_TSO;
7539 netdev->features &= ~NETIF_F_TSO6;
7540 }
7541 }
7542
7543 /* Set user-changeable features (subset of all device features) */
7544 netdev->hw_features = netdev->features;
7545 netdev->hw_features |= NETIF_F_RXFCS;
7546 netdev->priv_flags |= IFF_SUPP_NOFCS;
7547 netdev->hw_features |= NETIF_F_RXALL;
7548
7549 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7550 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7551
7552 netdev->vlan_features |= (NETIF_F_SG |
7553 NETIF_F_TSO |
7554 NETIF_F_TSO6 |
7555 NETIF_F_HW_CSUM);
7556
7557 netdev->priv_flags |= IFF_UNICAST_FLT;
7558
7559 netdev->features |= NETIF_F_HIGHDMA;
7560 netdev->vlan_features |= NETIF_F_HIGHDMA;
7561
7562 /* MTU range: 68 - max_hw_frame_size */
7563 netdev->min_mtu = ETH_MIN_MTU;
7564 netdev->max_mtu = adapter->max_hw_frame_size -
7565 (VLAN_ETH_HLEN + ETH_FCS_LEN);
7566
7567 if (e1000e_enable_mng_pass_thru(&adapter->hw))
7568 adapter->flags |= FLAG_MNG_PT_ENABLED;
7569
7570 /* before reading the NVM, reset the controller to
7571 * put the device in a known good starting state
7572 */
7573 adapter->hw.mac.ops.reset_hw(&adapter->hw);
7574
7575 /* systems with ASPM and others may see the checksum fail on the first
7576 * attempt. Let's give it a few tries
7577 */
7578 for (i = 0;; i++) {
7579 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7580 break;
7581 if (i == 2) {
7582 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7583 err = -EIO;
7584 goto err_eeprom;
7585 }
7586 }
7587
7588 e1000_eeprom_checks(adapter);
7589
7590 /* copy the MAC address */
7591 if (e1000e_read_mac_addr(&adapter->hw))
7592 dev_err(&pdev->dev,
7593 "NVM Read Error while reading MAC address\n");
7594
7595 eth_hw_addr_set(netdev, adapter->hw.mac.addr);
7596
7597 if (!is_valid_ether_addr(netdev->dev_addr)) {
7598 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7599 netdev->dev_addr);
7600 err = -EIO;
7601 goto err_eeprom;
7602 }
7603
7604 timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7605 timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7606
7607 INIT_WORK(&adapter->reset_task, e1000_reset_task);
7608 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7609 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7610 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7611 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7612
7613 /* Initialize link parameters. User can change them with ethtool */
7614 adapter->hw.mac.autoneg = 1;
7615 adapter->fc_autoneg = true;
7616 adapter->hw.fc.requested_mode = e1000_fc_default;
7617 adapter->hw.fc.current_mode = e1000_fc_default;
7618 adapter->hw.phy.autoneg_advertised = 0x2f;
7619
7620 /* Initial Wake on LAN setting - If APM wake is enabled in
7621 * the EEPROM, enable the ACPI Magic Packet filter
7622 */
7623 if (adapter->flags & FLAG_APME_IN_WUC) {
7624 /* APME bit in EEPROM is mapped to WUC.APME */
7625 eeprom_data = er32(WUC);
7626 eeprom_apme_mask = E1000_WUC_APME;
7627 if ((hw->mac.type > e1000_ich10lan) &&
7628 (eeprom_data & E1000_WUC_PHY_WAKE))
7629 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7630 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7631 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7632 (adapter->hw.bus.func == 1))
7633 ret_val = e1000_read_nvm(&adapter->hw,
7634 NVM_INIT_CONTROL3_PORT_B,
7635 1, &eeprom_data);
7636 else
7637 ret_val = e1000_read_nvm(&adapter->hw,
7638 NVM_INIT_CONTROL3_PORT_A,
7639 1, &eeprom_data);
7640 }
7641
7642 /* fetch WoL from EEPROM */
7643 if (ret_val)
7644 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7645 else if (eeprom_data & eeprom_apme_mask)
7646 adapter->eeprom_wol |= E1000_WUFC_MAG;
7647
7648 /* now that we have the eeprom settings, apply the special cases
7649 * where the eeprom may be wrong or the board simply won't support
7650 * wake on lan on a particular port
7651 */
7652 if (!(adapter->flags & FLAG_HAS_WOL))
7653 adapter->eeprom_wol = 0;
7654
7655 /* initialize the wol settings based on the eeprom settings */
7656 adapter->wol = adapter->eeprom_wol;
7657
7658 /* make sure adapter isn't asleep if manageability is enabled */
7659 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7660 (hw->mac.ops.check_mng_mode(hw)))
7661 device_wakeup_enable(&pdev->dev);
7662
7663 /* save off EEPROM version number */
7664 ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7665
7666 if (ret_val) {
7667 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7668 adapter->eeprom_vers = 0;
7669 }
7670
7671 /* init PTP hardware clock */
7672 e1000e_ptp_init(adapter);
7673
7674 if (hw->mac.type >= e1000_pch_mtp)
7675 adapter->flags2 |= FLAG2_DISABLE_K1;
7676
7677 /* reset the hardware with the new settings */
7678 e1000e_reset(adapter);
7679
7680 /* If the controller has AMT, do not set DRV_LOAD until the interface
7681 * is up. For all other cases, let the f/w know that the h/w is now
7682 * under the control of the driver.
7683 */
7684 if (!(adapter->flags & FLAG_HAS_AMT))
7685 e1000e_get_hw_control(adapter);
7686
7687 if (hw->mac.type >= e1000_pch_cnp)
7688 adapter->flags2 |= FLAG2_ENABLE_S0IX_FLOWS;
7689
7690 strscpy(netdev->name, "eth%d", sizeof(netdev->name));
7691 err = register_netdev(netdev);
7692 if (err)
7693 goto err_register;
7694
7695 /* carrier off reporting is important to ethtool even BEFORE open */
7696 netif_carrier_off(netdev);
7697
7698 e1000_print_device_info(adapter);
7699
7700 dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_SMART_PREPARE);
7701
7702 if (pci_dev_run_wake(pdev))
7703 pm_runtime_put_noidle(&pdev->dev);
7704
7705 return 0;
7706
7707 err_register:
7708 if (!(adapter->flags & FLAG_HAS_AMT))
7709 e1000e_release_hw_control(adapter);
7710 err_eeprom:
7711 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7712 e1000_phy_hw_reset(&adapter->hw);
7713 err_hw_init:
7714 kfree(adapter->tx_ring);
7715 kfree(adapter->rx_ring);
7716 err_sw_init:
7717 if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7718 iounmap(adapter->hw.flash_address);
7719 e1000e_reset_interrupt_capability(adapter);
7720 err_flashmap:
7721 iounmap(adapter->hw.hw_addr);
7722 err_ioremap:
7723 free_netdev(netdev);
7724 err_alloc_etherdev:
7725 pci_release_mem_regions(pdev);
7726 err_pci_reg:
7727 err_dma:
7728 pci_disable_device(pdev);
7729 return err;
7730 }
7731
7732 /**
7733 * e1000_remove - Device Removal Routine
7734 * @pdev: PCI device information struct
7735 *
7736 * e1000_remove is called by the PCI subsystem to alert the driver
7737 * that it should release a PCI device. This could be caused by a
7738 * Hot-Plug event, or because the driver is going to be removed from
7739 * memory.
7740 **/
e1000_remove(struct pci_dev * pdev)7741 static void e1000_remove(struct pci_dev *pdev)
7742 {
7743 struct net_device *netdev = pci_get_drvdata(pdev);
7744 struct e1000_adapter *adapter = netdev_priv(netdev);
7745
7746 e1000e_ptp_remove(adapter);
7747
7748 /* The timers may be rescheduled, so explicitly disable them
7749 * from being rescheduled.
7750 */
7751 set_bit(__E1000_DOWN, &adapter->state);
7752 timer_delete_sync(&adapter->watchdog_timer);
7753 timer_delete_sync(&adapter->phy_info_timer);
7754
7755 cancel_work_sync(&adapter->reset_task);
7756 cancel_work_sync(&adapter->watchdog_task);
7757 cancel_work_sync(&adapter->downshift_task);
7758 cancel_work_sync(&adapter->update_phy_task);
7759 cancel_work_sync(&adapter->print_hang_task);
7760
7761 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7762 cancel_work_sync(&adapter->tx_hwtstamp_work);
7763 if (adapter->tx_hwtstamp_skb) {
7764 dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7765 adapter->tx_hwtstamp_skb = NULL;
7766 }
7767 }
7768
7769 unregister_netdev(netdev);
7770
7771 if (pci_dev_run_wake(pdev))
7772 pm_runtime_get_noresume(&pdev->dev);
7773
7774 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7775 * would have already happened in close and is redundant.
7776 */
7777 e1000e_release_hw_control(adapter);
7778
7779 e1000e_reset_interrupt_capability(adapter);
7780 kfree(adapter->tx_ring);
7781 kfree(adapter->rx_ring);
7782
7783 iounmap(adapter->hw.hw_addr);
7784 if ((adapter->hw.flash_address) &&
7785 (adapter->hw.mac.type < e1000_pch_spt))
7786 iounmap(adapter->hw.flash_address);
7787 pci_release_mem_regions(pdev);
7788
7789 free_netdev(netdev);
7790
7791 pci_disable_device(pdev);
7792 }
7793
7794 /* PCI Error Recovery (ERS) */
7795 static const struct pci_error_handlers e1000_err_handler = {
7796 .error_detected = e1000_io_error_detected,
7797 .slot_reset = e1000_io_slot_reset,
7798 .resume = e1000_io_resume,
7799 };
7800
7801 static const struct pci_device_id e1000_pci_tbl[] = {
7802 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7803 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7804 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7805 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7806 board_82571 },
7807 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7808 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7809 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7810 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7811 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7812
7813 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7814 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7815 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7816 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7817
7818 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7819 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7820 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7821
7822 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7823 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7824 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7825
7826 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7827 board_80003es2lan },
7828 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7829 board_80003es2lan },
7830 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7831 board_80003es2lan },
7832 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7833 board_80003es2lan },
7834
7835 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7836 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7837 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7838 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7839 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7840 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7841 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7842 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7843
7844 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7845 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7846 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7847 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7848 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7849 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7850 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7851 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7852 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7853
7854 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7855 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7856 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7857
7858 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7859 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7860 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7861
7862 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7863 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7864 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7865 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7866
7867 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7868 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7869
7870 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7871 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7872 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7873 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7874 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7875 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7876 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7877 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7878 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7879 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7880 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7881 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7882 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7883 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7884 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7885 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7886 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7887 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7888 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7889 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7890 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7891 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7892 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7893 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7894 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7895 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7896 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7897 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7898 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7899 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7900 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7901 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_tgp },
7902 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_tgp },
7903 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_tgp },
7904 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },
7905 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },
7906 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },
7907 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM23), board_pch_adp },
7908 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V23), board_pch_adp },
7909 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_adp },
7910 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_adp },
7911 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_adp },
7912 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_adp },
7913 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_LM22), board_pch_adp },
7914 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_RPL_I219_V22), board_pch_adp },
7915 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM19), board_pch_adp },
7916 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V19), board_pch_adp },
7917 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_mtp },
7918 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_mtp },
7919 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM20), board_pch_mtp },
7920 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V20), board_pch_mtp },
7921 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_LM21), board_pch_mtp },
7922 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_mtp },
7923 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ARL_I219_LM24), board_pch_mtp },
7924 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ARL_I219_V24), board_pch_mtp },
7925 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM25), board_pch_mtp },
7926 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V25), board_pch_mtp },
7927 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM26), board_pch_mtp },
7928 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V26), board_pch_mtp },
7929 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM27), board_pch_mtp },
7930 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V27), board_pch_mtp },
7931 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_LM29), board_pch_mtp },
7932 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_V29), board_pch_mtp },
7933
7934 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7935 };
7936 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7937
7938 static const struct dev_pm_ops e1000e_pm_ops = {
7939 .prepare = e1000e_pm_prepare,
7940 .suspend = e1000e_pm_suspend,
7941 .resume = e1000e_pm_resume,
7942 .freeze = e1000e_pm_freeze,
7943 .thaw = e1000e_pm_thaw,
7944 .poweroff = e1000e_pm_suspend,
7945 .restore = e1000e_pm_resume,
7946 RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7947 e1000e_pm_runtime_idle)
7948 };
7949
7950 /* PCI Device API Driver */
7951 static struct pci_driver e1000_driver = {
7952 .name = e1000e_driver_name,
7953 .id_table = e1000_pci_tbl,
7954 .probe = e1000_probe,
7955 .remove = e1000_remove,
7956 .driver.pm = pm_ptr(&e1000e_pm_ops),
7957 .shutdown = e1000_shutdown,
7958 .err_handler = &e1000_err_handler
7959 };
7960
7961 /**
7962 * e1000_init_module - Driver Registration Routine
7963 *
7964 * e1000_init_module is the first routine called when the driver is
7965 * loaded. All it does is register with the PCI subsystem.
7966 **/
e1000_init_module(void)7967 static int __init e1000_init_module(void)
7968 {
7969 pr_info("Intel(R) PRO/1000 Network Driver\n");
7970 pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7971
7972 return pci_register_driver(&e1000_driver);
7973 }
7974 module_init(e1000_init_module);
7975
7976 /**
7977 * e1000_exit_module - Driver Exit Cleanup Routine
7978 *
7979 * e1000_exit_module is called just before the driver is removed
7980 * from memory.
7981 **/
e1000_exit_module(void)7982 static void __exit e1000_exit_module(void)
7983 {
7984 pci_unregister_driver(&e1000_driver);
7985 }
7986 module_exit(e1000_exit_module);
7987
7988 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7989 MODULE_LICENSE("GPL v2");
7990
7991 /* netdev.c */
7992