1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2018, The Linux Foundation 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 7 #ifndef __QCOM_UBWC_H__ 8 #define __QCOM_UBWC_H__ 9 10 #include <linux/bits.h> 11 #include <linux/types.h> 12 13 struct qcom_ubwc_cfg_data { 14 u32 ubwc_enc_version; 15 /* Can be read from MDSS_BASE + 0x58 */ 16 u32 ubwc_dec_version; 17 18 /** 19 * @ubwc_swizzle: Whether to enable level 1, 2 & 3 bank swizzling. 20 * 21 * UBWC 1.0 always enables all three levels. 22 * UBWC 2.0 removes level 1 bank swizzling, leaving levels 2 & 3. 23 * UBWC 4.0 adds the optional ability to disable levels 2 & 3. 24 */ 25 u32 ubwc_swizzle; 26 #define UBWC_SWIZZLE_ENABLE_LVL1 BIT(0) 27 #define UBWC_SWIZZLE_ENABLE_LVL2 BIT(1) 28 #define UBWC_SWIZZLE_ENABLE_LVL3 BIT(2) 29 30 /** 31 * @highest_bank_bit: Highest Bank Bit 32 * 33 * The Highest Bank Bit value represents the bit of the highest 34 * DDR bank. This should ideally use DRAM type detection. 35 */ 36 int highest_bank_bit; 37 bool ubwc_bank_spread; 38 39 /** 40 * @macrotile_mode: Macrotile Mode 41 * 42 * Whether to use 4-channel macrotiling mode or the newer 43 * 8-channel macrotiling mode introduced in UBWC 3.1. 0 is 44 * 4-channel and 1 is 8-channel. 45 */ 46 bool macrotile_mode; 47 }; 48 49 #define UBWC_1_0 0x10000000 50 #define UBWC_2_0 0x20000000 51 #define UBWC_3_0 0x30000000 52 #define UBWC_4_0 0x40000000 53 #define UBWC_4_3 0x40030000 54 #define UBWC_5_0 0x50000000 55 #define UBWC_6_0 0x60000000 56 57 #if IS_ENABLED(CONFIG_QCOM_UBWC_CONFIG) 58 const struct qcom_ubwc_cfg_data *qcom_ubwc_config_get_data(void); 59 #else qcom_ubwc_config_get_data(void)60static inline const struct qcom_ubwc_cfg_data *qcom_ubwc_config_get_data(void) 61 { 62 return ERR_PTR(-EOPNOTSUPP); 63 } 64 #endif 65 qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data * cfg)66static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg) 67 { 68 bool ret = cfg->ubwc_enc_version == UBWC_1_0; 69 70 if (ret && !(cfg->ubwc_swizzle & UBWC_SWIZZLE_ENABLE_LVL1)) 71 pr_err("UBWC config discrepancy - level 1 swizzling disabled on UBWC 1.0\n"); 72 73 return ret; 74 } 75 76 #endif /* __QCOM_UBWC_H__ */ 77