1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd. */
3
4 #include <linux/types.h>
5 #include <linux/module.h>
6 #include <linux/pci.h>
7 #include <linux/netdevice.h>
8 #include <linux/string.h>
9 #include <linux/etherdevice.h>
10 #include <linux/phylink.h>
11 #include <net/udp_tunnel.h>
12 #include <net/ip.h>
13 #include <linux/if_vlan.h>
14
15 #include "../libwx/wx_type.h"
16 #include "../libwx/wx_lib.h"
17 #include "../libwx/wx_err.h"
18 #include "../libwx/wx_ptp.h"
19 #include "../libwx/wx_hw.h"
20 #include "../libwx/wx_mbx.h"
21 #include "../libwx/wx_sriov.h"
22 #include "txgbe_type.h"
23 #include "txgbe_hw.h"
24 #include "txgbe_phy.h"
25 #include "txgbe_aml.h"
26 #include "txgbe_irq.h"
27 #include "txgbe_fdir.h"
28 #include "txgbe_ethtool.h"
29
30 char txgbe_driver_name[] = "txgbe";
31
32 /* txgbe_pci_tbl - PCI Device ID Table
33 *
34 * Wildcard entries (PCI_ANY_ID) should come last
35 * Last entry must be all 0s
36 *
37 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
38 * Class, Class Mask, private data (not used) }
39 */
40 static const struct pci_device_id txgbe_pci_tbl[] = {
41 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_SP1000) },
42 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_WX1820) },
43 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5010) },
44 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5110) },
45 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5025) },
46 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5125) },
47 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5040) },
48 { PCI_VDEVICE(WANGXUN, TXGBE_DEV_ID_AML5140) },
49 /* required last entry */
50 { }
51 };
52
53 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
54
txgbe_check_minimum_link(struct wx * wx)55 static void txgbe_check_minimum_link(struct wx *wx)
56 {
57 struct pci_dev *pdev;
58
59 pdev = wx->pdev;
60 pcie_print_link_status(pdev);
61 }
62
63 /**
64 * txgbe_enumerate_functions - Get the number of ports this device has
65 * @wx: wx structure
66 *
67 * This function enumerates the phsyical functions co-located on a single slot,
68 * in order to determine how many ports a device has. This is most useful in
69 * determining the required GT/s of PCIe bandwidth necessary for optimal
70 * performance.
71 **/
txgbe_enumerate_functions(struct wx * wx)72 static int txgbe_enumerate_functions(struct wx *wx)
73 {
74 struct pci_dev *entry, *pdev = wx->pdev;
75 int physfns = 0;
76
77 list_for_each_entry(entry, &pdev->bus->devices, bus_list) {
78 /* When the devices on the bus don't all match our device ID,
79 * we can't reliably determine the correct number of
80 * functions. This can occur if a function has been direct
81 * attached to a virtual machine using VT-d.
82 */
83 if (entry->vendor != pdev->vendor ||
84 entry->device != pdev->device)
85 return -EINVAL;
86
87 physfns++;
88 }
89
90 return physfns;
91 }
92
txgbe_module_detection_subtask(struct wx * wx)93 static void txgbe_module_detection_subtask(struct wx *wx)
94 {
95 int err;
96
97 if (test_bit(WX_STATE_DOWN, wx->state) ||
98 test_bit(WX_STATE_RESETTING, wx->state))
99 return;
100
101 if (!test_and_clear_bit(WX_FLAG_NEED_MODULE_RESET, wx->flags))
102 return;
103
104 /* wait for SFF module ready */
105 msleep(200);
106
107 /* Re-check state to avoid racing with down/reset paths.
108 * Module identification is deferred to the next up event,
109 * so it is safe to bail out here.
110 */
111 if (test_bit(WX_STATE_DOWN, wx->state) ||
112 test_bit(WX_STATE_RESETTING, wx->state))
113 return;
114
115 err = txgbe_identify_module(wx);
116 if (err == -ENODEV)
117 set_bit(WX_FLAG_NEED_MODULE_RESET, wx->flags);
118 }
119
txgbe_link_config_subtask(struct wx * wx)120 static void txgbe_link_config_subtask(struct wx *wx)
121 {
122 if (test_bit(WX_STATE_DOWN, wx->state) ||
123 test_bit(WX_STATE_RESETTING, wx->state))
124 return;
125
126 if (!test_and_clear_bit(WX_FLAG_NEED_LINK_CONFIG, wx->flags))
127 return;
128
129 txgbe_set_phy_link(wx);
130 }
131
132 /**
133 * txgbe_service_task - manages and runs subtasks
134 * @work: pointer to work_struct containing our data
135 **/
txgbe_service_task(struct work_struct * work)136 static void txgbe_service_task(struct work_struct *work)
137 {
138 struct wx *wx = container_of(work, struct wx, service_task);
139
140 txgbe_module_detection_subtask(wx);
141 txgbe_link_config_subtask(wx);
142 wx_update_stats(wx);
143 wx_check_hang_subtask(wx);
144 wx_check_err_subtask(wx);
145
146 wx_service_event_complete(wx);
147 }
148
txgbe_init_service(struct wx * wx)149 static void txgbe_init_service(struct wx *wx)
150 {
151 timer_setup(&wx->service_timer, wx_service_timer, 0);
152 INIT_WORK(&wx->service_task, txgbe_service_task);
153 clear_bit(WX_STATE_SERVICE_SCHED, wx->state);
154 }
155
txgbe_up_complete(struct wx * wx)156 static void txgbe_up_complete(struct wx *wx)
157 {
158 struct net_device *netdev = wx->netdev;
159
160 wx_control_hw(wx, true);
161 wx_configure_vectors(wx);
162
163 /* make sure to complete pre-operations */
164 smp_mb__before_atomic();
165 clear_bit(WX_STATE_DOWN, wx->state);
166 clear_bit(WX_STATE_RES_FREED, wx->state);
167 wx_napi_enable_all(wx);
168
169 switch (wx->mac.type) {
170 case wx_mac_aml40:
171 txgbe_setup_link(wx);
172 phylink_start(wx->phylink);
173 break;
174 case wx_mac_aml:
175 /* Enable TX laser */
176 wr32m(wx, WX_GPIO_DR, TXGBE_GPIOBIT_1, 0);
177 txgbe_setup_link(wx);
178 phylink_start(wx->phylink);
179 break;
180 case wx_mac_sp:
181 phylink_start(wx->phylink);
182 break;
183 default:
184 break;
185 }
186
187 /* clear any pending interrupts, may auto mask */
188 rd32(wx, WX_PX_IC(0));
189 rd32(wx, WX_PX_IC(1));
190 rd32(wx, WX_PX_MISC_IC);
191 txgbe_irq_enable(wx, true);
192
193 /* enable transmits */
194 netif_tx_start_all_queues(netdev);
195 mod_timer(&wx->service_timer, jiffies);
196
197 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
198 wr32m(wx, WX_CFG_PORT_CTL, WX_CFG_PORT_CTL_PFRSTD,
199 WX_CFG_PORT_CTL_PFRSTD);
200 /* update setting rx tx for all active vfs */
201 wx_set_all_vfs(wx);
202 }
203
txgbe_reset(struct wx * wx)204 static void txgbe_reset(struct wx *wx)
205 {
206 struct net_device *netdev = wx->netdev;
207 u8 old_addr[ETH_ALEN];
208 int err;
209
210 if (test_bit(WX_FLAG_NEED_PCIE_RECOVERY, wx->flags))
211 return;
212
213 err = txgbe_reset_hw(wx);
214 if (err != 0)
215 wx_err(wx, "Hardware Error: %d\n", err);
216
217 wx_start_hw(wx);
218 /* do not flush user set addresses */
219 memcpy(old_addr, &wx->mac_table[0].addr, netdev->addr_len);
220 wx_flush_sw_mac_table(wx);
221 wx_mac_set_default_filter(wx, old_addr);
222
223 if (test_bit(WX_STATE_PTP_RUNNING, wx->state))
224 wx_ptp_reset(wx);
225 }
226
txgbe_disable_device(struct wx * wx)227 static void txgbe_disable_device(struct wx *wx)
228 {
229 struct net_device *netdev = wx->netdev;
230 u32 i;
231
232 if (test_and_set_bit(WX_STATE_DOWN, wx->state))
233 return;
234
235 wx_disable_pcie_master(wx);
236 /* disable receives */
237 wx_disable_rx(wx);
238
239 /* disable all enabled rx queues */
240 for (i = 0; i < wx->num_rx_queues; i++)
241 /* this call also flushes the previous write */
242 wx_disable_rx_queue(wx, wx->rx_ring[i]);
243
244 netif_tx_stop_all_queues(netdev);
245 netif_tx_disable(netdev);
246
247 wx_irq_disable(wx);
248 wx_napi_disable_all(wx);
249
250 clear_bit(WX_FLAG_NEED_DO_RESET, wx->flags);
251 timer_delete_sync(&wx->service_timer);
252 cancel_work_sync(&wx->service_task);
253
254 if (wx->bus.func < 2)
255 wr32m(wx, TXGBE_MIS_PRB_CTL, TXGBE_MIS_PRB_CTL_LAN_UP(wx->bus.func), 0);
256 else
257 wx_err(wx, "%s: invalid bus lan id %d\n",
258 __func__, wx->bus.func);
259
260 if (wx->num_vfs) {
261 /* Clear EITR Select mapping */
262 wr32(wx, WX_PX_ITRSEL, 0);
263 /* Mark all the VFs as inactive */
264 for (i = 0; i < wx->num_vfs; i++)
265 wx->vfinfo[i].clear_to_send = 0;
266 /* update setting rx tx for all active vfs */
267 wx_set_all_vfs(wx);
268 }
269
270 if (!(((wx->subsystem_device_id & WX_NCSI_MASK) == WX_NCSI_SUP) ||
271 ((wx->subsystem_device_id & WX_WOL_MASK) == WX_WOL_SUP))) {
272 /* disable mac transmiter */
273 wr32m(wx, WX_MAC_TX_CFG, WX_MAC_TX_CFG_TE, 0);
274 }
275
276 /* disable transmits in the hardware now that interrupts are off */
277 for (i = 0; i < wx->num_tx_queues; i++) {
278 u8 reg_idx = wx->tx_ring[i]->reg_idx;
279
280 wr32(wx, WX_PX_TR_CFG(reg_idx), WX_PX_TR_CFG_SWFLSH);
281 }
282
283 /* Disable the Tx DMA engine */
284 wr32m(wx, WX_TDM_CTL, WX_TDM_CTL_TE, 0);
285 }
286
txgbe_down(struct wx * wx)287 void txgbe_down(struct wx *wx)
288 {
289 txgbe_disable_device(wx);
290 txgbe_reset(wx);
291
292 switch (wx->mac.type) {
293 case wx_mac_aml40:
294 phylink_stop(wx->phylink);
295 break;
296 case wx_mac_aml:
297 phylink_stop(wx->phylink);
298 /* Disable TX laser */
299 wr32m(wx, WX_GPIO_DR, TXGBE_GPIOBIT_1, TXGBE_GPIOBIT_1);
300 break;
301 case wx_mac_sp:
302 phylink_stop(wx->phylink);
303 break;
304 default:
305 break;
306 }
307
308 wx_clean_all_tx_rings(wx);
309 wx_clean_all_rx_rings(wx);
310 }
311
txgbe_up(struct wx * wx)312 void txgbe_up(struct wx *wx)
313 {
314 wx_configure(wx);
315 wx_ptp_init(wx);
316 txgbe_up_complete(wx);
317 }
318
txgbe_down_suspend(struct wx * wx)319 static void txgbe_down_suspend(struct wx *wx)
320 {
321 if (test_and_set_bit(WX_STATE_RES_FREED, wx->state))
322 return;
323
324 phylink_stop(wx->phylink);
325 wx_clean_all_tx_rings(wx);
326 wx_clean_all_rx_rings(wx);
327 wx_free_irq(wx);
328 txgbe_free_misc_irq(wx->priv);
329 wx_free_resources(wx);
330 txgbe_fdir_filter_exit(wx);
331 }
332
333 /**
334 * txgbe_init_type_code - Initialize the shared code
335 * @wx: pointer to hardware structure
336 **/
txgbe_init_type_code(struct wx * wx)337 static void txgbe_init_type_code(struct wx *wx)
338 {
339 u8 device_type = wx->subsystem_device_id & 0xF0;
340
341 switch (wx->device_id) {
342 case TXGBE_DEV_ID_SP1000:
343 case TXGBE_DEV_ID_WX1820:
344 wx->mac.type = wx_mac_sp;
345 break;
346 case TXGBE_DEV_ID_AML5010:
347 case TXGBE_DEV_ID_AML5110:
348 case TXGBE_DEV_ID_AML5025:
349 case TXGBE_DEV_ID_AML5125:
350 wx->mac.type = wx_mac_aml;
351 break;
352 case TXGBE_DEV_ID_AML5040:
353 case TXGBE_DEV_ID_AML5140:
354 wx->mac.type = wx_mac_aml40;
355 break;
356 default:
357 wx->mac.type = wx_mac_unknown;
358 break;
359 }
360
361 switch (device_type) {
362 case TXGBE_ID_SFP:
363 wx->media_type = wx_media_fiber;
364 break;
365 case TXGBE_ID_XAUI:
366 case TXGBE_ID_SGMII:
367 wx->media_type = wx_media_copper;
368 break;
369 case TXGBE_ID_KR_KX_KX4:
370 case TXGBE_ID_MAC_XAUI:
371 case TXGBE_ID_MAC_SGMII:
372 wx->media_type = wx_media_backplane;
373 break;
374 case TXGBE_ID_SFI_XAUI:
375 if (wx->bus.func == 0)
376 wx->media_type = wx_media_fiber;
377 else
378 wx->media_type = wx_media_copper;
379 break;
380 default:
381 wx->media_type = wx_media_unknown;
382 break;
383 }
384 }
385
386 /**
387 * txgbe_sw_init - Initialize general software structures (struct wx)
388 * @wx: board private structure to initialize
389 **/
txgbe_sw_init(struct wx * wx)390 static int txgbe_sw_init(struct wx *wx)
391 {
392 u16 msix_count = 0;
393 int err;
394
395 wx->mac.num_rar_entries = TXGBE_RAR_ENTRIES;
396 wx->mac.max_tx_queues = TXGBE_MAX_TXQ;
397 wx->mac.max_rx_queues = TXGBE_MAX_RXQ;
398 wx->mac.mcft_size = TXGBE_MC_TBL_SIZE;
399 wx->mac.vft_size = TXGBE_VFT_TBL_SIZE;
400 wx->mac.rx_pb_size = TXGBE_RX_PB_SIZE;
401 wx->mac.tx_pb_size = TXGBE_TDB_PB_SZ;
402
403 /* PCI config space info */
404 err = wx_sw_init(wx);
405 if (err < 0)
406 return err;
407
408 txgbe_init_type_code(wx);
409
410 /* Set common capability flags and settings */
411 wx->max_q_vectors = TXGBE_MAX_MSIX_VECTORS;
412 err = wx_get_pcie_msix_counts(wx, &msix_count, TXGBE_MAX_MSIX_VECTORS);
413 if (err)
414 wx_err(wx, "Do not support MSI-X\n");
415 wx->mac.max_msix_vectors = msix_count;
416
417 wx->ring_feature[RING_F_RSS].limit = min_t(int, TXGBE_MAX_RSS_INDICES,
418 num_online_cpus());
419 wx->rss_enabled = true;
420
421 wx->ring_feature[RING_F_FDIR].limit = min_t(int, TXGBE_MAX_FDIR_INDICES,
422 num_online_cpus());
423 set_bit(WX_FLAG_FDIR_CAPABLE, wx->flags);
424 set_bit(WX_FLAG_FDIR_HASH, wx->flags);
425 wx->atr_sample_rate = TXGBE_DEFAULT_ATR_SAMPLE_RATE;
426 wx->atr = txgbe_atr;
427 wx->configure_fdir = txgbe_configure_fdir;
428
429 set_bit(WX_FLAG_RSC_CAPABLE, wx->flags);
430 set_bit(WX_FLAG_RSC_ENABLED, wx->flags);
431 set_bit(WX_FLAG_MULTI_64_FUNC, wx->flags);
432
433 /* enable itr by default in dynamic mode */
434 wx->adaptive_itr = true;
435 wx->rx_itr_setting = 1;
436 wx->tx_itr_setting = 1;
437
438 /* set default ring sizes */
439 wx->tx_ring_count = TXGBE_DEFAULT_TXD;
440 wx->rx_ring_count = TXGBE_DEFAULT_RXD;
441 wx->mbx.size = WX_VXMAILBOX_SIZE;
442
443 /* set default work limits */
444 wx->tx_work_limit = TXGBE_DEFAULT_TX_WORK;
445 wx->rx_work_limit = TXGBE_DEFAULT_RX_WORK;
446
447 wx->setup_tc = txgbe_setup_tc;
448 wx->do_reset = txgbe_do_reset;
449 wx->down_suspend = txgbe_down_suspend;
450 set_bit(0, &wx->fwd_bitmask);
451
452 switch (wx->mac.type) {
453 case wx_mac_sp:
454 break;
455 case wx_mac_aml:
456 case wx_mac_aml40:
457 set_bit(WX_FLAG_RX_MERGE_ENABLED, wx->flags);
458 set_bit(WX_FLAG_TXHEAD_WB_ENABLED, wx->flags);
459 set_bit(WX_FLAG_SWFW_RING, wx->flags);
460 wx->swfw_index = 0;
461 break;
462 default:
463 break;
464 }
465
466 return 0;
467 }
468
txgbe_init_fdir(struct txgbe * txgbe)469 static void txgbe_init_fdir(struct txgbe *txgbe)
470 {
471 txgbe->fdir_filter_count = 0;
472 spin_lock_init(&txgbe->fdir_perfect_lock);
473 }
474
475 /**
476 * txgbe_open - Called when a network interface is made active
477 * @netdev: network interface device structure
478 *
479 * Returns 0 on success, negative value on failure
480 *
481 * The open entry point is called when a network interface is made
482 * active by the system (IFF_UP).
483 **/
txgbe_open(struct net_device * netdev)484 static int txgbe_open(struct net_device *netdev)
485 {
486 struct wx *wx = netdev_priv(netdev);
487 int err;
488
489 err = wx_setup_resources(wx);
490 if (err)
491 goto err_reset;
492
493 wx_configure(wx);
494
495 err = txgbe_setup_misc_irq(wx->priv);
496 if (err)
497 goto err_free_resources;
498
499 err = txgbe_request_queue_irqs(wx);
500 if (err)
501 goto err_free_misc_irq;
502
503 /* Notify the stack of the actual queue counts. */
504 err = netif_set_real_num_tx_queues(netdev, wx->num_tx_queues);
505 if (err)
506 goto err_free_irq;
507
508 err = netif_set_real_num_rx_queues(netdev, wx->num_rx_queues);
509 if (err)
510 goto err_free_irq;
511
512 wx_ptp_init(wx);
513
514 txgbe_up_complete(wx);
515
516 return 0;
517
518 err_free_irq:
519 wx_free_irq(wx);
520 err_free_misc_irq:
521 txgbe_free_misc_irq(wx->priv);
522 wx_reset_interrupt_capability(wx);
523 err_free_resources:
524 wx_free_resources(wx);
525 err_reset:
526 txgbe_reset(wx);
527
528 return err;
529 }
530
531 /**
532 * txgbe_close_suspend - actions necessary to both suspend and close flows
533 * @wx: the private wx struct
534 *
535 * This function should contain the necessary work common to both suspending
536 * and closing of the device.
537 */
txgbe_close_suspend(struct wx * wx)538 static void txgbe_close_suspend(struct wx *wx)
539 {
540 wx_ptp_suspend(wx);
541 txgbe_disable_device(wx);
542 wx_free_resources(wx);
543 }
544
545 /**
546 * txgbe_close - Disables a network interface
547 * @netdev: network interface device structure
548 *
549 * Returns 0, this is not allowed to fail
550 *
551 * The close entry point is called when an interface is de-activated
552 * by the OS. The hardware is still under the drivers control, but
553 * needs to be disabled. A global MAC reset is issued to stop the
554 * hardware, and all transmit and receive resources are freed.
555 **/
txgbe_close(struct net_device * netdev)556 static int txgbe_close(struct net_device *netdev)
557 {
558 struct wx *wx = netdev_priv(netdev);
559
560 if (test_bit(WX_STATE_RES_FREED, wx->state))
561 goto out;
562
563 wx_ptp_stop(wx);
564 txgbe_down(wx);
565 wx_free_irq(wx);
566 txgbe_free_misc_irq(wx->priv);
567 wx_free_resources(wx);
568 txgbe_fdir_filter_exit(wx);
569 out:
570 wx_control_hw(wx, false);
571
572 return 0;
573 }
574
txgbe_dev_shutdown(struct pci_dev * pdev)575 static void txgbe_dev_shutdown(struct pci_dev *pdev)
576 {
577 struct wx *wx = pci_get_drvdata(pdev);
578 struct net_device *netdev;
579
580 netdev = wx->netdev;
581 netif_device_detach(netdev);
582
583 rtnl_lock();
584 if (netif_running(netdev))
585 txgbe_close_suspend(wx);
586 rtnl_unlock();
587
588 wx_control_hw(wx, false);
589
590 if (!test_and_set_bit(WX_STATE_DISABLED, wx->state))
591 pci_disable_device(pdev);
592 }
593
txgbe_shutdown(struct pci_dev * pdev)594 static void txgbe_shutdown(struct pci_dev *pdev)
595 {
596 txgbe_dev_shutdown(pdev);
597
598 if (system_state == SYSTEM_POWER_OFF) {
599 pci_wake_from_d3(pdev, false);
600 pci_set_power_state(pdev, PCI_D3hot);
601 }
602 }
603
604 /**
605 * txgbe_setup_tc - routine to configure net_device for multiple traffic
606 * classes.
607 *
608 * @dev: net device to configure
609 * @tc: number of traffic classes to enable
610 */
txgbe_setup_tc(struct net_device * dev,u8 tc)611 int txgbe_setup_tc(struct net_device *dev, u8 tc)
612 {
613 struct wx *wx = netdev_priv(dev);
614
615 /* Hardware has to reinitialize queues and interrupts to
616 * match packet buffer alignment. Unfortunately, the
617 * hardware is not flexible enough to do this dynamically.
618 */
619 if (netif_running(dev))
620 txgbe_close(dev);
621 else
622 txgbe_reset(wx);
623
624 wx_clear_interrupt_scheme(wx);
625
626 if (tc)
627 netdev_set_num_tc(dev, tc);
628 else
629 netdev_reset_tc(dev);
630
631 wx_init_interrupt_scheme(wx);
632
633 if (netif_running(dev))
634 txgbe_open(dev);
635
636 return 0;
637 }
638
txgbe_reinit_locked(struct wx * wx)639 static void txgbe_reinit_locked(struct wx *wx)
640 {
641 netif_trans_update(wx->netdev);
642
643 mutex_lock(&wx->reset_lock);
644 set_bit(WX_STATE_RESETTING, wx->state);
645
646 txgbe_down(wx);
647 txgbe_up(wx);
648
649 clear_bit(WX_STATE_RESETTING, wx->state);
650 mutex_unlock(&wx->reset_lock);
651 }
652
txgbe_do_reset(struct net_device * netdev,bool reinit)653 void txgbe_do_reset(struct net_device *netdev, bool reinit)
654 {
655 struct wx *wx = netdev_priv(netdev);
656
657 if (netif_running(netdev) && reinit)
658 txgbe_reinit_locked(wx);
659 else
660 txgbe_reset(wx);
661 }
662
txgbe_udp_tunnel_sync(struct net_device * dev,unsigned int table)663 static int txgbe_udp_tunnel_sync(struct net_device *dev, unsigned int table)
664 {
665 struct wx *wx = netdev_priv(dev);
666 struct udp_tunnel_info ti;
667
668 udp_tunnel_nic_get_port(dev, table, 0, &ti);
669 switch (ti.type) {
670 case UDP_TUNNEL_TYPE_VXLAN:
671 wr32(wx, TXGBE_CFG_VXLAN, ntohs(ti.port));
672 break;
673 case UDP_TUNNEL_TYPE_VXLAN_GPE:
674 wr32(wx, TXGBE_CFG_VXLAN_GPE, ntohs(ti.port));
675 break;
676 case UDP_TUNNEL_TYPE_GENEVE:
677 wr32(wx, TXGBE_CFG_GENEVE, ntohs(ti.port));
678 break;
679 default:
680 break;
681 }
682
683 return 0;
684 }
685
686 static const struct udp_tunnel_nic_info txgbe_udp_tunnels = {
687 .sync_table = txgbe_udp_tunnel_sync,
688 .flags = UDP_TUNNEL_NIC_INFO_OPEN_ONLY,
689 .tables = {
690 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
691 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN_GPE, },
692 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_GENEVE, },
693 },
694 };
695
696 static const struct net_device_ops txgbe_netdev_ops = {
697 .ndo_open = txgbe_open,
698 .ndo_stop = txgbe_close,
699 .ndo_change_mtu = wx_change_mtu,
700 .ndo_start_xmit = wx_xmit_frame,
701 .ndo_tx_timeout = wx_tx_timeout,
702 .ndo_set_rx_mode = wx_set_rx_mode,
703 .ndo_set_features = wx_set_features,
704 .ndo_fix_features = wx_fix_features,
705 .ndo_features_check = wx_features_check,
706 .ndo_validate_addr = eth_validate_addr,
707 .ndo_set_mac_address = wx_set_mac,
708 .ndo_get_stats64 = wx_get_stats64,
709 .ndo_vlan_rx_add_vid = wx_vlan_rx_add_vid,
710 .ndo_vlan_rx_kill_vid = wx_vlan_rx_kill_vid,
711 .ndo_hwtstamp_set = wx_hwtstamp_set,
712 .ndo_hwtstamp_get = wx_hwtstamp_get,
713 };
714
715 /**
716 * txgbe_probe - Device Initialization Routine
717 * @pdev: PCI device information struct
718 * @ent: entry in txgbe_pci_tbl
719 *
720 * Returns 0 on success, negative on failure
721 *
722 * txgbe_probe initializes an adapter identified by a pci_dev structure.
723 * The OS initialization, configuring of the wx private structure,
724 * and a hardware reset occur.
725 **/
txgbe_probe(struct pci_dev * pdev,const struct pci_device_id __always_unused * ent)726 static int txgbe_probe(struct pci_dev *pdev,
727 const struct pci_device_id __always_unused *ent)
728 {
729 struct net_device *netdev;
730 int err, expected_gts;
731 struct wx *wx = NULL;
732 struct txgbe *txgbe;
733
734 u16 eeprom_verh = 0, eeprom_verl = 0, offset = 0;
735 u16 eeprom_cfg_blkh = 0, eeprom_cfg_blkl = 0;
736 u16 build = 0, major = 0, patch = 0;
737 u32 etrack_id = 0;
738
739 err = pci_enable_device_mem(pdev);
740 if (err)
741 return err;
742
743 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
744 if (err) {
745 dev_err(&pdev->dev,
746 "No usable DMA configuration, aborting\n");
747 goto err_pci_disable_dev;
748 }
749
750 err = pci_request_selected_regions(pdev,
751 pci_select_bars(pdev, IORESOURCE_MEM),
752 txgbe_driver_name);
753 if (err) {
754 dev_err(&pdev->dev,
755 "pci_request_selected_regions failed 0x%x\n", err);
756 goto err_pci_disable_dev;
757 }
758
759 pci_set_master(pdev);
760
761 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
762 sizeof(struct wx),
763 TXGBE_MAX_TX_QUEUES,
764 TXGBE_MAX_RX_QUEUES);
765 if (!netdev) {
766 err = -ENOMEM;
767 goto err_pci_release_regions;
768 }
769
770 SET_NETDEV_DEV(netdev, &pdev->dev);
771
772 wx = netdev_priv(netdev);
773 wx->netdev = netdev;
774 wx->pdev = pdev;
775
776 wx->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
777
778 wx->hw_addr = devm_ioremap(&pdev->dev,
779 pci_resource_start(pdev, 0),
780 pci_resource_len(pdev, 0));
781 if (!wx->hw_addr) {
782 err = -EIO;
783 goto err_pci_release_regions;
784 }
785
786 /* The sapphire supports up to 63 VFs per pf, but physical
787 * function also need one pool for basic networking.
788 */
789 pci_sriov_set_totalvfs(pdev, TXGBE_MAX_VFS_DRV_LIMIT);
790 wx->driver_name = txgbe_driver_name;
791 txgbe_set_ethtool_ops(netdev);
792 netdev->netdev_ops = &txgbe_netdev_ops;
793 netdev->udp_tunnel_nic_info = &txgbe_udp_tunnels;
794
795 /* setup the private structure */
796 err = txgbe_sw_init(wx);
797 if (err)
798 goto err_pci_release_regions;
799
800 /* check if flash load is done after hw power up */
801 err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PERST);
802 if (err)
803 goto err_free_mac_table;
804 err = wx_check_flash_load(wx, TXGBE_SPI_ILDR_STATUS_PWRRST);
805 if (err)
806 goto err_free_mac_table;
807
808 err = wx_mng_present(wx);
809 if (err) {
810 dev_err(&pdev->dev, "Management capability is not present\n");
811 goto err_free_mac_table;
812 }
813
814 err = txgbe_reset_hw(wx);
815 if (err) {
816 dev_err(&pdev->dev, "HW Init failed: %d\n", err);
817 goto err_free_mac_table;
818 }
819
820 netdev->features = NETIF_F_SG |
821 NETIF_F_TSO |
822 NETIF_F_TSO6 |
823 NETIF_F_RXHASH |
824 NETIF_F_RXCSUM |
825 NETIF_F_HW_CSUM;
826
827 netdev->gso_partial_features = NETIF_F_GSO_ENCAP_ALL;
828 netdev->features |= netdev->gso_partial_features;
829 netdev->features |= NETIF_F_SCTP_CRC;
830 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
831 netdev->hw_enc_features |= netdev->vlan_features;
832 netdev->features |= NETIF_F_VLAN_FEATURES;
833 /* copy netdev features into list of user selectable features */
834 netdev->hw_features |= netdev->features | NETIF_F_RXALL;
835 netdev->hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
836 netdev->features |= NETIF_F_HIGHDMA;
837 netdev->hw_features |= NETIF_F_GRO;
838 netdev->features |= NETIF_F_GRO;
839 netdev->hw_features |= NETIF_F_LRO;
840 netdev->features |= NETIF_F_LRO;
841 netdev->features |= NETIF_F_RX_UDP_TUNNEL_PORT;
842
843 netdev->priv_flags |= IFF_UNICAST_FLT;
844 netdev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
845
846 netdev->min_mtu = ETH_MIN_MTU;
847 netdev->max_mtu = WX_MAX_JUMBO_FRAME_SIZE -
848 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
849
850 /* make sure the EEPROM is good */
851 err = txgbe_validate_eeprom_checksum(wx, NULL);
852 if (err != 0) {
853 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
854 wr32(wx, WX_MIS_RST, WX_MIS_RST_SW_RST);
855 err = -EIO;
856 goto err_free_mac_table;
857 }
858
859 eth_hw_addr_set(netdev, wx->mac.perm_addr);
860 wx_mac_set_default_filter(wx, wx->mac.perm_addr);
861
862 err = wx_init_err_task(wx);
863 if (err)
864 goto err_free_mac_table;
865
866 txgbe_init_service(wx);
867
868 err = wx_init_interrupt_scheme(wx);
869 if (err)
870 goto err_cancel_service;
871
872 /* Save off EEPROM version number and Option Rom version which
873 * together make a unique identify for the eeprom
874 */
875 wx_read_ee_hostif(wx,
876 wx->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_H,
877 &eeprom_verh);
878 wx_read_ee_hostif(wx,
879 wx->eeprom.sw_region_offset + TXGBE_EEPROM_VERSION_L,
880 &eeprom_verl);
881 etrack_id = (eeprom_verh << 16) | eeprom_verl;
882
883 wx_read_ee_hostif(wx,
884 wx->eeprom.sw_region_offset + TXGBE_ISCSI_BOOT_CONFIG,
885 &offset);
886
887 /* Make sure offset to SCSI block is valid */
888 if (!(offset == 0x0) && !(offset == 0xffff)) {
889 wx_read_ee_hostif(wx, offset + 0x84, &eeprom_cfg_blkh);
890 wx_read_ee_hostif(wx, offset + 0x83, &eeprom_cfg_blkl);
891
892 /* Only display Option Rom if exist */
893 if (eeprom_cfg_blkl && eeprom_cfg_blkh) {
894 major = eeprom_cfg_blkl >> 8;
895 build = (eeprom_cfg_blkl << 8) | (eeprom_cfg_blkh >> 8);
896 patch = eeprom_cfg_blkh & 0x00ff;
897
898 snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
899 "0x%08x, %d.%d.%d", etrack_id, major, build,
900 patch);
901 } else {
902 snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
903 "0x%08x", etrack_id);
904 }
905 } else {
906 snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
907 "0x%08x", etrack_id);
908 }
909
910 if (wx->mac.type == wx_mac_sp &&
911 ((etrack_id & 0xfffff) < 0x20010))
912 dev_warn(&pdev->dev, "Please upgrade the firmware to 0x20010 or above.\n");
913
914 err = txgbe_test_hostif(wx);
915 if (err != 0) {
916 dev_err(&pdev->dev, "Mismatched Firmware version\n");
917 err = -EIO;
918 goto err_release_hw;
919 }
920
921 txgbe = devm_kzalloc(&pdev->dev, sizeof(*txgbe), GFP_KERNEL);
922 if (!txgbe) {
923 err = -ENOMEM;
924 goto err_release_hw;
925 }
926
927 txgbe->wx = wx;
928 wx->priv = txgbe;
929
930 txgbe_init_fdir(txgbe);
931
932 err = txgbe_init_phy(txgbe);
933 if (err)
934 goto err_release_hw;
935
936 err = register_netdev(netdev);
937 if (err)
938 goto err_remove_phy;
939
940 pci_set_drvdata(pdev, wx);
941 pci_save_state(pdev);
942
943 netif_tx_stop_all_queues(netdev);
944
945 /* calculate the expected PCIe bandwidth required for optimal
946 * performance. Note that some older parts will never have enough
947 * bandwidth due to being older generation PCIe parts. We clamp these
948 * parts to ensure that no warning is displayed, as this could confuse
949 * users otherwise.
950 */
951 expected_gts = txgbe_enumerate_functions(wx) * 10;
952
953 /* don't check link if we failed to enumerate functions */
954 if (expected_gts > 0)
955 txgbe_check_minimum_link(wx);
956 else
957 dev_warn(&pdev->dev, "Failed to enumerate PF devices.\n");
958
959 return 0;
960
961 err_remove_phy:
962 txgbe_remove_phy(txgbe);
963 err_release_hw:
964 wx_clear_interrupt_scheme(wx);
965 wx_control_hw(wx, false);
966 err_cancel_service:
967 timer_delete_sync(&wx->service_timer);
968 cancel_work_sync(&wx->service_task);
969 cancel_work_sync(&wx->reset_task);
970 destroy_workqueue(wx->reset_wq);
971 err_free_mac_table:
972 kfree(wx->rss_key);
973 kfree(wx->mac_table);
974 err_pci_release_regions:
975 pci_release_selected_regions(pdev,
976 pci_select_bars(pdev, IORESOURCE_MEM));
977 err_pci_disable_dev:
978 pci_disable_device(pdev);
979 return err;
980 }
981
982 /**
983 * txgbe_remove - Device Removal Routine
984 * @pdev: PCI device information struct
985 *
986 * txgbe_remove is called by the PCI subsystem to alert the driver
987 * that it should release a PCI device. The could be caused by a
988 * Hot-Plug event, or because the driver is going to be removed from
989 * memory.
990 **/
txgbe_remove(struct pci_dev * pdev)991 static void txgbe_remove(struct pci_dev *pdev)
992 {
993 struct wx *wx = pci_get_drvdata(pdev);
994 struct txgbe *txgbe = wx->priv;
995 struct net_device *netdev;
996
997 netdev = wx->netdev;
998 wx_disable_sriov(wx);
999 unregister_netdev(netdev);
1000 txgbe_fdir_filter_exit(wx);
1001
1002 timer_shutdown_sync(&wx->service_timer);
1003 cancel_work_sync(&wx->service_task);
1004 cancel_work_sync(&wx->reset_task);
1005 destroy_workqueue(wx->reset_wq);
1006
1007 txgbe_remove_phy(txgbe);
1008 wx_free_isb_resources(wx);
1009
1010 pci_release_selected_regions(pdev,
1011 pci_select_bars(pdev, IORESOURCE_MEM));
1012
1013 kfree(wx->rss_key);
1014 kfree(wx->mac_table);
1015 wx_clear_interrupt_scheme(wx);
1016
1017 if (!test_and_set_bit(WX_STATE_DISABLED, wx->state))
1018 pci_disable_device(pdev);
1019 }
1020
1021 static struct pci_driver txgbe_driver = {
1022 .name = txgbe_driver_name,
1023 .id_table = txgbe_pci_tbl,
1024 .probe = txgbe_probe,
1025 .remove = txgbe_remove,
1026 .shutdown = txgbe_shutdown,
1027 .sriov_configure = wx_pci_sriov_configure,
1028 .err_handler = &wx_err_handler,
1029 };
1030
1031 module_pci_driver(txgbe_driver);
1032
1033 MODULE_DEVICE_TABLE(pci, txgbe_pci_tbl);
1034 MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, <software@trustnetic.com>");
1035 MODULE_DESCRIPTION("WangXun(R) 10/25/40 Gigabit PCI Express Network Driver");
1036 MODULE_LICENSE("GPL");
1037