1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 * Google virtual Ethernet (gve) driver 3 * 4 * Copyright (C) 2015-2021 Google, Inc. 5 */ 6 7 /* GVE DQO Descriptor formats */ 8 9 #ifndef _GVE_DESC_DQO_H_ 10 #define _GVE_DESC_DQO_H_ 11 12 #include <linux/build_bug.h> 13 14 #define GVE_TX_MAX_HDR_SIZE_DQO 255 15 #define GVE_TX_MIN_TSO_MSS_DQO 88 16 17 /* HW limit. This also has to fit in the 14 bits of the mss field of 18 * struct gve_tx_tso_context_desc_dqo. 19 */ 20 #define GVE_TX_MAX_TSO_MSS_DQO 9728 21 22 #ifndef __LITTLE_ENDIAN_BITFIELD 23 #error "Only little endian supported" 24 #endif 25 26 /* Basic TX descriptor (DTYPE 0x0C) */ 27 struct gve_tx_pkt_desc_dqo { 28 __le64 buf_addr; 29 30 /* Must be GVE_TX_PKT_DESC_DTYPE_DQO (0xc) */ 31 u8 dtype: 5; 32 33 /* Denotes the last descriptor of a packet. */ 34 u8 end_of_packet: 1; 35 u8 checksum_offload_enable: 1; 36 37 /* If set, will generate a descriptor completion for this descriptor. */ 38 u8 report_event: 1; 39 u8 reserved0; 40 __le16 reserved1; 41 42 /* The TX completion associated with this packet will contain this tag. 43 */ 44 __le16 compl_tag; 45 u16 buf_size: 14; 46 u16 reserved2: 2; 47 } __packed; 48 static_assert(sizeof(struct gve_tx_pkt_desc_dqo) == 16); 49 50 #define GVE_TX_PKT_DESC_DTYPE_DQO 0xc 51 #define GVE_TX_MAX_BUF_SIZE_DQO ((16 * 1024) - 1) 52 53 /* Maximum number of data descriptors allowed per packet, or per-TSO segment. */ 54 #define GVE_TX_MAX_DATA_DESCS 10 55 56 /* Min gap between tail and head to avoid cacheline overlap */ 57 #define GVE_TX_MIN_DESC_PREVENT_CACHE_OVERLAP 4 58 59 /* "report_event" on TX packet descriptors may only be reported on the last 60 * descriptor of a TX packet, and they must be spaced apart with at least this 61 * value. 62 */ 63 #define GVE_TX_MIN_RE_INTERVAL 32 64 65 struct gve_tx_context_cmd_dtype { 66 u8 dtype: 5; 67 u8 tso: 1; 68 u8 reserved1: 2; 69 70 u8 reserved2; 71 }; 72 73 static_assert(sizeof(struct gve_tx_context_cmd_dtype) == 2); 74 75 /* TX Native TSO Context DTYPE (0x05) 76 * 77 * "flex" fields allow the driver to send additional packet context to HW. 78 */ 79 struct gve_tx_tso_context_desc_dqo { 80 /* The L4 payload bytes that should be segmented. */ 81 u32 tso_total_len: 24; 82 u32 flex10: 8; 83 84 /* Max segment size in TSO excluding headers. */ 85 u16 mss: 14; 86 u16 reserved: 2; 87 88 u8 header_len; /* Header length to use for TSO offload */ 89 u8 flex11; 90 struct gve_tx_context_cmd_dtype cmd_dtype; 91 u8 flex0; 92 u8 flex5; 93 u8 flex6; 94 u8 flex7; 95 u8 flex8; 96 u8 flex9; 97 } __packed; 98 static_assert(sizeof(struct gve_tx_tso_context_desc_dqo) == 16); 99 100 #define GVE_TX_TSO_CTX_DESC_DTYPE_DQO 0x5 101 102 /* General context descriptor for sending metadata. */ 103 struct gve_tx_general_context_desc_dqo { 104 u8 flex4; 105 u8 flex5; 106 u8 flex6; 107 u8 flex7; 108 u8 flex8; 109 u8 flex9; 110 u8 flex10; 111 u8 flex11; 112 struct gve_tx_context_cmd_dtype cmd_dtype; 113 u16 reserved; 114 u8 flex0; 115 u8 flex1; 116 u8 flex2; 117 u8 flex3; 118 } __packed; 119 static_assert(sizeof(struct gve_tx_general_context_desc_dqo) == 16); 120 121 #define GVE_TX_GENERAL_CTX_DESC_DTYPE_DQO 0x4 122 123 /* Logical structure of metadata which is packed into context descriptor flex 124 * fields. 125 */ 126 struct gve_tx_metadata_dqo { 127 union { 128 struct { 129 u8 version; 130 131 /* If `skb->l4_hash` is set, this value should be 132 * derived from `skb->hash`. 133 * 134 * A zero value means no l4_hash was associated with the 135 * skb. 136 */ 137 u16 path_hash: 15; 138 139 /* Should be set to 1 if the flow associated with the 140 * skb had a rehash from the TCP stack. 141 */ 142 u16 rehash_event: 1; 143 } __packed; 144 u8 bytes[12]; 145 }; 146 } __packed; 147 static_assert(sizeof(struct gve_tx_metadata_dqo) == 12); 148 149 #define GVE_TX_METADATA_VERSION_DQO 0 150 151 /* TX completion descriptor */ 152 struct gve_tx_compl_desc { 153 /* For types 0-4 this is the TX queue ID associated with this 154 * completion. 155 */ 156 u16 id: 11; 157 158 /* See: GVE_COMPL_TYPE_DQO* */ 159 u16 type: 3; 160 u16 reserved0: 1; 161 162 /* Flipped by HW to notify the descriptor is populated. */ 163 u16 generation: 1; 164 union { 165 /* For descriptor completions, this is the last index fetched 166 * by HW + 1. 167 */ 168 __le16 tx_head; 169 170 /* For packet completions, this is the completion tag set on the 171 * TX packet descriptors. 172 */ 173 __le16 completion_tag; 174 }; 175 __le32 reserved1; 176 } __packed; 177 static_assert(sizeof(struct gve_tx_compl_desc) == 8); 178 179 #define GVE_COMPL_TYPE_DQO_PKT 0x2 /* Packet completion */ 180 #define GVE_COMPL_TYPE_DQO_DESC 0x4 /* Descriptor completion */ 181 #define GVE_COMPL_TYPE_DQO_MISS 0x1 /* Miss path completion */ 182 #define GVE_COMPL_TYPE_DQO_REINJECTION 0x3 /* Re-injection completion */ 183 184 /* The most significant bit in the completion tag can change the completion 185 * type from packet completion to miss path completion. 186 */ 187 #define GVE_ALT_MISS_COMPL_BIT BIT(15) 188 189 /* Descriptor to post buffers to HW on buffer queue. */ 190 struct gve_rx_desc_dqo { 191 __le16 buf_id; /* ID returned in Rx completion descriptor */ 192 __le16 reserved0; 193 __le32 reserved1; 194 __le64 buf_addr; /* DMA address of the buffer */ 195 __le64 header_buf_addr; 196 __le64 reserved2; 197 } __packed; 198 static_assert(sizeof(struct gve_rx_desc_dqo) == 32); 199 200 /* Descriptor for HW to notify SW of new packets received on RX queue. */ 201 struct gve_rx_compl_desc_dqo { 202 /* Must be 1 */ 203 u8 rxdid: 4; 204 u8 reserved0: 4; 205 206 /* Packet originated from this system rather than the network. */ 207 u8 loopback: 1; 208 /* Set when IPv6 packet contains a destination options header or routing 209 * header. 210 */ 211 u8 ipv6_ex_add: 1; 212 /* Invalid packet was received. */ 213 u8 rx_error: 1; 214 u8 reserved1: 5; 215 216 u16 packet_type: 10; 217 u16 ip_hdr_err: 1; 218 u16 udp_len_err: 1; 219 u16 raw_cs_invalid: 1; 220 u16 reserved2: 3; 221 222 u16 packet_len: 14; 223 /* Flipped by HW to notify the descriptor is populated. */ 224 u16 generation: 1; 225 /* Should be zero. */ 226 u16 buffer_queue_id: 1; 227 228 u16 header_len: 10; 229 u16 rsc: 1; 230 u16 split_header: 1; 231 u16 reserved3: 4; 232 233 u8 descriptor_done: 1; 234 u8 end_of_packet: 1; 235 u8 header_buffer_overflow: 1; 236 u8 l3_l4_processed: 1; 237 u8 csum_ip_err: 1; 238 u8 csum_l4_err: 1; 239 u8 csum_external_ip_err: 1; 240 u8 csum_external_udp_err: 1; 241 242 u8 status_error1; 243 244 u8 reserved5; 245 u8 ts_sub_nsecs_low; 246 __le16 buf_id; /* Buffer ID which was sent on the buffer queue. */ 247 248 union { 249 /* Packet checksum. */ 250 __le16 raw_cs; 251 /* Segment length for RSC packets. */ 252 __le16 rsc_seg_len; 253 }; 254 __le32 hash; 255 __le32 reserved6; 256 __le32 reserved7; 257 __le32 ts; /* timestamp in nanosecs */ 258 } __packed; 259 260 static_assert(sizeof(struct gve_rx_compl_desc_dqo) == 32); 261 262 /* Ringing the doorbell too often can hurt performance. 263 * 264 * HW requires this value to be at least 8. 265 */ 266 #define GVE_RX_BUF_THRESH_DQO 32 267 268 #endif /* _GVE_DESC_DQO_H_ */ 269