1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779g0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779g0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 opp-shared; 34 35 opp-500000000 { 36 opp-hz = /bits/ 64 <500000000>; 37 opp-microvolt = <825000>; 38 clock-latency-ns = <500000>; 39 }; 40 opp-1000000000 { 41 opp-hz = /bits/ 64 <1000000000>; 42 opp-microvolt = <825000>; 43 clock-latency-ns = <500000>; 44 }; 45 opp-1500000000 { 46 opp-hz = /bits/ 64 <1500000000>; 47 opp-microvolt = <825000>; 48 clock-latency-ns = <500000>; 49 }; 50 opp-1700000000 { 51 opp-hz = /bits/ 64 <1700000000>; 52 opp-microvolt = <825000>; 53 clock-latency-ns = <500000>; 54 opp-suspend; 55 }; 56 opp-1800000000 { 57 opp-hz = /bits/ 64 <1800000000>; 58 opp-microvolt = <880000>; 59 clock-latency-ns = <500000>; 60 turbo-mode; 61 }; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu-map { 69 cluster0 { 70 core0 { 71 cpu = <&a76_0>; 72 }; 73 core1 { 74 cpu = <&a76_1>; 75 }; 76 }; 77 78 cluster1 { 79 core0 { 80 cpu = <&a76_2>; 81 }; 82 core1 { 83 cpu = <&a76_3>; 84 }; 85 }; 86 }; 87 88 a76_0: cpu@0 { 89 compatible = "arm,cortex-a76"; 90 reg = <0>; 91 device_type = "cpu"; 92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 93 next-level-cache = <&L3_CA76_0>; 94 enable-method = "psci"; 95 cpu-idle-states = <&CPU_SLEEP_0>; 96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 a76_1: cpu@100 { 101 compatible = "arm,cortex-a76"; 102 reg = <0x100>; 103 device_type = "cpu"; 104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 105 next-level-cache = <&L3_CA76_0>; 106 enable-method = "psci"; 107 cpu-idle-states = <&CPU_SLEEP_0>; 108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 109 operating-points-v2 = <&cluster0_opp>; 110 }; 111 112 a76_2: cpu@10000 { 113 compatible = "arm,cortex-a76"; 114 reg = <0x10000>; 115 device_type = "cpu"; 116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 117 next-level-cache = <&L3_CA76_1>; 118 enable-method = "psci"; 119 cpu-idle-states = <&CPU_SLEEP_0>; 120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 121 operating-points-v2 = <&cluster0_opp>; 122 }; 123 124 a76_3: cpu@10100 { 125 compatible = "arm,cortex-a76"; 126 reg = <0x10100>; 127 device_type = "cpu"; 128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 129 next-level-cache = <&L3_CA76_1>; 130 enable-method = "psci"; 131 cpu-idle-states = <&CPU_SLEEP_0>; 132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 133 operating-points-v2 = <&cluster0_opp>; 134 }; 135 136 idle-states { 137 entry-method = "psci"; 138 139 CPU_SLEEP_0: cpu-sleep-0 { 140 compatible = "arm,idle-state"; 141 arm,psci-suspend-param = <0x0010000>; 142 local-timer-stop; 143 entry-latency-us = <400>; 144 exit-latency-us = <500>; 145 min-residency-us = <4000>; 146 }; 147 }; 148 149 L3_CA76_0: cache-controller-0 { 150 compatible = "cache"; 151 power-domains = <&sysc R8A779G0_PD_A2E0D0>; 152 cache-unified; 153 cache-level = <3>; 154 }; 155 156 L3_CA76_1: cache-controller-1 { 157 compatible = "cache"; 158 power-domains = <&sysc R8A779G0_PD_A2E0D1>; 159 cache-unified; 160 cache-level = <3>; 161 }; 162 }; 163 164 extal_clk: extal { 165 compatible = "fixed-clock"; 166 #clock-cells = <0>; 167 /* This value must be overridden by the board */ 168 clock-frequency = <0>; 169 bootph-all; 170 }; 171 172 extalr_clk: extalr { 173 compatible = "fixed-clock"; 174 #clock-cells = <0>; 175 /* This value must be overridden by the board */ 176 clock-frequency = <0>; 177 bootph-all; 178 }; 179 180 pcie0_clkref: pcie0-clkref { 181 compatible = "fixed-clock"; 182 #clock-cells = <0>; 183 /* This value must be overridden by the board */ 184 clock-frequency = <0>; 185 }; 186 187 pcie1_clkref: pcie1-clkref { 188 compatible = "fixed-clock"; 189 #clock-cells = <0>; 190 /* This value must be overridden by the board */ 191 clock-frequency = <0>; 192 }; 193 194 pmu_a76 { 195 compatible = "arm,cortex-a76-pmu"; 196 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 197 }; 198 199 psci { 200 compatible = "arm,psci-1.0", "arm,psci-0.2"; 201 method = "smc"; 202 }; 203 204 /* External SCIF clocks - to be overridden by boards that provide them */ 205 scif_clk: scif { 206 compatible = "fixed-clock"; 207 #clock-cells = <0>; 208 clock-frequency = <0>; 209 }; 210 211 scif_clk2: scif2 { 212 compatible = "fixed-clock"; 213 #clock-cells = <0>; 214 clock-frequency = <0>; 215 }; 216 217 soc: soc { 218 compatible = "simple-bus"; 219 interrupt-parent = <&gic>; 220 bootph-all; 221 222 #address-cells = <2>; 223 #size-cells = <2>; 224 ranges; 225 226 rwdt: watchdog@e6020000 { 227 compatible = "renesas,r8a779g0-wdt", 228 "renesas,rcar-gen4-wdt"; 229 reg = <0 0xe6020000 0 0x0c>; 230 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 231 clocks = <&cpg CPG_MOD 907>; 232 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 233 resets = <&cpg 907>; 234 status = "disabled"; 235 }; 236 237 pfc: pinctrl@e6050000 { 238 compatible = "renesas,pfc-r8a779g0"; 239 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 240 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 241 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 242 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 243 <0 0xe6068000 0 0x16c>; 244 bootph-all; 245 }; 246 247 gpio0: gpio@e6050180 { 248 compatible = "renesas,gpio-r8a779g0", 249 "renesas,rcar-gen4-gpio"; 250 reg = <0 0xe6050180 0 0x54>; 251 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 252 clocks = <&cpg CPG_MOD 915>; 253 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 254 resets = <&cpg 915>; 255 gpio-controller; 256 #gpio-cells = <2>; 257 gpio-ranges = <&pfc 0 0 19>; 258 interrupt-controller; 259 #interrupt-cells = <2>; 260 }; 261 262 gpio1: gpio@e6050980 { 263 compatible = "renesas,gpio-r8a779g0", 264 "renesas,rcar-gen4-gpio"; 265 reg = <0 0xe6050980 0 0x54>; 266 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 267 clocks = <&cpg CPG_MOD 915>; 268 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 269 resets = <&cpg 915>; 270 gpio-controller; 271 #gpio-cells = <2>; 272 gpio-ranges = <&pfc 0 32 29>; 273 interrupt-controller; 274 #interrupt-cells = <2>; 275 }; 276 277 gpio2: gpio@e6058180 { 278 compatible = "renesas,gpio-r8a779g0", 279 "renesas,rcar-gen4-gpio"; 280 reg = <0 0xe6058180 0 0x54>; 281 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 282 clocks = <&cpg CPG_MOD 916>; 283 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 284 resets = <&cpg 916>; 285 gpio-controller; 286 #gpio-cells = <2>; 287 gpio-ranges = <&pfc 0 64 20>; 288 interrupt-controller; 289 #interrupt-cells = <2>; 290 }; 291 292 gpio3: gpio@e6058980 { 293 compatible = "renesas,gpio-r8a779g0", 294 "renesas,rcar-gen4-gpio"; 295 reg = <0 0xe6058980 0 0x54>; 296 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 297 clocks = <&cpg CPG_MOD 916>; 298 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 299 resets = <&cpg 916>; 300 gpio-controller; 301 #gpio-cells = <2>; 302 gpio-ranges = <&pfc 0 96 30>; 303 interrupt-controller; 304 #interrupt-cells = <2>; 305 }; 306 307 gpio4: gpio@e6060180 { 308 compatible = "renesas,gpio-r8a779g0", 309 "renesas,rcar-gen4-gpio"; 310 reg = <0 0xe6060180 0 0x54>; 311 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 312 clocks = <&cpg CPG_MOD 917>; 313 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 314 resets = <&cpg 917>; 315 gpio-controller; 316 #gpio-cells = <2>; 317 gpio-ranges = <&pfc 0 128 25>; 318 interrupt-controller; 319 #interrupt-cells = <2>; 320 }; 321 322 gpio5: gpio@e6060980 { 323 compatible = "renesas,gpio-r8a779g0", 324 "renesas,rcar-gen4-gpio"; 325 reg = <0 0xe6060980 0 0x54>; 326 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&cpg CPG_MOD 917>; 328 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 329 resets = <&cpg 917>; 330 gpio-controller; 331 #gpio-cells = <2>; 332 gpio-ranges = <&pfc 0 160 21>; 333 interrupt-controller; 334 #interrupt-cells = <2>; 335 }; 336 337 gpio6: gpio@e6061180 { 338 compatible = "renesas,gpio-r8a779g0", 339 "renesas,rcar-gen4-gpio"; 340 reg = <0 0xe6061180 0 0x54>; 341 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 342 clocks = <&cpg CPG_MOD 917>; 343 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 344 resets = <&cpg 917>; 345 gpio-controller; 346 #gpio-cells = <2>; 347 gpio-ranges = <&pfc 0 192 21>; 348 interrupt-controller; 349 #interrupt-cells = <2>; 350 }; 351 352 gpio7: gpio@e6061980 { 353 compatible = "renesas,gpio-r8a779g0", 354 "renesas,rcar-gen4-gpio"; 355 reg = <0 0xe6061980 0 0x54>; 356 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 357 clocks = <&cpg CPG_MOD 917>; 358 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 359 resets = <&cpg 917>; 360 gpio-controller; 361 #gpio-cells = <2>; 362 gpio-ranges = <&pfc 0 224 21>; 363 interrupt-controller; 364 #interrupt-cells = <2>; 365 }; 366 367 gpio8: gpio@e6068180 { 368 compatible = "renesas,gpio-r8a779g0", 369 "renesas,rcar-gen4-gpio"; 370 reg = <0 0xe6068180 0 0x54>; 371 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 372 clocks = <&cpg CPG_MOD 918>; 373 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 374 resets = <&cpg 918>; 375 gpio-controller; 376 #gpio-cells = <2>; 377 gpio-ranges = <&pfc 0 256 14>; 378 interrupt-controller; 379 #interrupt-cells = <2>; 380 }; 381 382 cmt0: timer@e60f0000 { 383 compatible = "renesas,r8a779g0-cmt0", 384 "renesas,rcar-gen4-cmt0"; 385 reg = <0 0xe60f0000 0 0x1004>; 386 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 910>; 389 clock-names = "fck"; 390 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 391 resets = <&cpg 910>; 392 status = "disabled"; 393 }; 394 395 cmt1: timer@e6130000 { 396 compatible = "renesas,r8a779g0-cmt1", 397 "renesas,rcar-gen4-cmt1"; 398 reg = <0 0xe6130000 0 0x1004>; 399 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 405 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 406 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 407 clocks = <&cpg CPG_MOD 911>; 408 clock-names = "fck"; 409 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 410 resets = <&cpg 911>; 411 status = "disabled"; 412 }; 413 414 cmt2: timer@e6140000 { 415 compatible = "renesas,r8a779g0-cmt1", 416 "renesas,rcar-gen4-cmt1"; 417 reg = <0 0xe6140000 0 0x1004>; 418 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 421 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 422 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 423 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 424 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 425 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 426 clocks = <&cpg CPG_MOD 912>; 427 clock-names = "fck"; 428 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 429 resets = <&cpg 912>; 430 status = "disabled"; 431 }; 432 433 cmt3: timer@e6148000 { 434 compatible = "renesas,r8a779g0-cmt1", 435 "renesas,rcar-gen4-cmt1"; 436 reg = <0 0xe6148000 0 0x1004>; 437 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 443 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 444 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 913>; 446 clock-names = "fck"; 447 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 448 resets = <&cpg 913>; 449 status = "disabled"; 450 }; 451 452 cpg: clock-controller@e6150000 { 453 compatible = "renesas,r8a779g0-cpg-mssr"; 454 reg = <0 0xe6150000 0 0x4000>; 455 clocks = <&extal_clk>, <&extalr_clk>; 456 clock-names = "extal", "extalr"; 457 #clock-cells = <2>; 458 #power-domain-cells = <0>; 459 #reset-cells = <1>; 460 bootph-all; 461 }; 462 463 rst: reset-controller@e6160000 { 464 compatible = "renesas,r8a779g0-rst"; 465 reg = <0 0xe6160000 0 0x4000>; 466 bootph-all; 467 }; 468 469 sysc: system-controller@e6180000 { 470 compatible = "renesas,r8a779g0-sysc"; 471 reg = <0 0xe6180000 0 0x4000>; 472 #power-domain-cells = <1>; 473 }; 474 475 tsc: thermal@e6198000 { 476 compatible = "renesas,r8a779g0-thermal"; 477 reg = <0 0xe6198000 0 0x200>, 478 <0 0xe61a0000 0 0x200>, 479 <0 0xe61a8000 0 0x200>, 480 <0 0xe61b0000 0 0x200>; 481 clocks = <&cpg CPG_MOD 919>; 482 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 483 resets = <&cpg 919>; 484 #thermal-sensor-cells = <1>; 485 }; 486 487 otp: otp@e61be000 { 488 compatible = "renesas,r8a779g0-otp"; 489 reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; 490 }; 491 492 intc_ex: interrupt-controller@e61c0000 { 493 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 494 #interrupt-cells = <2>; 495 interrupt-controller; 496 reg = <0 0xe61c0000 0 0x200>; 497 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 499 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 500 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 502 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&cpg CPG_MOD 611>; 504 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 505 resets = <&cpg 611>; 506 }; 507 508 tmu0: timer@e61e0000 { 509 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 510 reg = <0 0xe61e0000 0 0x30>; 511 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 514 interrupt-names = "tuni0", "tuni1", "tuni2"; 515 clocks = <&cpg CPG_MOD 713>; 516 clock-names = "fck"; 517 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 518 resets = <&cpg 713>; 519 status = "disabled"; 520 }; 521 522 tmu1: timer@e6fc0000 { 523 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 524 reg = <0 0xe6fc0000 0 0x30>; 525 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 529 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 530 clocks = <&cpg CPG_MOD 714>; 531 clock-names = "fck"; 532 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 533 resets = <&cpg 714>; 534 status = "disabled"; 535 }; 536 537 tmu2: timer@e6fd0000 { 538 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 539 reg = <0 0xe6fd0000 0 0x30>; 540 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 541 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 542 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 543 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 544 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 545 clocks = <&cpg CPG_MOD 715>; 546 clock-names = "fck"; 547 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 548 resets = <&cpg 715>; 549 status = "disabled"; 550 }; 551 552 tmu3: timer@e6fe0000 { 553 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 554 reg = <0 0xe6fe0000 0 0x30>; 555 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 556 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 557 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 558 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 559 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 560 clocks = <&cpg CPG_MOD 716>; 561 clock-names = "fck"; 562 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 563 resets = <&cpg 716>; 564 status = "disabled"; 565 }; 566 567 tmu4: timer@ffc00000 { 568 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 569 reg = <0 0xffc00000 0 0x30>; 570 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 571 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 572 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 573 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 574 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 575 clocks = <&cpg CPG_MOD 717>; 576 clock-names = "fck"; 577 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 578 resets = <&cpg 717>; 579 status = "disabled"; 580 }; 581 582 tsn0: ethernet@e6460000 { 583 compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn"; 584 reg = <0 0xe6460000 0 0x7000>, 585 <0 0xe6449000 0 0x500>; 586 reg-names = "tsnes", "gptp"; 587 interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 588 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; 589 interrupt-names = "tx", "rx"; 590 clocks = <&cpg CPG_MOD 2723>; 591 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 592 resets = <&cpg 2723>; 593 status = "disabled"; 594 }; 595 596 i2c0: i2c@e6500000 { 597 compatible = "renesas,i2c-r8a779g0", 598 "renesas,rcar-gen4-i2c"; 599 reg = <0 0xe6500000 0 0x40>; 600 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 601 clocks = <&cpg CPG_MOD 518>; 602 dmas = <&dmac0 0x91>, <&dmac0 0x90>, 603 <&dmac1 0x91>, <&dmac1 0x90>; 604 dma-names = "tx", "rx", "tx", "rx"; 605 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 606 resets = <&cpg 518>; 607 i2c-scl-internal-delay-ns = <110>; 608 #address-cells = <1>; 609 #size-cells = <0>; 610 status = "disabled"; 611 }; 612 613 i2c1: i2c@e6508000 { 614 compatible = "renesas,i2c-r8a779g0", 615 "renesas,rcar-gen4-i2c"; 616 reg = <0 0xe6508000 0 0x40>; 617 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 618 clocks = <&cpg CPG_MOD 519>; 619 dmas = <&dmac0 0x93>, <&dmac0 0x92>, 620 <&dmac1 0x93>, <&dmac1 0x92>; 621 dma-names = "tx", "rx", "tx", "rx"; 622 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 623 resets = <&cpg 519>; 624 i2c-scl-internal-delay-ns = <110>; 625 #address-cells = <1>; 626 #size-cells = <0>; 627 status = "disabled"; 628 }; 629 630 i2c2: i2c@e6510000 { 631 compatible = "renesas,i2c-r8a779g0", 632 "renesas,rcar-gen4-i2c"; 633 reg = <0 0xe6510000 0 0x40>; 634 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 635 clocks = <&cpg CPG_MOD 520>; 636 dmas = <&dmac0 0x95>, <&dmac0 0x94>, 637 <&dmac1 0x95>, <&dmac1 0x94>; 638 dma-names = "tx", "rx", "tx", "rx"; 639 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 640 resets = <&cpg 520>; 641 i2c-scl-internal-delay-ns = <110>; 642 #address-cells = <1>; 643 #size-cells = <0>; 644 status = "disabled"; 645 }; 646 647 i2c3: i2c@e66d0000 { 648 compatible = "renesas,i2c-r8a779g0", 649 "renesas,rcar-gen4-i2c"; 650 reg = <0 0xe66d0000 0 0x40>; 651 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 652 clocks = <&cpg CPG_MOD 521>; 653 dmas = <&dmac0 0x97>, <&dmac0 0x96>, 654 <&dmac1 0x97>, <&dmac1 0x96>; 655 dma-names = "tx", "rx", "tx", "rx"; 656 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 657 resets = <&cpg 521>; 658 i2c-scl-internal-delay-ns = <110>; 659 #address-cells = <1>; 660 #size-cells = <0>; 661 status = "disabled"; 662 }; 663 664 i2c4: i2c@e66d8000 { 665 compatible = "renesas,i2c-r8a779g0", 666 "renesas,rcar-gen4-i2c"; 667 reg = <0 0xe66d8000 0 0x40>; 668 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 669 clocks = <&cpg CPG_MOD 522>; 670 dma-names = "tx", "rx", "tx", "rx"; 671 dmas = <&dmac0 0x99>, <&dmac0 0x98>, 672 <&dmac1 0x99>, <&dmac1 0x98>; 673 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 674 resets = <&cpg 522>; 675 i2c-scl-internal-delay-ns = <110>; 676 #address-cells = <1>; 677 #size-cells = <0>; 678 status = "disabled"; 679 }; 680 681 i2c5: i2c@e66e0000 { 682 compatible = "renesas,i2c-r8a779g0", 683 "renesas,rcar-gen4-i2c"; 684 reg = <0 0xe66e0000 0 0x40>; 685 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 686 clocks = <&cpg CPG_MOD 523>; 687 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 688 <&dmac1 0x9b>, <&dmac1 0x9a>; 689 dma-names = "tx", "rx", "tx", "rx"; 690 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 691 resets = <&cpg 523>; 692 i2c-scl-internal-delay-ns = <110>; 693 #address-cells = <1>; 694 #size-cells = <0>; 695 status = "disabled"; 696 }; 697 698 hscif0: serial@e6540000 { 699 compatible = "renesas,hscif-r8a779g0", 700 "renesas,rcar-gen4-hscif", "renesas,hscif"; 701 reg = <0 0xe6540000 0 0x60>; 702 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 703 clocks = <&cpg CPG_MOD 514>, 704 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 705 <&scif_clk>; 706 clock-names = "fck", "brg_int", "scif_clk"; 707 dmas = <&dmac0 0x31>, <&dmac0 0x30>, 708 <&dmac1 0x31>, <&dmac1 0x30>; 709 dma-names = "tx", "rx", "tx", "rx"; 710 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 711 resets = <&cpg 514>; 712 status = "disabled"; 713 }; 714 715 hscif1: serial@e6550000 { 716 compatible = "renesas,hscif-r8a779g0", 717 "renesas,rcar-gen4-hscif", "renesas,hscif"; 718 reg = <0 0xe6550000 0 0x60>; 719 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 720 clocks = <&cpg CPG_MOD 515>, 721 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 722 <&scif_clk>; 723 clock-names = "fck", "brg_int", "scif_clk"; 724 dmas = <&dmac0 0x33>, <&dmac0 0x32>, 725 <&dmac1 0x33>, <&dmac1 0x32>; 726 dma-names = "tx", "rx", "tx", "rx"; 727 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 728 resets = <&cpg 515>; 729 status = "disabled"; 730 }; 731 732 hscif2: serial@e6560000 { 733 compatible = "renesas,hscif-r8a779g0", 734 "renesas,rcar-gen4-hscif", "renesas,hscif"; 735 reg = <0 0xe6560000 0 0x60>; 736 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 737 clocks = <&cpg CPG_MOD 516>, 738 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 739 <&scif_clk2>; 740 clock-names = "fck", "brg_int", "scif_clk"; 741 dmas = <&dmac0 0x35>, <&dmac0 0x34>, 742 <&dmac1 0x35>, <&dmac1 0x34>; 743 dma-names = "tx", "rx", "tx", "rx"; 744 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 745 resets = <&cpg 516>; 746 status = "disabled"; 747 }; 748 749 hscif3: serial@e66a0000 { 750 compatible = "renesas,hscif-r8a779g0", 751 "renesas,rcar-gen4-hscif", "renesas,hscif"; 752 reg = <0 0xe66a0000 0 0x60>; 753 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 754 clocks = <&cpg CPG_MOD 517>, 755 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 756 <&scif_clk>; 757 clock-names = "fck", "brg_int", "scif_clk"; 758 dmas = <&dmac0 0x37>, <&dmac0 0x36>, 759 <&dmac1 0x37>, <&dmac1 0x36>; 760 dma-names = "tx", "rx", "tx", "rx"; 761 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 762 resets = <&cpg 517>; 763 status = "disabled"; 764 }; 765 766 pciec0: pcie@e65d0000 { 767 compatible = "renesas,r8a779g0-pcie", 768 "renesas,rcar-gen4-pcie"; 769 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 770 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 771 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 772 <0 0xfe000000 0 0x400000>; 773 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 774 interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 778 interrupt-names = "msi", "dma", "sft_ce", "app"; 779 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 780 clock-names = "core", "ref"; 781 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 782 resets = <&cpg 624>; 783 reset-names = "pwr"; 784 max-link-speed = <4>; 785 num-lanes = <2>; 786 #address-cells = <3>; 787 #size-cells = <2>; 788 bus-range = <0x00 0xff>; 789 device_type = "pci"; 790 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 791 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 792 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 793 #interrupt-cells = <1>; 794 interrupt-map-mask = <0 0 0 7>; 795 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 796 <0 0 0 2 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 797 <0 0 0 3 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 798 <0 0 0 4 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; 799 snps,enable-cdm-check; 800 status = "disabled"; 801 802 /* PCIe bridge, Root Port */ 803 pciec0_rp: pci@0,0 { 804 #address-cells = <3>; 805 #size-cells = <2>; 806 reg = <0x0 0x0 0x0 0x0 0x0>; 807 compatible = "pciclass,0604"; 808 device_type = "pci"; 809 ranges; 810 }; 811 }; 812 813 pciec1: pcie@e65d8000 { 814 compatible = "renesas,r8a779g0-pcie", 815 "renesas,rcar-gen4-pcie"; 816 reg = <0 0xe65d8000 0 0x1000>, <0 0xe65da000 0 0x0800>, 817 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 818 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 819 <0 0xee900000 0 0x400000>; 820 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 821 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 825 interrupt-names = "msi", "dma", "sft_ce", "app"; 826 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 827 clock-names = "core", "ref"; 828 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 829 resets = <&cpg 625>; 830 reset-names = "pwr"; 831 max-link-speed = <4>; 832 num-lanes = <2>; 833 #address-cells = <3>; 834 #size-cells = <2>; 835 bus-range = <0x00 0xff>; 836 device_type = "pci"; 837 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00400000>, 838 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x10000000>; 839 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 840 #interrupt-cells = <1>; 841 interrupt-map-mask = <0 0 0 7>; 842 interrupt-map = <0 0 0 1 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 843 <0 0 0 2 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 844 <0 0 0 3 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 845 <0 0 0 4 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>; 846 snps,enable-cdm-check; 847 status = "disabled"; 848 849 /* PCIe bridge, Root Port */ 850 pciec1_rp: pci@0,0 { 851 #address-cells = <3>; 852 #size-cells = <2>; 853 reg = <0x0 0x0 0x0 0x0 0x0>; 854 compatible = "pciclass,0604"; 855 device_type = "pci"; 856 ranges; 857 }; 858 }; 859 860 pciec0_ep: pcie-ep@e65d0000 { 861 compatible = "renesas,r8a779g0-pcie-ep", 862 "renesas,rcar-gen4-pcie-ep"; 863 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>, 864 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 865 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 866 <0 0xfe000000 0 0x400000>; 867 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 868 interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 871 interrupt-names = "dma", "sft_ce", "app"; 872 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 873 clock-names = "core", "ref"; 874 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 875 resets = <&cpg 624>; 876 reset-names = "pwr"; 877 max-link-speed = <4>; 878 num-lanes = <2>; 879 max-functions = /bits/ 8 <2>; 880 status = "disabled"; 881 }; 882 883 pciec1_ep: pcie-ep@e65d8000 { 884 compatible = "renesas,r8a779g0-pcie-ep", 885 "renesas,rcar-gen4-pcie-ep"; 886 reg = <0 0xe65d8000 0 0x2000>, <0 0xe65da000 0 0x1000>, 887 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 888 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 889 <0 0xee900000 0 0x400000>; 890 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 891 interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 894 interrupt-names = "dma", "sft_ce", "app"; 895 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 896 clock-names = "core", "ref"; 897 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 898 resets = <&cpg 625>; 899 reset-names = "pwr"; 900 max-link-speed = <4>; 901 num-lanes = <2>; 902 max-functions = /bits/ 8 <2>; 903 status = "disabled"; 904 }; 905 906 canfd: can@e6660000 { 907 compatible = "renesas,r8a779g0-canfd", 908 "renesas,rcar-gen4-canfd"; 909 reg = <0 0xe6660000 0 0x8500>; 910 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 912 interrupt-names = "ch_int", "g_int"; 913 clocks = <&cpg CPG_MOD 328>, 914 <&cpg CPG_CORE R8A779G0_CLK_CANFD>, 915 <&can_clk>; 916 clock-names = "fck", "canfd", "can_clk"; 917 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; 918 assigned-clock-rates = <80000000>; 919 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 920 resets = <&cpg 328>; 921 status = "disabled"; 922 923 channel0 { 924 status = "disabled"; 925 }; 926 927 channel1 { 928 status = "disabled"; 929 }; 930 931 channel2 { 932 status = "disabled"; 933 }; 934 935 channel3 { 936 status = "disabled"; 937 }; 938 939 channel4 { 940 status = "disabled"; 941 }; 942 943 channel5 { 944 status = "disabled"; 945 }; 946 947 channel6 { 948 status = "disabled"; 949 }; 950 951 channel7 { 952 status = "disabled"; 953 }; 954 }; 955 956 avb0: ethernet@e6800000 { 957 compatible = "renesas,etheravb-r8a779g0", 958 "renesas,etheravb-rcar-gen4"; 959 reg = <0 0xe6800000 0 0x1000>; 960 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 985 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 986 "ch5", "ch6", "ch7", "ch8", "ch9", 987 "ch10", "ch11", "ch12", "ch13", 988 "ch14", "ch15", "ch16", "ch17", 989 "ch18", "ch19", "ch20", "ch21", 990 "ch22", "ch23", "ch24"; 991 clocks = <&cpg CPG_MOD 211>; 992 clock-names = "fck"; 993 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 994 resets = <&cpg 211>; 995 phy-mode = "rgmii"; 996 rx-internal-delay-ps = <0>; 997 tx-internal-delay-ps = <0>; 998 iommus = <&ipmmu_hc 0>; 999 status = "disabled"; 1000 }; 1001 1002 avb1: ethernet@e6810000 { 1003 compatible = "renesas,etheravb-r8a779g0", 1004 "renesas,etheravb-rcar-gen4"; 1005 reg = <0 0xe6810000 0 0x1000>; 1006 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 1007 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 1008 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 1009 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 1010 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 1011 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 1012 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 1013 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 1014 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 1015 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 1016 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 1017 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 1018 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 1019 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 1020 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 1021 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 1022 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 1023 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 1024 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 1025 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 1031 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1032 "ch5", "ch6", "ch7", "ch8", "ch9", 1033 "ch10", "ch11", "ch12", "ch13", 1034 "ch14", "ch15", "ch16", "ch17", 1035 "ch18", "ch19", "ch20", "ch21", 1036 "ch22", "ch23", "ch24"; 1037 clocks = <&cpg CPG_MOD 212>; 1038 clock-names = "fck"; 1039 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1040 resets = <&cpg 212>; 1041 phy-mode = "rgmii"; 1042 rx-internal-delay-ps = <0>; 1043 tx-internal-delay-ps = <0>; 1044 iommus = <&ipmmu_hc 1>; 1045 status = "disabled"; 1046 }; 1047 1048 avb2: ethernet@e6820000 { 1049 compatible = "renesas,etheravb-r8a779g0", 1050 "renesas,etheravb-rcar-gen4"; 1051 reg = <0 0xe6820000 0 0x1000>; 1052 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 1053 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 1055 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 1056 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 1057 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 1058 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 1059 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 1060 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 1061 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 1062 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1063 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1064 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1065 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1066 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1067 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1068 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1069 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1070 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1071 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1072 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1073 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1074 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1075 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1076 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 1077 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1078 "ch5", "ch6", "ch7", "ch8", "ch9", 1079 "ch10", "ch11", "ch12", "ch13", 1080 "ch14", "ch15", "ch16", "ch17", 1081 "ch18", "ch19", "ch20", "ch21", 1082 "ch22", "ch23", "ch24"; 1083 clocks = <&cpg CPG_MOD 213>; 1084 clock-names = "fck"; 1085 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1086 resets = <&cpg 213>; 1087 phy-mode = "rgmii"; 1088 rx-internal-delay-ps = <0>; 1089 tx-internal-delay-ps = <0>; 1090 iommus = <&ipmmu_hc 2>; 1091 status = "disabled"; 1092 }; 1093 1094 pwm0: pwm@e6e30000 { 1095 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1096 reg = <0 0xe6e30000 0 0x10>; 1097 #pwm-cells = <2>; 1098 clocks = <&cpg CPG_MOD 628>; 1099 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1100 resets = <&cpg 628>; 1101 status = "disabled"; 1102 }; 1103 1104 pwm1: pwm@e6e31000 { 1105 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1106 reg = <0 0xe6e31000 0 0x10>; 1107 #pwm-cells = <2>; 1108 clocks = <&cpg CPG_MOD 628>; 1109 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1110 resets = <&cpg 628>; 1111 status = "disabled"; 1112 }; 1113 1114 pwm2: pwm@e6e32000 { 1115 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1116 reg = <0 0xe6e32000 0 0x10>; 1117 #pwm-cells = <2>; 1118 clocks = <&cpg CPG_MOD 628>; 1119 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1120 resets = <&cpg 628>; 1121 status = "disabled"; 1122 }; 1123 1124 pwm3: pwm@e6e33000 { 1125 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1126 reg = <0 0xe6e33000 0 0x10>; 1127 #pwm-cells = <2>; 1128 clocks = <&cpg CPG_MOD 628>; 1129 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1130 resets = <&cpg 628>; 1131 status = "disabled"; 1132 }; 1133 1134 pwm4: pwm@e6e34000 { 1135 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1136 reg = <0 0xe6e34000 0 0x10>; 1137 #pwm-cells = <2>; 1138 clocks = <&cpg CPG_MOD 628>; 1139 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1140 resets = <&cpg 628>; 1141 status = "disabled"; 1142 }; 1143 1144 pwm5: pwm@e6e35000 { 1145 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1146 reg = <0 0xe6e35000 0 0x10>; 1147 #pwm-cells = <2>; 1148 clocks = <&cpg CPG_MOD 628>; 1149 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1150 resets = <&cpg 628>; 1151 status = "disabled"; 1152 }; 1153 1154 pwm6: pwm@e6e36000 { 1155 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1156 reg = <0 0xe6e36000 0 0x10>; 1157 #pwm-cells = <2>; 1158 clocks = <&cpg CPG_MOD 628>; 1159 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1160 resets = <&cpg 628>; 1161 status = "disabled"; 1162 }; 1163 1164 pwm7: pwm@e6e37000 { 1165 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1166 reg = <0 0xe6e37000 0 0x10>; 1167 #pwm-cells = <2>; 1168 clocks = <&cpg CPG_MOD 628>; 1169 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1170 resets = <&cpg 628>; 1171 status = "disabled"; 1172 }; 1173 1174 pwm8: pwm@e6e38000 { 1175 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1176 reg = <0 0xe6e38000 0 0x10>; 1177 #pwm-cells = <2>; 1178 clocks = <&cpg CPG_MOD 628>; 1179 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1180 resets = <&cpg 628>; 1181 status = "disabled"; 1182 }; 1183 1184 pwm9: pwm@e6e39000 { 1185 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1186 reg = <0 0xe6e39000 0 0x10>; 1187 #pwm-cells = <2>; 1188 clocks = <&cpg CPG_MOD 628>; 1189 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1190 resets = <&cpg 628>; 1191 status = "disabled"; 1192 }; 1193 1194 scif0: serial@e6e60000 { 1195 compatible = "renesas,scif-r8a779g0", 1196 "renesas,rcar-gen4-scif", "renesas,scif"; 1197 reg = <0 0xe6e60000 0 64>; 1198 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 1199 clocks = <&cpg CPG_MOD 702>, 1200 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1201 <&scif_clk>; 1202 clock-names = "fck", "brg_int", "scif_clk"; 1203 dmas = <&dmac0 0x51>, <&dmac0 0x50>, 1204 <&dmac1 0x51>, <&dmac1 0x50>; 1205 dma-names = "tx", "rx", "tx", "rx"; 1206 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1207 resets = <&cpg 702>; 1208 status = "disabled"; 1209 }; 1210 1211 scif1: serial@e6e68000 { 1212 compatible = "renesas,scif-r8a779g0", 1213 "renesas,rcar-gen4-scif", "renesas,scif"; 1214 reg = <0 0xe6e68000 0 64>; 1215 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 1216 clocks = <&cpg CPG_MOD 703>, 1217 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1218 <&scif_clk>; 1219 clock-names = "fck", "brg_int", "scif_clk"; 1220 dmas = <&dmac0 0x53>, <&dmac0 0x52>, 1221 <&dmac1 0x53>, <&dmac1 0x52>; 1222 dma-names = "tx", "rx", "tx", "rx"; 1223 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1224 resets = <&cpg 703>; 1225 status = "disabled"; 1226 }; 1227 1228 scif3: serial@e6c50000 { 1229 compatible = "renesas,scif-r8a779g0", 1230 "renesas,rcar-gen4-scif", "renesas,scif"; 1231 reg = <0 0xe6c50000 0 64>; 1232 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 1233 clocks = <&cpg CPG_MOD 704>, 1234 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1235 <&scif_clk>; 1236 clock-names = "fck", "brg_int", "scif_clk"; 1237 dmas = <&dmac0 0x57>, <&dmac0 0x56>, 1238 <&dmac1 0x57>, <&dmac1 0x56>; 1239 dma-names = "tx", "rx", "tx", "rx"; 1240 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1241 resets = <&cpg 704>; 1242 status = "disabled"; 1243 }; 1244 1245 scif4: serial@e6c40000 { 1246 compatible = "renesas,scif-r8a779g0", 1247 "renesas,rcar-gen4-scif", "renesas,scif"; 1248 reg = <0 0xe6c40000 0 64>; 1249 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1250 clocks = <&cpg CPG_MOD 705>, 1251 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1252 <&scif_clk2>; 1253 clock-names = "fck", "brg_int", "scif_clk"; 1254 dmas = <&dmac0 0x59>, <&dmac0 0x58>, 1255 <&dmac1 0x59>, <&dmac1 0x58>; 1256 dma-names = "tx", "rx", "tx", "rx"; 1257 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1258 resets = <&cpg 705>; 1259 status = "disabled"; 1260 }; 1261 1262 tpu: pwm@e6e80000 { 1263 compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 1264 reg = <0 0xe6e80000 0 0x148>; 1265 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 1266 clocks = <&cpg CPG_MOD 718>; 1267 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1268 resets = <&cpg 718>; 1269 #pwm-cells = <3>; 1270 status = "disabled"; 1271 }; 1272 1273 msiof0: spi@e6e90000 { 1274 compatible = "renesas,msiof-r8a779g0", 1275 "renesas,rcar-gen4-msiof"; 1276 reg = <0 0xe6e90000 0 0x0064>; 1277 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1278 clocks = <&cpg CPG_MOD 618>; 1279 dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1280 <&dmac1 0x41>, <&dmac1 0x40>; 1281 dma-names = "tx", "rx", "tx", "rx"; 1282 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1283 resets = <&cpg 618>; 1284 #address-cells = <1>; 1285 #size-cells = <0>; 1286 status = "disabled"; 1287 }; 1288 1289 msiof1: spi@e6ea0000 { 1290 compatible = "renesas,msiof-r8a779g0", 1291 "renesas,rcar-gen4-msiof"; 1292 reg = <0 0xe6ea0000 0 0x0064>; 1293 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1294 clocks = <&cpg CPG_MOD 619>; 1295 dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1296 <&dmac1 0x43>, <&dmac1 0x42>; 1297 dma-names = "tx", "rx", "tx", "rx"; 1298 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1299 resets = <&cpg 619>; 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 status = "disabled"; 1303 }; 1304 1305 msiof2: spi@e6c00000 { 1306 compatible = "renesas,msiof-r8a779g0", 1307 "renesas,rcar-gen4-msiof"; 1308 reg = <0 0xe6c00000 0 0x0064>; 1309 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1310 clocks = <&cpg CPG_MOD 620>; 1311 dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1312 <&dmac1 0x45>, <&dmac1 0x44>; 1313 dma-names = "tx", "rx", "tx", "rx"; 1314 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1315 resets = <&cpg 620>; 1316 #address-cells = <1>; 1317 #size-cells = <0>; 1318 status = "disabled"; 1319 }; 1320 1321 msiof3: spi@e6c10000 { 1322 compatible = "renesas,msiof-r8a779g0", 1323 "renesas,rcar-gen4-msiof"; 1324 reg = <0 0xe6c10000 0 0x0064>; 1325 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1326 clocks = <&cpg CPG_MOD 621>; 1327 dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1328 <&dmac1 0x47>, <&dmac1 0x46>; 1329 dma-names = "tx", "rx", "tx", "rx"; 1330 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1331 resets = <&cpg 621>; 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 status = "disabled"; 1335 }; 1336 1337 msiof4: spi@e6c20000 { 1338 compatible = "renesas,msiof-r8a779g0", 1339 "renesas,rcar-gen4-msiof"; 1340 reg = <0 0xe6c20000 0 0x0064>; 1341 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1342 clocks = <&cpg CPG_MOD 622>; 1343 dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1344 <&dmac1 0x49>, <&dmac1 0x48>; 1345 dma-names = "tx", "rx", "tx", "rx"; 1346 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1347 resets = <&cpg 622>; 1348 #address-cells = <1>; 1349 #size-cells = <0>; 1350 status = "disabled"; 1351 }; 1352 1353 msiof5: spi@e6c28000 { 1354 compatible = "renesas,msiof-r8a779g0", 1355 "renesas,rcar-gen4-msiof"; 1356 reg = <0 0xe6c28000 0 0x0064>; 1357 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1358 clocks = <&cpg CPG_MOD 623>; 1359 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1360 <&dmac1 0x4b>, <&dmac1 0x4a>; 1361 dma-names = "tx", "rx", "tx", "rx"; 1362 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1363 resets = <&cpg 623>; 1364 #address-cells = <1>; 1365 #size-cells = <0>; 1366 status = "disabled"; 1367 }; 1368 1369 vin00: video@e6ef0000 { 1370 compatible = "renesas,vin-r8a779g0", 1371 "renesas,rcar-gen4-vin"; 1372 reg = <0 0xe6ef0000 0 0x1000>; 1373 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1374 clocks = <&cpg CPG_MOD 730>; 1375 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1376 resets = <&cpg 730>; 1377 renesas,id = <0>; 1378 status = "disabled"; 1379 1380 ports { 1381 #address-cells = <1>; 1382 #size-cells = <0>; 1383 1384 port@2 { 1385 #address-cells = <1>; 1386 #size-cells = <0>; 1387 1388 reg = <2>; 1389 1390 vin00isp0: endpoint@0 { 1391 reg = <0>; 1392 remote-endpoint = <&isp0vin00>; 1393 }; 1394 }; 1395 }; 1396 }; 1397 1398 vin01: video@e6ef1000 { 1399 compatible = "renesas,vin-r8a779g0", 1400 "renesas,rcar-gen4-vin"; 1401 reg = <0 0xe6ef1000 0 0x1000>; 1402 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1403 clocks = <&cpg CPG_MOD 731>; 1404 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1405 resets = <&cpg 731>; 1406 renesas,id = <1>; 1407 status = "disabled"; 1408 1409 ports { 1410 #address-cells = <1>; 1411 #size-cells = <0>; 1412 1413 port@2 { 1414 #address-cells = <1>; 1415 #size-cells = <0>; 1416 1417 reg = <2>; 1418 1419 vin01isp0: endpoint@0 { 1420 reg = <0>; 1421 remote-endpoint = <&isp0vin01>; 1422 }; 1423 }; 1424 }; 1425 }; 1426 1427 vin02: video@e6ef2000 { 1428 compatible = "renesas,vin-r8a779g0", 1429 "renesas,rcar-gen4-vin"; 1430 reg = <0 0xe6ef2000 0 0x1000>; 1431 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1432 clocks = <&cpg CPG_MOD 800>; 1433 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1434 resets = <&cpg 800>; 1435 renesas,id = <2>; 1436 status = "disabled"; 1437 1438 ports { 1439 #address-cells = <1>; 1440 #size-cells = <0>; 1441 1442 port@2 { 1443 #address-cells = <1>; 1444 #size-cells = <0>; 1445 1446 reg = <2>; 1447 1448 vin02isp0: endpoint@0 { 1449 reg = <0>; 1450 remote-endpoint = <&isp0vin02>; 1451 }; 1452 }; 1453 }; 1454 }; 1455 1456 vin03: video@e6ef3000 { 1457 compatible = "renesas,vin-r8a779g0", 1458 "renesas,rcar-gen4-vin"; 1459 reg = <0 0xe6ef3000 0 0x1000>; 1460 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1461 clocks = <&cpg CPG_MOD 801>; 1462 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1463 resets = <&cpg 801>; 1464 renesas,id = <3>; 1465 status = "disabled"; 1466 1467 ports { 1468 #address-cells = <1>; 1469 #size-cells = <0>; 1470 1471 port@2 { 1472 #address-cells = <1>; 1473 #size-cells = <0>; 1474 1475 reg = <2>; 1476 1477 vin03isp0: endpoint@0 { 1478 reg = <0>; 1479 remote-endpoint = <&isp0vin03>; 1480 }; 1481 }; 1482 }; 1483 }; 1484 1485 vin04: video@e6ef4000 { 1486 compatible = "renesas,vin-r8a779g0", 1487 "renesas,rcar-gen4-vin"; 1488 reg = <0 0xe6ef4000 0 0x1000>; 1489 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1490 clocks = <&cpg CPG_MOD 802>; 1491 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1492 resets = <&cpg 802>; 1493 renesas,id = <4>; 1494 status = "disabled"; 1495 1496 ports { 1497 #address-cells = <1>; 1498 #size-cells = <0>; 1499 1500 port@2 { 1501 #address-cells = <1>; 1502 #size-cells = <0>; 1503 1504 reg = <2>; 1505 1506 vin04isp0: endpoint@0 { 1507 reg = <0>; 1508 remote-endpoint = <&isp0vin04>; 1509 }; 1510 }; 1511 }; 1512 }; 1513 1514 vin05: video@e6ef5000 { 1515 compatible = "renesas,vin-r8a779g0", 1516 "renesas,rcar-gen4-vin"; 1517 reg = <0 0xe6ef5000 0 0x1000>; 1518 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1519 clocks = <&cpg CPG_MOD 803>; 1520 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1521 resets = <&cpg 803>; 1522 renesas,id = <5>; 1523 status = "disabled"; 1524 1525 ports { 1526 #address-cells = <1>; 1527 #size-cells = <0>; 1528 1529 port@2 { 1530 #address-cells = <1>; 1531 #size-cells = <0>; 1532 1533 reg = <2>; 1534 1535 vin05isp0: endpoint@0 { 1536 reg = <0>; 1537 remote-endpoint = <&isp0vin05>; 1538 }; 1539 }; 1540 }; 1541 }; 1542 1543 vin06: video@e6ef6000 { 1544 compatible = "renesas,vin-r8a779g0", 1545 "renesas,rcar-gen4-vin"; 1546 reg = <0 0xe6ef6000 0 0x1000>; 1547 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1548 clocks = <&cpg CPG_MOD 804>; 1549 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1550 resets = <&cpg 804>; 1551 renesas,id = <6>; 1552 status = "disabled"; 1553 1554 ports { 1555 #address-cells = <1>; 1556 #size-cells = <0>; 1557 1558 port@2 { 1559 #address-cells = <1>; 1560 #size-cells = <0>; 1561 1562 reg = <2>; 1563 1564 vin06isp0: endpoint@0 { 1565 reg = <0>; 1566 remote-endpoint = <&isp0vin06>; 1567 }; 1568 }; 1569 }; 1570 }; 1571 1572 vin07: video@e6ef7000 { 1573 compatible = "renesas,vin-r8a779g0", 1574 "renesas,rcar-gen4-vin"; 1575 reg = <0 0xe6ef7000 0 0x1000>; 1576 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1577 clocks = <&cpg CPG_MOD 805>; 1578 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1579 resets = <&cpg 805>; 1580 renesas,id = <7>; 1581 status = "disabled"; 1582 1583 ports { 1584 #address-cells = <1>; 1585 #size-cells = <0>; 1586 1587 port@2 { 1588 #address-cells = <1>; 1589 #size-cells = <0>; 1590 1591 reg = <2>; 1592 1593 vin07isp0: endpoint@0 { 1594 reg = <0>; 1595 remote-endpoint = <&isp0vin07>; 1596 }; 1597 }; 1598 }; 1599 }; 1600 1601 vin08: video@e6ef8000 { 1602 compatible = "renesas,vin-r8a779g0", 1603 "renesas,rcar-gen4-vin"; 1604 reg = <0 0xe6ef8000 0 0x1000>; 1605 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1606 clocks = <&cpg CPG_MOD 806>; 1607 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1608 resets = <&cpg 806>; 1609 renesas,id = <8>; 1610 status = "disabled"; 1611 1612 ports { 1613 #address-cells = <1>; 1614 #size-cells = <0>; 1615 1616 port@2 { 1617 #address-cells = <1>; 1618 #size-cells = <0>; 1619 1620 reg = <2>; 1621 1622 vin08isp1: endpoint@1 { 1623 reg = <1>; 1624 remote-endpoint = <&isp1vin08>; 1625 }; 1626 }; 1627 }; 1628 }; 1629 1630 vin09: video@e6ef9000 { 1631 compatible = "renesas,vin-r8a779g0", 1632 "renesas,rcar-gen4-vin"; 1633 reg = <0 0xe6ef9000 0 0x1000>; 1634 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1635 clocks = <&cpg CPG_MOD 807>; 1636 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1637 resets = <&cpg 807>; 1638 renesas,id = <9>; 1639 status = "disabled"; 1640 1641 ports { 1642 #address-cells = <1>; 1643 #size-cells = <0>; 1644 1645 port@2 { 1646 #address-cells = <1>; 1647 #size-cells = <0>; 1648 1649 reg = <2>; 1650 1651 vin09isp1: endpoint@1 { 1652 reg = <1>; 1653 remote-endpoint = <&isp1vin09>; 1654 }; 1655 }; 1656 }; 1657 }; 1658 1659 vin10: video@e6efa000 { 1660 compatible = "renesas,vin-r8a779g0", 1661 "renesas,rcar-gen4-vin"; 1662 reg = <0 0xe6efa000 0 0x1000>; 1663 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1664 clocks = <&cpg CPG_MOD 808>; 1665 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1666 resets = <&cpg 808>; 1667 renesas,id = <10>; 1668 status = "disabled"; 1669 1670 ports { 1671 #address-cells = <1>; 1672 #size-cells = <0>; 1673 1674 port@2 { 1675 #address-cells = <1>; 1676 #size-cells = <0>; 1677 1678 reg = <2>; 1679 1680 vin10isp1: endpoint@1 { 1681 reg = <1>; 1682 remote-endpoint = <&isp1vin10>; 1683 }; 1684 }; 1685 }; 1686 }; 1687 1688 vin11: video@e6efb000 { 1689 compatible = "renesas,vin-r8a779g0", 1690 "renesas,rcar-gen4-vin"; 1691 reg = <0 0xe6efb000 0 0x1000>; 1692 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1693 clocks = <&cpg CPG_MOD 809>; 1694 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1695 resets = <&cpg 809>; 1696 renesas,id = <11>; 1697 status = "disabled"; 1698 1699 ports { 1700 #address-cells = <1>; 1701 #size-cells = <0>; 1702 1703 port@2 { 1704 #address-cells = <1>; 1705 #size-cells = <0>; 1706 1707 reg = <2>; 1708 1709 vin11isp1: endpoint@1 { 1710 reg = <1>; 1711 remote-endpoint = <&isp1vin11>; 1712 }; 1713 }; 1714 }; 1715 }; 1716 1717 vin12: video@e6efc000 { 1718 compatible = "renesas,vin-r8a779g0", 1719 "renesas,rcar-gen4-vin"; 1720 reg = <0 0xe6efc000 0 0x1000>; 1721 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1722 clocks = <&cpg CPG_MOD 810>; 1723 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1724 resets = <&cpg 810>; 1725 renesas,id = <12>; 1726 status = "disabled"; 1727 1728 ports { 1729 #address-cells = <1>; 1730 #size-cells = <0>; 1731 1732 port@2 { 1733 #address-cells = <1>; 1734 #size-cells = <0>; 1735 1736 reg = <2>; 1737 1738 vin12isp1: endpoint@1 { 1739 reg = <1>; 1740 remote-endpoint = <&isp1vin12>; 1741 }; 1742 }; 1743 }; 1744 }; 1745 1746 vin13: video@e6efd000 { 1747 compatible = "renesas,vin-r8a779g0", 1748 "renesas,rcar-gen4-vin"; 1749 reg = <0 0xe6efd000 0 0x1000>; 1750 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1751 clocks = <&cpg CPG_MOD 811>; 1752 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1753 resets = <&cpg 811>; 1754 renesas,id = <13>; 1755 status = "disabled"; 1756 1757 ports { 1758 #address-cells = <1>; 1759 #size-cells = <0>; 1760 1761 port@2 { 1762 #address-cells = <1>; 1763 #size-cells = <0>; 1764 1765 reg = <2>; 1766 1767 vin13isp1: endpoint@1 { 1768 reg = <1>; 1769 remote-endpoint = <&isp1vin13>; 1770 }; 1771 }; 1772 }; 1773 }; 1774 1775 vin14: video@e6efe000 { 1776 compatible = "renesas,vin-r8a779g0", 1777 "renesas,rcar-gen4-vin"; 1778 reg = <0 0xe6efe000 0 0x1000>; 1779 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1780 clocks = <&cpg CPG_MOD 812>; 1781 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1782 resets = <&cpg 812>; 1783 renesas,id = <14>; 1784 status = "disabled"; 1785 1786 ports { 1787 #address-cells = <1>; 1788 #size-cells = <0>; 1789 1790 port@2 { 1791 #address-cells = <1>; 1792 #size-cells = <0>; 1793 1794 reg = <2>; 1795 1796 vin14isp1: endpoint@1 { 1797 reg = <1>; 1798 remote-endpoint = <&isp1vin14>; 1799 }; 1800 }; 1801 }; 1802 }; 1803 1804 vin15: video@e6eff000 { 1805 compatible = "renesas,vin-r8a779g0", 1806 "renesas,rcar-gen4-vin"; 1807 reg = <0 0xe6eff000 0 0x1000>; 1808 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1809 clocks = <&cpg CPG_MOD 813>; 1810 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1811 resets = <&cpg 813>; 1812 renesas,id = <15>; 1813 status = "disabled"; 1814 1815 ports { 1816 #address-cells = <1>; 1817 #size-cells = <0>; 1818 1819 port@2 { 1820 #address-cells = <1>; 1821 #size-cells = <0>; 1822 1823 reg = <2>; 1824 1825 vin15isp1: endpoint@1 { 1826 reg = <1>; 1827 remote-endpoint = <&isp1vin15>; 1828 }; 1829 }; 1830 }; 1831 }; 1832 1833 dmac0: dma-controller@e7350000 { 1834 compatible = "renesas,dmac-r8a779g0", 1835 "renesas,rcar-gen4-dmac"; 1836 reg = <0 0xe7350000 0 0x1000>, 1837 <0 0xe7300000 0 0x10000>; 1838 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1839 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1840 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1841 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1842 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1843 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1844 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1845 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1846 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1847 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1848 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1849 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1850 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1851 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1852 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1853 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1854 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1855 interrupt-names = "error", 1856 "ch0", "ch1", "ch2", "ch3", "ch4", 1857 "ch5", "ch6", "ch7", "ch8", "ch9", 1858 "ch10", "ch11", "ch12", "ch13", 1859 "ch14", "ch15"; 1860 clocks = <&cpg CPG_MOD 709>; 1861 clock-names = "fck"; 1862 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1863 resets = <&cpg 709>; 1864 #dma-cells = <1>; 1865 dma-channels = <16>; 1866 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1867 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1868 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1869 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1870 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1871 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1872 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1873 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1874 }; 1875 1876 dmac1: dma-controller@e7351000 { 1877 compatible = "renesas,dmac-r8a779g0", 1878 "renesas,rcar-gen4-dmac"; 1879 reg = <0 0xe7351000 0 0x1000>, 1880 <0 0xe7310000 0 0x10000>; 1881 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1882 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1883 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1884 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1885 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1886 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1887 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1888 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1889 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1890 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1891 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1892 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1893 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1894 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1895 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1896 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1897 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1898 interrupt-names = "error", 1899 "ch0", "ch1", "ch2", "ch3", "ch4", 1900 "ch5", "ch6", "ch7", "ch8", "ch9", 1901 "ch10", "ch11", "ch12", "ch13", 1902 "ch14", "ch15"; 1903 clocks = <&cpg CPG_MOD 710>; 1904 clock-names = "fck"; 1905 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1906 resets = <&cpg 710>; 1907 #dma-cells = <1>; 1908 dma-channels = <16>; 1909 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1910 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1911 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1912 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, 1913 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, 1914 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, 1915 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, 1916 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; 1917 }; 1918 1919 rcar_sound: sound@ec5a0000 { 1920 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; 1921 reg = <0 0xec5a0000 0 0x020>, 1922 <0 0xec540000 0 0x1000>, 1923 <0 0xec541000 0 0x050>, 1924 <0 0xec400000 0 0x40000>; 1925 reg-names = "adg", "ssiu", "ssi", "sdmc"; 1926 1927 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1928 clock-names = "ssiu.0", "ssi.0", "clkin"; 1929 /* #clock-cells is fixed */ 1930 #clock-cells = <0>; 1931 /* #sound-dai-cells is fixed */ 1932 #sound-dai-cells = <0>; 1933 1934 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1935 resets = <&cpg 2926>, <&cpg 2927>; 1936 reset-names = "ssiu.0", "ssi.0"; 1937 status = "disabled"; 1938 1939 rcar_sound,ssiu { 1940 ssiu00: ssiu-0 { 1941 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; 1942 dma-names = "tx", "rx"; 1943 }; 1944 ssiu01: ssiu-1 { 1945 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; 1946 dma-names = "tx", "rx"; 1947 }; 1948 ssiu02: ssiu-2 { 1949 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; 1950 dma-names = "tx", "rx"; 1951 }; 1952 ssiu03: ssiu-3 { 1953 dmas = <&dmac0 0x68>, <&dmac0 0x69>; 1954 dma-names = "tx", "rx"; 1955 }; 1956 ssiu04: ssiu-4 { 1957 dmas = <&dmac0 0x66>, <&dmac0 0x67>; 1958 dma-names = "tx", "rx"; 1959 }; 1960 ssiu05: ssiu-5 { 1961 dmas = <&dmac0 0x64>, <&dmac0 0x65>; 1962 dma-names = "tx", "rx"; 1963 }; 1964 ssiu06: ssiu-6 { 1965 dmas = <&dmac0 0x62>, <&dmac0 0x63>; 1966 dma-names = "tx", "rx"; 1967 }; 1968 ssiu07: ssiu-7 { 1969 dmas = <&dmac0 0x60>, <&dmac0 0x61>; 1970 dma-names = "tx", "rx"; 1971 }; 1972 }; 1973 1974 rcar_sound,ssi { 1975 ssi0: ssi-0 { 1976 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1977 }; 1978 }; 1979 }; 1980 1981 mmc0: mmc@ee140000 { 1982 compatible = "renesas,sdhi-r8a779g0", 1983 "renesas,rcar-gen4-sdhi"; 1984 reg = <0 0xee140000 0 0x2000>; 1985 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1986 clocks = <&cpg CPG_MOD 706>, 1987 <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1988 clock-names = "core", "clkh"; 1989 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1990 resets = <&cpg 706>; 1991 max-frequency = <200000000>; 1992 iommus = <&ipmmu_ds0 32>; 1993 status = "disabled"; 1994 }; 1995 1996 rpc: spi@ee200000 { 1997 compatible = "renesas,r8a779g0-rpc-if", 1998 "renesas,rcar-gen4-rpc-if"; 1999 reg = <0 0xee200000 0 0x200>, 2000 <0 0x08000000 0 0x04000000>, 2001 <0 0xee208000 0 0x100>; 2002 reg-names = "regs", "dirmap", "wbuf"; 2003 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 2004 clocks = <&cpg CPG_MOD 629>; 2005 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2006 resets = <&cpg 629>; 2007 #address-cells = <1>; 2008 #size-cells = <0>; 2009 status = "disabled"; 2010 }; 2011 2012 ipmmu_rt0: iommu@ee480000 { 2013 compatible = "renesas,ipmmu-r8a779g0", 2014 "renesas,rcar-gen4-ipmmu-vmsa"; 2015 reg = <0 0xee480000 0 0x20000>; 2016 renesas,ipmmu-main = <&ipmmu_mm>; 2017 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2018 #iommu-cells = <1>; 2019 }; 2020 2021 ipmmu_rt1: iommu@ee4c0000 { 2022 compatible = "renesas,ipmmu-r8a779g0", 2023 "renesas,rcar-gen4-ipmmu-vmsa"; 2024 reg = <0 0xee4c0000 0 0x20000>; 2025 renesas,ipmmu-main = <&ipmmu_mm>; 2026 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2027 #iommu-cells = <1>; 2028 }; 2029 2030 ipmmu_ds0: iommu@eed00000 { 2031 compatible = "renesas,ipmmu-r8a779g0", 2032 "renesas,rcar-gen4-ipmmu-vmsa"; 2033 reg = <0 0xeed00000 0 0x20000>; 2034 renesas,ipmmu-main = <&ipmmu_mm>; 2035 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2036 #iommu-cells = <1>; 2037 }; 2038 2039 ipmmu_hc: iommu@eed40000 { 2040 compatible = "renesas,ipmmu-r8a779g0", 2041 "renesas,rcar-gen4-ipmmu-vmsa"; 2042 reg = <0 0xeed40000 0 0x20000>; 2043 renesas,ipmmu-main = <&ipmmu_mm>; 2044 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2045 #iommu-cells = <1>; 2046 }; 2047 2048 ipmmu_ir: iommu@eed80000 { 2049 compatible = "renesas,ipmmu-r8a779g0", 2050 "renesas,rcar-gen4-ipmmu-vmsa"; 2051 reg = <0 0xeed80000 0 0x20000>; 2052 renesas,ipmmu-main = <&ipmmu_mm>; 2053 power-domains = <&sysc R8A779G0_PD_A3IR>; 2054 #iommu-cells = <1>; 2055 }; 2056 2057 ipmmu_vc: iommu@eedc0000 { 2058 compatible = "renesas,ipmmu-r8a779g0", 2059 "renesas,rcar-gen4-ipmmu-vmsa"; 2060 reg = <0 0xeedc0000 0 0x20000>; 2061 renesas,ipmmu-main = <&ipmmu_mm>; 2062 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2063 #iommu-cells = <1>; 2064 }; 2065 2066 ipmmu_3dg: iommu@eee00000 { 2067 compatible = "renesas,ipmmu-r8a779g0", 2068 "renesas,rcar-gen4-ipmmu-vmsa"; 2069 reg = <0 0xeee00000 0 0x20000>; 2070 renesas,ipmmu-main = <&ipmmu_mm>; 2071 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2072 #iommu-cells = <1>; 2073 }; 2074 2075 ipmmu_vi0: iommu@eee80000 { 2076 compatible = "renesas,ipmmu-r8a779g0", 2077 "renesas,rcar-gen4-ipmmu-vmsa"; 2078 reg = <0 0xeee80000 0 0x20000>; 2079 renesas,ipmmu-main = <&ipmmu_mm>; 2080 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2081 #iommu-cells = <1>; 2082 }; 2083 2084 ipmmu_vi1: iommu@eeec0000 { 2085 compatible = "renesas,ipmmu-r8a779g0", 2086 "renesas,rcar-gen4-ipmmu-vmsa"; 2087 reg = <0 0xeeec0000 0 0x20000>; 2088 renesas,ipmmu-main = <&ipmmu_mm>; 2089 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2090 #iommu-cells = <1>; 2091 }; 2092 2093 ipmmu_vip0: iommu@eef00000 { 2094 compatible = "renesas,ipmmu-r8a779g0", 2095 "renesas,rcar-gen4-ipmmu-vmsa"; 2096 reg = <0 0xeef00000 0 0x20000>; 2097 renesas,ipmmu-main = <&ipmmu_mm>; 2098 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2099 #iommu-cells = <1>; 2100 }; 2101 2102 ipmmu_vip1: iommu@eef40000 { 2103 compatible = "renesas,ipmmu-r8a779g0", 2104 "renesas,rcar-gen4-ipmmu-vmsa"; 2105 reg = <0 0xeef40000 0 0x20000>; 2106 renesas,ipmmu-main = <&ipmmu_mm>; 2107 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2108 #iommu-cells = <1>; 2109 }; 2110 2111 ipmmu_mm: iommu@eefc0000 { 2112 compatible = "renesas,ipmmu-r8a779g0", 2113 "renesas,rcar-gen4-ipmmu-vmsa"; 2114 reg = <0 0xeefc0000 0 0x20000>; 2115 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 2116 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 2117 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2118 #iommu-cells = <1>; 2119 }; 2120 2121 gic: interrupt-controller@f1000000 { 2122 compatible = "arm,gic-v3"; 2123 #interrupt-cells = <3>; 2124 #address-cells = <0>; 2125 interrupt-controller; 2126 reg = <0x0 0xf1000000 0 0x20000>, 2127 <0x0 0xf1060000 0 0x110000>; 2128 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2129 }; 2130 2131 csi40: csi2@fe500000 { 2132 compatible = "renesas,r8a779g0-csi2"; 2133 reg = <0 0xfe500000 0 0x40000>; 2134 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 2135 clocks = <&cpg CPG_MOD 331>; 2136 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2137 resets = <&cpg 331>; 2138 status = "disabled"; 2139 2140 ports { 2141 #address-cells = <1>; 2142 #size-cells = <0>; 2143 2144 port@0 { 2145 reg = <0>; 2146 }; 2147 2148 port@1 { 2149 reg = <1>; 2150 csi40isp0: endpoint { 2151 remote-endpoint = <&isp0csi40>; 2152 }; 2153 }; 2154 }; 2155 }; 2156 2157 csi41: csi2@fe540000 { 2158 compatible = "renesas,r8a779g0-csi2"; 2159 reg = <0 0xfe540000 0 0x40000>; 2160 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 2161 clocks = <&cpg CPG_MOD 400>; 2162 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2163 resets = <&cpg 400>; 2164 status = "disabled"; 2165 2166 ports { 2167 #address-cells = <1>; 2168 #size-cells = <0>; 2169 2170 port@0 { 2171 reg = <0>; 2172 }; 2173 2174 port@1 { 2175 reg = <1>; 2176 csi41isp1: endpoint { 2177 remote-endpoint = <&isp1csi41>; 2178 }; 2179 }; 2180 }; 2181 }; 2182 2183 fcpvd0: fcp@fea10000 { 2184 compatible = "renesas,fcpv"; 2185 reg = <0 0xfea10000 0 0x200>; 2186 clocks = <&cpg CPG_MOD 508>; 2187 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2188 resets = <&cpg 508>; 2189 iommus = <&ipmmu_vi1 6>; 2190 }; 2191 2192 fcpvd1: fcp@fea11000 { 2193 compatible = "renesas,fcpv"; 2194 reg = <0 0xfea11000 0 0x200>; 2195 clocks = <&cpg CPG_MOD 509>; 2196 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2197 resets = <&cpg 509>; 2198 iommus = <&ipmmu_vi1 7>; 2199 }; 2200 2201 fcpvx0: fcp@fedb0000 { 2202 compatible = "renesas,fcpv"; 2203 reg = <0 0xfedb0000 0 0x200>; 2204 clocks = <&cpg CPG_MOD 1100>; 2205 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2206 resets = <&cpg 1100>; 2207 iommus = <&ipmmu_vi1 24>; 2208 }; 2209 2210 fcpvx1: fcp@fedb8000 { 2211 compatible = "renesas,fcpv"; 2212 reg = <0 0xfedb8000 0 0x200>; 2213 clocks = <&cpg CPG_MOD 1101>; 2214 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2215 resets = <&cpg 1101>; 2216 iommus = <&ipmmu_vi1 25>; 2217 }; 2218 2219 vspd0: vsp@fea20000 { 2220 compatible = "renesas,vsp2"; 2221 reg = <0 0xfea20000 0 0x7000>; 2222 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 2223 clocks = <&cpg CPG_MOD 830>; 2224 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2225 resets = <&cpg 830>; 2226 2227 renesas,fcp = <&fcpvd0>; 2228 }; 2229 2230 vspd1: vsp@fea28000 { 2231 compatible = "renesas,vsp2"; 2232 reg = <0 0xfea28000 0 0x7000>; 2233 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 2234 clocks = <&cpg CPG_MOD 831>; 2235 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2236 resets = <&cpg 831>; 2237 2238 renesas,fcp = <&fcpvd1>; 2239 }; 2240 2241 vspx0: vsp@fedd0000 { 2242 compatible = "renesas,vsp2"; 2243 reg = <0 0xfedd0000 0 0x8000>; 2244 interrupts = <GIC_SPI 556 IRQ_TYPE_LEVEL_HIGH>; 2245 clocks = <&cpg CPG_MOD 1028>; 2246 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2247 resets = <&cpg 1028>; 2248 2249 renesas,fcp = <&fcpvx0>; 2250 }; 2251 2252 vspx1: vsp@fedd8000 { 2253 compatible = "renesas,vsp2"; 2254 reg = <0 0xfedd8000 0 0x8000>; 2255 interrupts = <GIC_SPI 557 IRQ_TYPE_LEVEL_HIGH>; 2256 clocks = <&cpg CPG_MOD 1029>; 2257 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2258 resets = <&cpg 1029>; 2259 2260 renesas,fcp = <&fcpvx1>; 2261 }; 2262 2263 du: display@feb00000 { 2264 compatible = "renesas,du-r8a779g0"; 2265 reg = <0 0xfeb00000 0 0x40000>; 2266 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 2267 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 2268 clocks = <&cpg CPG_MOD 411>; 2269 clock-names = "du.0"; 2270 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2271 resets = <&cpg 411>; 2272 reset-names = "du.0"; 2273 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2274 2275 status = "disabled"; 2276 2277 ports { 2278 #address-cells = <1>; 2279 #size-cells = <0>; 2280 2281 port@0 { 2282 reg = <0>; 2283 du_out_dsi0: endpoint { 2284 remote-endpoint = <&dsi0_in>; 2285 }; 2286 }; 2287 2288 port@1 { 2289 reg = <1>; 2290 du_out_dsi1: endpoint { 2291 remote-endpoint = <&dsi1_in>; 2292 }; 2293 }; 2294 }; 2295 }; 2296 2297 isp0: isp@fed00000 { 2298 compatible = "renesas,r8a779g0-isp", 2299 "renesas,rcar-gen4-isp"; 2300 reg = <0 0xfed00000 0 0x10000>, <0 0xfec00000 0 0x100000>; 2301 reg-names = "cs", "core"; 2302 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 2303 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; 2304 interrupt-names = "cs", "core"; 2305 clocks = <&cpg CPG_MOD 612>, <&cpg CPG_MOD 16>; 2306 clock-names = "cs", "core"; 2307 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2308 resets = <&cpg 612>, <&cpg 16>; 2309 reset-names = "cs", "core"; 2310 status = "disabled"; 2311 2312 renesas,vspx = <&vspx0>; 2313 2314 ports { 2315 #address-cells = <1>; 2316 #size-cells = <0>; 2317 2318 port@0 { 2319 #address-cells = <1>; 2320 #size-cells = <0>; 2321 2322 reg = <0>; 2323 2324 isp0csi40: endpoint@0 { 2325 reg = <0>; 2326 remote-endpoint = <&csi40isp0>; 2327 }; 2328 }; 2329 2330 port@1 { 2331 reg = <1>; 2332 isp0vin00: endpoint { 2333 remote-endpoint = <&vin00isp0>; 2334 }; 2335 }; 2336 2337 port@2 { 2338 reg = <2>; 2339 isp0vin01: endpoint { 2340 remote-endpoint = <&vin01isp0>; 2341 }; 2342 }; 2343 2344 port@3 { 2345 reg = <3>; 2346 isp0vin02: endpoint { 2347 remote-endpoint = <&vin02isp0>; 2348 }; 2349 }; 2350 2351 port@4 { 2352 reg = <4>; 2353 isp0vin03: endpoint { 2354 remote-endpoint = <&vin03isp0>; 2355 }; 2356 }; 2357 2358 port@5 { 2359 reg = <5>; 2360 isp0vin04: endpoint { 2361 remote-endpoint = <&vin04isp0>; 2362 }; 2363 }; 2364 2365 port@6 { 2366 reg = <6>; 2367 isp0vin05: endpoint { 2368 remote-endpoint = <&vin05isp0>; 2369 }; 2370 }; 2371 2372 port@7 { 2373 reg = <7>; 2374 isp0vin06: endpoint { 2375 remote-endpoint = <&vin06isp0>; 2376 }; 2377 }; 2378 2379 port@8 { 2380 reg = <8>; 2381 isp0vin07: endpoint { 2382 remote-endpoint = <&vin07isp0>; 2383 }; 2384 }; 2385 }; 2386 }; 2387 2388 isp1: isp@fed20000 { 2389 compatible = "renesas,r8a779g0-isp", 2390 "renesas,rcar-gen4-isp"; 2391 reg = <0 0xfed20000 0 0x10000>, <0 0xfee00000 0 0x100000>; 2392 reg-names = "cs", "core"; 2393 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 2394 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>; 2395 interrupt-names = "cs", "core"; 2396 clocks = <&cpg CPG_MOD 613>, <&cpg CPG_MOD 17>; 2397 clock-names = "cs", "core"; 2398 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2399 resets = <&cpg 613>, <&cpg 17>; 2400 reset-names = "cs", "core"; 2401 status = "disabled"; 2402 2403 renesas,vspx = <&vspx1>; 2404 2405 ports { 2406 #address-cells = <1>; 2407 #size-cells = <0>; 2408 2409 port@0 { 2410 #address-cells = <1>; 2411 #size-cells = <0>; 2412 2413 reg = <0>; 2414 2415 isp1csi41: endpoint@1 { 2416 reg = <1>; 2417 remote-endpoint = <&csi41isp1>; 2418 }; 2419 }; 2420 2421 port@1 { 2422 reg = <1>; 2423 isp1vin08: endpoint { 2424 remote-endpoint = <&vin08isp1>; 2425 }; 2426 }; 2427 2428 port@2 { 2429 reg = <2>; 2430 isp1vin09: endpoint { 2431 remote-endpoint = <&vin09isp1>; 2432 }; 2433 }; 2434 2435 port@3 { 2436 reg = <3>; 2437 isp1vin10: endpoint { 2438 remote-endpoint = <&vin10isp1>; 2439 }; 2440 }; 2441 2442 port@4 { 2443 reg = <4>; 2444 isp1vin11: endpoint { 2445 remote-endpoint = <&vin11isp1>; 2446 }; 2447 }; 2448 2449 port@5 { 2450 reg = <5>; 2451 isp1vin12: endpoint { 2452 remote-endpoint = <&vin12isp1>; 2453 }; 2454 }; 2455 2456 port@6 { 2457 reg = <6>; 2458 isp1vin13: endpoint { 2459 remote-endpoint = <&vin13isp1>; 2460 }; 2461 }; 2462 2463 port@7 { 2464 reg = <7>; 2465 isp1vin14: endpoint { 2466 remote-endpoint = <&vin14isp1>; 2467 }; 2468 }; 2469 2470 port@8 { 2471 reg = <8>; 2472 isp1vin15: endpoint { 2473 remote-endpoint = <&vin15isp1>; 2474 }; 2475 }; 2476 }; 2477 }; 2478 2479 dsi0: dsi-encoder@fed80000 { 2480 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2481 reg = <0 0xfed80000 0 0x10000>; 2482 clocks = <&cpg CPG_MOD 415>, 2483 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2484 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2485 clock-names = "fck", "dsi", "pll"; 2486 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2487 resets = <&cpg 415>; 2488 2489 status = "disabled"; 2490 2491 ports { 2492 #address-cells = <1>; 2493 #size-cells = <0>; 2494 2495 port@0 { 2496 reg = <0>; 2497 dsi0_in: endpoint { 2498 remote-endpoint = <&du_out_dsi0>; 2499 }; 2500 }; 2501 2502 port@1 { 2503 reg = <1>; 2504 }; 2505 }; 2506 }; 2507 2508 dsi1: dsi-encoder@fed90000 { 2509 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2510 reg = <0 0xfed90000 0 0x10000>; 2511 clocks = <&cpg CPG_MOD 416>, 2512 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2513 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2514 clock-names = "fck", "dsi", "pll"; 2515 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2516 resets = <&cpg 416>; 2517 2518 status = "disabled"; 2519 2520 ports { 2521 #address-cells = <1>; 2522 #size-cells = <0>; 2523 2524 port@0 { 2525 reg = <0>; 2526 dsi1_in: endpoint { 2527 remote-endpoint = <&du_out_dsi1>; 2528 }; 2529 }; 2530 2531 port@1 { 2532 reg = <1>; 2533 }; 2534 }; 2535 }; 2536 2537 prr: chipid@fff00044 { 2538 compatible = "renesas,prr"; 2539 reg = <0 0xfff00044 0 4>; 2540 bootph-all; 2541 }; 2542 }; 2543 2544 thermal-zones { 2545 sensor_thermal_cr52: sensor1-thermal { 2546 polling-delay-passive = <250>; 2547 polling-delay = <1000>; 2548 thermal-sensors = <&tsc 0>; 2549 2550 trips { 2551 sensor1_crit: sensor1-crit { 2552 temperature = <120000>; 2553 hysteresis = <1000>; 2554 type = "critical"; 2555 }; 2556 }; 2557 }; 2558 2559 sensor_thermal_cnn: sensor2-thermal { 2560 polling-delay-passive = <250>; 2561 polling-delay = <1000>; 2562 thermal-sensors = <&tsc 1>; 2563 2564 trips { 2565 sensor2_crit: sensor2-crit { 2566 temperature = <120000>; 2567 hysteresis = <1000>; 2568 type = "critical"; 2569 }; 2570 }; 2571 }; 2572 2573 sensor_thermal_ca76: sensor3-thermal { 2574 polling-delay-passive = <250>; 2575 polling-delay = <1000>; 2576 thermal-sensors = <&tsc 2>; 2577 2578 trips { 2579 sensor3_crit: sensor3-crit { 2580 temperature = <120000>; 2581 hysteresis = <1000>; 2582 type = "critical"; 2583 }; 2584 }; 2585 }; 2586 2587 sensor_thermal_ddr1: sensor4-thermal { 2588 polling-delay-passive = <250>; 2589 polling-delay = <1000>; 2590 thermal-sensors = <&tsc 3>; 2591 2592 trips { 2593 sensor4_crit: sensor4-crit { 2594 temperature = <120000>; 2595 hysteresis = <1000>; 2596 type = "critical"; 2597 }; 2598 }; 2599 }; 2600 }; 2601 2602 timer { 2603 compatible = "arm,armv8-timer"; 2604 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2605 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2606 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2607 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, 2608 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; 2609 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", 2610 "hyp-virt"; 2611 }; 2612}; 2613