1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * STMicroelectronics st_lsm6dsx sensor driver
4 *
5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
7 * interface standard output.
8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
10 * +-125/+-245/+-500/+-1000/+-2000 dps
11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
12 * allowing dynamic batching of sensor data.
13 * LSM9DSx series is similar but includes an additional magnetometer, handled
14 * by a different driver.
15 *
16 * Supported sensors:
17 *
18 * - LSM6DS3
19 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
20 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
21 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
22 * - FIFO size: 8KB
23 *
24 * - ISM330DLC
25 * - LSM6DS3H
26 * - LSM6DS3TR-C
27 * - LSM6DSL
28 * - LSM6DSM
29 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
30 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
31 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
32 * - FIFO size: 4KB
33 *
34 * - ASM330LHH
35 * - ASM330LHHX
36 * - ASM330LHHXG1
37 * - ISM330DHCX
38 * - ISM330IS
39 * - LSM6DSO
40 * - LSM6DSO16IS
41 * - LSM6DSOP
42 * - LSM6DSOX
43 * - LSM6DSR
44 * - LSM6DST
45 * - LSM6DSTX
46 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
47 * 833
48 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
49 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
50 * - FIFO size: 3KB
51 *
52 * - LSM6DSV
53 * - LSM6DSV16X
54 * - Accelerometer/Gyroscope supported ODR [Hz]: 7.5, 15, 30, 60, 120, 240,
55 * 480, 960
56 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
57 * - Gyroscope supported full-scale [dps]: +-125/+-250/+-500/+-1000/+-2000
58 * - FIFO size: 3KB
59 *
60 * - LSM6DS0
61 * - LSM9DS1
62 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
63 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
64 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
65 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
66 * - FIFO size: 32
67 *
68 * Copyright 2016 STMicroelectronics Inc.
69 *
70 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
71 * Denis Ciocca <denis.ciocca@st.com>
72 */
73
74 #include <linux/kernel.h>
75 #include <linux/module.h>
76 #include <linux/acpi.h>
77 #include <linux/delay.h>
78 #include <linux/iio/events.h>
79 #include <linux/iio/iio.h>
80 #include <linux/iio/sysfs.h>
81 #include <linux/iio/triggered_buffer.h>
82 #include <linux/iio/trigger_consumer.h>
83 #include <linux/interrupt.h>
84 #include <linux/irq.h>
85 #include <linux/minmax.h>
86 #include <linux/pm.h>
87 #include <linux/property.h>
88 #include <linux/regmap.h>
89 #include <linux/bitfield.h>
90
91 #include <linux/platform_data/st_sensors_pdata.h>
92
93 #include "st_lsm6dsx.h"
94
95 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
96
97 static const struct iio_event_spec st_lsm6dsx_ev_motion[] = {
98 {
99 .type = IIO_EV_TYPE_THRESH,
100 .dir = IIO_EV_DIR_EITHER,
101 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
102 BIT(IIO_EV_INFO_ENABLE),
103 },
104 };
105
106 static const struct iio_event_spec st_lsm6dsx_ev_motion_tap[] = {
107 {
108 .type = IIO_EV_TYPE_THRESH,
109 .dir = IIO_EV_DIR_EITHER,
110 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
111 BIT(IIO_EV_INFO_ENABLE),
112 },
113 {
114 .type = IIO_EV_TYPE_GESTURE,
115 .dir = IIO_EV_DIR_SINGLETAP,
116 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
117 BIT(IIO_EV_INFO_ENABLE),
118 },
119 };
120
121 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
122 ST_LSM6DSX_CHANNEL_ACC(0x28, IIO_MOD_X, 0, st_lsm6dsx_ev_motion),
123 ST_LSM6DSX_CHANNEL_ACC(0x2a, IIO_MOD_Y, 1, st_lsm6dsx_ev_motion),
124 ST_LSM6DSX_CHANNEL_ACC(0x2c, IIO_MOD_Z, 2, st_lsm6dsx_ev_motion),
125 IIO_CHAN_SOFT_TIMESTAMP(3),
126 };
127
128 static const struct iio_chan_spec st_lsm6dsx_acc_tap_channels[] = {
129 ST_LSM6DSX_CHANNEL_ACC(0x28, IIO_MOD_X, 0, st_lsm6dsx_ev_motion_tap),
130 ST_LSM6DSX_CHANNEL_ACC(0x2a, IIO_MOD_Y, 1, st_lsm6dsx_ev_motion_tap),
131 ST_LSM6DSX_CHANNEL_ACC(0x2c, IIO_MOD_Z, 2, st_lsm6dsx_ev_motion_tap),
132 IIO_CHAN_SOFT_TIMESTAMP(3),
133 };
134
135 static const struct iio_chan_spec st_lsm6ds0_acc_channels[] = {
136 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
137 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
138 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
139 IIO_CHAN_SOFT_TIMESTAMP(3),
140 };
141
142 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
143 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
144 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
145 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
146 IIO_CHAN_SOFT_TIMESTAMP(3),
147 };
148
149 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
150 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
151 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
152 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
153 IIO_CHAN_SOFT_TIMESTAMP(3),
154 };
155
156 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
157 {
158 .reset = {
159 .addr = 0x22,
160 .mask = BIT(0),
161 },
162 .boot = {
163 .addr = 0x22,
164 .mask = BIT(7),
165 },
166 .bdu = {
167 .addr = 0x22,
168 .mask = BIT(6),
169 },
170 .id = {
171 {
172 .hw_id = ST_LSM9DS1_ID,
173 .name = ST_LSM9DS1_DEV_NAME,
174 .wai = 0x68,
175 }, {
176 .hw_id = ST_LSM6DS0_ID,
177 .name = ST_LSM6DS0_DEV_NAME,
178 .wai = 0x68,
179 },
180 },
181 .channels = {
182 [ST_LSM6DSX_ID_ACC] = {
183 .chan = st_lsm6ds0_acc_channels,
184 .len = ARRAY_SIZE(st_lsm6ds0_acc_channels),
185 },
186 [ST_LSM6DSX_ID_GYRO] = {
187 .chan = st_lsm6ds0_gyro_channels,
188 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
189 },
190 },
191 .odr_table = {
192 [ST_LSM6DSX_ID_ACC] = {
193 .reg = {
194 .addr = 0x20,
195 .mask = GENMASK(7, 5),
196 },
197 .odr_avl[0] = { 10000, 0x01 },
198 .odr_avl[1] = { 50000, 0x02 },
199 .odr_avl[2] = { 119000, 0x03 },
200 .odr_avl[3] = { 238000, 0x04 },
201 .odr_avl[4] = { 476000, 0x05 },
202 .odr_avl[5] = { 952000, 0x06 },
203 .odr_len = 6,
204 },
205 [ST_LSM6DSX_ID_GYRO] = {
206 .reg = {
207 .addr = 0x10,
208 .mask = GENMASK(7, 5),
209 },
210 .odr_avl[0] = { 14900, 0x01 },
211 .odr_avl[1] = { 59500, 0x02 },
212 .odr_avl[2] = { 119000, 0x03 },
213 .odr_avl[3] = { 238000, 0x04 },
214 .odr_avl[4] = { 476000, 0x05 },
215 .odr_avl[5] = { 952000, 0x06 },
216 .odr_len = 6,
217 },
218 },
219 .fs_table = {
220 [ST_LSM6DSX_ID_ACC] = {
221 .reg = {
222 .addr = 0x20,
223 .mask = GENMASK(4, 3),
224 },
225 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
226 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
227 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
228 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
229 .fs_len = 4,
230 },
231 [ST_LSM6DSX_ID_GYRO] = {
232 .reg = {
233 .addr = 0x10,
234 .mask = GENMASK(4, 3),
235 },
236
237 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
238 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
239 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
240 .fs_len = 3,
241 },
242 },
243 .irq_config = {
244 .irq1 = {
245 .addr = 0x0c,
246 .mask = BIT(3),
247 },
248 .irq2 = {
249 .addr = 0x0d,
250 .mask = BIT(3),
251 },
252 .hla = {
253 .addr = 0x22,
254 .mask = BIT(5),
255 },
256 .od = {
257 .addr = 0x22,
258 .mask = BIT(4),
259 },
260 },
261 .fifo_ops = {
262 .max_size = 32,
263 },
264 },
265 {
266 .reset = {
267 .addr = 0x12,
268 .mask = BIT(0),
269 },
270 .boot = {
271 .addr = 0x12,
272 .mask = BIT(7),
273 },
274 .bdu = {
275 .addr = 0x12,
276 .mask = BIT(6),
277 },
278 .id = {
279 {
280 .hw_id = ST_LSM6DS3_ID,
281 .name = ST_LSM6DS3_DEV_NAME,
282 .wai = 0x69,
283 },
284 },
285 .channels = {
286 [ST_LSM6DSX_ID_ACC] = {
287 .chan = st_lsm6dsx_acc_channels,
288 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
289 },
290 [ST_LSM6DSX_ID_GYRO] = {
291 .chan = st_lsm6dsx_gyro_channels,
292 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
293 },
294 },
295 .odr_table = {
296 [ST_LSM6DSX_ID_ACC] = {
297 .reg = {
298 .addr = 0x10,
299 .mask = GENMASK(7, 4),
300 },
301 .odr_avl[0] = { 12500, 0x01 },
302 .odr_avl[1] = { 26000, 0x02 },
303 .odr_avl[2] = { 52000, 0x03 },
304 .odr_avl[3] = { 104000, 0x04 },
305 .odr_avl[4] = { 208000, 0x05 },
306 .odr_avl[5] = { 416000, 0x06 },
307 .odr_len = 6,
308 },
309 [ST_LSM6DSX_ID_GYRO] = {
310 .reg = {
311 .addr = 0x11,
312 .mask = GENMASK(7, 4),
313 },
314 .odr_avl[0] = { 12500, 0x01 },
315 .odr_avl[1] = { 26000, 0x02 },
316 .odr_avl[2] = { 52000, 0x03 },
317 .odr_avl[3] = { 104000, 0x04 },
318 .odr_avl[4] = { 208000, 0x05 },
319 .odr_avl[5] = { 416000, 0x06 },
320 .odr_len = 6,
321 },
322 },
323 .fs_table = {
324 [ST_LSM6DSX_ID_ACC] = {
325 .reg = {
326 .addr = 0x10,
327 .mask = GENMASK(3, 2),
328 },
329 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
330 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
331 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
332 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
333 .fs_len = 4,
334 },
335 [ST_LSM6DSX_ID_GYRO] = {
336 .reg = {
337 .addr = 0x11,
338 .mask = GENMASK(3, 2),
339 },
340 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
341 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
342 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
343 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
344 .fs_len = 4,
345 },
346 },
347 .irq_config = {
348 .irq1 = {
349 .addr = 0x0d,
350 .mask = BIT(3),
351 },
352 .irq2 = {
353 .addr = 0x0e,
354 .mask = BIT(3),
355 },
356 .lir = {
357 .addr = 0x58,
358 .mask = BIT(0),
359 },
360 .irq1_func = 0x5e,
361 .irq2_func = 0x5f,
362 .hla = {
363 .addr = 0x12,
364 .mask = BIT(5),
365 },
366 .od = {
367 .addr = 0x12,
368 .mask = BIT(4),
369 },
370 },
371 .decimator = {
372 [ST_LSM6DSX_ID_ACC] = {
373 .addr = 0x08,
374 .mask = GENMASK(2, 0),
375 },
376 [ST_LSM6DSX_ID_GYRO] = {
377 .addr = 0x08,
378 .mask = GENMASK(5, 3),
379 },
380 },
381 .fifo_ops = {
382 .update_fifo = st_lsm6dsx_update_fifo,
383 .read_fifo = st_lsm6dsx_read_fifo,
384 .fifo_th = {
385 .addr = 0x06,
386 .mask = GENMASK(11, 0),
387 },
388 .fifo_diff = {
389 .addr = 0x3a,
390 .mask = GENMASK(11, 0),
391 },
392 .max_size = 1365,
393 .th_wl = 3, /* 1LSB = 2B */
394 },
395 .ts_settings = {
396 .timer_en = {
397 .addr = 0x58,
398 .mask = BIT(7),
399 },
400 .hr_timer = {
401 .addr = 0x5c,
402 .mask = BIT(4),
403 },
404 .fifo_en = {
405 .addr = 0x07,
406 .mask = BIT(7),
407 },
408 .decimator = {
409 .addr = 0x09,
410 .mask = GENMASK(5, 3),
411 },
412 },
413 .event_settings = {
414 .sources = {
415 [ST_LSM6DSX_EVENT_WAKEUP] = {
416 .value = {
417 .addr = 0x5b,
418 .mask = GENMASK(5, 0),
419 },
420 .enable_mask = BIT(5),
421 .status = {
422 .addr = 0x1b,
423 .mask = BIT(3),
424 },
425 .status_z_mask = BIT(0),
426 .status_y_mask = BIT(1),
427 .status_x_mask = BIT(2),
428 },
429 },
430 },
431 },
432 {
433 .reset = {
434 .addr = 0x12,
435 .mask = BIT(0),
436 },
437 .boot = {
438 .addr = 0x12,
439 .mask = BIT(7),
440 },
441 .bdu = {
442 .addr = 0x12,
443 .mask = BIT(6),
444 },
445 .id = {
446 {
447 .hw_id = ST_LSM6DS3H_ID,
448 .name = ST_LSM6DS3H_DEV_NAME,
449 .wai = 0x69,
450 },
451 },
452 .channels = {
453 [ST_LSM6DSX_ID_ACC] = {
454 .chan = st_lsm6dsx_acc_channels,
455 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
456 },
457 [ST_LSM6DSX_ID_GYRO] = {
458 .chan = st_lsm6dsx_gyro_channels,
459 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
460 },
461 },
462 .odr_table = {
463 [ST_LSM6DSX_ID_ACC] = {
464 .reg = {
465 .addr = 0x10,
466 .mask = GENMASK(7, 4),
467 },
468 .odr_avl[0] = { 12500, 0x01 },
469 .odr_avl[1] = { 26000, 0x02 },
470 .odr_avl[2] = { 52000, 0x03 },
471 .odr_avl[3] = { 104000, 0x04 },
472 .odr_avl[4] = { 208000, 0x05 },
473 .odr_avl[5] = { 416000, 0x06 },
474 .odr_len = 6,
475 },
476 [ST_LSM6DSX_ID_GYRO] = {
477 .reg = {
478 .addr = 0x11,
479 .mask = GENMASK(7, 4),
480 },
481 .odr_avl[0] = { 12500, 0x01 },
482 .odr_avl[1] = { 26000, 0x02 },
483 .odr_avl[2] = { 52000, 0x03 },
484 .odr_avl[3] = { 104000, 0x04 },
485 .odr_avl[4] = { 208000, 0x05 },
486 .odr_avl[5] = { 416000, 0x06 },
487 .odr_len = 6,
488 },
489 },
490 .fs_table = {
491 [ST_LSM6DSX_ID_ACC] = {
492 .reg = {
493 .addr = 0x10,
494 .mask = GENMASK(3, 2),
495 },
496 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
497 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
498 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
499 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
500 .fs_len = 4,
501 },
502 [ST_LSM6DSX_ID_GYRO] = {
503 .reg = {
504 .addr = 0x11,
505 .mask = GENMASK(3, 2),
506 },
507 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
508 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
509 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
510 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
511 .fs_len = 4,
512 },
513 },
514 .irq_config = {
515 .irq1 = {
516 .addr = 0x0d,
517 .mask = BIT(3),
518 },
519 .irq2 = {
520 .addr = 0x0e,
521 .mask = BIT(3),
522 },
523 .lir = {
524 .addr = 0x58,
525 .mask = BIT(0),
526 },
527 .irq1_func = 0x5e,
528 .irq2_func = 0x5f,
529 .hla = {
530 .addr = 0x12,
531 .mask = BIT(5),
532 },
533 .od = {
534 .addr = 0x12,
535 .mask = BIT(4),
536 },
537 },
538 .decimator = {
539 [ST_LSM6DSX_ID_ACC] = {
540 .addr = 0x08,
541 .mask = GENMASK(2, 0),
542 },
543 [ST_LSM6DSX_ID_GYRO] = {
544 .addr = 0x08,
545 .mask = GENMASK(5, 3),
546 },
547 },
548 .fifo_ops = {
549 .update_fifo = st_lsm6dsx_update_fifo,
550 .read_fifo = st_lsm6dsx_read_fifo,
551 .fifo_th = {
552 .addr = 0x06,
553 .mask = GENMASK(11, 0),
554 },
555 .fifo_diff = {
556 .addr = 0x3a,
557 .mask = GENMASK(11, 0),
558 },
559 .max_size = 682,
560 .th_wl = 3, /* 1LSB = 2B */
561 },
562 .ts_settings = {
563 .timer_en = {
564 .addr = 0x58,
565 .mask = BIT(7),
566 },
567 .hr_timer = {
568 .addr = 0x5c,
569 .mask = BIT(4),
570 },
571 .fifo_en = {
572 .addr = 0x07,
573 .mask = BIT(7),
574 },
575 .decimator = {
576 .addr = 0x09,
577 .mask = GENMASK(5, 3),
578 },
579 },
580 .event_settings = {
581 .sources = {
582 [ST_LSM6DSX_EVENT_WAKEUP] = {
583 .value = {
584 .addr = 0x5b,
585 .mask = GENMASK(5, 0),
586 },
587 .enable_mask = BIT(5),
588 .status = {
589 .addr = 0x1b,
590 .mask = BIT(3),
591 },
592 .status_z_mask = BIT(0),
593 .status_y_mask = BIT(1),
594 .status_x_mask = BIT(2),
595 },
596 },
597 },
598 },
599 {
600 .reset = {
601 .addr = 0x12,
602 .mask = BIT(0),
603 },
604 .boot = {
605 .addr = 0x12,
606 .mask = BIT(7),
607 },
608 .bdu = {
609 .addr = 0x12,
610 .mask = BIT(6),
611 },
612 .id = {
613 {
614 .hw_id = ST_LSM6DSL_ID,
615 .name = ST_LSM6DSL_DEV_NAME,
616 .wai = 0x6a,
617 }, {
618 .hw_id = ST_LSM6DSM_ID,
619 .name = ST_LSM6DSM_DEV_NAME,
620 .wai = 0x6a,
621 }, {
622 .hw_id = ST_ISM330DLC_ID,
623 .name = ST_ISM330DLC_DEV_NAME,
624 .wai = 0x6a,
625 }, {
626 .hw_id = ST_LSM6DS3TRC_ID,
627 .name = ST_LSM6DS3TRC_DEV_NAME,
628 .wai = 0x6a,
629 },
630 },
631 .channels = {
632 [ST_LSM6DSX_ID_ACC] = {
633 .chan = st_lsm6dsx_acc_channels,
634 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
635 },
636 [ST_LSM6DSX_ID_GYRO] = {
637 .chan = st_lsm6dsx_gyro_channels,
638 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
639 },
640 },
641 .odr_table = {
642 [ST_LSM6DSX_ID_ACC] = {
643 .reg = {
644 .addr = 0x10,
645 .mask = GENMASK(7, 4),
646 },
647 .odr_avl[0] = { 12500, 0x01 },
648 .odr_avl[1] = { 26000, 0x02 },
649 .odr_avl[2] = { 52000, 0x03 },
650 .odr_avl[3] = { 104000, 0x04 },
651 .odr_avl[4] = { 208000, 0x05 },
652 .odr_avl[5] = { 416000, 0x06 },
653 .odr_len = 6,
654 },
655 [ST_LSM6DSX_ID_GYRO] = {
656 .reg = {
657 .addr = 0x11,
658 .mask = GENMASK(7, 4),
659 },
660 .odr_avl[0] = { 12500, 0x01 },
661 .odr_avl[1] = { 26000, 0x02 },
662 .odr_avl[2] = { 52000, 0x03 },
663 .odr_avl[3] = { 104000, 0x04 },
664 .odr_avl[4] = { 208000, 0x05 },
665 .odr_avl[5] = { 416000, 0x06 },
666 .odr_len = 6,
667 },
668 },
669 .fs_table = {
670 [ST_LSM6DSX_ID_ACC] = {
671 .reg = {
672 .addr = 0x10,
673 .mask = GENMASK(3, 2),
674 },
675 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
676 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
677 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
678 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
679 .fs_len = 4,
680 },
681 [ST_LSM6DSX_ID_GYRO] = {
682 .reg = {
683 .addr = 0x11,
684 .mask = GENMASK(3, 2),
685 },
686 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
687 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
688 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
689 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
690 .fs_len = 4,
691 },
692 },
693 .samples_to_discard = {
694 [ST_LSM6DSX_ID_ACC] = {
695 .val[0] = { 12500, 1 },
696 .val[1] = { 26000, 1 },
697 .val[2] = { 52000, 1 },
698 .val[3] = { 104000, 2 },
699 .val[4] = { 208000, 2 },
700 .val[5] = { 416000, 2 },
701 },
702 [ST_LSM6DSX_ID_GYRO] = {
703 .val[0] = { 12500, 2 },
704 .val[1] = { 26000, 5 },
705 .val[2] = { 52000, 7 },
706 .val[3] = { 104000, 12 },
707 .val[4] = { 208000, 20 },
708 .val[5] = { 416000, 36 },
709 },
710 },
711 .irq_config = {
712 .irq1 = {
713 .addr = 0x0d,
714 .mask = BIT(3),
715 },
716 .irq2 = {
717 .addr = 0x0e,
718 .mask = BIT(3),
719 },
720 .lir = {
721 .addr = 0x58,
722 .mask = BIT(0),
723 },
724 .irq1_func = 0x5e,
725 .irq2_func = 0x5f,
726 .hla = {
727 .addr = 0x12,
728 .mask = BIT(5),
729 },
730 .od = {
731 .addr = 0x12,
732 .mask = BIT(4),
733 },
734 },
735 .decimator = {
736 [ST_LSM6DSX_ID_ACC] = {
737 .addr = 0x08,
738 .mask = GENMASK(2, 0),
739 },
740 [ST_LSM6DSX_ID_GYRO] = {
741 .addr = 0x08,
742 .mask = GENMASK(5, 3),
743 },
744 [ST_LSM6DSX_ID_EXT0] = {
745 .addr = 0x09,
746 .mask = GENMASK(2, 0),
747 },
748 },
749 .fifo_ops = {
750 .update_fifo = st_lsm6dsx_update_fifo,
751 .read_fifo = st_lsm6dsx_read_fifo,
752 .fifo_th = {
753 .addr = 0x06,
754 .mask = GENMASK(10, 0),
755 },
756 .fifo_diff = {
757 .addr = 0x3a,
758 .mask = GENMASK(10, 0),
759 },
760 .max_size = 682,
761 .th_wl = 3, /* 1LSB = 2B */
762 },
763 .ts_settings = {
764 .timer_en = {
765 .addr = 0x19,
766 .mask = BIT(5),
767 },
768 .hr_timer = {
769 .addr = 0x5c,
770 .mask = BIT(4),
771 },
772 .fifo_en = {
773 .addr = 0x07,
774 .mask = BIT(7),
775 },
776 .decimator = {
777 .addr = 0x09,
778 .mask = GENMASK(5, 3),
779 },
780 },
781 .shub_settings = {
782 .page_mux = {
783 .addr = 0x01,
784 .mask = BIT(7),
785 },
786 .master_en = {
787 .addr = 0x1a,
788 .mask = BIT(0),
789 },
790 .pullup_en = {
791 .addr = 0x1a,
792 .mask = BIT(3),
793 },
794 .aux_sens = {
795 .addr = 0x04,
796 .mask = GENMASK(5, 4),
797 },
798 .wr_once = {
799 .addr = 0x07,
800 .mask = BIT(5),
801 },
802 .emb_func = {
803 .addr = 0x19,
804 .mask = BIT(2),
805 },
806 .num_ext_dev = 1,
807 .shub_out = {
808 .addr = 0x2e,
809 },
810 .slv0_addr = 0x02,
811 .dw_slv0_addr = 0x0e,
812 .pause = 0x7,
813 },
814 .event_settings = {
815 .enable_reg = {
816 .addr = 0x58,
817 .mask = BIT(7),
818 },
819 .sources = {
820 [ST_LSM6DSX_EVENT_WAKEUP] = {
821 .value = {
822 .addr = 0x5b,
823 .mask = GENMASK(5, 0),
824 },
825 .enable_mask = BIT(5),
826 .status = {
827 .addr = 0x1b,
828 .mask = BIT(3),
829 },
830 .status_z_mask = BIT(0),
831 .status_y_mask = BIT(1),
832 .status_x_mask = BIT(2),
833 },
834 },
835 },
836 },
837 {
838 .reset = {
839 .addr = 0x12,
840 .mask = BIT(0),
841 },
842 .boot = {
843 .addr = 0x12,
844 .mask = BIT(7),
845 },
846 .bdu = {
847 .addr = 0x12,
848 .mask = BIT(6),
849 },
850 .id = {
851 {
852 .hw_id = ST_LSM6DSR_ID,
853 .name = ST_LSM6DSR_DEV_NAME,
854 .wai = 0x6b,
855 }, {
856 .hw_id = ST_ISM330DHCX_ID,
857 .name = ST_ISM330DHCX_DEV_NAME,
858 .wai = 0x6b,
859 }, {
860 .hw_id = ST_LSM6DSRX_ID,
861 .name = ST_LSM6DSRX_DEV_NAME,
862 .wai = 0x6b,
863 }, {
864 .hw_id = ST_LSM6DSO_ID,
865 .name = ST_LSM6DSO_DEV_NAME,
866 .wai = 0x6c,
867 }, {
868 .hw_id = ST_LSM6DSOX_ID,
869 .name = ST_LSM6DSOX_DEV_NAME,
870 .wai = 0x6c,
871 }, {
872 .hw_id = ST_LSM6DST_ID,
873 .name = ST_LSM6DST_DEV_NAME,
874 .wai = 0x6d,
875 }, {
876 .hw_id = ST_ASM330LHHX_ID,
877 .name = ST_ASM330LHHX_DEV_NAME,
878 .wai = 0x6b,
879 }, {
880 .hw_id = ST_ASM330LHHXG1_ID,
881 .name = ST_ASM330LHHXG1_DEV_NAME,
882 .wai = 0x6b,
883 }, {
884 .hw_id = ST_LSM6DSTX_ID,
885 .name = ST_LSM6DSTX_DEV_NAME,
886 .wai = 0x6d,
887 },
888 },
889 .channels = {
890 [ST_LSM6DSX_ID_ACC] = {
891 .chan = st_lsm6dsx_acc_channels,
892 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
893 },
894 [ST_LSM6DSX_ID_GYRO] = {
895 .chan = st_lsm6dsx_gyro_channels,
896 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
897 },
898 },
899 .drdy_mask = {
900 .addr = 0x13,
901 .mask = BIT(3),
902 },
903 .odr_table = {
904 [ST_LSM6DSX_ID_ACC] = {
905 .reg = {
906 .addr = 0x10,
907 .mask = GENMASK(7, 4),
908 },
909 .odr_avl[0] = { 12500, 0x01 },
910 .odr_avl[1] = { 26000, 0x02 },
911 .odr_avl[2] = { 52000, 0x03 },
912 .odr_avl[3] = { 104000, 0x04 },
913 .odr_avl[4] = { 208000, 0x05 },
914 .odr_avl[5] = { 416000, 0x06 },
915 .odr_avl[6] = { 833000, 0x07 },
916 .odr_len = 7,
917 },
918 [ST_LSM6DSX_ID_GYRO] = {
919 .reg = {
920 .addr = 0x11,
921 .mask = GENMASK(7, 4),
922 },
923 .odr_avl[0] = { 12500, 0x01 },
924 .odr_avl[1] = { 26000, 0x02 },
925 .odr_avl[2] = { 52000, 0x03 },
926 .odr_avl[3] = { 104000, 0x04 },
927 .odr_avl[4] = { 208000, 0x05 },
928 .odr_avl[5] = { 416000, 0x06 },
929 .odr_avl[6] = { 833000, 0x07 },
930 .odr_len = 7,
931 },
932 },
933 .fs_table = {
934 [ST_LSM6DSX_ID_ACC] = {
935 .reg = {
936 .addr = 0x10,
937 .mask = GENMASK(3, 2),
938 },
939 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
940 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
941 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
942 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
943 .fs_len = 4,
944 },
945 [ST_LSM6DSX_ID_GYRO] = {
946 .reg = {
947 .addr = 0x11,
948 .mask = GENMASK(3, 2),
949 },
950 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
951 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
952 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
953 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
954 .fs_len = 4,
955 },
956 },
957 .irq_config = {
958 .irq1 = {
959 .addr = 0x0d,
960 .mask = BIT(3),
961 },
962 .irq2 = {
963 .addr = 0x0e,
964 .mask = BIT(3),
965 },
966 .lir = {
967 .addr = 0x56,
968 .mask = BIT(0),
969 },
970 .clear_on_read = {
971 .addr = 0x56,
972 .mask = BIT(6),
973 },
974 .irq1_func = 0x5e,
975 .irq2_func = 0x5f,
976 .hla = {
977 .addr = 0x12,
978 .mask = BIT(5),
979 },
980 .od = {
981 .addr = 0x12,
982 .mask = BIT(4),
983 },
984 },
985 .batch = {
986 [ST_LSM6DSX_ID_ACC] = {
987 .addr = 0x09,
988 .mask = GENMASK(3, 0),
989 },
990 [ST_LSM6DSX_ID_GYRO] = {
991 .addr = 0x09,
992 .mask = GENMASK(7, 4),
993 },
994 },
995 .fifo_ops = {
996 .update_fifo = st_lsm6dsx_update_fifo,
997 .read_fifo = st_lsm6dsx_read_tagged_fifo,
998 .fifo_th = {
999 .addr = 0x07,
1000 .mask = GENMASK(8, 0),
1001 },
1002 .fifo_diff = {
1003 .addr = 0x3a,
1004 .mask = GENMASK(9, 0),
1005 },
1006 .max_size = 512,
1007 .th_wl = 1,
1008 },
1009 .ts_settings = {
1010 .timer_en = {
1011 .addr = 0x19,
1012 .mask = BIT(5),
1013 },
1014 .decimator = {
1015 .addr = 0x0a,
1016 .mask = GENMASK(7, 6),
1017 },
1018 .freq_fine = 0x63,
1019 .ts_sensitivity = 25000,
1020 .ts_trim_coeff = 37500,
1021 },
1022 .shub_settings = {
1023 .page_mux = {
1024 .addr = 0x01,
1025 .mask = BIT(6),
1026 },
1027 .master_en = {
1028 .sec_page = true,
1029 .addr = 0x14,
1030 .mask = BIT(2),
1031 },
1032 .pullup_en = {
1033 .sec_page = true,
1034 .addr = 0x14,
1035 .mask = BIT(3),
1036 },
1037 .aux_sens = {
1038 .addr = 0x14,
1039 .mask = GENMASK(1, 0),
1040 },
1041 .wr_once = {
1042 .addr = 0x14,
1043 .mask = BIT(6),
1044 },
1045 .num_ext_dev = 3,
1046 .shub_out = {
1047 .sec_page = true,
1048 .addr = 0x02,
1049 },
1050 .slv0_addr = 0x15,
1051 .dw_slv0_addr = 0x21,
1052 .batch_en = BIT(3),
1053 },
1054 .event_settings = {
1055 .enable_reg = {
1056 .addr = 0x58,
1057 .mask = BIT(7),
1058 },
1059 .sources = {
1060 [ST_LSM6DSX_EVENT_WAKEUP] = {
1061 .value = {
1062 .addr = 0x5b,
1063 .mask = GENMASK(5, 0),
1064 },
1065 .enable_mask = BIT(5),
1066 .status = {
1067 .addr = 0x1b,
1068 .mask = BIT(3),
1069 },
1070 .status_z_mask = BIT(0),
1071 .status_y_mask = BIT(1),
1072 .status_x_mask = BIT(2),
1073 },
1074 },
1075 },
1076 },
1077 {
1078 .reset = {
1079 .addr = 0x12,
1080 .mask = BIT(0),
1081 },
1082 .boot = {
1083 .addr = 0x12,
1084 .mask = BIT(7),
1085 },
1086 .bdu = {
1087 .addr = 0x12,
1088 .mask = BIT(6),
1089 },
1090 .id = {
1091 {
1092 .hw_id = ST_ASM330LHH_ID,
1093 .name = ST_ASM330LHH_DEV_NAME,
1094 .wai = 0x6b,
1095 }, {
1096 .hw_id = ST_LSM6DSOP_ID,
1097 .name = ST_LSM6DSOP_DEV_NAME,
1098 .wai = 0x6c,
1099 }, {
1100 .hw_id = ST_ASM330LHB_ID,
1101 .name = ST_ASM330LHB_DEV_NAME,
1102 .wai = 0x6b,
1103 },
1104 },
1105 .channels = {
1106 [ST_LSM6DSX_ID_ACC] = {
1107 .chan = st_lsm6dsx_acc_channels,
1108 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1109 },
1110 [ST_LSM6DSX_ID_GYRO] = {
1111 .chan = st_lsm6dsx_gyro_channels,
1112 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1113 },
1114 },
1115 .drdy_mask = {
1116 .addr = 0x13,
1117 .mask = BIT(3),
1118 },
1119 .odr_table = {
1120 [ST_LSM6DSX_ID_ACC] = {
1121 .reg = {
1122 .addr = 0x10,
1123 .mask = GENMASK(7, 4),
1124 },
1125 .odr_avl[0] = { 12500, 0x01 },
1126 .odr_avl[1] = { 26000, 0x02 },
1127 .odr_avl[2] = { 52000, 0x03 },
1128 .odr_avl[3] = { 104000, 0x04 },
1129 .odr_avl[4] = { 208000, 0x05 },
1130 .odr_avl[5] = { 416000, 0x06 },
1131 .odr_avl[6] = { 833000, 0x07 },
1132 .odr_len = 7,
1133 },
1134 [ST_LSM6DSX_ID_GYRO] = {
1135 .reg = {
1136 .addr = 0x11,
1137 .mask = GENMASK(7, 4),
1138 },
1139 .odr_avl[0] = { 12500, 0x01 },
1140 .odr_avl[1] = { 26000, 0x02 },
1141 .odr_avl[2] = { 52000, 0x03 },
1142 .odr_avl[3] = { 104000, 0x04 },
1143 .odr_avl[4] = { 208000, 0x05 },
1144 .odr_avl[5] = { 416000, 0x06 },
1145 .odr_avl[6] = { 833000, 0x07 },
1146 .odr_len = 7,
1147 },
1148 },
1149 .fs_table = {
1150 [ST_LSM6DSX_ID_ACC] = {
1151 .reg = {
1152 .addr = 0x10,
1153 .mask = GENMASK(3, 2),
1154 },
1155 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1156 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1157 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1158 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1159 .fs_len = 4,
1160 },
1161 [ST_LSM6DSX_ID_GYRO] = {
1162 .reg = {
1163 .addr = 0x11,
1164 .mask = GENMASK(3, 2),
1165 },
1166 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1167 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1168 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1169 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1170 .fs_len = 4,
1171 },
1172 },
1173 .irq_config = {
1174 .irq1 = {
1175 .addr = 0x0d,
1176 .mask = BIT(3),
1177 },
1178 .irq2 = {
1179 .addr = 0x0e,
1180 .mask = BIT(3),
1181 },
1182 .lir = {
1183 .addr = 0x56,
1184 .mask = BIT(0),
1185 },
1186 .clear_on_read = {
1187 .addr = 0x56,
1188 .mask = BIT(6),
1189 },
1190 .irq1_func = 0x5e,
1191 .irq2_func = 0x5f,
1192 .hla = {
1193 .addr = 0x12,
1194 .mask = BIT(5),
1195 },
1196 .od = {
1197 .addr = 0x12,
1198 .mask = BIT(4),
1199 },
1200 },
1201 .batch = {
1202 [ST_LSM6DSX_ID_ACC] = {
1203 .addr = 0x09,
1204 .mask = GENMASK(3, 0),
1205 },
1206 [ST_LSM6DSX_ID_GYRO] = {
1207 .addr = 0x09,
1208 .mask = GENMASK(7, 4),
1209 },
1210 },
1211 .fifo_ops = {
1212 .update_fifo = st_lsm6dsx_update_fifo,
1213 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1214 .fifo_th = {
1215 .addr = 0x07,
1216 .mask = GENMASK(8, 0),
1217 },
1218 .fifo_diff = {
1219 .addr = 0x3a,
1220 .mask = GENMASK(9, 0),
1221 },
1222 .max_size = 512,
1223 .th_wl = 1,
1224 },
1225 .ts_settings = {
1226 .timer_en = {
1227 .addr = 0x19,
1228 .mask = BIT(5),
1229 },
1230 .decimator = {
1231 .addr = 0x0a,
1232 .mask = GENMASK(7, 6),
1233 },
1234 .freq_fine = 0x63,
1235 .ts_sensitivity = 25000,
1236 .ts_trim_coeff = 37500,
1237 },
1238 .event_settings = {
1239 .enable_reg = {
1240 .addr = 0x58,
1241 .mask = BIT(7),
1242 },
1243 .sources = {
1244 [ST_LSM6DSX_EVENT_WAKEUP] = {
1245 .value = {
1246 .addr = 0x5b,
1247 .mask = GENMASK(5, 0),
1248 },
1249 .enable_mask = BIT(5),
1250 .status = {
1251 .addr = 0x1b,
1252 .mask = BIT(3),
1253 },
1254 .status_z_mask = BIT(0),
1255 .status_y_mask = BIT(1),
1256 .status_x_mask = BIT(2),
1257 },
1258 },
1259 },
1260 },
1261 {
1262 .reset = {
1263 .addr = 0x12,
1264 .mask = BIT(0),
1265 },
1266 .boot = {
1267 .addr = 0x12,
1268 .mask = BIT(7),
1269 },
1270 .bdu = {
1271 .addr = 0x12,
1272 .mask = BIT(6),
1273 },
1274 .id = {
1275 {
1276 .hw_id = ST_LSM6DSV_ID,
1277 .name = ST_LSM6DSV_DEV_NAME,
1278 .wai = 0x70,
1279 }, {
1280 .hw_id = ST_LSM6DSV16X_ID,
1281 .name = ST_LSM6DSV16X_DEV_NAME,
1282 .wai = 0x70,
1283 },
1284 },
1285 .channels = {
1286 [ST_LSM6DSX_ID_ACC] = {
1287 .chan = st_lsm6dsx_acc_tap_channels,
1288 .len = ARRAY_SIZE(st_lsm6dsx_acc_tap_channels),
1289 },
1290 [ST_LSM6DSX_ID_GYRO] = {
1291 .chan = st_lsm6dsx_gyro_channels,
1292 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1293 },
1294 },
1295 .drdy_mask = {
1296 .addr = 0x13,
1297 .mask = BIT(3),
1298 },
1299 .odr_table = {
1300 [ST_LSM6DSX_ID_ACC] = {
1301 .reg = {
1302 .addr = 0x10,
1303 .mask = GENMASK(3, 0),
1304 },
1305 .odr_avl[0] = { 7500, 0x02 },
1306 .odr_avl[1] = { 15000, 0x03 },
1307 .odr_avl[2] = { 30000, 0x04 },
1308 .odr_avl[3] = { 60000, 0x05 },
1309 .odr_avl[4] = { 120000, 0x06 },
1310 .odr_avl[5] = { 240000, 0x07 },
1311 .odr_avl[6] = { 480000, 0x08 },
1312 .odr_avl[7] = { 960000, 0x09 },
1313 .odr_len = 8,
1314 },
1315 [ST_LSM6DSX_ID_GYRO] = {
1316 .reg = {
1317 .addr = 0x11,
1318 .mask = GENMASK(3, 0),
1319 },
1320 .odr_avl[0] = { 7500, 0x02 },
1321 .odr_avl[1] = { 15000, 0x03 },
1322 .odr_avl[2] = { 30000, 0x04 },
1323 .odr_avl[3] = { 60000, 0x05 },
1324 .odr_avl[4] = { 120000, 0x06 },
1325 .odr_avl[5] = { 240000, 0x07 },
1326 .odr_avl[6] = { 480000, 0x08 },
1327 .odr_avl[7] = { 960000, 0x09 },
1328 .odr_len = 8,
1329 },
1330 },
1331 .fs_table = {
1332 [ST_LSM6DSX_ID_ACC] = {
1333 .reg = {
1334 .addr = 0x17,
1335 .mask = GENMASK(1, 0),
1336 },
1337 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1338 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x1 },
1339 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x2 },
1340 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x3 },
1341 .fs_len = 4,
1342 },
1343 [ST_LSM6DSX_ID_GYRO] = {
1344 .reg = {
1345 .addr = 0x15,
1346 .mask = GENMASK(3, 0),
1347 },
1348 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x1 },
1349 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x2 },
1350 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x3 },
1351 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x4 },
1352 .fs_len = 4,
1353 },
1354 },
1355 .irq_config = {
1356 .irq1 = {
1357 .addr = 0x0d,
1358 .mask = BIT(3),
1359 },
1360 .irq2 = {
1361 .addr = 0x0e,
1362 .mask = BIT(3),
1363 },
1364 .lir = {
1365 .addr = 0x56,
1366 .mask = BIT(0),
1367 },
1368 .irq1_func = 0x5e,
1369 .irq2_func = 0x5f,
1370 .hla = {
1371 .addr = 0x03,
1372 .mask = BIT(4),
1373 },
1374 .od = {
1375 .addr = 0x03,
1376 .mask = BIT(3),
1377 },
1378 },
1379 .batch = {
1380 [ST_LSM6DSX_ID_ACC] = {
1381 .addr = 0x09,
1382 .mask = GENMASK(3, 0),
1383 },
1384 [ST_LSM6DSX_ID_GYRO] = {
1385 .addr = 0x09,
1386 .mask = GENMASK(7, 4),
1387 },
1388 },
1389 .fifo_ops = {
1390 .update_fifo = st_lsm6dsx_update_fifo,
1391 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1392 .fifo_th = {
1393 .addr = 0x07,
1394 .mask = GENMASK(7, 0),
1395 },
1396 .fifo_diff = {
1397 .addr = 0x1b,
1398 .mask = GENMASK(8, 0),
1399 },
1400 .max_size = 512,
1401 .th_wl = 1,
1402 },
1403 .ts_settings = {
1404 .timer_en = {
1405 .addr = 0x50,
1406 .mask = BIT(6),
1407 },
1408 .decimator = {
1409 .addr = 0x0a,
1410 .mask = GENMASK(7, 6),
1411 },
1412 .freq_fine = 0x4f,
1413 .ts_sensitivity = 21701,
1414 .ts_trim_coeff = 28212,
1415 },
1416 .shub_settings = {
1417 .page_mux = {
1418 .addr = 0x01,
1419 .mask = BIT(6),
1420 },
1421 .master_en = {
1422 .sec_page = true,
1423 .addr = 0x14,
1424 .mask = BIT(2),
1425 },
1426 .pullup_en = {
1427 .addr = 0x03,
1428 .mask = BIT(6),
1429 },
1430 .aux_sens = {
1431 .addr = 0x14,
1432 .mask = GENMASK(1, 0),
1433 },
1434 .wr_once = {
1435 .addr = 0x14,
1436 .mask = BIT(6),
1437 },
1438 .num_ext_dev = 3,
1439 .shub_out = {
1440 .sec_page = true,
1441 .addr = 0x02,
1442 },
1443 .slv0_addr = 0x15,
1444 .dw_slv0_addr = 0x21,
1445 .batch_en = BIT(3),
1446 },
1447 .event_settings = {
1448 .enable_reg = {
1449 .addr = 0x50,
1450 .mask = BIT(7),
1451 },
1452 .sources = {
1453 [ST_LSM6DSX_EVENT_WAKEUP] = {
1454 .value = {
1455 .addr = 0x5b,
1456 .mask = GENMASK(5, 0),
1457 },
1458 .enable_mask = BIT(5),
1459 .status = {
1460 .addr = 0x45,
1461 .mask = BIT(3),
1462 },
1463 .status_z_mask = BIT(0),
1464 .status_y_mask = BIT(1),
1465 .status_x_mask = BIT(2),
1466 },
1467 [ST_LSM6DSX_EVENT_TAP] = {
1468 .x_value = {
1469 .addr = 0x57,
1470 .mask = GENMASK(4, 0),
1471 },
1472 .y_value = {
1473 .addr = 0x58,
1474 .mask = GENMASK(4, 0),
1475 },
1476 .z_value = {
1477 .addr = 0x59,
1478 .mask = GENMASK(4, 0),
1479 },
1480 .enable_mask = BIT(6),
1481 .enable_axis_reg = 0x56,
1482 .enable_x_mask = BIT(3),
1483 .enable_y_mask = BIT(2),
1484 .enable_z_mask = BIT(1),
1485 .status = {
1486 .addr = 0x46,
1487 .mask = BIT(5),
1488 },
1489 .status_x_mask = BIT(2),
1490 .status_y_mask = BIT(1),
1491 .status_z_mask = BIT(0),
1492 },
1493 },
1494 },
1495 },
1496 {
1497 .reset = {
1498 .addr = 0x12,
1499 .mask = BIT(0),
1500 },
1501 .boot = {
1502 .addr = 0x12,
1503 .mask = BIT(7),
1504 },
1505 .bdu = {
1506 .addr = 0x12,
1507 .mask = BIT(6),
1508 },
1509 .id = {
1510 {
1511 .hw_id = ST_LSM6DSO16IS_ID,
1512 .name = ST_LSM6DSO16IS_DEV_NAME,
1513 .wai = 0x22,
1514 }, {
1515 .hw_id = ST_ISM330IS_ID,
1516 .name = ST_ISM330IS_DEV_NAME,
1517 .wai = 0x22,
1518 }
1519 },
1520 .channels = {
1521 [ST_LSM6DSX_ID_ACC] = {
1522 .chan = st_lsm6ds0_acc_channels,
1523 .len = ARRAY_SIZE(st_lsm6ds0_acc_channels),
1524 },
1525 [ST_LSM6DSX_ID_GYRO] = {
1526 .chan = st_lsm6dsx_gyro_channels,
1527 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1528 },
1529 },
1530 .odr_table = {
1531 [ST_LSM6DSX_ID_ACC] = {
1532 .reg = {
1533 .addr = 0x10,
1534 .mask = GENMASK(7, 4),
1535 },
1536 .odr_avl[0] = { 12500, 0x01 },
1537 .odr_avl[1] = { 26000, 0x02 },
1538 .odr_avl[2] = { 52000, 0x03 },
1539 .odr_avl[3] = { 104000, 0x04 },
1540 .odr_avl[4] = { 208000, 0x05 },
1541 .odr_avl[5] = { 416000, 0x06 },
1542 .odr_avl[6] = { 833000, 0x07 },
1543 .odr_len = 7,
1544 },
1545 [ST_LSM6DSX_ID_GYRO] = {
1546 .reg = {
1547 .addr = 0x11,
1548 .mask = GENMASK(7, 4),
1549 },
1550 .odr_avl[0] = { 12500, 0x01 },
1551 .odr_avl[1] = { 26000, 0x02 },
1552 .odr_avl[2] = { 52000, 0x03 },
1553 .odr_avl[3] = { 104000, 0x04 },
1554 .odr_avl[4] = { 208000, 0x05 },
1555 .odr_avl[5] = { 416000, 0x06 },
1556 .odr_avl[6] = { 833000, 0x07 },
1557 .odr_len = 7,
1558 },
1559 },
1560 .fs_table = {
1561 [ST_LSM6DSX_ID_ACC] = {
1562 .reg = {
1563 .addr = 0x10,
1564 .mask = GENMASK(3, 2),
1565 },
1566 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1567 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1568 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1569 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1570 .fs_len = 4,
1571 },
1572 [ST_LSM6DSX_ID_GYRO] = {
1573 .reg = {
1574 .addr = 0x11,
1575 .mask = GENMASK(3, 2),
1576 },
1577 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1578 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1579 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1580 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1581 .fs_len = 4,
1582 },
1583 },
1584 .irq_config = {
1585 .hla = {
1586 .addr = 0x12,
1587 .mask = BIT(5),
1588 },
1589 .od = {
1590 .addr = 0x12,
1591 .mask = BIT(4),
1592 },
1593 },
1594 .shub_settings = {
1595 .page_mux = {
1596 .addr = 0x01,
1597 .mask = BIT(6),
1598 },
1599 .master_en = {
1600 .sec_page = true,
1601 .addr = 0x14,
1602 .mask = BIT(2),
1603 },
1604 .pullup_en = {
1605 .sec_page = true,
1606 .addr = 0x14,
1607 .mask = BIT(3),
1608 },
1609 .aux_sens = {
1610 .addr = 0x14,
1611 .mask = GENMASK(1, 0),
1612 },
1613 .wr_once = {
1614 .addr = 0x14,
1615 .mask = BIT(6),
1616 },
1617 .num_ext_dev = 3,
1618 .shub_out = {
1619 .sec_page = true,
1620 .addr = 0x02,
1621 },
1622 .slv0_addr = 0x15,
1623 .dw_slv0_addr = 0x21,
1624 },
1625 },
1626 };
1627
st_lsm6dsx_set_page(struct st_lsm6dsx_hw * hw,bool enable)1628 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1629 {
1630 const struct st_lsm6dsx_shub_settings *hub_settings;
1631 unsigned int data;
1632 int err;
1633
1634 hub_settings = &hw->settings->shub_settings;
1635 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1636 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1637 hub_settings->page_mux.mask, data);
1638 usleep_range(100, 150);
1639
1640 return err;
1641 }
1642
st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw * hw,int id,const char ** name)1643 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1644 const char **name)
1645 {
1646 int err, i, j, data;
1647
1648 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1649 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1650 if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1651 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1652 break;
1653 }
1654 if (j < ST_LSM6DSX_MAX_ID)
1655 break;
1656 }
1657
1658 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1659 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1660 return -ENODEV;
1661 }
1662
1663 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1664 if (err < 0) {
1665 dev_err(hw->dev, "failed to read whoami register\n");
1666 return err;
1667 }
1668
1669 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1670 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1671 return -ENODEV;
1672 }
1673
1674 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1675 hw->settings = &st_lsm6dsx_sensor_settings[i];
1676
1677 return 0;
1678 }
1679
st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor * sensor,u32 gain)1680 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1681 u32 gain)
1682 {
1683 const struct st_lsm6dsx_fs_table_entry *fs_table;
1684 unsigned int data;
1685 int i, err;
1686
1687 fs_table = &sensor->hw->settings->fs_table[sensor->id];
1688 for (i = 0; i < fs_table->fs_len; i++) {
1689 if (fs_table->fs_avl[i].gain == gain)
1690 break;
1691 }
1692
1693 if (i == fs_table->fs_len)
1694 return -EINVAL;
1695
1696 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1697 fs_table->reg.mask);
1698 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1699 fs_table->reg.mask, data);
1700 if (err < 0)
1701 return err;
1702
1703 sensor->gain = gain;
1704
1705 return 0;
1706 }
1707
st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor * sensor,u32 odr,u8 * val)1708 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1709 {
1710 const struct st_lsm6dsx_odr_table_entry *odr_table;
1711 int i;
1712
1713 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1714 for (i = 0; i < odr_table->odr_len; i++) {
1715 /*
1716 * ext devices can run at different odr respect to
1717 * accel sensor
1718 */
1719 if (odr_table->odr_avl[i].milli_hz >= odr)
1720 break;
1721 }
1722
1723 if (i == odr_table->odr_len)
1724 return -EINVAL;
1725
1726 *val = odr_table->odr_avl[i].val;
1727 return odr_table->odr_avl[i].milli_hz;
1728 }
1729
1730 static int
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw * hw,u32 odr,enum st_lsm6dsx_sensor_id id)1731 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1732 enum st_lsm6dsx_sensor_id id)
1733 {
1734 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1735
1736 if (odr > 0) {
1737 if (hw->enable_mask & BIT(id))
1738 return max_t(u32, ref->odr, odr);
1739 else
1740 return odr;
1741 } else {
1742 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1743 }
1744 }
1745
1746 static int
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor * sensor,u32 req_odr)1747 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1748 {
1749 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1750 struct st_lsm6dsx_hw *hw = sensor->hw;
1751 const struct st_lsm6dsx_reg *reg;
1752 unsigned int data;
1753 u8 val = 0;
1754 int err;
1755
1756 switch (sensor->id) {
1757 case ST_LSM6DSX_ID_GYRO:
1758 break;
1759 case ST_LSM6DSX_ID_EXT0:
1760 case ST_LSM6DSX_ID_EXT1:
1761 case ST_LSM6DSX_ID_EXT2:
1762 case ST_LSM6DSX_ID_ACC: {
1763 u32 odr;
1764 int i;
1765
1766 /*
1767 * i2c embedded controller relies on the accelerometer sensor as
1768 * bus read/write trigger so we need to enable accel device
1769 * at odr = max(accel_odr, ext_odr) in order to properly
1770 * communicate with i2c slave devices
1771 */
1772 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1773 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1774 if (!hw->iio_devs[i] || i == sensor->id)
1775 continue;
1776
1777 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1778 if (odr != req_odr)
1779 /* device already configured */
1780 return 0;
1781 }
1782 break;
1783 }
1784 default: /* should never occur */
1785 return -EINVAL;
1786 }
1787
1788 if (req_odr > 0) {
1789 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1790 if (err < 0)
1791 return err;
1792 }
1793
1794 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1795 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1796 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1797 }
1798
1799 static int
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1800 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1801 bool enable)
1802 {
1803 struct st_lsm6dsx_hw *hw = sensor->hw;
1804 u32 odr = enable ? sensor->odr : 0;
1805 int err;
1806
1807 err = st_lsm6dsx_set_odr(sensor, odr);
1808 if (err < 0)
1809 return err;
1810
1811 if (enable)
1812 hw->enable_mask |= BIT(sensor->id);
1813 else
1814 hw->enable_mask &= ~BIT(sensor->id);
1815
1816 return 0;
1817 }
1818
1819 static int
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor * sensor)1820 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor)
1821 {
1822 struct st_lsm6dsx_hw *hw = sensor->hw;
1823 int event;
1824
1825 if (sensor->id != ST_LSM6DSX_ID_ACC)
1826 return 0;
1827
1828 for (event = 0; event < ST_LSM6DSX_EVENT_MAX; event++) {
1829 if (hw->enable_event[event])
1830 return true;
1831 }
1832 return false;
1833 }
1834
st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1835 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1836 bool enable)
1837 {
1838 if (st_lsm6dsx_check_events(sensor))
1839 return 0;
1840
1841 return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1842 }
1843
st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor * sensor,u8 addr,int * val)1844 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1845 u8 addr, int *val)
1846 {
1847 struct st_lsm6dsx_hw *hw = sensor->hw;
1848 int err, delay;
1849 __le16 data;
1850
1851 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1852 if (err < 0)
1853 return err;
1854
1855 /*
1856 * we need to wait for sensor settling time before
1857 * reading data in order to avoid corrupted samples
1858 */
1859 delay = 1000000000 / sensor->odr;
1860 usleep_range(3 * delay, 4 * delay);
1861
1862 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1863 if (err < 0)
1864 return err;
1865
1866 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1867 if (err < 0)
1868 return err;
1869
1870 *val = (s16)le16_to_cpu(data);
1871
1872 return IIO_VAL_INT;
1873 }
1874
st_lsm6dsx_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)1875 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1876 struct iio_chan_spec const *ch,
1877 int *val, int *val2, long mask)
1878 {
1879 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1880 int ret;
1881
1882 switch (mask) {
1883 case IIO_CHAN_INFO_RAW:
1884 if (!iio_device_claim_direct(iio_dev))
1885 return -EBUSY;
1886
1887 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1888 iio_device_release_direct(iio_dev);
1889 break;
1890 case IIO_CHAN_INFO_SAMP_FREQ:
1891 *val = sensor->odr / 1000;
1892 *val2 = (sensor->odr % 1000) * 1000;
1893 ret = IIO_VAL_INT_PLUS_MICRO;
1894 break;
1895 case IIO_CHAN_INFO_SCALE:
1896 *val = 0;
1897 *val2 = sensor->gain;
1898 ret = IIO_VAL_INT_PLUS_NANO;
1899 break;
1900 default:
1901 ret = -EINVAL;
1902 break;
1903 }
1904
1905 return ret;
1906 }
1907
st_lsm6dsx_write_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1908 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1909 struct iio_chan_spec const *chan,
1910 int val, int val2, long mask)
1911 {
1912 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1913 int err = 0;
1914
1915 if (!iio_device_claim_direct(iio_dev))
1916 return -EBUSY;
1917
1918 switch (mask) {
1919 case IIO_CHAN_INFO_SCALE:
1920 err = st_lsm6dsx_set_full_scale(sensor, val2);
1921 break;
1922 case IIO_CHAN_INFO_SAMP_FREQ: {
1923 u8 data;
1924
1925 val = val * 1000 + val2 / 1000;
1926 val = st_lsm6dsx_check_odr(sensor, val, &data);
1927 if (val < 0) {
1928 err = val;
1929 } else {
1930 sensor->odr = val;
1931 sensor->hwfifo_odr_mHz = val;
1932 }
1933 break;
1934 }
1935 default:
1936 err = -EINVAL;
1937 break;
1938 }
1939
1940 iio_device_release_direct(iio_dev);
1941
1942 return err;
1943 }
1944
st_lsm6dsx_event_setup(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_event_id event,int axis,bool state)1945 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw,
1946 enum st_lsm6dsx_event_id event, int axis,
1947 bool state)
1948 {
1949 const struct st_lsm6dsx_event_src *src;
1950 unsigned int data;
1951 int err;
1952 u8 old_enable, new_enable;
1953
1954 if (!hw->irq_routing)
1955 return -ENOTSUPP;
1956
1957 /* Enable/disable event interrupt */
1958 src = &hw->settings->event_settings.sources[event];
1959 if (src->enable_axis_reg) {
1960 u8 enable_mask;
1961
1962 switch (axis) {
1963 case IIO_MOD_X:
1964 enable_mask = src->enable_x_mask;
1965 break;
1966 case IIO_MOD_Y:
1967 enable_mask = src->enable_y_mask;
1968 break;
1969 case IIO_MOD_Z:
1970 enable_mask = src->enable_z_mask;
1971 break;
1972 default:
1973 enable_mask = 0;
1974 }
1975 if (enable_mask) {
1976 data = ST_LSM6DSX_SHIFT_VAL(state, enable_mask);
1977 err = st_lsm6dsx_update_bits_locked(hw,
1978 src->enable_axis_reg,
1979 enable_mask, data);
1980 if (err < 0)
1981 return err;
1982 }
1983 }
1984
1985 /*
1986 * If the set of axes for which the event source is enabled does not
1987 * change from empty to non-empty or vice versa, there is nothing else
1988 * to do.
1989 */
1990 old_enable = hw->enable_event[event];
1991 new_enable = state ? (old_enable | BIT(axis)) :
1992 (old_enable & ~BIT(axis));
1993 if (!old_enable == !new_enable)
1994 return 0;
1995
1996 data = ST_LSM6DSX_SHIFT_VAL(state, src->enable_mask);
1997 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing,
1998 src->enable_mask, data);
1999 }
2000
2001 static enum st_lsm6dsx_event_id
st_lsm6dsx_get_event_id(enum iio_event_type type)2002 st_lsm6dsx_get_event_id(enum iio_event_type type)
2003 {
2004 switch (type) {
2005 case IIO_EV_TYPE_THRESH:
2006 return ST_LSM6DSX_EVENT_WAKEUP;
2007 case IIO_EV_TYPE_GESTURE:
2008 return ST_LSM6DSX_EVENT_TAP;
2009 default:
2010 return ST_LSM6DSX_EVENT_MAX;
2011 }
2012 }
2013
2014 static const struct st_lsm6dsx_reg *
st_lsm6dsx_get_event_reg(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_event_id event,const struct iio_chan_spec * chan)2015 st_lsm6dsx_get_event_reg(struct st_lsm6dsx_hw *hw,
2016 enum st_lsm6dsx_event_id event,
2017 const struct iio_chan_spec *chan)
2018 {
2019 const struct st_lsm6dsx_event_src *src;
2020 const struct st_lsm6dsx_reg *reg;
2021
2022 src = &hw->settings->event_settings.sources[event];
2023 switch (chan->channel2) {
2024 case IIO_MOD_X:
2025 reg = &src->x_value;
2026 break;
2027 case IIO_MOD_Y:
2028 reg = &src->y_value;
2029 break;
2030 case IIO_MOD_Z:
2031 reg = &src->z_value;
2032 break;
2033 default:
2034 return NULL;
2035 }
2036 if (reg->addr)
2037 return reg;
2038
2039 /*
2040 * The sensor does not support configuring this event source on a per
2041 * axis basis: return the register to configure the event source for all
2042 * axes.
2043 */
2044 return &src->value;
2045 }
2046
st_lsm6dsx_read_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)2047 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
2048 const struct iio_chan_spec *chan,
2049 enum iio_event_type type,
2050 enum iio_event_direction dir,
2051 enum iio_event_info info,
2052 int *val, int *val2)
2053 {
2054 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type);
2055 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2056 struct st_lsm6dsx_hw *hw = sensor->hw;
2057 const struct st_lsm6dsx_reg *reg;
2058 u8 data;
2059 int err;
2060
2061 if (event == ST_LSM6DSX_EVENT_MAX)
2062 return -EINVAL;
2063
2064 reg = st_lsm6dsx_get_event_reg(hw, event, chan);
2065 if (!reg)
2066 return -EINVAL;
2067
2068 err = st_lsm6dsx_read_locked(hw, reg->addr, &data, sizeof(data));
2069 if (err < 0)
2070 return err;
2071
2072 *val2 = 0;
2073 *val = st_lsm6dsx_field_get(reg->mask, data);
2074
2075 return IIO_VAL_INT;
2076 }
2077
2078 static int
st_lsm6dsx_write_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)2079 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
2080 const struct iio_chan_spec *chan,
2081 enum iio_event_type type,
2082 enum iio_event_direction dir,
2083 enum iio_event_info info,
2084 int val, int val2)
2085 {
2086 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type);
2087 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2088 struct st_lsm6dsx_hw *hw = sensor->hw;
2089 const struct st_lsm6dsx_reg *reg;
2090 unsigned int data;
2091 int err;
2092
2093 if (event == ST_LSM6DSX_EVENT_MAX)
2094 return -EINVAL;
2095
2096 if (val < 0 || val > 31)
2097 return -EINVAL;
2098
2099 reg = st_lsm6dsx_get_event_reg(hw, event, chan);
2100 if (!reg)
2101 return -EINVAL;
2102
2103 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
2104 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
2105 reg->mask, data);
2106 if (err < 0)
2107 return -EINVAL;
2108
2109 return 0;
2110 }
2111
2112 static int
st_lsm6dsx_read_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)2113 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
2114 const struct iio_chan_spec *chan,
2115 enum iio_event_type type,
2116 enum iio_event_direction dir)
2117 {
2118 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type);
2119 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2120 struct st_lsm6dsx_hw *hw = sensor->hw;
2121
2122 if (event == ST_LSM6DSX_EVENT_MAX)
2123 return -EINVAL;
2124
2125 return !!(hw->enable_event[event] & BIT(chan->channel2));
2126 }
2127
2128 /**
2129 * st_lsm6dsx_check_other_events - Check for enabled sensor events.
2130 * @hw: Sensor hardware instance.
2131 * @curr: Current event type.
2132 *
2133 * Return: whether any events other than @curr are enabled.
2134 */
st_lsm6dsx_check_other_events(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_event_id curr)2135 static bool st_lsm6dsx_check_other_events(struct st_lsm6dsx_hw *hw,
2136 enum st_lsm6dsx_event_id curr)
2137 {
2138 enum st_lsm6dsx_event_id other;
2139
2140 for (other = 0; other < ST_LSM6DSX_EVENT_MAX; other++) {
2141 if (other != curr && hw->enable_event[other])
2142 return true;
2143 }
2144
2145 return false;
2146 }
2147
st_lsm6dsx_events_enable(struct st_lsm6dsx_sensor * sensor,bool state)2148 static int st_lsm6dsx_events_enable(struct st_lsm6dsx_sensor *sensor,
2149 bool state)
2150 {
2151 struct st_lsm6dsx_hw *hw = sensor->hw;
2152 const struct st_lsm6dsx_reg *reg;
2153
2154 reg = &hw->settings->event_settings.enable_reg;
2155 if (reg->addr) {
2156 int err;
2157
2158 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2159 ST_LSM6DSX_SHIFT_VAL(state, reg->mask));
2160 if (err)
2161 return err;
2162 }
2163
2164 if (state || !(hw->fifo_mask & BIT(sensor->id)))
2165 return __st_lsm6dsx_sensor_set_enable(sensor, state);
2166
2167 return 0;
2168 }
2169
2170 static int
st_lsm6dsx_write_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,bool state)2171 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
2172 const struct iio_chan_spec *chan,
2173 enum iio_event_type type,
2174 enum iio_event_direction dir, bool state)
2175 {
2176 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type);
2177 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2178 struct st_lsm6dsx_hw *hw = sensor->hw;
2179 u8 enable_event;
2180 int err;
2181
2182 if (event == ST_LSM6DSX_EVENT_MAX)
2183 return -EINVAL;
2184
2185 if (state)
2186 enable_event = hw->enable_event[event] | BIT(chan->channel2);
2187 else
2188 enable_event = hw->enable_event[event] & ~BIT(chan->channel2);
2189
2190 /* stop here if no changes have been made */
2191 if (hw->enable_event[event] == enable_event)
2192 return 0;
2193
2194 err = st_lsm6dsx_event_setup(hw, event, chan->channel2, state);
2195 if (err < 0)
2196 return err;
2197
2198 mutex_lock(&hw->conf_lock);
2199 if (enable_event)
2200 err = st_lsm6dsx_events_enable(sensor, true);
2201 else if (!st_lsm6dsx_check_other_events(hw, event))
2202 err = st_lsm6dsx_events_enable(sensor, false);
2203 mutex_unlock(&hw->conf_lock);
2204 if (err < 0)
2205 return err;
2206
2207 hw->enable_event[event] = enable_event;
2208
2209 return 0;
2210 }
2211
st_lsm6dsx_set_watermark(struct iio_dev * iio_dev,unsigned int val)2212 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
2213 {
2214 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2215 struct st_lsm6dsx_hw *hw = sensor->hw;
2216 int err;
2217
2218 val = clamp_val(val, 1, hw->settings->fifo_ops.max_size);
2219
2220 mutex_lock(&hw->conf_lock);
2221
2222 err = st_lsm6dsx_update_watermark(sensor, val);
2223
2224 mutex_unlock(&hw->conf_lock);
2225
2226 if (err < 0)
2227 return err;
2228
2229 sensor->watermark = val;
2230
2231 return 0;
2232 }
2233
2234 static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device * dev,struct device_attribute * attr,char * buf)2235 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
2236 struct device_attribute *attr,
2237 char *buf)
2238 {
2239 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2240 const struct st_lsm6dsx_odr_table_entry *odr_table;
2241 int i, len = 0;
2242
2243 odr_table = &sensor->hw->settings->odr_table[sensor->id];
2244 for (i = 0; i < odr_table->odr_len; i++)
2245 len += sysfs_emit_at(buf, len, "%d.%03d%c",
2246 odr_table->odr_avl[i].milli_hz / 1000,
2247 odr_table->odr_avl[i].milli_hz % 1000,
2248 (i == odr_table->odr_len - 1) ? '\n' : ' ');
2249
2250 return len;
2251 }
2252
st_lsm6dsx_sysfs_scale_avail(struct device * dev,struct device_attribute * attr,char * buf)2253 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
2254 struct device_attribute *attr,
2255 char *buf)
2256 {
2257 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2258 const struct st_lsm6dsx_fs_table_entry *fs_table;
2259 struct st_lsm6dsx_hw *hw = sensor->hw;
2260 int i, len = 0;
2261
2262 fs_table = &hw->settings->fs_table[sensor->id];
2263 for (i = 0; i < fs_table->fs_len; i++)
2264 len += sysfs_emit_at(buf, len, "0.%09u%c",
2265 fs_table->fs_avl[i].gain,
2266 (i == fs_table->fs_len - 1) ? '\n' : ' ');
2267
2268 return len;
2269 }
2270
st_lsm6dsx_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)2271 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
2272 struct iio_chan_spec const *chan,
2273 long mask)
2274 {
2275 switch (mask) {
2276 case IIO_CHAN_INFO_SCALE:
2277 switch (chan->type) {
2278 case IIO_ANGL_VEL:
2279 case IIO_ACCEL:
2280 return IIO_VAL_INT_PLUS_NANO;
2281 default:
2282 return IIO_VAL_INT_PLUS_MICRO;
2283 }
2284 default:
2285 return IIO_VAL_INT_PLUS_MICRO;
2286 }
2287 }
2288
2289 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
2290 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
2291 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2292 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
2293 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2294
2295 static struct attribute *st_lsm6dsx_acc_attributes[] = {
2296 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2297 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
2298 NULL,
2299 };
2300
2301 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
2302 .attrs = st_lsm6dsx_acc_attributes,
2303 };
2304
2305 static const struct iio_info st_lsm6dsx_acc_info = {
2306 .attrs = &st_lsm6dsx_acc_attribute_group,
2307 .read_raw = st_lsm6dsx_read_raw,
2308 .write_raw = st_lsm6dsx_write_raw,
2309 .read_event_value = st_lsm6dsx_read_event,
2310 .write_event_value = st_lsm6dsx_write_event,
2311 .read_event_config = st_lsm6dsx_read_event_config,
2312 .write_event_config = st_lsm6dsx_write_event_config,
2313 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2314 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2315 };
2316
2317 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
2318 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2319 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
2320 NULL,
2321 };
2322
2323 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
2324 .attrs = st_lsm6dsx_gyro_attributes,
2325 };
2326
2327 static const struct iio_info st_lsm6dsx_gyro_info = {
2328 .attrs = &st_lsm6dsx_gyro_attribute_group,
2329 .read_raw = st_lsm6dsx_read_raw,
2330 .write_raw = st_lsm6dsx_write_raw,
2331 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2332 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2333 };
2334
2335 static int
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw * hw,const struct st_lsm6dsx_reg ** drdy_reg)2336 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
2337 const struct st_lsm6dsx_reg **drdy_reg)
2338 {
2339 struct device *dev = hw->dev;
2340 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2341 int err = 0, drdy_pin;
2342
2343 if (device_property_read_u32(dev, "st,drdy-int-pin", &drdy_pin) < 0)
2344 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
2345
2346 switch (drdy_pin) {
2347 case 1:
2348 hw->irq_routing = hw->settings->irq_config.irq1_func;
2349 *drdy_reg = &hw->settings->irq_config.irq1;
2350 break;
2351 case 2:
2352 hw->irq_routing = hw->settings->irq_config.irq2_func;
2353 *drdy_reg = &hw->settings->irq_config.irq2;
2354 break;
2355 default:
2356 dev_err(hw->dev, "unsupported data ready pin\n");
2357 err = -EINVAL;
2358 break;
2359 }
2360
2361 return err;
2362 }
2363
st_lsm6dsx_init_shub(struct st_lsm6dsx_hw * hw)2364 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
2365 {
2366 const struct st_lsm6dsx_shub_settings *hub_settings;
2367 struct device *dev = hw->dev;
2368 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2369 unsigned int data;
2370 int err = 0;
2371
2372 hub_settings = &hw->settings->shub_settings;
2373
2374 if (device_property_read_bool(dev, "st,pullups") ||
2375 (pdata && pdata->pullups)) {
2376 if (hub_settings->pullup_en.sec_page) {
2377 err = st_lsm6dsx_set_page(hw, true);
2378 if (err < 0)
2379 return err;
2380 }
2381
2382 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
2383 err = regmap_update_bits(hw->regmap,
2384 hub_settings->pullup_en.addr,
2385 hub_settings->pullup_en.mask, data);
2386
2387 if (hub_settings->pullup_en.sec_page)
2388 st_lsm6dsx_set_page(hw, false);
2389
2390 if (err < 0)
2391 return err;
2392 }
2393
2394 if (hub_settings->aux_sens.addr) {
2395 /* configure aux sensors */
2396 err = st_lsm6dsx_set_page(hw, true);
2397 if (err < 0)
2398 return err;
2399
2400 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
2401 err = regmap_update_bits(hw->regmap,
2402 hub_settings->aux_sens.addr,
2403 hub_settings->aux_sens.mask, data);
2404
2405 st_lsm6dsx_set_page(hw, false);
2406
2407 if (err < 0)
2408 return err;
2409 }
2410
2411 if (hub_settings->emb_func.addr) {
2412 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
2413 err = regmap_update_bits(hw->regmap,
2414 hub_settings->emb_func.addr,
2415 hub_settings->emb_func.mask, data);
2416 }
2417
2418 return err;
2419 }
2420
st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw * hw)2421 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
2422 {
2423 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
2424 int err, val;
2425
2426 ts_settings = &hw->settings->ts_settings;
2427 /* enable hw timestamp generation if necessary */
2428 if (ts_settings->timer_en.addr) {
2429 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
2430 err = regmap_update_bits(hw->regmap,
2431 ts_settings->timer_en.addr,
2432 ts_settings->timer_en.mask, val);
2433 if (err < 0)
2434 return err;
2435 }
2436
2437 /* enable high resolution for hw ts timer if necessary */
2438 if (ts_settings->hr_timer.addr) {
2439 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
2440 err = regmap_update_bits(hw->regmap,
2441 ts_settings->hr_timer.addr,
2442 ts_settings->hr_timer.mask, val);
2443 if (err < 0)
2444 return err;
2445 }
2446
2447 /* enable ts queueing in FIFO if necessary */
2448 if (ts_settings->fifo_en.addr) {
2449 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
2450 err = regmap_update_bits(hw->regmap,
2451 ts_settings->fifo_en.addr,
2452 ts_settings->fifo_en.mask, val);
2453 if (err < 0)
2454 return err;
2455 }
2456
2457 /* calibrate timestamp sensitivity */
2458 hw->ts_gain = ts_settings->ts_sensitivity;
2459 if (ts_settings->freq_fine) {
2460 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
2461 if (err < 0)
2462 return err;
2463
2464 hw->ts_gain -= ((s8)val * ts_settings->ts_trim_coeff) / 1000;
2465 }
2466
2467 return 0;
2468 }
2469
st_lsm6dsx_reset_device(struct st_lsm6dsx_hw * hw)2470 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
2471 {
2472 const struct st_lsm6dsx_reg *reg;
2473 int err;
2474
2475 /*
2476 * flush hw FIFO before device reset in order to avoid
2477 * possible races on interrupt line 1. If the first interrupt
2478 * line is asserted during hw reset the device will work in
2479 * I3C-only mode (if it is supported)
2480 */
2481 err = st_lsm6dsx_flush_fifo(hw);
2482 if (err < 0 && err != -ENOTSUPP)
2483 return err;
2484
2485 /* device sw reset */
2486 reg = &hw->settings->reset;
2487 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2488 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2489 if (err < 0)
2490 return err;
2491
2492 msleep(50);
2493
2494 /* reload trimming parameter */
2495 reg = &hw->settings->boot;
2496 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2497 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2498 if (err < 0)
2499 return err;
2500
2501 msleep(50);
2502
2503 return 0;
2504 }
2505
st_lsm6dsx_init_device(struct st_lsm6dsx_hw * hw)2506 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
2507 {
2508 const struct st_lsm6dsx_reg *reg;
2509 int err;
2510
2511 err = st_lsm6dsx_reset_device(hw);
2512 if (err < 0)
2513 return err;
2514
2515 /* enable Block Data Update */
2516 reg = &hw->settings->bdu;
2517 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2518 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2519 if (err < 0)
2520 return err;
2521
2522 /* enable FIFO watermak interrupt */
2523 err = st_lsm6dsx_get_drdy_reg(hw, ®);
2524 if (err < 0)
2525 return err;
2526
2527 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2528 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2529 if (err < 0)
2530 return err;
2531
2532 /* enable Latched interrupts for device events */
2533 if (hw->settings->irq_config.lir.addr) {
2534 reg = &hw->settings->irq_config.lir;
2535 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2536 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2537 if (err < 0)
2538 return err;
2539
2540 /* enable clear on read for latched interrupts */
2541 if (hw->settings->irq_config.clear_on_read.addr) {
2542 reg = &hw->settings->irq_config.clear_on_read;
2543 err = regmap_update_bits(hw->regmap,
2544 reg->addr, reg->mask,
2545 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2546 if (err < 0)
2547 return err;
2548 }
2549 }
2550
2551 /* enable drdy-mas if available */
2552 if (hw->settings->drdy_mask.addr) {
2553 reg = &hw->settings->drdy_mask;
2554 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2555 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2556 if (err < 0)
2557 return err;
2558 }
2559
2560 err = st_lsm6dsx_init_shub(hw);
2561 if (err < 0)
2562 return err;
2563
2564 return st_lsm6dsx_init_hw_timer(hw);
2565 }
2566
st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_sensor_id id,const char * name)2567 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
2568 enum st_lsm6dsx_sensor_id id,
2569 const char *name)
2570 {
2571 struct st_lsm6dsx_sensor *sensor;
2572 struct iio_dev *iio_dev;
2573
2574 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
2575 if (!iio_dev)
2576 return NULL;
2577
2578 iio_dev->modes = INDIO_DIRECT_MODE;
2579 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2580 iio_dev->channels = hw->settings->channels[id].chan;
2581 iio_dev->num_channels = hw->settings->channels[id].len;
2582
2583 sensor = iio_priv(iio_dev);
2584 sensor->id = id;
2585 sensor->hw = hw;
2586 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2587 sensor->hwfifo_odr_mHz = sensor->odr;
2588 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2589 sensor->watermark = 1;
2590
2591 switch (id) {
2592 case ST_LSM6DSX_ID_ACC:
2593 iio_dev->info = &st_lsm6dsx_acc_info;
2594 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2595 name);
2596 break;
2597 case ST_LSM6DSX_ID_GYRO:
2598 iio_dev->info = &st_lsm6dsx_gyro_info;
2599 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2600 name);
2601 break;
2602 default:
2603 return NULL;
2604 }
2605 iio_dev->name = sensor->name;
2606
2607 return iio_dev;
2608 }
2609
2610 static bool
st_lsm6dsx_report_events(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_event_id id,enum iio_event_type type,enum iio_event_direction dir)2611 st_lsm6dsx_report_events(struct st_lsm6dsx_hw *hw, enum st_lsm6dsx_event_id id,
2612 enum iio_event_type type, enum iio_event_direction dir)
2613 {
2614 const struct st_lsm6dsx_event_settings *event_settings;
2615 const struct st_lsm6dsx_event_src *src;
2616 int err, data;
2617 s64 timestamp;
2618
2619 if (!hw->enable_event[id])
2620 return false;
2621
2622 event_settings = &hw->settings->event_settings;
2623 src = &event_settings->sources[id];
2624 err = st_lsm6dsx_read_locked(hw, src->status.addr,
2625 &data, sizeof(data));
2626 if (err < 0)
2627 return false;
2628
2629 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2630 if ((data & src->status_z_mask) &&
2631 (hw->enable_event[id] & BIT(IIO_MOD_Z)))
2632 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2633 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2634 0,
2635 IIO_MOD_Z,
2636 type,
2637 dir),
2638 timestamp);
2639
2640 if ((data & src->status_y_mask) &&
2641 (hw->enable_event[id] & BIT(IIO_MOD_Y)))
2642 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2643 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2644 0,
2645 IIO_MOD_Y,
2646 type,
2647 dir),
2648 timestamp);
2649
2650 if ((data & src->status_x_mask) &&
2651 (hw->enable_event[id] & BIT(IIO_MOD_X)))
2652 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2653 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2654 0,
2655 IIO_MOD_X,
2656 type,
2657 dir),
2658 timestamp);
2659
2660 return data & src->status.mask;
2661 }
2662
st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw * hw)2663 static bool st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2664 {
2665 bool events_found;
2666
2667 events_found = st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_WAKEUP,
2668 IIO_EV_TYPE_THRESH,
2669 IIO_EV_DIR_EITHER);
2670 events_found |= st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_TAP,
2671 IIO_EV_TYPE_GESTURE,
2672 IIO_EV_DIR_SINGLETAP);
2673
2674 return events_found;
2675 }
2676
st_lsm6dsx_handler_thread(int irq,void * private)2677 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2678 {
2679 struct st_lsm6dsx_hw *hw = private;
2680 int fifo_len = 0, len;
2681 bool event;
2682
2683 event = st_lsm6dsx_report_motion_event(hw);
2684
2685 if (!hw->settings->fifo_ops.read_fifo)
2686 return event ? IRQ_HANDLED : IRQ_NONE;
2687
2688 /*
2689 * If we are using edge IRQs, new samples can arrive while
2690 * processing current interrupt since there are no hw
2691 * guarantees the irq line stays "low" long enough to properly
2692 * detect the new interrupt. In this case the new sample will
2693 * be missed.
2694 * Polling FIFO status register allow us to read new
2695 * samples even if the interrupt arrives while processing
2696 * previous data and the timeslot where the line is "low" is
2697 * too short to be properly detected.
2698 */
2699 do {
2700 mutex_lock(&hw->fifo_lock);
2701 len = hw->settings->fifo_ops.read_fifo(hw);
2702 mutex_unlock(&hw->fifo_lock);
2703
2704 if (len > 0)
2705 fifo_len += len;
2706 } while (len > 0);
2707
2708 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2709 }
2710
st_lsm6dsx_sw_trigger_handler_thread(int irq,void * private)2711 static irqreturn_t st_lsm6dsx_sw_trigger_handler_thread(int irq,
2712 void *private)
2713 {
2714 struct iio_poll_func *pf = private;
2715 struct iio_dev *iio_dev = pf->indio_dev;
2716 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2717 struct st_lsm6dsx_hw *hw = sensor->hw;
2718
2719 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2720 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2721 sensor->id == ST_LSM6DSX_ID_EXT2)
2722 st_lsm6dsx_shub_read_output(hw,
2723 (u8 *)hw->scan[sensor->id].channels,
2724 sizeof(hw->scan[sensor->id].channels));
2725 else
2726 st_lsm6dsx_read_locked(hw, iio_dev->channels[0].address,
2727 hw->scan[sensor->id].channels,
2728 sizeof(hw->scan[sensor->id].channels));
2729
2730 iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan[sensor->id],
2731 iio_get_time_ns(iio_dev));
2732 iio_trigger_notify_done(iio_dev->trig);
2733
2734 return IRQ_HANDLED;
2735 }
2736
st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw * hw)2737 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2738 {
2739 const struct st_lsm6dsx_reg *reg;
2740 struct device *dev = hw->dev;
2741 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2742 unsigned long irq_type;
2743 bool irq_active_low;
2744 int err;
2745
2746 irq_type = irq_get_trigger_type(hw->irq);
2747 switch (irq_type) {
2748 case IRQF_TRIGGER_HIGH:
2749 case IRQF_TRIGGER_RISING:
2750 irq_active_low = false;
2751 break;
2752 case IRQF_TRIGGER_LOW:
2753 case IRQF_TRIGGER_FALLING:
2754 irq_active_low = true;
2755 break;
2756 default:
2757 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2758 return -EINVAL;
2759 }
2760
2761 reg = &hw->settings->irq_config.hla;
2762 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2763 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2764 reg->mask));
2765 if (err < 0)
2766 return err;
2767
2768 if (device_property_read_bool(dev, "drive-open-drain") ||
2769 (pdata && pdata->open_drain)) {
2770 reg = &hw->settings->irq_config.od;
2771 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2772 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2773 if (err < 0)
2774 return err;
2775
2776 irq_type |= IRQF_SHARED;
2777 }
2778
2779 err = devm_request_threaded_irq(hw->dev, hw->irq,
2780 NULL,
2781 st_lsm6dsx_handler_thread,
2782 irq_type | IRQF_ONESHOT,
2783 "lsm6dsx", hw);
2784 if (err) {
2785 dev_err(hw->dev, "failed to request trigger irq %d\n",
2786 hw->irq);
2787 return err;
2788 }
2789
2790 return 0;
2791 }
2792
st_lsm6dsx_sw_buffer_preenable(struct iio_dev * iio_dev)2793 static int st_lsm6dsx_sw_buffer_preenable(struct iio_dev *iio_dev)
2794 {
2795 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2796
2797 return st_lsm6dsx_device_set_enable(sensor, true);
2798 }
2799
st_lsm6dsx_sw_buffer_postdisable(struct iio_dev * iio_dev)2800 static int st_lsm6dsx_sw_buffer_postdisable(struct iio_dev *iio_dev)
2801 {
2802 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2803
2804 return st_lsm6dsx_device_set_enable(sensor, false);
2805 }
2806
2807 static const struct iio_buffer_setup_ops st_lsm6dsx_sw_buffer_ops = {
2808 .preenable = st_lsm6dsx_sw_buffer_preenable,
2809 .postdisable = st_lsm6dsx_sw_buffer_postdisable,
2810 };
2811
st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw * hw)2812 static int st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw *hw)
2813 {
2814 int i;
2815
2816 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2817 int err;
2818
2819 if (!hw->iio_devs[i])
2820 continue;
2821
2822 err = devm_iio_triggered_buffer_setup(hw->dev,
2823 hw->iio_devs[i], NULL,
2824 st_lsm6dsx_sw_trigger_handler_thread,
2825 &st_lsm6dsx_sw_buffer_ops);
2826 if (err)
2827 return err;
2828 }
2829
2830 return 0;
2831 }
2832
st_lsm6dsx_init_regulators(struct device * dev)2833 static int st_lsm6dsx_init_regulators(struct device *dev)
2834 {
2835 /* vdd-vddio power regulators */
2836 static const char * const regulators[] = { "vdd", "vddio" };
2837 int err;
2838
2839 err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
2840 regulators);
2841 if (err)
2842 return dev_err_probe(dev, err, "failed to enable regulators\n");
2843
2844 msleep(50);
2845
2846 return 0;
2847 }
2848
st_lsm6dsx_probe(struct device * dev,int irq,int hw_id,struct regmap * regmap)2849 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2850 struct regmap *regmap)
2851 {
2852 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2853 const struct st_lsm6dsx_shub_settings *hub_settings;
2854 struct st_lsm6dsx_hw *hw;
2855 const char *name = NULL;
2856 int i, err;
2857
2858 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2859 if (!hw)
2860 return -ENOMEM;
2861
2862 dev_set_drvdata(dev, hw);
2863
2864 mutex_init(&hw->fifo_lock);
2865 mutex_init(&hw->conf_lock);
2866 mutex_init(&hw->page_lock);
2867
2868 err = st_lsm6dsx_init_regulators(dev);
2869 if (err)
2870 return err;
2871
2872 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2873 if (!hw->buff)
2874 return -ENOMEM;
2875
2876 hw->dev = dev;
2877 hw->irq = irq;
2878 hw->regmap = regmap;
2879
2880 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2881 if (err < 0)
2882 return err;
2883
2884 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2885 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2886 if (!hw->iio_devs[i])
2887 return -ENOMEM;
2888 }
2889
2890 err = st_lsm6dsx_init_device(hw);
2891 if (err < 0)
2892 return err;
2893
2894 hub_settings = &hw->settings->shub_settings;
2895 if (hub_settings->master_en.addr &&
2896 !device_property_read_bool(dev, "st,disable-sensor-hub")) {
2897 err = st_lsm6dsx_shub_probe(hw, name);
2898 if (err < 0)
2899 return err;
2900 }
2901
2902 if (hw->irq > 0) {
2903 err = st_lsm6dsx_irq_setup(hw);
2904 if (err < 0)
2905 return err;
2906
2907 err = st_lsm6dsx_fifo_setup(hw);
2908 if (err < 0)
2909 return err;
2910 }
2911
2912 if (!hw->irq || !hw->settings->fifo_ops.read_fifo) {
2913 /*
2914 * Rely on sw triggers (e.g. hr-timers) if irq pin is not
2915 * connected of if the device does not support HW FIFO
2916 */
2917 err = st_lsm6dsx_sw_buffers_setup(hw);
2918 if (err)
2919 return err;
2920 }
2921
2922 if (!iio_read_acpi_mount_matrix(hw->dev, &hw->orientation, "ROTM")) {
2923 err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2924 if (err)
2925 return err;
2926 }
2927
2928 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2929 if (!hw->iio_devs[i])
2930 continue;
2931
2932 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2933 if (err)
2934 return err;
2935 }
2936
2937 if (device_property_read_bool(dev, "wakeup-source") ||
2938 (pdata && pdata->wakeup_source)) {
2939 err = devm_device_init_wakeup(dev);
2940 if (err)
2941 return dev_err_probe(dev, err, "Failed to init wakeup\n");
2942 }
2943
2944 return 0;
2945 }
2946 EXPORT_SYMBOL_NS(st_lsm6dsx_probe, "IIO_LSM6DSX");
2947
st_lsm6dsx_suspend(struct device * dev)2948 static int st_lsm6dsx_suspend(struct device *dev)
2949 {
2950 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2951 struct st_lsm6dsx_sensor *sensor;
2952 int i, err = 0;
2953
2954 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2955 if (!hw->iio_devs[i])
2956 continue;
2957
2958 sensor = iio_priv(hw->iio_devs[i]);
2959 if (!(hw->enable_mask & BIT(sensor->id)))
2960 continue;
2961
2962 if (device_may_wakeup(dev) &&
2963 st_lsm6dsx_check_events(sensor)) {
2964 /* Enable wake from IRQ */
2965 enable_irq_wake(hw->irq);
2966 continue;
2967 }
2968
2969 err = st_lsm6dsx_device_set_enable(sensor, false);
2970 if (err < 0)
2971 return err;
2972
2973 hw->suspend_mask |= BIT(sensor->id);
2974 }
2975
2976 if (hw->fifo_mask)
2977 err = st_lsm6dsx_flush_fifo(hw);
2978
2979 return err;
2980 }
2981
st_lsm6dsx_resume(struct device * dev)2982 static int st_lsm6dsx_resume(struct device *dev)
2983 {
2984 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2985 struct st_lsm6dsx_sensor *sensor;
2986 int i, err = 0;
2987
2988 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2989 if (!hw->iio_devs[i])
2990 continue;
2991
2992 sensor = iio_priv(hw->iio_devs[i]);
2993 if (device_may_wakeup(dev) &&
2994 st_lsm6dsx_check_events(sensor))
2995 disable_irq_wake(hw->irq);
2996
2997 if (!(hw->suspend_mask & BIT(sensor->id)))
2998 continue;
2999
3000 err = st_lsm6dsx_device_set_enable(sensor, true);
3001 if (err < 0)
3002 return err;
3003
3004 hw->suspend_mask &= ~BIT(sensor->id);
3005 }
3006
3007 if (hw->fifo_mask)
3008 err = st_lsm6dsx_resume_fifo(hw);
3009
3010 return err;
3011 }
3012
3013 EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend,
3014 st_lsm6dsx_resume, IIO_LSM6DSX);
3015
3016 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
3017 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
3018 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
3019 MODULE_LICENSE("GPL v2");
3020