1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright(C) 2015 Linaro Limited. All rights reserved. 4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> 5 */ 6 7 #include <api/fs/fs.h> 8 #include <linux/bits.h> 9 #include <linux/bitops.h> 10 #include <linux/compiler.h> 11 #include <linux/coresight-pmu.h> 12 #include <linux/kernel.h> 13 #include <linux/log2.h> 14 #include <linux/string.h> 15 #include <linux/types.h> 16 #include <linux/zalloc.h> 17 18 #include "cs-etm.h" 19 #include "../../../util/debug.h" 20 #include "../../../util/record.h" 21 #include "../../../util/auxtrace.h" 22 #include "../../../util/cpumap.h" 23 #include "../../../util/event.h" 24 #include "../../../util/evlist.h" 25 #include "../../../util/evsel.h" 26 #include "../../../util/perf_api_probe.h" 27 #include "../../../util/evsel_config.h" 28 #include "../../../util/pmus.h" 29 #include "../../../util/cs-etm.h" 30 #include <internal/lib.h> // page_size 31 #include "../../../util/session.h" 32 33 #include <errno.h> 34 #include <stdlib.h> 35 #include <sys/stat.h> 36 37 struct cs_etm_recording { 38 struct auxtrace_record itr; 39 struct perf_pmu *cs_etm_pmu; 40 struct evlist *evlist; 41 bool snapshot_mode; 42 size_t snapshot_size; 43 }; 44 45 static const char *metadata_etmv3_ro[CS_ETM_PRIV_MAX] = { 46 [CS_ETM_ETMCCER] = "mgmt/etmccer", 47 [CS_ETM_ETMIDR] = "mgmt/etmidr", 48 }; 49 50 static const char * const metadata_etmv4_ro[] = { 51 [CS_ETMV4_TRCIDR0] = "trcidr/trcidr0", 52 [CS_ETMV4_TRCIDR1] = "trcidr/trcidr1", 53 [CS_ETMV4_TRCIDR2] = "trcidr/trcidr2", 54 [CS_ETMV4_TRCIDR8] = "trcidr/trcidr8", 55 [CS_ETMV4_TRCAUTHSTATUS] = "mgmt/trcauthstatus", 56 [CS_ETMV4_TS_SOURCE] = "ts_source", 57 }; 58 59 static const char * const metadata_ete_ro[] = { 60 [CS_ETE_TRCIDR0] = "trcidr/trcidr0", 61 [CS_ETE_TRCIDR1] = "trcidr/trcidr1", 62 [CS_ETE_TRCIDR2] = "trcidr/trcidr2", 63 [CS_ETE_TRCIDR8] = "trcidr/trcidr8", 64 [CS_ETE_TRCAUTHSTATUS] = "mgmt/trcauthstatus", 65 [CS_ETE_TRCDEVARCH] = "mgmt/trcdevarch", 66 [CS_ETE_TS_SOURCE] = "ts_source", 67 }; 68 69 enum cs_etm_version { CS_NOT_PRESENT, CS_ETMV3, CS_ETMV4, CS_ETE }; 70 71 static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu); 72 static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val); 73 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path); 74 75 static enum cs_etm_version cs_etm_get_version(struct perf_pmu *cs_etm_pmu, 76 struct perf_cpu cpu) 77 { 78 if (cs_etm_is_ete(cs_etm_pmu, cpu)) 79 return CS_ETE; 80 else if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0])) 81 return CS_ETMV4; 82 else if (cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv3_ro[CS_ETM_ETMCCER])) 83 return CS_ETMV3; 84 85 return CS_NOT_PRESENT; 86 } 87 88 static int cs_etm_validate_context_id(struct perf_pmu *cs_etm_pmu, struct evsel *evsel, 89 struct perf_cpu cpu) 90 { 91 int err; 92 u64 ctxt, ctxt1, ctxt2; 93 __u64 trcidr2; 94 95 evsel__get_config_val(evsel, "contextid", &ctxt); 96 evsel__get_config_val(evsel, "contextid1", &ctxt1); 97 evsel__get_config_val(evsel, "contextid2", &ctxt2); 98 99 if (!ctxt && !ctxt1 && !ctxt2) 100 return 0; 101 102 /* Not supported in etmv3 */ 103 if (cs_etm_get_version(cs_etm_pmu, cpu) == CS_ETMV3) { 104 pr_err("%s: contextid not supported in ETMv3, disable with %s/contextid=0/\n", 105 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 106 return -EINVAL; 107 } 108 109 /* Get a handle on TRCIDR2 */ 110 err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2], &trcidr2); 111 if (err) 112 return err; 113 114 if (ctxt1) { 115 /* 116 * TRCIDR2.CIDSIZE, bit [9-5], indicates whether contextID 117 * tracing is supported: 118 * 0b00000 Context ID tracing is not supported. 119 * 0b00100 Maximum of 32-bit Context ID size. 120 * All other values are reserved. 121 */ 122 if (BMVAL(trcidr2, 5, 9) != 0x4) { 123 pr_err("%s: CONTEXTIDR_EL1 isn't supported, disable with %s/contextid1=0/\n", 124 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 125 return -EINVAL; 126 } 127 } 128 129 if (ctxt2) { 130 /* 131 * TRCIDR2.VMIDOPT[30:29] != 0 and 132 * TRCIDR2.VMIDSIZE[14:10] == 0b00100 (32bit virtual contextid) 133 * We can't support CONTEXTIDR in VMID if the size of the 134 * virtual context id is < 32bit. 135 * Any value of VMIDSIZE >= 4 (i.e, > 32bit) is fine for us. 136 */ 137 if (!BMVAL(trcidr2, 29, 30) || BMVAL(trcidr2, 10, 14) < 4) { 138 pr_err("%s: CONTEXTIDR_EL2 isn't supported, disable with %s/contextid2=0/\n", 139 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 140 return -EINVAL; 141 } 142 } 143 144 return 0; 145 } 146 147 static int cs_etm_validate_timestamp(struct perf_pmu *cs_etm_pmu, struct evsel *evsel, 148 struct perf_cpu cpu) 149 { 150 int err; 151 u64 val; 152 __u64 trcidr0; 153 154 evsel__get_config_val(evsel, "timestamp", &val); 155 if (!val) 156 return 0; 157 158 if (cs_etm_get_version(cs_etm_pmu, cpu) == CS_ETMV3) { 159 pr_err("%s: timestamp not supported in ETMv3, disable with %s/timestamp=0/\n", 160 CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); 161 return -EINVAL; 162 } 163 164 /* Get a handle on TRCIRD0 */ 165 err = cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0], &trcidr0); 166 if (err) 167 return err; 168 169 /* 170 * TRCIDR0.TSSIZE, bit [28-24], indicates whether global timestamping 171 * is supported: 172 * 0b00000 Global timestamping is not implemented 173 * 0b00110 Implementation supports a maximum timestamp of 48bits. 174 * 0b01000 Implementation supports a maximum timestamp of 64bits. 175 */ 176 trcidr0 &= GENMASK(28, 24); 177 if (!trcidr0) 178 return -EINVAL; 179 180 return 0; 181 } 182 183 static struct perf_pmu *cs_etm_get_pmu(struct auxtrace_record *itr) 184 { 185 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 186 187 return ptr->cs_etm_pmu; 188 } 189 190 /* 191 * Check whether the requested timestamp and contextid options should be 192 * available on all requested CPUs and if not, tell the user how to override. 193 * The kernel will silently disable any unavailable options so a warning here 194 * first is better. In theory the kernel could still disable the option for 195 * some other reason so this is best effort only. 196 */ 197 static int cs_etm_validate_config(struct perf_pmu *cs_etm_pmu, 198 struct evsel *evsel) 199 { 200 unsigned int idx; 201 int err = 0; 202 struct perf_cpu_map *event_cpus = evsel->evlist->core.user_requested_cpus; 203 struct perf_cpu_map *intersect_cpus; 204 struct perf_cpu cpu; 205 206 /* 207 * Set option of each CPU we have. In per-cpu case, do the validation 208 * for CPUs to work with. In per-thread case, the CPU map has the "any" 209 * CPU value. Since the traced program can run on any CPUs in this case, 210 * thus don't skip validation. 211 */ 212 if (!perf_cpu_map__has_any_cpu(event_cpus)) { 213 struct perf_cpu_map *online_cpus = perf_cpu_map__new_online_cpus(); 214 215 intersect_cpus = perf_cpu_map__intersect(event_cpus, online_cpus); 216 perf_cpu_map__put(online_cpus); 217 } else { 218 intersect_cpus = perf_cpu_map__new_online_cpus(); 219 } 220 221 perf_cpu_map__for_each_cpu_skip_any(cpu, idx, intersect_cpus) { 222 if (cs_etm_get_version(cs_etm_pmu, cpu) == CS_NOT_PRESENT) { 223 pr_err("%s: Not found on CPU %d. Check hardware and firmware support and that all Coresight drivers are loaded\n", 224 CORESIGHT_ETM_PMU_NAME, cpu.cpu); 225 return -EINVAL; 226 } 227 err = cs_etm_validate_context_id(cs_etm_pmu, evsel, cpu); 228 if (err) 229 break; 230 231 err = cs_etm_validate_timestamp(cs_etm_pmu, evsel, cpu); 232 if (err) 233 break; 234 } 235 236 perf_cpu_map__put(intersect_cpus); 237 return err; 238 } 239 240 static int cs_etm_parse_snapshot_options(struct auxtrace_record *itr, 241 struct record_opts *opts, 242 const char *str) 243 { 244 struct cs_etm_recording *ptr = 245 container_of(itr, struct cs_etm_recording, itr); 246 unsigned long long snapshot_size = 0; 247 char *endptr; 248 249 if (str) { 250 snapshot_size = strtoull(str, &endptr, 0); 251 if (*endptr || snapshot_size > SIZE_MAX) 252 return -1; 253 } 254 255 opts->auxtrace_snapshot_mode = true; 256 opts->auxtrace_snapshot_size = snapshot_size; 257 ptr->snapshot_size = snapshot_size; 258 259 return 0; 260 } 261 262 /* 263 * If the sink name format "@sink_name" is used, lookup the sink by name to convert to 264 * "sinkid=sink_hash" format. If the user has already manually provided a hash then 265 * "sinkid" isn't overwritten. If neither are provided then the driver will pick the best 266 * sink. 267 */ 268 static int cs_etm_set_sink_attr(struct perf_pmu *pmu, 269 struct evsel *evsel) 270 { 271 char msg[BUFSIZ], path[PATH_MAX], *sink; 272 struct evsel_config_term *term; 273 u32 hash; 274 int ret; 275 276 list_for_each_entry(term, &evsel->config_terms, list) { 277 if (term->type != EVSEL__CONFIG_TERM_DRV_CFG) 278 continue; 279 280 sink = term->val.str; 281 snprintf(path, PATH_MAX, "sinks/%s", sink); 282 283 ret = perf_pmu__scan_file(pmu, path, "%x", &hash); 284 if (ret != 1) { 285 if (errno == ENOENT) 286 pr_err("Couldn't find sink \"%s\" on event %s\n" 287 "Missing kernel or device support?\n\n" 288 "Hint: An appropriate sink will be picked automatically if one isn't specified.\n", 289 sink, evsel__name(evsel)); 290 else 291 pr_err("Failed to set sink \"%s\" on event %s with %d (%s)\n", 292 sink, evsel__name(evsel), errno, 293 str_error_r(errno, msg, sizeof(msg))); 294 return ret; 295 } 296 297 evsel__set_config_if_unset(evsel, "sinkid", hash); 298 return 0; 299 } 300 301 return 0; 302 } 303 304 static struct evsel *cs_etm_get_evsel(struct evlist *evlist, 305 struct perf_pmu *cs_etm_pmu) 306 { 307 struct evsel *evsel; 308 309 evlist__for_each_entry(evlist, evsel) { 310 if (evsel->core.attr.type == cs_etm_pmu->type) 311 return evsel; 312 } 313 314 return NULL; 315 } 316 317 static int cs_etm_recording_options(struct auxtrace_record *itr, 318 struct evlist *evlist, 319 struct record_opts *opts) 320 { 321 int ret; 322 struct cs_etm_recording *ptr = 323 container_of(itr, struct cs_etm_recording, itr); 324 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 325 struct evsel *evsel, *cs_etm_evsel = NULL; 326 struct perf_cpu_map *cpus = evlist->core.user_requested_cpus; 327 bool privileged = perf_event_paranoid_check(-1); 328 int err = 0; 329 330 evlist__for_each_entry(evlist, evsel) { 331 if (evsel->core.attr.type == cs_etm_pmu->type) { 332 if (cs_etm_evsel) { 333 pr_err("There may be only one %s event\n", 334 CORESIGHT_ETM_PMU_NAME); 335 return -EINVAL; 336 } 337 cs_etm_evsel = evsel; 338 } 339 } 340 341 /* no need to continue if at least one event of interest was found */ 342 if (!cs_etm_evsel) 343 return 0; 344 345 ptr->evlist = evlist; 346 ptr->snapshot_mode = opts->auxtrace_snapshot_mode; 347 348 if (!record_opts__no_switch_events(opts) && 349 perf_can_record_switch_events()) 350 opts->record_switch_events = true; 351 352 cs_etm_evsel->needs_auxtrace_mmap = true; 353 opts->full_auxtrace = true; 354 355 ret = cs_etm_set_sink_attr(cs_etm_pmu, cs_etm_evsel); 356 if (ret) 357 return ret; 358 359 if (opts->use_clockid) { 360 pr_err("Cannot use clockid (-k option) with %s\n", 361 CORESIGHT_ETM_PMU_NAME); 362 return -EINVAL; 363 } 364 365 /* we are in snapshot mode */ 366 if (opts->auxtrace_snapshot_mode) { 367 /* 368 * No size were given to '-S' or '-m,', so go with 369 * the default 370 */ 371 if (!opts->auxtrace_snapshot_size && 372 !opts->auxtrace_mmap_pages) { 373 if (privileged) { 374 opts->auxtrace_mmap_pages = MiB(4) / page_size; 375 } else { 376 opts->auxtrace_mmap_pages = 377 KiB(128) / page_size; 378 if (opts->mmap_pages == UINT_MAX) 379 opts->mmap_pages = KiB(256) / page_size; 380 } 381 } else if (!opts->auxtrace_mmap_pages && !privileged && 382 opts->mmap_pages == UINT_MAX) { 383 opts->mmap_pages = KiB(256) / page_size; 384 } 385 386 /* 387 * '-m,xyz' was specified but no snapshot size, so make the 388 * snapshot size as big as the auxtrace mmap area. 389 */ 390 if (!opts->auxtrace_snapshot_size) { 391 opts->auxtrace_snapshot_size = 392 opts->auxtrace_mmap_pages * (size_t)page_size; 393 } 394 395 /* 396 * -Sxyz was specified but no auxtrace mmap area, so make the 397 * auxtrace mmap area big enough to fit the requested snapshot 398 * size. 399 */ 400 if (!opts->auxtrace_mmap_pages) { 401 size_t sz = opts->auxtrace_snapshot_size; 402 403 sz = round_up(sz, page_size) / page_size; 404 opts->auxtrace_mmap_pages = roundup_pow_of_two(sz); 405 } 406 407 /* Snapshot size can't be bigger than the auxtrace area */ 408 if (opts->auxtrace_snapshot_size > 409 opts->auxtrace_mmap_pages * (size_t)page_size) { 410 pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n", 411 opts->auxtrace_snapshot_size, 412 opts->auxtrace_mmap_pages * (size_t)page_size); 413 return -EINVAL; 414 } 415 416 /* Something went wrong somewhere - this shouldn't happen */ 417 if (!opts->auxtrace_snapshot_size || 418 !opts->auxtrace_mmap_pages) { 419 pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n"); 420 return -EINVAL; 421 } 422 } 423 424 /* Buffer sizes weren't specified with '-m,xyz' so give some defaults */ 425 if (!opts->auxtrace_mmap_pages) { 426 if (privileged) { 427 opts->auxtrace_mmap_pages = MiB(4) / page_size; 428 } else { 429 opts->auxtrace_mmap_pages = KiB(128) / page_size; 430 if (opts->mmap_pages == UINT_MAX) 431 opts->mmap_pages = KiB(256) / page_size; 432 } 433 } 434 435 if (opts->auxtrace_snapshot_mode) 436 pr_debug2("%s snapshot size: %zu\n", CORESIGHT_ETM_PMU_NAME, 437 opts->auxtrace_snapshot_size); 438 439 /* 440 * To obtain the auxtrace buffer file descriptor, the auxtrace 441 * event must come first. 442 */ 443 evlist__to_front(evlist, cs_etm_evsel); 444 445 /* 446 * get the CPU on the sample - need it to associate trace ID in the 447 * AUX_OUTPUT_HW_ID event, and the AUX event for per-cpu mmaps. 448 */ 449 evsel__set_sample_bit(cs_etm_evsel, CPU); 450 451 /* 452 * Also the case of per-cpu mmaps, need the contextID in order to be notified 453 * when a context switch happened. 454 */ 455 if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) { 456 evsel__set_config_if_unset(cs_etm_evsel, "timestamp", 1); 457 evsel__set_config_if_unset(cs_etm_evsel, "contextid", 1); 458 } 459 460 /* 461 * When the option '--timestamp' or '-T' is enabled, the PERF_SAMPLE_TIME 462 * bit is set for all events. In this case, always enable Arm CoreSight 463 * timestamp tracing. 464 */ 465 if (opts->sample_time_set) 466 evsel__set_config_if_unset(cs_etm_evsel, "timestamp", 1); 467 468 /* Add dummy event to keep tracking */ 469 err = parse_event(evlist, "dummy:u"); 470 if (err) 471 goto out; 472 evsel = evlist__last(evlist); 473 evlist__set_tracking_event(evlist, evsel); 474 evsel->core.attr.freq = 0; 475 evsel->core.attr.sample_period = 1; 476 477 /* In per-cpu case, always need the time of mmap events etc */ 478 if (!perf_cpu_map__is_any_cpu_or_is_empty(cpus)) 479 evsel__set_sample_bit(evsel, TIME); 480 481 err = cs_etm_validate_config(cs_etm_pmu, cs_etm_evsel); 482 out: 483 return err; 484 } 485 486 static u64 cs_etm_synth_etmcr(struct auxtrace_record *itr) 487 { 488 struct cs_etm_recording *ptr = 489 container_of(itr, struct cs_etm_recording, itr); 490 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 491 struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, cs_etm_pmu); 492 u64 etmcr = 0; 493 u64 val; 494 495 if (!evsel) 496 return 0; 497 498 /* 499 * Synthesize what the kernel programmed into ETMCR based on 500 * what options the event was opened with. This doesn't have to be 501 * complete or 100% accurate, not all bits used by OpenCSD anyway. 502 */ 503 if (!evsel__get_config_val(evsel, "cycacc", &val) && val) 504 etmcr |= ETMCR_CYC_ACC; 505 if (!evsel__get_config_val(evsel, "timestamp", &val) && val) 506 etmcr |= ETMCR_TIMESTAMP_EN; 507 if (!evsel__get_config_val(evsel, "retstack", &val) && val) 508 etmcr |= ETMCR_RETURN_STACK; 509 510 return etmcr; 511 } 512 513 static u64 cs_etmv4_synth_trcconfigr(struct auxtrace_record *itr) 514 { 515 u64 trcconfigr = 0; 516 struct cs_etm_recording *ptr = 517 container_of(itr, struct cs_etm_recording, itr); 518 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 519 struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, cs_etm_pmu); 520 u64 val; 521 522 if (!evsel) 523 return 0; 524 525 /* 526 * Synthesize what the kernel programmed into TRCCONFIGR based on 527 * what options the event was opened with. This doesn't have to be 528 * complete or 100% accurate, not all bits used by OpenCSD anyway. 529 */ 530 if (!evsel__get_config_val(evsel, "cycacc", &val) && val) 531 trcconfigr |= TRCCONFIGR_CCI; 532 if (!evsel__get_config_val(evsel, "contextid1", &val) && val) 533 trcconfigr |= TRCCONFIGR_CID; 534 if (!evsel__get_config_val(evsel, "timestamp", &val) && val) 535 trcconfigr |= TRCCONFIGR_TS; 536 if (!evsel__get_config_val(evsel, "retstack", &val) && val) 537 trcconfigr |= TRCCONFIGR_RS; 538 if (!evsel__get_config_val(evsel, "contextid2", &val) && val) 539 trcconfigr |= TRCCONFIGR_VMID | TRCCONFIGR_VMIDOPT; 540 if (!evsel__get_config_val(evsel, "branch_broadcast", &val) && val) 541 trcconfigr |= TRCCONFIGR_BB; 542 543 return trcconfigr; 544 } 545 546 static size_t 547 cs_etm_info_priv_size(struct auxtrace_record *itr, 548 struct evlist *evlist) 549 { 550 unsigned int idx; 551 int etmv3 = 0, etmv4 = 0, ete = 0; 552 struct perf_cpu_map *event_cpus = evlist->core.user_requested_cpus; 553 struct perf_cpu_map *intersect_cpus; 554 struct perf_cpu cpu; 555 struct perf_pmu *cs_etm_pmu = cs_etm_get_pmu(itr); 556 557 if (!perf_cpu_map__has_any_cpu(event_cpus)) { 558 /* cpu map is not "any" CPU , we have specific CPUs to work with */ 559 struct perf_cpu_map *online_cpus = perf_cpu_map__new_online_cpus(); 560 561 intersect_cpus = perf_cpu_map__intersect(event_cpus, online_cpus); 562 perf_cpu_map__put(online_cpus); 563 } else { 564 /* Event can be "any" CPU so count all online CPUs. */ 565 intersect_cpus = perf_cpu_map__new_online_cpus(); 566 } 567 /* Count number of each type of ETM. Don't count if that CPU has CS_NOT_PRESENT. */ 568 perf_cpu_map__for_each_cpu_skip_any(cpu, idx, intersect_cpus) { 569 enum cs_etm_version v = cs_etm_get_version(cs_etm_pmu, cpu); 570 571 ete += v == CS_ETE; 572 etmv4 += v == CS_ETMV4; 573 etmv3 += v == CS_ETMV3; 574 } 575 perf_cpu_map__put(intersect_cpus); 576 577 return (CS_ETM_HEADER_SIZE + 578 (ete * CS_ETE_PRIV_SIZE) + 579 (etmv4 * CS_ETMV4_PRIV_SIZE) + 580 (etmv3 * CS_ETMV3_PRIV_SIZE)); 581 } 582 583 static int cs_etm_get_ro(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, __u64 *val) 584 { 585 char pmu_path[PATH_MAX]; 586 int scan; 587 588 /* Get RO metadata from sysfs */ 589 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu.cpu, path); 590 591 scan = perf_pmu__scan_file(pmu, pmu_path, "%llx", val); 592 if (scan != 1) { 593 pr_err("%s: error reading: %s\n", __func__, pmu_path); 594 return -EINVAL; 595 } 596 597 return 0; 598 } 599 600 static int cs_etm_get_ro_signed(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path, 601 __u64 *out_val) 602 { 603 char pmu_path[PATH_MAX]; 604 int scan; 605 int val = 0; 606 607 /* Get RO metadata from sysfs */ 608 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu.cpu, path); 609 610 scan = perf_pmu__scan_file(pmu, pmu_path, "%d", &val); 611 if (scan != 1) { 612 pr_err("%s: error reading: %s\n", __func__, pmu_path); 613 return -EINVAL; 614 } 615 616 *out_val = (__u64) val; 617 return 0; 618 } 619 620 static bool cs_etm_pmu_path_exists(struct perf_pmu *pmu, struct perf_cpu cpu, const char *path) 621 { 622 char pmu_path[PATH_MAX]; 623 624 /* Get RO metadata from sysfs */ 625 snprintf(pmu_path, PATH_MAX, "cpu%d/%s", cpu.cpu, path); 626 627 return perf_pmu__file_exists(pmu, pmu_path); 628 } 629 630 #define TRCDEVARCH_ARCHPART_SHIFT 0 631 #define TRCDEVARCH_ARCHPART_MASK GENMASK(11, 0) 632 #define TRCDEVARCH_ARCHPART(x) (((x) & TRCDEVARCH_ARCHPART_MASK) >> TRCDEVARCH_ARCHPART_SHIFT) 633 634 #define TRCDEVARCH_ARCHVER_SHIFT 12 635 #define TRCDEVARCH_ARCHVER_MASK GENMASK(15, 12) 636 #define TRCDEVARCH_ARCHVER(x) (((x) & TRCDEVARCH_ARCHVER_MASK) >> TRCDEVARCH_ARCHVER_SHIFT) 637 638 static bool cs_etm_is_ete(struct perf_pmu *cs_etm_pmu, struct perf_cpu cpu) 639 { 640 __u64 trcdevarch; 641 642 if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH])) 643 return false; 644 645 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH], &trcdevarch); 646 /* 647 * ETE if ARCHVER is 5 (ARCHVER is 4 for ETM) and ARCHPART is 0xA13. 648 * See ETM_DEVARCH_ETE_ARCH in coresight-etm4x.h 649 */ 650 return TRCDEVARCH_ARCHVER(trcdevarch) == 5 && TRCDEVARCH_ARCHPART(trcdevarch) == 0xA13; 651 } 652 653 static __u64 cs_etm_get_legacy_trace_id(struct perf_cpu cpu) 654 { 655 /* Wrap at 48 so that invalid trace IDs aren't saved into files. */ 656 return CORESIGHT_LEGACY_CPU_TRACE_ID(cpu.cpu % 48); 657 } 658 659 static void cs_etm_save_etmv4_header(__u64 data[], struct auxtrace_record *itr, struct perf_cpu cpu) 660 { 661 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 662 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 663 664 /* Get trace configuration register */ 665 data[CS_ETMV4_TRCCONFIGR] = cs_etmv4_synth_trcconfigr(itr); 666 /* traceID set to legacy version, in case new perf running on older system */ 667 data[CS_ETMV4_TRCTRACEIDR] = cs_etm_get_legacy_trace_id(cpu); 668 669 /* Get read-only information from sysFS */ 670 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR0], 671 &data[CS_ETMV4_TRCIDR0]); 672 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR1], 673 &data[CS_ETMV4_TRCIDR1]); 674 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR2], 675 &data[CS_ETMV4_TRCIDR2]); 676 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCIDR8], 677 &data[CS_ETMV4_TRCIDR8]); 678 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TRCAUTHSTATUS], 679 &data[CS_ETMV4_TRCAUTHSTATUS]); 680 681 /* Kernels older than 5.19 may not expose ts_source */ 682 if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TS_SOURCE]) || 683 cs_etm_get_ro_signed(cs_etm_pmu, cpu, metadata_etmv4_ro[CS_ETMV4_TS_SOURCE], 684 &data[CS_ETMV4_TS_SOURCE])) { 685 pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n", 686 cpu.cpu); 687 data[CS_ETMV4_TS_SOURCE] = (__u64) -1; 688 } 689 } 690 691 static void cs_etm_save_ete_header(__u64 data[], struct auxtrace_record *itr, struct perf_cpu cpu) 692 { 693 struct cs_etm_recording *ptr = container_of(itr, struct cs_etm_recording, itr); 694 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 695 696 /* Get trace configuration register */ 697 data[CS_ETE_TRCCONFIGR] = cs_etmv4_synth_trcconfigr(itr); 698 /* traceID set to legacy version, in case new perf running on older system */ 699 data[CS_ETE_TRCTRACEIDR] = cs_etm_get_legacy_trace_id(cpu); 700 701 /* Get read-only information from sysFS */ 702 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR0], &data[CS_ETE_TRCIDR0]); 703 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR1], &data[CS_ETE_TRCIDR1]); 704 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR2], &data[CS_ETE_TRCIDR2]); 705 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCIDR8], &data[CS_ETE_TRCIDR8]); 706 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCAUTHSTATUS], 707 &data[CS_ETE_TRCAUTHSTATUS]); 708 /* ETE uses the same registers as ETMv4 plus TRCDEVARCH */ 709 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TRCDEVARCH], 710 &data[CS_ETE_TRCDEVARCH]); 711 712 /* Kernels older than 5.19 may not expose ts_source */ 713 if (!cs_etm_pmu_path_exists(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TS_SOURCE]) || 714 cs_etm_get_ro_signed(cs_etm_pmu, cpu, metadata_ete_ro[CS_ETE_TS_SOURCE], 715 &data[CS_ETE_TS_SOURCE])) { 716 pr_debug3("[%03d] pmu file 'ts_source' not found. Fallback to safe value (-1)\n", 717 cpu.cpu); 718 data[CS_ETE_TS_SOURCE] = (__u64) -1; 719 } 720 } 721 722 static void cs_etm_get_metadata(struct perf_cpu cpu, u32 *offset, 723 struct auxtrace_record *itr, 724 struct perf_record_auxtrace_info *info) 725 { 726 u32 increment, nr_trc_params; 727 u64 magic; 728 struct perf_pmu *cs_etm_pmu = cs_etm_get_pmu(itr); 729 730 /* first see what kind of tracer this cpu is affined to */ 731 switch (cs_etm_get_version(cs_etm_pmu, cpu)) { 732 case CS_ETE: 733 magic = __perf_cs_ete_magic; 734 cs_etm_save_ete_header(&info->priv[*offset], itr, cpu); 735 736 /* How much space was used */ 737 increment = CS_ETE_PRIV_MAX; 738 nr_trc_params = CS_ETE_PRIV_MAX - CS_ETM_COMMON_BLK_MAX_V1; 739 break; 740 741 case CS_ETMV4: 742 magic = __perf_cs_etmv4_magic; 743 cs_etm_save_etmv4_header(&info->priv[*offset], itr, cpu); 744 745 /* How much space was used */ 746 increment = CS_ETMV4_PRIV_MAX; 747 nr_trc_params = CS_ETMV4_PRIV_MAX - CS_ETMV4_TRCCONFIGR; 748 break; 749 750 case CS_ETMV3: 751 magic = __perf_cs_etmv3_magic; 752 /* Get configuration register */ 753 info->priv[*offset + CS_ETM_ETMCR] = cs_etm_synth_etmcr(itr); 754 /* traceID set to legacy value in case new perf running on old system */ 755 info->priv[*offset + CS_ETM_ETMTRACEIDR] = cs_etm_get_legacy_trace_id(cpu); 756 /* Get read-only information from sysFS */ 757 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv3_ro[CS_ETM_ETMCCER], 758 &info->priv[*offset + CS_ETM_ETMCCER]); 759 cs_etm_get_ro(cs_etm_pmu, cpu, metadata_etmv3_ro[CS_ETM_ETMIDR], 760 &info->priv[*offset + CS_ETM_ETMIDR]); 761 762 /* How much space was used */ 763 increment = CS_ETM_PRIV_MAX; 764 nr_trc_params = CS_ETM_PRIV_MAX - CS_ETM_ETMCR; 765 break; 766 767 default: 768 case CS_NOT_PRESENT: 769 /* Unreachable, CPUs already validated in cs_etm_validate_config() */ 770 assert(true); 771 return; 772 } 773 774 /* Build generic header portion */ 775 info->priv[*offset + CS_ETM_MAGIC] = magic; 776 info->priv[*offset + CS_ETM_CPU] = cpu.cpu; 777 info->priv[*offset + CS_ETM_NR_TRC_PARAMS] = nr_trc_params; 778 /* Where the next CPU entry should start from */ 779 *offset += increment; 780 } 781 782 static int cs_etm_info_fill(struct auxtrace_record *itr, 783 struct perf_session *session, 784 struct perf_record_auxtrace_info *info, 785 size_t priv_size) 786 { 787 unsigned int i; 788 u32 offset; 789 u64 nr_cpu, type; 790 struct perf_cpu_map *cpu_map; 791 struct perf_cpu_map *event_cpus = session->evlist->core.user_requested_cpus; 792 struct perf_cpu_map *online_cpus = perf_cpu_map__new_online_cpus(); 793 struct cs_etm_recording *ptr = 794 container_of(itr, struct cs_etm_recording, itr); 795 struct perf_pmu *cs_etm_pmu = ptr->cs_etm_pmu; 796 struct perf_cpu cpu; 797 798 if (priv_size != cs_etm_info_priv_size(itr, session->evlist)) 799 return -EINVAL; 800 801 if (!session->evlist->core.nr_mmaps) 802 return -EINVAL; 803 804 /* If the cpu_map has the "any" CPU all online CPUs are involved */ 805 if (perf_cpu_map__has_any_cpu(event_cpus)) { 806 cpu_map = online_cpus; 807 } else { 808 /* Make sure all specified CPUs are online */ 809 perf_cpu_map__for_each_cpu(cpu, i, event_cpus) { 810 if (!perf_cpu_map__has(online_cpus, cpu)) 811 return -EINVAL; 812 } 813 814 cpu_map = event_cpus; 815 } 816 817 nr_cpu = perf_cpu_map__nr(cpu_map); 818 /* Get PMU type as dynamically assigned by the core */ 819 type = cs_etm_pmu->type; 820 821 /* First fill out the session header */ 822 info->type = PERF_AUXTRACE_CS_ETM; 823 info->priv[CS_HEADER_VERSION] = CS_HEADER_CURRENT_VERSION; 824 info->priv[CS_PMU_TYPE_CPUS] = type << 32; 825 info->priv[CS_PMU_TYPE_CPUS] |= nr_cpu; 826 info->priv[CS_ETM_SNAPSHOT] = ptr->snapshot_mode; 827 828 offset = CS_ETM_SNAPSHOT + 1; 829 830 perf_cpu_map__for_each_cpu(cpu, i, cpu_map) { 831 assert(offset < priv_size); 832 cs_etm_get_metadata(cpu, &offset, itr, info); 833 } 834 835 perf_cpu_map__put(online_cpus); 836 837 return 0; 838 } 839 840 static int cs_etm_snapshot_start(struct auxtrace_record *itr) 841 { 842 struct cs_etm_recording *ptr = 843 container_of(itr, struct cs_etm_recording, itr); 844 struct evsel *evsel = cs_etm_get_evsel(ptr->evlist, ptr->cs_etm_pmu); 845 846 if (evsel) 847 return evsel__disable(evsel); 848 849 return -EINVAL; 850 } 851 852 static int cs_etm_snapshot_finish(struct auxtrace_record *itr) 853 { 854 struct cs_etm_recording *ptr = 855 container_of(itr, struct cs_etm_recording, itr); 856 struct evsel *evsel; 857 858 evlist__for_each_entry(ptr->evlist, evsel) { 859 if (evsel->core.attr.type == ptr->cs_etm_pmu->type) 860 return evsel__enable(evsel); 861 } 862 return -EINVAL; 863 } 864 865 static u64 cs_etm_reference(struct auxtrace_record *itr __maybe_unused) 866 { 867 return (((u64) rand() << 0) & 0x00000000FFFFFFFFull) | 868 (((u64) rand() << 32) & 0xFFFFFFFF00000000ull); 869 } 870 871 static void cs_etm_recording_free(struct auxtrace_record *itr) 872 { 873 struct cs_etm_recording *ptr = 874 container_of(itr, struct cs_etm_recording, itr); 875 876 free(ptr); 877 } 878 879 struct auxtrace_record *cs_etm_record_init(int *err) 880 { 881 struct perf_pmu *cs_etm_pmu; 882 struct cs_etm_recording *ptr; 883 884 cs_etm_pmu = perf_pmus__find(CORESIGHT_ETM_PMU_NAME); 885 886 if (!cs_etm_pmu) { 887 *err = -EINVAL; 888 goto out; 889 } 890 891 ptr = zalloc(sizeof(struct cs_etm_recording)); 892 if (!ptr) { 893 *err = -ENOMEM; 894 goto out; 895 } 896 897 ptr->cs_etm_pmu = cs_etm_pmu; 898 ptr->itr.parse_snapshot_options = cs_etm_parse_snapshot_options; 899 ptr->itr.recording_options = cs_etm_recording_options; 900 ptr->itr.info_priv_size = cs_etm_info_priv_size; 901 ptr->itr.info_fill = cs_etm_info_fill; 902 ptr->itr.snapshot_start = cs_etm_snapshot_start; 903 ptr->itr.snapshot_finish = cs_etm_snapshot_finish; 904 ptr->itr.reference = cs_etm_reference; 905 ptr->itr.free = cs_etm_recording_free; 906 ptr->itr.read_finish = auxtrace_record__read_finish; 907 908 *err = 0; 909 return &ptr->itr; 910 out: 911 return NULL; 912 } 913 914 /* 915 * Set a default config to enable the user changed config tracking mechanism 916 * (CFG_CHG and evsel__set_config_if_unset()). If no default is set then user 917 * changes aren't tracked. 918 */ 919 void 920 cs_etm_get_default_config(const struct perf_pmu *pmu __maybe_unused, 921 struct perf_event_attr *attr) 922 { 923 attr->sample_period = 1; 924 } 925