1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #include <linux/amba/bus.h> 7 #include <linux/bitfield.h> 8 #include <linux/coresight.h> 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/fs.h> 12 #include <linux/io.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/platform_device.h> 17 18 #include "coresight-priv.h" 19 #include "coresight-tpda.h" 20 #include "coresight-trace-id.h" 21 #include "coresight-tpdm.h" 22 23 DEFINE_CORESIGHT_DEVLIST(tpda_devs, "tpda"); 24 25 static bool coresight_device_is_tpdm(struct coresight_device *csdev) 26 { 27 return (coresight_is_device_source(csdev)) && 28 (csdev->subtype.source_subtype == 29 CORESIGHT_DEV_SUBTYPE_SOURCE_TPDM); 30 } 31 32 static void tpda_clear_element_size(struct coresight_device *csdev) 33 { 34 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 35 36 drvdata->dsb_esize = 0; 37 drvdata->cmb_esize = 0; 38 } 39 40 static void tpda_set_element_size(struct tpda_drvdata *drvdata, u32 *val) 41 { 42 /* Clear all relevant fields */ 43 *val &= ~(TPDA_Pn_CR_DSBSIZE | TPDA_Pn_CR_CMBSIZE); 44 45 if (drvdata->dsb_esize == 64) 46 *val |= TPDA_Pn_CR_DSBSIZE; 47 else if (drvdata->dsb_esize == 32) 48 *val &= ~TPDA_Pn_CR_DSBSIZE; 49 50 if (drvdata->cmb_esize == 64) 51 *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x2); 52 else if (drvdata->cmb_esize == 32) 53 *val |= FIELD_PREP(TPDA_Pn_CR_CMBSIZE, 0x1); 54 else if (drvdata->cmb_esize == 8) 55 *val &= ~TPDA_Pn_CR_CMBSIZE; 56 } 57 58 /* 59 * Read the element size from the TPDM device. One TPDM must have at least one of the 60 * element size property. 61 * Returns 62 * 0 - The element size property is read 63 * Others - Cannot read the property of the element size 64 */ 65 static int tpdm_read_element_size(struct tpda_drvdata *drvdata, 66 struct coresight_device *csdev) 67 { 68 int rc = -EINVAL; 69 struct tpdm_drvdata *tpdm_data = dev_get_drvdata(csdev->dev.parent); 70 71 if (tpdm_has_dsb_dataset(tpdm_data)) { 72 rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), 73 "qcom,dsb-element-bits", &drvdata->dsb_esize); 74 } 75 if (tpdm_has_cmb_dataset(tpdm_data)) { 76 rc = fwnode_property_read_u32(dev_fwnode(csdev->dev.parent), 77 "qcom,cmb-element-bits", &drvdata->cmb_esize); 78 } 79 80 if (rc) 81 dev_warn_once(&csdev->dev, 82 "Failed to read TPDM Element size: %d\n", rc); 83 84 return rc; 85 } 86 87 /* 88 * Search and read element data size from the TPDM node in 89 * the devicetree. Each input port of TPDA is connected to 90 * a TPDM. Different TPDM supports different types of dataset, 91 * and some may support more than one type of dataset. 92 * Parameter "inport" is used to pass in the input port number 93 * of TPDA, and it is set to -1 in the recursize call. 94 */ 95 static int tpda_get_element_size(struct tpda_drvdata *drvdata, 96 struct coresight_device *csdev, 97 int inport) 98 { 99 int rc = 0; 100 int i; 101 struct coresight_device *in; 102 103 for (i = 0; i < csdev->pdata->nr_inconns; i++) { 104 in = csdev->pdata->in_conns[i]->src_dev; 105 if (!in) 106 continue; 107 108 /* Ignore the paths that do not match port */ 109 if (inport >= 0 && 110 csdev->pdata->in_conns[i]->dest_port != inport) 111 continue; 112 113 /* 114 * If this port has a hardcoded filter, use the source 115 * device directly. 116 */ 117 if (csdev->pdata->in_conns[i]->filter_src_fwnode) { 118 in = csdev->pdata->in_conns[i]->filter_src_dev; 119 if (!in) 120 continue; 121 } 122 123 if (coresight_device_is_tpdm(in)) { 124 if (drvdata->dsb_esize || drvdata->cmb_esize) 125 return -EEXIST; 126 rc = tpdm_read_element_size(drvdata, in); 127 if (rc) 128 return rc; 129 } else { 130 /* Recurse down the path */ 131 rc = tpda_get_element_size(drvdata, in, -1); 132 if (rc) 133 return rc; 134 } 135 } 136 137 return rc; 138 } 139 140 /* Settings pre enabling port control register */ 141 static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) 142 { 143 u32 val; 144 145 val = readl_relaxed(drvdata->base + TPDA_CR); 146 val &= ~TPDA_CR_ATID; 147 val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid); 148 writel_relaxed(val, drvdata->base + TPDA_CR); 149 } 150 151 static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) 152 { 153 u32 val; 154 int rc; 155 156 val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); 157 tpda_clear_element_size(drvdata->csdev); 158 rc = tpda_get_element_size(drvdata, drvdata->csdev, port); 159 if (!rc && (drvdata->dsb_esize || drvdata->cmb_esize)) { 160 tpda_set_element_size(drvdata, &val); 161 /* Enable the port */ 162 val |= TPDA_Pn_CR_ENA; 163 writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port)); 164 } else if (rc == -EEXIST) 165 dev_warn_once(&drvdata->csdev->dev, 166 "Detected multiple TPDMs on port %d", port); 167 else 168 dev_warn_once(&drvdata->csdev->dev, 169 "Didn't find TPDM element size"); 170 171 return rc; 172 } 173 174 static int __tpda_enable(struct tpda_drvdata *drvdata, int port) 175 { 176 int ret; 177 178 CS_UNLOCK(drvdata->base); 179 180 /* 181 * Only do pre-port enable for first port that calls enable when the 182 * device's main refcount is still 0 183 */ 184 lockdep_assert_held(&drvdata->spinlock); 185 if (!drvdata->csdev->refcnt) 186 tpda_enable_pre_port(drvdata); 187 188 ret = tpda_enable_port(drvdata, port); 189 CS_LOCK(drvdata->base); 190 191 return ret; 192 } 193 194 static int tpda_enable(struct coresight_device *csdev, 195 struct coresight_connection *in, 196 struct coresight_connection *out) 197 { 198 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 199 int ret = 0; 200 201 spin_lock(&drvdata->spinlock); 202 if (in->dest_refcnt == 0) { 203 ret = __tpda_enable(drvdata, in->dest_port); 204 if (!ret) { 205 in->dest_refcnt++; 206 csdev->refcnt++; 207 dev_dbg(drvdata->dev, "TPDA inport %d enabled.\n", in->dest_port); 208 } 209 } 210 211 spin_unlock(&drvdata->spinlock); 212 return ret; 213 } 214 215 static void __tpda_disable(struct tpda_drvdata *drvdata, int port) 216 { 217 u32 val; 218 219 CS_UNLOCK(drvdata->base); 220 221 val = readl_relaxed(drvdata->base + TPDA_Pn_CR(port)); 222 val &= ~TPDA_Pn_CR_ENA; 223 writel_relaxed(val, drvdata->base + TPDA_Pn_CR(port)); 224 225 CS_LOCK(drvdata->base); 226 } 227 228 static void tpda_disable(struct coresight_device *csdev, 229 struct coresight_connection *in, 230 struct coresight_connection *out) 231 { 232 struct tpda_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); 233 234 spin_lock(&drvdata->spinlock); 235 if (--in->dest_refcnt == 0) { 236 __tpda_disable(drvdata, in->dest_port); 237 csdev->refcnt--; 238 } 239 spin_unlock(&drvdata->spinlock); 240 241 dev_dbg(drvdata->dev, "TPDA inport %d disabled\n", in->dest_port); 242 } 243 244 static const struct coresight_ops_link tpda_link_ops = { 245 .enable = tpda_enable, 246 .disable = tpda_disable, 247 }; 248 249 static const struct coresight_ops tpda_cs_ops = { 250 .link_ops = &tpda_link_ops, 251 }; 252 253 static int tpda_init_default_data(struct tpda_drvdata *drvdata) 254 { 255 int atid; 256 /* 257 * TPDA must has a unique atid. This atid can uniquely 258 * identify the TPDM trace source connected to the TPDA. 259 * The TPDMs which are connected to same TPDA share the 260 * same trace-id. When TPDA does packetization, different 261 * port will have unique channel number for decoding. 262 */ 263 atid = coresight_trace_id_get_system_id(); 264 if (atid < 0) 265 return atid; 266 267 drvdata->atid = atid; 268 return 0; 269 } 270 271 static int tpda_probe(struct amba_device *adev, const struct amba_id *id) 272 { 273 int ret; 274 struct device *dev = &adev->dev; 275 struct coresight_platform_data *pdata; 276 struct tpda_drvdata *drvdata; 277 struct coresight_desc desc = { 0 }; 278 void __iomem *base; 279 280 pdata = coresight_get_platform_data(dev); 281 if (IS_ERR(pdata)) 282 return PTR_ERR(pdata); 283 adev->dev.platform_data = pdata; 284 285 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 286 if (!drvdata) 287 return -ENOMEM; 288 289 drvdata->dev = &adev->dev; 290 dev_set_drvdata(dev, drvdata); 291 292 base = devm_ioremap_resource(dev, &adev->res); 293 if (IS_ERR(base)) 294 return PTR_ERR(base); 295 drvdata->base = base; 296 297 spin_lock_init(&drvdata->spinlock); 298 299 ret = tpda_init_default_data(drvdata); 300 if (ret) 301 return ret; 302 303 desc.name = coresight_alloc_device_name(&tpda_devs, dev); 304 if (!desc.name) 305 return -ENOMEM; 306 desc.type = CORESIGHT_DEV_TYPE_LINK; 307 desc.subtype.link_subtype = CORESIGHT_DEV_SUBTYPE_LINK_MERG; 308 desc.ops = &tpda_cs_ops; 309 desc.pdata = adev->dev.platform_data; 310 desc.dev = &adev->dev; 311 desc.access = CSDEV_ACCESS_IOMEM(base); 312 drvdata->csdev = coresight_register(&desc); 313 if (IS_ERR(drvdata->csdev)) 314 return PTR_ERR(drvdata->csdev); 315 316 pm_runtime_put(&adev->dev); 317 318 dev_dbg(drvdata->dev, "TPDA initialized\n"); 319 return 0; 320 } 321 322 static void tpda_remove(struct amba_device *adev) 323 { 324 struct tpda_drvdata *drvdata = dev_get_drvdata(&adev->dev); 325 326 coresight_trace_id_put_system_id(drvdata->atid); 327 coresight_unregister(drvdata->csdev); 328 } 329 330 /* 331 * Different TPDA has different periph id. 332 * The difference is 0-7 bits' value. So ignore 0-7 bits. 333 */ 334 static struct amba_id tpda_ids[] = { 335 { 336 .id = 0x000f0f00, 337 .mask = 0x000fff00, 338 }, 339 { 0, 0, NULL }, 340 }; 341 342 static struct amba_driver tpda_driver = { 343 .drv = { 344 .name = "coresight-tpda", 345 .suppress_bind_attrs = true, 346 }, 347 .probe = tpda_probe, 348 .remove = tpda_remove, 349 .id_table = tpda_ids, 350 }; 351 352 module_amba_driver(tpda_driver); 353 354 MODULE_LICENSE("GPL"); 355 MODULE_DESCRIPTION("Trace, Profiling & Diagnostic Aggregator driver"); 356