1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/mfd/max77620.h> 3 4#include "tegra210.dtsi" 5 6/ { 7 model = "NVIDIA Jetson TX1"; 8 compatible = "nvidia,p2180", "nvidia,tegra210"; 9 10 aliases { 11 rtc0 = "/i2c@7000d000/pmic@3c"; 12 rtc1 = "/rtc@7000e000"; 13 serial0 = &uarta; 14 serial3 = &uartd; 15 }; 16 17 chosen { 18 stdout-path = "serial0:115200n8"; 19 }; 20 21 reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 24 ranges; 25 }; 26 27 memory@80000000 { 28 device_type = "memory"; 29 reg = <0x0 0x80000000 0x1 0x0>; 30 }; 31 32 gpu@57000000 { 33 vdd-supply = <&vdd_gpu>; 34 status = "okay"; 35 }; 36 37 /* debug port */ 38 serial@70006000 { 39 /delete-property/ dmas; 40 /delete-property/ dma-names; 41 status = "okay"; 42 }; 43 44 serial@70006300 { 45 /delete-property/ reg-shift; 46 status = "okay"; 47 compatible = "nvidia,tegra30-hsuart"; 48 reset-names = "serial"; 49 50 bluetooth { 51 compatible = "brcm,bcm43540-bt"; 52 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 53 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 54 interrupt-parent = <&gpio>; 55 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 56 interrupt-names = "host-wakeup"; 57 }; 58 }; 59 60 i2c@7000c000 { 61 status = "okay"; 62 63 tmp451: temperature-sensor@4c { 64 compatible = "ti,tmp451"; 65 reg = <0x4c>; 66 interrupt-parent = <&gpio>; 67 interrupts = <TEGRA_GPIO(X, 4) IRQ_TYPE_LEVEL_LOW>; 68 vcc-supply = <&vdd_1v8>; 69 #thermal-sensor-cells = <1>; 70 }; 71 }; 72 73 i2c@7000c400 { 74 status = "okay"; 75 76 power-sensor@40 { 77 compatible = "ti,ina3221"; 78 reg = <0x40>; 79 #address-cells = <1>; 80 #size-cells = <0>; 81 82 input@0 { 83 reg = <0x0>; 84 label = "VDD_IN"; 85 shunt-resistor-micro-ohms = <20000>; 86 }; 87 88 input@1 { 89 reg = <0x1>; 90 label = "VDD_GPU"; 91 shunt-resistor-micro-ohms = <10000>; 92 }; 93 94 input@2 { 95 reg = <0x2>; 96 label = "VDD_CPU"; 97 shunt-resistor-micro-ohms = <10000>; 98 }; 99 }; 100 }; 101 102 i2c@7000c500 { 103 status = "okay"; 104 105 /* module ID EEPROM */ 106 eeprom@50 { 107 compatible = "atmel,24c02"; 108 reg = <0x50>; 109 110 label = "module"; 111 vcc-supply = <&vdd_1v8>; 112 address-width = <8>; 113 pagesize = <8>; 114 size = <256>; 115 read-only; 116 }; 117 }; 118 119 i2c@7000d000 { 120 status = "okay"; 121 clock-frequency = <400000>; 122 123 pmic: pmic@3c { 124 compatible = "maxim,max77620"; 125 reg = <0x3c>; 126 interrupt-parent = <&tegra_pmc>; 127 interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 128 129 #interrupt-cells = <2>; 130 interrupt-controller; 131 132 #gpio-cells = <2>; 133 gpio-controller; 134 135 pinctrl-names = "default"; 136 pinctrl-0 = <&max77620_default>; 137 138 fps { 139 fps0 { 140 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 141 maxim,suspend-fps-time-period-us = <1280>; 142 }; 143 144 fps1 { 145 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 146 maxim,suspend-fps-time-period-us = <1280>; 147 }; 148 149 fps2 { 150 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 151 }; 152 }; 153 154 max77620_default: pinmux { 155 gpio0 { 156 pins = "gpio0"; 157 function = "gpio"; 158 }; 159 160 gpio1 { 161 pins = "gpio1"; 162 function = "fps-out"; 163 drive-push-pull = <1>; 164 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 165 maxim,active-fps-power-up-slot = <7>; 166 maxim,active-fps-power-down-slot = <0>; 167 }; 168 169 gpio2_3 { 170 pins = "gpio2", "gpio3"; 171 function = "fps-out"; 172 drive-open-drain = <1>; 173 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 174 }; 175 176 gpio4 { 177 pins = "gpio4"; 178 function = "32k-out1"; 179 }; 180 181 gpio5_6_7 { 182 pins = "gpio5", "gpio6", "gpio7"; 183 function = "gpio"; 184 drive-push-pull = <1>; 185 }; 186 }; 187 188 regulators { 189 in-ldo0-1-supply = <&vdd_pre>; 190 in-ldo7-8-supply = <&vdd_pre>; 191 in-sd3-supply = <&vdd_5v0_sys>; 192 193 vdd_soc: sd0 { 194 regulator-name = "VDD_SOC"; 195 regulator-min-microvolt = <600000>; 196 regulator-max-microvolt = <1400000>; 197 regulator-always-on; 198 regulator-boot-on; 199 200 regulator-enable-ramp-delay = <146>; 201 regulator-ramp-delay = <27500>; 202 203 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 204 }; 205 206 vdd_ddr: sd1 { 207 regulator-name = "VDD_DDR_1V1_PMIC"; 208 regulator-always-on; 209 regulator-boot-on; 210 211 regulator-enable-ramp-delay = <130>; 212 regulator-ramp-delay = <27500>; 213 214 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 215 }; 216 217 vdd_pre: sd2 { 218 regulator-name = "VDD_PRE_REG_1V35"; 219 regulator-min-microvolt = <1350000>; 220 regulator-max-microvolt = <1350000>; 221 222 regulator-enable-ramp-delay = <176>; 223 regulator-ramp-delay = <27500>; 224 225 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 226 }; 227 228 vdd_1v8: sd3 { 229 regulator-name = "VDD_1V8"; 230 regulator-min-microvolt = <1800000>; 231 regulator-max-microvolt = <1800000>; 232 regulator-always-on; 233 regulator-boot-on; 234 235 regulator-enable-ramp-delay = <242>; 236 regulator-ramp-delay = <27500>; 237 238 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 239 }; 240 241 vdd_sys_1v2: ldo0 { 242 regulator-name = "AVDD_SYS_1V2"; 243 regulator-min-microvolt = <1200000>; 244 regulator-max-microvolt = <1200000>; 245 regulator-always-on; 246 regulator-boot-on; 247 248 regulator-enable-ramp-delay = <26>; 249 regulator-ramp-delay = <100000>; 250 251 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 252 }; 253 254 vdd_pex_1v05: ldo1 { 255 regulator-name = "VDD_PEX_1V05"; 256 regulator-min-microvolt = <1050000>; 257 regulator-max-microvolt = <1050000>; 258 259 regulator-enable-ramp-delay = <22>; 260 regulator-ramp-delay = <100000>; 261 262 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 263 }; 264 265 vddio_sdmmc: ldo2 { 266 regulator-name = "VDDIO_SDMMC"; 267 regulator-min-microvolt = <1800000>; 268 regulator-max-microvolt = <3300000>; 269 regulator-always-on; 270 regulator-boot-on; 271 272 regulator-enable-ramp-delay = <62>; 273 regulator-ramp-delay = <100000>; 274 275 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 276 }; 277 278 vdd_cam_hv: ldo3 { 279 regulator-name = "VDD_CAM_HV"; 280 regulator-min-microvolt = <2800000>; 281 regulator-max-microvolt = <2800000>; 282 283 regulator-enable-ramp-delay = <50>; 284 regulator-ramp-delay = <100000>; 285 286 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 287 }; 288 289 vdd_rtc: ldo4 { 290 regulator-name = "VDD_RTC"; 291 regulator-min-microvolt = <850000>; 292 regulator-max-microvolt = <850000>; 293 regulator-always-on; 294 regulator-boot-on; 295 296 regulator-enable-ramp-delay = <22>; 297 regulator-ramp-delay = <100000>; 298 299 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 300 }; 301 302 vdd_ts_hv: ldo5 { 303 regulator-name = "VDD_TS_HV"; 304 regulator-min-microvolt = <3300000>; 305 regulator-max-microvolt = <3300000>; 306 307 regulator-enable-ramp-delay = <62>; 308 regulator-ramp-delay = <100000>; 309 310 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 311 }; 312 313 vdd_ts: ldo6 { 314 regulator-name = "VDD_TS_1V8"; 315 regulator-min-microvolt = <1800000>; 316 regulator-max-microvolt = <1800000>; 317 318 regulator-enable-ramp-delay = <36>; 319 regulator-ramp-delay = <100000>; 320 321 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 322 maxim,active-fps-power-up-slot = <7>; 323 maxim,active-fps-power-down-slot = <0>; 324 }; 325 326 avdd_1v05_pll: ldo7 { 327 regulator-name = "AVDD_1V05_PLL"; 328 regulator-min-microvolt = <1050000>; 329 regulator-max-microvolt = <1050000>; 330 regulator-always-on; 331 regulator-boot-on; 332 333 regulator-enable-ramp-delay = <24>; 334 regulator-ramp-delay = <100000>; 335 336 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 337 }; 338 339 avdd_1v05: ldo8 { 340 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 341 regulator-min-microvolt = <1050000>; 342 regulator-max-microvolt = <1050000>; 343 344 regulator-enable-ramp-delay = <22>; 345 regulator-ramp-delay = <100000>; 346 347 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 348 }; 349 }; 350 }; 351 }; 352 353 pmc@7000e400 { 354 nvidia,invert-interrupt; 355 nvidia,suspend-mode = <0>; 356 nvidia,cpu-pwr-good-time = <0>; 357 nvidia,cpu-pwr-off-time = <0>; 358 nvidia,core-pwr-good-time = <4587 3876>; 359 nvidia,core-pwr-off-time = <39065>; 360 nvidia,core-power-req-active-high; 361 nvidia,sys-clock-req-active-high; 362 }; 363 364 mmc@700b0200 { 365 status = "okay"; 366 bus-width = <4>; 367 non-removable; 368 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 369 vqmmc-supply = <&vdd_1v8>; 370 vmmc-supply = <&vdd_3v3_sys>; 371 #address-cells = <1>; 372 #size-cells = <0>; 373 374 wifi@1 { 375 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac"; 376 reg = <1>; 377 interrupt-parent = <&gpio>; 378 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; 379 interrupt-names = "host-wake"; 380 }; 381 }; 382 383 /* eMMC */ 384 mmc@700b0600 { 385 status = "okay"; 386 bus-width = <8>; 387 non-removable; 388 vqmmc-supply = <&vdd_1v8>; 389 }; 390 391 clk32k_in: clock-32k { 392 compatible = "fixed-clock"; 393 clock-frequency = <32768>; 394 #clock-cells = <0>; 395 }; 396 397 cpus { 398 cpu@0 { 399 enable-method = "psci"; 400 }; 401 402 cpu@1 { 403 enable-method = "psci"; 404 }; 405 406 cpu@2 { 407 enable-method = "psci"; 408 }; 409 410 cpu@3 { 411 enable-method = "psci"; 412 }; 413 414 idle-states { 415 cpu-sleep { 416 status = "okay"; 417 }; 418 }; 419 }; 420 421 psci { 422 compatible = "arm,psci-0.2"; 423 method = "smc"; 424 }; 425 426 vdd_gpu: regulator-vdd-gpu { 427 compatible = "pwm-regulator"; 428 pwms = <&pwm 1 8000>; 429 regulator-name = "VDD_GPU"; 430 regulator-min-microvolt = <710000>; 431 regulator-max-microvolt = <1320000>; 432 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 433 regulator-ramp-delay = <80>; 434 regulator-enable-ramp-delay = <2000>; 435 regulator-settling-time-us = <160>; 436 }; 437}; 438