1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/mfd/max77620.h> 3 4#include "tegra210.dtsi" 5 6/ { 7 model = "NVIDIA Jetson TX1"; 8 compatible = "nvidia,p2180", "nvidia,tegra210"; 9 10 aliases { 11 rtc0 = "/i2c@7000d000/pmic@3c"; 12 rtc1 = "/rtc@7000e000"; 13 serial0 = &uarta; 14 serial3 = &uartd; 15 }; 16 17 chosen { 18 stdout-path = "serial0:115200n8"; 19 }; 20 21 memory@80000000 { 22 device_type = "memory"; 23 reg = <0x0 0x80000000 0x1 0x0>; 24 }; 25 26 gpu@57000000 { 27 vdd-supply = <&vdd_gpu>; 28 status = "okay"; 29 }; 30 31 /* debug port */ 32 serial@70006000 { 33 /delete-property/ dmas; 34 /delete-property/ dma-names; 35 status = "okay"; 36 }; 37 38 serial@70006300 { 39 /delete-property/ reg-shift; 40 status = "okay"; 41 compatible = "nvidia,tegra30-hsuart"; 42 reset-names = "serial"; 43 44 bluetooth { 45 compatible = "brcm,bcm43540-bt"; 46 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 47 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 48 interrupt-parent = <&gpio>; 49 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 50 interrupt-names = "host-wakeup"; 51 }; 52 }; 53 54 i2c@7000c000 { 55 status = "okay"; 56 57 tmp451: temperature-sensor@4c { 58 compatible = "ti,tmp451"; 59 reg = <0x4c>; 60 interrupt-parent = <&gpio>; 61 interrupts = <TEGRA_GPIO(X, 4) IRQ_TYPE_LEVEL_LOW>; 62 vcc-supply = <&vdd_1v8>; 63 #thermal-sensor-cells = <1>; 64 }; 65 }; 66 67 i2c@7000c400 { 68 status = "okay"; 69 70 power-sensor@40 { 71 compatible = "ti,ina3221"; 72 reg = <0x40>; 73 #address-cells = <1>; 74 #size-cells = <0>; 75 76 input@0 { 77 reg = <0x0>; 78 label = "VDD_IN"; 79 shunt-resistor-micro-ohms = <20000>; 80 }; 81 82 input@1 { 83 reg = <0x1>; 84 label = "VDD_GPU"; 85 shunt-resistor-micro-ohms = <10000>; 86 }; 87 88 input@2 { 89 reg = <0x2>; 90 label = "VDD_CPU"; 91 shunt-resistor-micro-ohms = <10000>; 92 }; 93 }; 94 }; 95 96 i2c@7000c500 { 97 status = "okay"; 98 99 /* module ID EEPROM */ 100 eeprom@50 { 101 compatible = "atmel,24c02"; 102 reg = <0x50>; 103 104 label = "module"; 105 vcc-supply = <&vdd_1v8>; 106 address-width = <8>; 107 pagesize = <8>; 108 size = <256>; 109 read-only; 110 }; 111 }; 112 113 i2c@7000d000 { 114 status = "okay"; 115 clock-frequency = <400000>; 116 117 pmic: pmic@3c { 118 compatible = "maxim,max77620"; 119 reg = <0x3c>; 120 interrupt-parent = <&tegra_pmc>; 121 interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 122 123 #interrupt-cells = <2>; 124 interrupt-controller; 125 126 #gpio-cells = <2>; 127 gpio-controller; 128 129 pinctrl-names = "default"; 130 pinctrl-0 = <&max77620_default>; 131 132 fps { 133 fps0 { 134 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 135 maxim,suspend-fps-time-period-us = <1280>; 136 }; 137 138 fps1 { 139 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 140 maxim,suspend-fps-time-period-us = <1280>; 141 }; 142 143 fps2 { 144 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 145 }; 146 }; 147 148 max77620_default: pinmux { 149 gpio0 { 150 pins = "gpio0"; 151 function = "gpio"; 152 }; 153 154 gpio1 { 155 pins = "gpio1"; 156 function = "fps-out"; 157 drive-push-pull = <1>; 158 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 159 maxim,active-fps-power-up-slot = <7>; 160 maxim,active-fps-power-down-slot = <0>; 161 }; 162 163 gpio2_3 { 164 pins = "gpio2", "gpio3"; 165 function = "fps-out"; 166 drive-open-drain = <1>; 167 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 168 }; 169 170 gpio4 { 171 pins = "gpio4"; 172 function = "32k-out1"; 173 }; 174 175 gpio5_6_7 { 176 pins = "gpio5", "gpio6", "gpio7"; 177 function = "gpio"; 178 drive-push-pull = <1>; 179 }; 180 }; 181 182 regulators { 183 in-ldo0-1-supply = <&vdd_pre>; 184 in-ldo7-8-supply = <&vdd_pre>; 185 in-sd3-supply = <&vdd_5v0_sys>; 186 187 vdd_soc: sd0 { 188 regulator-name = "VDD_SOC"; 189 regulator-min-microvolt = <600000>; 190 regulator-max-microvolt = <1400000>; 191 regulator-always-on; 192 regulator-boot-on; 193 194 regulator-enable-ramp-delay = <146>; 195 regulator-ramp-delay = <27500>; 196 197 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 198 }; 199 200 vdd_ddr: sd1 { 201 regulator-name = "VDD_DDR_1V1_PMIC"; 202 regulator-always-on; 203 regulator-boot-on; 204 205 regulator-enable-ramp-delay = <130>; 206 regulator-ramp-delay = <27500>; 207 208 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 209 }; 210 211 vdd_pre: sd2 { 212 regulator-name = "VDD_PRE_REG_1V35"; 213 regulator-min-microvolt = <1350000>; 214 regulator-max-microvolt = <1350000>; 215 216 regulator-enable-ramp-delay = <176>; 217 regulator-ramp-delay = <27500>; 218 219 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 220 }; 221 222 vdd_1v8: sd3 { 223 regulator-name = "VDD_1V8"; 224 regulator-min-microvolt = <1800000>; 225 regulator-max-microvolt = <1800000>; 226 regulator-always-on; 227 regulator-boot-on; 228 229 regulator-enable-ramp-delay = <242>; 230 regulator-ramp-delay = <27500>; 231 232 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 233 }; 234 235 vdd_sys_1v2: ldo0 { 236 regulator-name = "AVDD_SYS_1V2"; 237 regulator-min-microvolt = <1200000>; 238 regulator-max-microvolt = <1200000>; 239 regulator-always-on; 240 regulator-boot-on; 241 242 regulator-enable-ramp-delay = <26>; 243 regulator-ramp-delay = <100000>; 244 245 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 246 }; 247 248 vdd_pex_1v05: ldo1 { 249 regulator-name = "VDD_PEX_1V05"; 250 regulator-min-microvolt = <1050000>; 251 regulator-max-microvolt = <1050000>; 252 253 regulator-enable-ramp-delay = <22>; 254 regulator-ramp-delay = <100000>; 255 256 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 257 }; 258 259 vddio_sdmmc: ldo2 { 260 regulator-name = "VDDIO_SDMMC"; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <3300000>; 263 regulator-always-on; 264 regulator-boot-on; 265 266 regulator-enable-ramp-delay = <62>; 267 regulator-ramp-delay = <100000>; 268 269 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 270 }; 271 272 vdd_cam_hv: ldo3 { 273 regulator-name = "VDD_CAM_HV"; 274 regulator-min-microvolt = <2800000>; 275 regulator-max-microvolt = <2800000>; 276 277 regulator-enable-ramp-delay = <50>; 278 regulator-ramp-delay = <100000>; 279 280 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 281 }; 282 283 vdd_rtc: ldo4 { 284 regulator-name = "VDD_RTC"; 285 regulator-min-microvolt = <850000>; 286 regulator-max-microvolt = <850000>; 287 regulator-always-on; 288 regulator-boot-on; 289 290 regulator-enable-ramp-delay = <22>; 291 regulator-ramp-delay = <100000>; 292 293 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 294 }; 295 296 vdd_ts_hv: ldo5 { 297 regulator-name = "VDD_TS_HV"; 298 regulator-min-microvolt = <3300000>; 299 regulator-max-microvolt = <3300000>; 300 301 regulator-enable-ramp-delay = <62>; 302 regulator-ramp-delay = <100000>; 303 304 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 305 }; 306 307 vdd_ts: ldo6 { 308 regulator-name = "VDD_TS_1V8"; 309 regulator-min-microvolt = <1800000>; 310 regulator-max-microvolt = <1800000>; 311 312 regulator-enable-ramp-delay = <36>; 313 regulator-ramp-delay = <100000>; 314 315 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 316 maxim,active-fps-power-up-slot = <7>; 317 maxim,active-fps-power-down-slot = <0>; 318 }; 319 320 avdd_1v05_pll: ldo7 { 321 regulator-name = "AVDD_1V05_PLL"; 322 regulator-min-microvolt = <1050000>; 323 regulator-max-microvolt = <1050000>; 324 regulator-always-on; 325 regulator-boot-on; 326 327 regulator-enable-ramp-delay = <24>; 328 regulator-ramp-delay = <100000>; 329 330 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 331 }; 332 333 avdd_1v05: ldo8 { 334 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 335 regulator-min-microvolt = <1050000>; 336 regulator-max-microvolt = <1050000>; 337 338 regulator-enable-ramp-delay = <22>; 339 regulator-ramp-delay = <100000>; 340 341 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 342 }; 343 }; 344 }; 345 }; 346 347 pmc@7000e400 { 348 nvidia,invert-interrupt; 349 nvidia,suspend-mode = <0>; 350 nvidia,cpu-pwr-good-time = <0>; 351 nvidia,cpu-pwr-off-time = <0>; 352 nvidia,core-pwr-good-time = <4587 3876>; 353 nvidia,core-pwr-off-time = <39065>; 354 nvidia,core-power-req-active-high; 355 nvidia,sys-clock-req-active-high; 356 }; 357 358 mmc@700b0200 { 359 status = "okay"; 360 bus-width = <4>; 361 non-removable; 362 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 363 vqmmc-supply = <&vdd_1v8>; 364 vmmc-supply = <&vdd_3v3_sys>; 365 #address-cells = <1>; 366 #size-cells = <0>; 367 368 wifi@1 { 369 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac"; 370 reg = <1>; 371 interrupt-parent = <&gpio>; 372 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; 373 interrupt-names = "host-wake"; 374 }; 375 }; 376 377 /* eMMC */ 378 mmc@700b0600 { 379 status = "okay"; 380 bus-width = <8>; 381 non-removable; 382 vqmmc-supply = <&vdd_1v8>; 383 }; 384 385 clk32k_in: clock-32k { 386 compatible = "fixed-clock"; 387 clock-frequency = <32768>; 388 #clock-cells = <0>; 389 }; 390 391 cpus { 392 cpu@0 { 393 enable-method = "psci"; 394 }; 395 396 cpu@1 { 397 enable-method = "psci"; 398 }; 399 400 cpu@2 { 401 enable-method = "psci"; 402 }; 403 404 cpu@3 { 405 enable-method = "psci"; 406 }; 407 408 idle-states { 409 cpu-sleep { 410 status = "okay"; 411 }; 412 }; 413 }; 414 415 psci { 416 compatible = "arm,psci-0.2"; 417 method = "smc"; 418 }; 419 420 vdd_gpu: regulator-vdd-gpu { 421 compatible = "pwm-regulator"; 422 pwms = <&pwm 1 8000>; 423 regulator-name = "VDD_GPU"; 424 regulator-min-microvolt = <710000>; 425 regulator-max-microvolt = <1320000>; 426 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 427 regulator-ramp-delay = <80>; 428 regulator-enable-ramp-delay = <2000>; 429 regulator-settling-time-us = <160>; 430 }; 431}; 432