xref: /linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_txrx.h (revision e5763491237ffee22d9b554febc2d00669f81dee)
1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2020, Mellanox Technologies inc. All rights reserved. */
3 
4 #ifndef __MLX5E_KTLS_TXRX_H__
5 #define __MLX5E_KTLS_TXRX_H__
6 
7 #ifdef CONFIG_MLX5_EN_TLS
8 
9 #include <net/tls.h>
10 #include "en.h"
11 #include "en/txrx.h"
12 
13 struct mlx5e_accel_tx_tls_state {
14 	u32 tls_tisn;
15 };
16 
17 u16 mlx5e_ktls_get_stop_room(struct mlx5_core_dev *mdev, struct mlx5e_params *params);
18 
19 bool mlx5e_ktls_handle_tx_skb(struct net_device *netdev, struct mlx5e_txqsq *sq,
20 			      struct sk_buff *skb,
21 			      struct mlx5e_accel_tx_tls_state *state);
22 void mlx5e_ktls_handle_rx_skb(struct mlx5e_rq *rq, struct sk_buff *skb,
23 			      struct mlx5_cqe64 *cqe, u32 *cqe_bcnt);
24 
25 void mlx5e_ktls_handle_ctx_completion(struct mlx5e_icosq_wqe_info *wi);
26 void mlx5e_ktls_handle_get_psv_completion(struct mlx5e_icosq_wqe_info *wi,
27 					  struct mlx5e_icosq *sq);
28 
29 void mlx5e_ktls_tx_handle_resync_dump_comp(struct mlx5e_txqsq *sq,
30 					   struct mlx5e_tx_wqe_info *wi,
31 					   u32 *dma_fifo_cc);
32 
33 void
34 mlx5e_ktls_rx_resync_async_request_cancel(struct mlx5e_icosq_wqe_info *wi);
35 
36 static inline bool
mlx5e_ktls_tx_try_handle_resync_dump_comp(struct mlx5e_txqsq * sq,struct mlx5e_tx_wqe_info * wi,u32 * dma_fifo_cc)37 mlx5e_ktls_tx_try_handle_resync_dump_comp(struct mlx5e_txqsq *sq,
38 					  struct mlx5e_tx_wqe_info *wi,
39 					  u32 *dma_fifo_cc)
40 {
41 	if (unlikely(wi->resync_dump_frag_page)) {
42 		mlx5e_ktls_tx_handle_resync_dump_comp(sq, wi, dma_fifo_cc);
43 		return true;
44 	}
45 	return false;
46 }
47 
48 bool mlx5e_ktls_rx_handle_resync_list(struct mlx5e_channel *c, int budget);
49 
50 static inline bool
mlx5e_ktls_rx_pending_resync_list(struct mlx5e_channel * c,int budget)51 mlx5e_ktls_rx_pending_resync_list(struct mlx5e_channel *c, int budget)
52 {
53 	return budget && test_bit(MLX5E_SQ_STATE_PENDING_TLS_RX_RESYNC, &c->async_icosq.state);
54 }
55 
56 static inline void
mlx5e_ktls_handle_tx_wqe(struct mlx5_wqe_ctrl_seg * cseg,struct mlx5e_accel_tx_tls_state * state)57 mlx5e_ktls_handle_tx_wqe(struct mlx5_wqe_ctrl_seg *cseg,
58 			 struct mlx5e_accel_tx_tls_state *state)
59 {
60 	cseg->tis_tir_num = cpu_to_be32(state->tls_tisn << 8);
61 }
62 #else
63 static inline bool
mlx5e_ktls_tx_try_handle_resync_dump_comp(struct mlx5e_txqsq * sq,struct mlx5e_tx_wqe_info * wi,u32 * dma_fifo_cc)64 mlx5e_ktls_tx_try_handle_resync_dump_comp(struct mlx5e_txqsq *sq,
65 					  struct mlx5e_tx_wqe_info *wi,
66 					  u32 *dma_fifo_cc)
67 {
68 	return false;
69 }
70 
71 static inline bool
mlx5e_ktls_rx_handle_resync_list(struct mlx5e_channel * c,int budget)72 mlx5e_ktls_rx_handle_resync_list(struct mlx5e_channel *c, int budget)
73 {
74 	return false;
75 }
76 
77 static inline bool
mlx5e_ktls_rx_pending_resync_list(struct mlx5e_channel * c,int budget)78 mlx5e_ktls_rx_pending_resync_list(struct mlx5e_channel *c, int budget)
79 {
80 	return false;
81 }
82 
mlx5e_ktls_get_stop_room(struct mlx5_core_dev * mdev,struct mlx5e_params * params)83 static inline u16 mlx5e_ktls_get_stop_room(struct mlx5_core_dev *mdev,
84 					   struct mlx5e_params *params)
85 {
86 	return 0;
87 }
88 
mlx5e_ktls_handle_rx_skb(struct mlx5e_rq * rq,struct sk_buff * skb,struct mlx5_cqe64 * cqe,u32 * cqe_bcnt)89 static inline void mlx5e_ktls_handle_rx_skb(struct mlx5e_rq *rq,
90 					    struct sk_buff *skb,
91 					    struct mlx5_cqe64 *cqe,
92 					    u32 *cqe_bcnt)
93 {
94 }
95 #endif /* CONFIG_MLX5_EN_TLS */
96 
97 #endif /* __MLX5E_TLS_TXRX_H__ */
98