1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
5 *
6 * Authors:
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
9 *
10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 *
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
14 *
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 */
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/pnp.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/wait.h>
25 #include <linux/acpi.h>
26 #include <linux/freezer.h>
27 #include <linux/dmi.h>
28 #include "tpm.h"
29 #include "tpm_tis_core.h"
30
31 #define TPM_TIS_MAX_UNHANDLED_IRQS 1000
32
33 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
34
wait_for_tpm_stat_cond(struct tpm_chip * chip,u8 mask,bool check_cancel,bool * canceled)35 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
36 bool check_cancel, bool *canceled)
37 {
38 u8 status = chip->ops->status(chip);
39
40 *canceled = false;
41 if ((status & mask) == mask)
42 return true;
43 if (check_cancel && chip->ops->req_canceled(chip, status)) {
44 *canceled = true;
45 return true;
46 }
47 return false;
48 }
49
tpm_tis_filter_sts_mask(u8 int_mask,u8 sts_mask)50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask)
51 {
52 if (!(int_mask & TPM_INTF_STS_VALID_INT))
53 sts_mask &= ~TPM_STS_VALID;
54
55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT))
56 sts_mask &= ~TPM_STS_DATA_AVAIL;
57
58 if (!(int_mask & TPM_INTF_CMD_READY_INT))
59 sts_mask &= ~TPM_STS_COMMAND_READY;
60
61 return sts_mask;
62 }
63
wait_for_tpm_stat(struct tpm_chip * chip,u8 mask,unsigned long timeout,wait_queue_head_t * queue,bool check_cancel)64 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
65 unsigned long timeout, wait_queue_head_t *queue,
66 bool check_cancel)
67 {
68 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
69 unsigned long stop;
70 long rc;
71 u8 status;
72 bool canceled = false;
73 u8 sts_mask;
74 int ret = 0;
75
76 /* check current status */
77 status = chip->ops->status(chip);
78 if ((status & mask) == mask)
79 return 0;
80
81 sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL |
82 TPM_STS_COMMAND_READY);
83 /* check what status changes can be handled by irqs */
84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask);
85
86 stop = jiffies + timeout;
87 /* process status changes with irq support */
88 if (sts_mask) {
89 ret = -ETIME;
90 again:
91 timeout = stop - jiffies;
92 if ((long)timeout <= 0)
93 return -ETIME;
94 rc = wait_event_interruptible_timeout(*queue,
95 wait_for_tpm_stat_cond(chip, sts_mask, check_cancel,
96 &canceled),
97 timeout);
98 if (rc > 0) {
99 if (canceled)
100 return -ECANCELED;
101 ret = 0;
102 }
103 if (rc == -ERESTARTSYS && freezing(current)) {
104 clear_thread_flag(TIF_SIGPENDING);
105 goto again;
106 }
107 }
108
109 if (ret)
110 return ret;
111
112 mask &= ~sts_mask;
113 if (!mask) /* all done */
114 return 0;
115 /* process status changes without irq support */
116 do {
117 usleep_range(priv->timeout_min, priv->timeout_max);
118 status = chip->ops->status(chip);
119 if ((status & mask) == mask)
120 return 0;
121 } while (time_before(jiffies, stop));
122 return -ETIME;
123 }
124
125 /* Before we attempt to access the TPM we must see that the valid bit is set.
126 * The specification says that this bit is 0 at reset and remains 0 until the
127 * 'TPM has gone through its self test and initialization and has established
128 * correct values in the other bits.'
129 */
wait_startup(struct tpm_chip * chip,int l)130 static int wait_startup(struct tpm_chip *chip, int l)
131 {
132 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
133 unsigned long stop = jiffies + chip->timeout_a;
134
135 do {
136 int rc;
137 u8 access;
138
139 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
140 if (rc < 0)
141 return rc;
142
143 if (access & TPM_ACCESS_VALID)
144 return 0;
145 tpm_msleep(TPM_TIMEOUT);
146 } while (time_before(jiffies, stop));
147 return -1;
148 }
149
check_locality(struct tpm_chip * chip,int l)150 static bool check_locality(struct tpm_chip *chip, int l)
151 {
152 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
153 int rc;
154 u8 access;
155
156 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
157 if (rc < 0)
158 return false;
159
160 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
161 | TPM_ACCESS_REQUEST_USE)) ==
162 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
163 priv->locality = l;
164 return true;
165 }
166
167 return false;
168 }
169
__tpm_tis_relinquish_locality(struct tpm_tis_data * priv,int l)170 static int __tpm_tis_relinquish_locality(struct tpm_tis_data *priv, int l)
171 {
172 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
173
174 return 0;
175 }
176
tpm_tis_relinquish_locality(struct tpm_chip * chip,int l)177 static int tpm_tis_relinquish_locality(struct tpm_chip *chip, int l)
178 {
179 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
180
181 mutex_lock(&priv->locality_count_mutex);
182 priv->locality_count--;
183 if (priv->locality_count == 0)
184 __tpm_tis_relinquish_locality(priv, l);
185 mutex_unlock(&priv->locality_count_mutex);
186
187 return 0;
188 }
189
__tpm_tis_request_locality(struct tpm_chip * chip,int l)190 static int __tpm_tis_request_locality(struct tpm_chip *chip, int l)
191 {
192 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
193 unsigned long stop, timeout;
194 long rc;
195
196 if (check_locality(chip, l))
197 return l;
198
199 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
200 if (rc < 0)
201 return rc;
202
203 stop = jiffies + chip->timeout_a;
204
205 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
206 again:
207 timeout = stop - jiffies;
208 if ((long)timeout <= 0)
209 return -1;
210 rc = wait_event_interruptible_timeout(priv->int_queue,
211 (check_locality
212 (chip, l)),
213 timeout);
214 if (rc > 0)
215 return l;
216 if (rc == -ERESTARTSYS && freezing(current)) {
217 clear_thread_flag(TIF_SIGPENDING);
218 goto again;
219 }
220 } else {
221 /* wait for burstcount */
222 do {
223 if (check_locality(chip, l))
224 return l;
225 tpm_msleep(TPM_TIMEOUT);
226 } while (time_before(jiffies, stop));
227 }
228 return -1;
229 }
230
tpm_tis_request_locality(struct tpm_chip * chip,int l)231 static int tpm_tis_request_locality(struct tpm_chip *chip, int l)
232 {
233 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
234 int ret = 0;
235
236 mutex_lock(&priv->locality_count_mutex);
237 if (priv->locality_count == 0)
238 ret = __tpm_tis_request_locality(chip, l);
239 if (!ret)
240 priv->locality_count++;
241 mutex_unlock(&priv->locality_count_mutex);
242 return ret;
243 }
244
tpm_tis_status(struct tpm_chip * chip)245 static u8 tpm_tis_status(struct tpm_chip *chip)
246 {
247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
248 int rc;
249 u8 status;
250
251 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
252 if (rc < 0)
253 return 0;
254
255 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) {
256 if (!test_and_set_bit(TPM_TIS_INVALID_STATUS, &priv->flags)) {
257 /*
258 * If this trips, the chances are the read is
259 * returning 0xff because the locality hasn't been
260 * acquired. Usually because tpm_try_get_ops() hasn't
261 * been called before doing a TPM operation.
262 */
263 dev_err(&chip->dev, "invalid TPM_STS.x 0x%02x, dumping stack for forensics\n",
264 status);
265
266 /*
267 * Dump stack for forensics, as invalid TPM_STS.x could be
268 * potentially triggered by impaired tpm_try_get_ops().
269 */
270 dump_stack();
271 }
272
273 return 0;
274 }
275
276 return status;
277 }
278
tpm_tis_ready(struct tpm_chip * chip)279 static void tpm_tis_ready(struct tpm_chip *chip)
280 {
281 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
282
283 /* this causes the current command to be aborted */
284 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
285 }
286
get_burstcount(struct tpm_chip * chip)287 static int get_burstcount(struct tpm_chip *chip)
288 {
289 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
290 unsigned long stop;
291 int burstcnt, rc;
292 u32 value;
293
294 /* wait for burstcount */
295 if (chip->flags & TPM_CHIP_FLAG_TPM2)
296 stop = jiffies + chip->timeout_a;
297 else
298 stop = jiffies + chip->timeout_d;
299 do {
300 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
301 if (rc < 0)
302 return rc;
303
304 burstcnt = (value >> 8) & 0xFFFF;
305 if (burstcnt)
306 return burstcnt;
307 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
308 } while (time_before(jiffies, stop));
309 return -EBUSY;
310 }
311
recv_data(struct tpm_chip * chip,u8 * buf,size_t count)312 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
313 {
314 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
315 int size = 0, burstcnt, rc;
316
317 while (size < count) {
318 rc = wait_for_tpm_stat(chip,
319 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
320 chip->timeout_c,
321 &priv->read_queue, true);
322 if (rc < 0)
323 return rc;
324 burstcnt = get_burstcount(chip);
325 if (burstcnt < 0) {
326 dev_err(&chip->dev, "Unable to read burstcount\n");
327 return burstcnt;
328 }
329 burstcnt = min_t(int, burstcnt, count - size);
330
331 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
332 burstcnt, buf + size);
333 if (rc < 0)
334 return rc;
335
336 size += burstcnt;
337 }
338 return size;
339 }
340
tpm_tis_try_recv(struct tpm_chip * chip,u8 * buf,size_t count)341 static int tpm_tis_try_recv(struct tpm_chip *chip, u8 *buf, size_t count)
342 {
343 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
344 int size = 0;
345 int status;
346 u32 expected;
347 int rc;
348
349 size = recv_data(chip, buf, TPM_HEADER_SIZE);
350 /* read first 10 bytes, including tag, paramsize, and result */
351 if (size < TPM_HEADER_SIZE) {
352 dev_err(&chip->dev, "Unable to read header\n");
353 goto out;
354 }
355
356 expected = be32_to_cpu(*(__be32 *) (buf + 2));
357 if (expected > count || expected < TPM_HEADER_SIZE) {
358 size = -EIO;
359 goto out;
360 }
361
362 rc = recv_data(chip, &buf[TPM_HEADER_SIZE],
363 expected - TPM_HEADER_SIZE);
364 if (rc < 0) {
365 size = rc;
366 goto out;
367 }
368 size += rc;
369 if (size < expected) {
370 dev_err(&chip->dev, "Unable to read remainder of result\n");
371 size = -ETIME;
372 goto out;
373 }
374
375 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
376 &priv->int_queue, false) < 0) {
377 size = -ETIME;
378 goto out;
379 }
380 status = tpm_tis_status(chip);
381 if (status & TPM_STS_DATA_AVAIL) {
382 dev_err(&chip->dev, "Error left over data\n");
383 size = -EIO;
384 goto out;
385 }
386
387 rc = tpm_tis_verify_crc(priv, (size_t)size, buf);
388 if (rc < 0) {
389 dev_err(&chip->dev, "CRC mismatch for response.\n");
390 size = rc;
391 goto out;
392 }
393
394 out:
395 return size;
396 }
397
tpm_tis_recv(struct tpm_chip * chip,u8 * buf,size_t count)398 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
399 {
400 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
401 unsigned int try;
402 int rc = 0;
403
404 if (count < TPM_HEADER_SIZE)
405 return -EIO;
406
407 for (try = 0; try < TPM_RETRY; try++) {
408 rc = tpm_tis_try_recv(chip, buf, count);
409
410 if (rc == -EIO)
411 /* Data transfer errors, indicated by EIO, can be
412 * recovered by rereading the response.
413 */
414 tpm_tis_write8(priv, TPM_STS(priv->locality),
415 TPM_STS_RESPONSE_RETRY);
416 else
417 break;
418 }
419
420 tpm_tis_ready(chip);
421
422 return rc;
423 }
424
425 /*
426 * If interrupts are used (signaled by an irq set in the vendor structure)
427 * tpm.c can skip polling for the data to be available as the interrupt is
428 * waited for here
429 */
tpm_tis_send_data(struct tpm_chip * chip,const u8 * buf,size_t len)430 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
431 {
432 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
433 int rc, status, burstcnt;
434 size_t count = 0;
435 bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
436
437 status = tpm_tis_status(chip);
438 if ((status & TPM_STS_COMMAND_READY) == 0) {
439 tpm_tis_ready(chip);
440 if (wait_for_tpm_stat
441 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
442 &priv->int_queue, false) < 0) {
443 rc = -ETIME;
444 goto out_err;
445 }
446 }
447
448 while (count < len - 1) {
449 burstcnt = get_burstcount(chip);
450 if (burstcnt < 0) {
451 dev_err(&chip->dev, "Unable to read burstcount\n");
452 rc = burstcnt;
453 goto out_err;
454 }
455 burstcnt = min_t(int, burstcnt, len - count - 1);
456 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
457 burstcnt, buf + count);
458 if (rc < 0)
459 goto out_err;
460
461 count += burstcnt;
462
463 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
464 &priv->int_queue, false) < 0) {
465 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
466 rc = -EAGAIN;
467 else
468 rc = -ETIME;
469 goto out_err;
470 }
471 status = tpm_tis_status(chip);
472 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
473 rc = -EIO;
474 dev_err(&chip->dev, "TPM_STS_DATA_EXPECT should be set. sts = 0x%08x\n",
475 status);
476 goto out_err;
477 }
478 }
479
480 /* write last byte */
481 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
482 if (rc < 0)
483 goto out_err;
484
485 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
486 &priv->int_queue, false) < 0) {
487 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
488 rc = -EAGAIN;
489 else
490 rc = -ETIME;
491 goto out_err;
492 }
493 status = tpm_tis_status(chip);
494 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
495 rc = -EIO;
496 dev_err(&chip->dev, "TPM_STS_DATA_EXPECT should be unset. sts = 0x%08x\n",
497 status);
498 goto out_err;
499 }
500
501 rc = tpm_tis_verify_crc(priv, len, buf);
502 if (rc < 0) {
503 dev_err(&chip->dev, "CRC mismatch for command.\n");
504 goto out_err;
505 }
506
507 return 0;
508
509 out_err:
510 tpm_tis_ready(chip);
511 return rc;
512 }
513
__tpm_tis_disable_interrupts(struct tpm_chip * chip)514 static void __tpm_tis_disable_interrupts(struct tpm_chip *chip)
515 {
516 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
517 u32 int_mask = 0;
518
519 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask);
520 int_mask &= ~TPM_GLOBAL_INT_ENABLE;
521 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask);
522
523 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
524 }
525
tpm_tis_disable_interrupts(struct tpm_chip * chip)526 static void tpm_tis_disable_interrupts(struct tpm_chip *chip)
527 {
528 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
529
530 if (priv->irq == 0)
531 return;
532
533 __tpm_tis_disable_interrupts(chip);
534
535 devm_free_irq(chip->dev.parent, priv->irq, chip);
536 priv->irq = 0;
537 }
538
539 /*
540 * If interrupts are used (signaled by an irq set in the vendor structure)
541 * tpm.c can skip polling for the data to be available as the interrupt is
542 * waited for here
543 */
tpm_tis_send_main(struct tpm_chip * chip,const u8 * buf,size_t len)544 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
545 {
546 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
547 int rc;
548 u32 ordinal;
549 unsigned long dur;
550 unsigned int try;
551
552 for (try = 0; try < TPM_RETRY; try++) {
553 rc = tpm_tis_send_data(chip, buf, len);
554 if (rc >= 0)
555 /* Data transfer done successfully */
556 break;
557 else if (rc != -EAGAIN && rc != -EIO)
558 /* Data transfer failed, not recoverable */
559 goto out_err;
560
561 usleep_range(priv->timeout_min, priv->timeout_max);
562 }
563
564 if (rc == -EAGAIN || rc == -EIO) {
565 dev_err(&chip->dev, "Exhausted %d tpm_tis_send_data retries\n", TPM_RETRY);
566 goto out_err;
567 }
568
569 /* go and do it */
570 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
571 if (rc < 0)
572 goto out_err;
573
574 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
575 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
576
577 dur = tpm_calc_ordinal_duration(chip, ordinal);
578 if (wait_for_tpm_stat
579 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
580 &priv->read_queue, false) < 0) {
581 rc = -ETIME;
582 goto out_err;
583 }
584 }
585 return 0;
586 out_err:
587 tpm_tis_ready(chip);
588 return rc;
589 }
590
tpm_tis_send(struct tpm_chip * chip,u8 * buf,size_t bufsiz,size_t len)591 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz,
592 size_t len)
593 {
594 int rc, irq;
595 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
596
597 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) ||
598 test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
599 return tpm_tis_send_main(chip, buf, len);
600
601 /* Verify receipt of the expected IRQ */
602 irq = priv->irq;
603 priv->irq = 0;
604 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
605 rc = tpm_tis_send_main(chip, buf, len);
606 priv->irq = irq;
607 chip->flags |= TPM_CHIP_FLAG_IRQ;
608 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
609 tpm_msleep(1);
610 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
611 tpm_tis_disable_interrupts(chip);
612 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
613 return rc;
614 }
615
616 struct tis_vendor_durations_override {
617 u32 did_vid;
618 struct tpm1_version version;
619 unsigned long durations[3];
620 };
621
622 static const struct tis_vendor_durations_override vendor_dur_overrides[] = {
623 /* STMicroelectronics 0x104a */
624 { 0x0000104a,
625 { 1, 2, 8, 28 },
626 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } },
627 };
628
tpm_tis_update_durations(struct tpm_chip * chip,unsigned long * duration_cap)629 static void tpm_tis_update_durations(struct tpm_chip *chip,
630 unsigned long *duration_cap)
631 {
632 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
633 struct tpm1_version *version;
634 u32 did_vid;
635 int i, rc;
636 cap_t cap;
637
638 chip->duration_adjusted = false;
639
640 if (chip->ops->clk_enable != NULL)
641 chip->ops->clk_enable(chip, true);
642
643 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
644 if (rc < 0) {
645 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n",
646 __func__, rc);
647 goto out;
648 }
649
650 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */
651 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap,
652 "attempting to determine the 1.2 version",
653 sizeof(cap.version2));
654 if (!rc) {
655 version = &cap.version2.version;
656 } else {
657 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap,
658 "attempting to determine the 1.1 version",
659 sizeof(cap.version1));
660
661 if (rc)
662 goto out;
663
664 version = &cap.version1;
665 }
666
667 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) {
668 if (vendor_dur_overrides[i].did_vid != did_vid)
669 continue;
670
671 if ((version->major ==
672 vendor_dur_overrides[i].version.major) &&
673 (version->minor ==
674 vendor_dur_overrides[i].version.minor) &&
675 (version->rev_major ==
676 vendor_dur_overrides[i].version.rev_major) &&
677 (version->rev_minor ==
678 vendor_dur_overrides[i].version.rev_minor)) {
679
680 memcpy(duration_cap,
681 vendor_dur_overrides[i].durations,
682 sizeof(vendor_dur_overrides[i].durations));
683
684 chip->duration_adjusted = true;
685 goto out;
686 }
687 }
688
689 out:
690 if (chip->ops->clk_enable != NULL)
691 chip->ops->clk_enable(chip, false);
692 }
693
694 struct tis_vendor_timeout_override {
695 u32 did_vid;
696 unsigned long timeout_us[4];
697 };
698
699 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
700 /* Atmel 3204 */
701 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
702 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
703 };
704
tpm_tis_update_timeouts(struct tpm_chip * chip,unsigned long * timeout_cap)705 static void tpm_tis_update_timeouts(struct tpm_chip *chip,
706 unsigned long *timeout_cap)
707 {
708 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
709 int i, rc;
710 u32 did_vid;
711
712 chip->timeout_adjusted = false;
713
714 if (chip->ops->clk_enable != NULL)
715 chip->ops->clk_enable(chip, true);
716
717 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
718 if (rc < 0) {
719 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
720 __func__, rc);
721 goto out;
722 }
723
724 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
725 if (vendor_timeout_overrides[i].did_vid != did_vid)
726 continue;
727 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
728 sizeof(vendor_timeout_overrides[i].timeout_us));
729 chip->timeout_adjusted = true;
730 }
731
732 out:
733 if (chip->ops->clk_enable != NULL)
734 chip->ops->clk_enable(chip, false);
735
736 return;
737 }
738
739 /*
740 * Early probing for iTPM with STS_DATA_EXPECT flaw.
741 * Try sending command without itpm flag set and if that
742 * fails, repeat with itpm flag set.
743 */
probe_itpm(struct tpm_chip * chip)744 static int probe_itpm(struct tpm_chip *chip)
745 {
746 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
747 int rc = 0;
748 static const u8 cmd_getticks[] = {
749 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
750 0x00, 0x00, 0x00, 0xf1
751 };
752 size_t len = sizeof(cmd_getticks);
753 u16 vendor;
754
755 if (test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags))
756 return 0;
757
758 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
759 if (rc < 0)
760 return rc;
761
762 /* probe only iTPMS */
763 if (vendor != TPM_VID_INTEL)
764 return 0;
765
766 if (tpm_tis_request_locality(chip, 0) != 0)
767 return -EBUSY;
768
769 rc = tpm_tis_send_data(chip, cmd_getticks, len);
770 if (rc == 0)
771 goto out;
772
773 tpm_tis_ready(chip);
774
775 set_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
776
777 rc = tpm_tis_send_data(chip, cmd_getticks, len);
778 if (rc == 0)
779 dev_info(&chip->dev, "Detected an iTPM.\n");
780 else {
781 clear_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
782 rc = -EFAULT;
783 }
784
785 out:
786 tpm_tis_ready(chip);
787 tpm_tis_relinquish_locality(chip, priv->locality);
788
789 return rc;
790 }
791
tpm_tis_req_canceled(struct tpm_chip * chip,u8 status)792 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
793 {
794 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
795
796 if (!test_bit(TPM_TIS_DEFAULT_CANCELLATION, &priv->flags)) {
797 switch (priv->manufacturer_id) {
798 case TPM_VID_WINBOND:
799 return ((status == TPM_STS_VALID) ||
800 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
801 case TPM_VID_STM:
802 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
803 default:
804 break;
805 }
806 }
807
808 return status == TPM_STS_COMMAND_READY;
809 }
810
tpm_tis_revert_interrupts(struct tpm_chip * chip)811 static irqreturn_t tpm_tis_revert_interrupts(struct tpm_chip *chip)
812 {
813 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
814 const char *product;
815 const char *vendor;
816
817 dev_warn(&chip->dev, FW_BUG
818 "TPM interrupt storm detected, polling instead\n");
819
820 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
821 product = dmi_get_system_info(DMI_PRODUCT_VERSION);
822
823 if (vendor && product) {
824 dev_info(&chip->dev,
825 "Consider adding the following entry to tpm_tis_dmi_table:\n");
826 dev_info(&chip->dev, "\tDMI_SYS_VENDOR: %s\n", vendor);
827 dev_info(&chip->dev, "\tDMI_PRODUCT_VERSION: %s\n", product);
828 }
829
830 if (tpm_tis_request_locality(chip, 0) != 0)
831 return IRQ_NONE;
832
833 __tpm_tis_disable_interrupts(chip);
834 tpm_tis_relinquish_locality(chip, 0);
835
836 schedule_work(&priv->free_irq_work);
837
838 return IRQ_HANDLED;
839 }
840
tpm_tis_update_unhandled_irqs(struct tpm_chip * chip)841 static irqreturn_t tpm_tis_update_unhandled_irqs(struct tpm_chip *chip)
842 {
843 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
844 irqreturn_t irqret = IRQ_HANDLED;
845
846 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
847 return IRQ_HANDLED;
848
849 if (time_after(jiffies, priv->last_unhandled_irq + HZ/10))
850 priv->unhandled_irqs = 1;
851 else
852 priv->unhandled_irqs++;
853
854 priv->last_unhandled_irq = jiffies;
855
856 if (priv->unhandled_irqs > TPM_TIS_MAX_UNHANDLED_IRQS)
857 irqret = tpm_tis_revert_interrupts(chip);
858
859 return irqret;
860 }
861
tis_int_handler(int dummy,void * dev_id)862 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
863 {
864 struct tpm_chip *chip = dev_id;
865 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
866 u32 interrupt;
867 int rc;
868
869 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
870 if (rc < 0)
871 goto err;
872
873 if (interrupt == 0)
874 goto err;
875
876 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
877 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
878 wake_up_interruptible(&priv->read_queue);
879
880 if (interrupt &
881 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
882 TPM_INTF_CMD_READY_INT))
883 wake_up_interruptible(&priv->int_queue);
884
885 /* Clear interrupts handled with TPM_EOI */
886 tpm_tis_request_locality(chip, 0);
887 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
888 tpm_tis_relinquish_locality(chip, 0);
889 if (rc < 0)
890 goto err;
891
892 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
893 return IRQ_HANDLED;
894
895 err:
896 return tpm_tis_update_unhandled_irqs(chip);
897 }
898
tpm_tis_gen_interrupt(struct tpm_chip * chip)899 static void tpm_tis_gen_interrupt(struct tpm_chip *chip)
900 {
901 const char *desc = "attempting to generate an interrupt";
902 u32 cap2;
903 cap_t cap;
904 int ret;
905
906 chip->flags |= TPM_CHIP_FLAG_IRQ;
907
908 if (chip->flags & TPM_CHIP_FLAG_TPM2)
909 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
910 else
911 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0);
912
913 if (ret)
914 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
915 }
916
tpm_tis_free_irq_func(struct work_struct * work)917 static void tpm_tis_free_irq_func(struct work_struct *work)
918 {
919 struct tpm_tis_data *priv = container_of(work, typeof(*priv), free_irq_work);
920 struct tpm_chip *chip = priv->chip;
921
922 devm_free_irq(chip->dev.parent, priv->irq, chip);
923 priv->irq = 0;
924 }
925
926 /* Register the IRQ and issue a command that will cause an interrupt. If an
927 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
928 * everything and leave in polling mode. Returns 0 on success.
929 */
tpm_tis_probe_irq_single(struct tpm_chip * chip,u32 intmask,int flags,int irq)930 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
931 int flags, int irq)
932 {
933 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
934 u8 original_int_vec;
935 int rc;
936 u32 int_status;
937
938 rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL,
939 tis_int_handler, IRQF_ONESHOT | flags,
940 dev_name(&chip->dev), chip);
941 if (rc) {
942 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
943 irq);
944 return -1;
945 }
946 priv->irq = irq;
947
948 rc = tpm_tis_request_locality(chip, 0);
949 if (rc < 0)
950 return rc;
951
952 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
953 &original_int_vec);
954 if (rc < 0) {
955 tpm_tis_relinquish_locality(chip, priv->locality);
956 return rc;
957 }
958
959 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
960 if (rc < 0)
961 goto restore_irqs;
962
963 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
964 if (rc < 0)
965 goto restore_irqs;
966
967 /* Clear all existing */
968 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
969 if (rc < 0)
970 goto restore_irqs;
971 /* Turn on */
972 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
973 intmask | TPM_GLOBAL_INT_ENABLE);
974 if (rc < 0)
975 goto restore_irqs;
976
977 clear_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
978
979 /* Generate an interrupt by having the core call through to
980 * tpm_tis_send
981 */
982 tpm_tis_gen_interrupt(chip);
983
984 restore_irqs:
985 /* tpm_tis_send will either confirm the interrupt is working or it
986 * will call disable_irq which undoes all of the above.
987 */
988 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
989 tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality),
990 original_int_vec);
991 rc = -1;
992 }
993
994 tpm_tis_relinquish_locality(chip, priv->locality);
995
996 return rc;
997 }
998
999 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
1000 * do not have ACPI/etc. We typically expect the interrupt to be declared if
1001 * present.
1002 */
tpm_tis_probe_irq(struct tpm_chip * chip,u32 intmask)1003 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
1004 {
1005 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1006 u8 original_int_vec;
1007 int i, rc;
1008
1009 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
1010 &original_int_vec);
1011 if (rc < 0)
1012 return;
1013
1014 if (!original_int_vec) {
1015 if (IS_ENABLED(CONFIG_X86))
1016 for (i = 3; i <= 15; i++)
1017 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1018 i))
1019 return;
1020 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1021 original_int_vec))
1022 return;
1023 }
1024
tpm_tis_remove(struct tpm_chip * chip)1025 void tpm_tis_remove(struct tpm_chip *chip)
1026 {
1027 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1028 u32 reg = TPM_INT_ENABLE(priv->locality);
1029 u32 interrupt;
1030 int rc;
1031
1032 tpm_tis_clkrun_enable(chip, true);
1033
1034 rc = tpm_tis_read32(priv, reg, &interrupt);
1035 if (rc < 0)
1036 interrupt = 0;
1037
1038 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
1039 if (priv->free_irq_work.func)
1040 flush_work(&priv->free_irq_work);
1041
1042 tpm_tis_clkrun_enable(chip, false);
1043
1044 if (priv->ilb_base_addr)
1045 iounmap(priv->ilb_base_addr);
1046 }
1047 EXPORT_SYMBOL_GPL(tpm_tis_remove);
1048
1049 /**
1050 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
1051 * of a single TPM command
1052 * @chip: TPM chip to use
1053 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
1054 * 0 - Enable CLKRUN protocol
1055 * Call this function directly in tpm_tis_remove() in error or driver removal
1056 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
1057 */
tpm_tis_clkrun_enable(struct tpm_chip * chip,bool value)1058 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
1059 {
1060 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
1061 u32 clkrun_val;
1062
1063 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
1064 !data->ilb_base_addr)
1065 return;
1066
1067 if (value) {
1068 data->clkrun_enabled++;
1069 if (data->clkrun_enabled > 1)
1070 return;
1071 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1072
1073 /* Disable LPC CLKRUN# */
1074 clkrun_val &= ~LPC_CLKRUN_EN;
1075 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1076
1077 } else {
1078 data->clkrun_enabled--;
1079 if (data->clkrun_enabled)
1080 return;
1081
1082 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1083
1084 /* Enable LPC CLKRUN# */
1085 clkrun_val |= LPC_CLKRUN_EN;
1086 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1087 }
1088
1089 #ifdef CONFIG_HAS_IOPORT
1090 /*
1091 * Write any random value on port 0x80 which is on LPC, to make
1092 * sure LPC clock is running before sending any TPM command.
1093 */
1094 outb(0xCC, 0x80);
1095 #endif
1096 }
1097
1098 static const struct tpm_class_ops tpm_tis = {
1099 .flags = TPM_OPS_AUTO_STARTUP,
1100 .status = tpm_tis_status,
1101 .recv = tpm_tis_recv,
1102 .send = tpm_tis_send,
1103 .cancel = tpm_tis_ready,
1104 .update_timeouts = tpm_tis_update_timeouts,
1105 .update_durations = tpm_tis_update_durations,
1106 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1107 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1108 .req_canceled = tpm_tis_req_canceled,
1109 .request_locality = tpm_tis_request_locality,
1110 .relinquish_locality = tpm_tis_relinquish_locality,
1111 .clk_enable = tpm_tis_clkrun_enable,
1112 };
1113
tpm_tis_core_init(struct device * dev,struct tpm_tis_data * priv,int irq,const struct tpm_tis_phy_ops * phy_ops,acpi_handle acpi_dev_handle)1114 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
1115 const struct tpm_tis_phy_ops *phy_ops,
1116 acpi_handle acpi_dev_handle)
1117 {
1118 u32 vendor;
1119 u32 intfcaps;
1120 u32 intmask;
1121 u32 clkrun_val;
1122 u8 rid;
1123 int rc, probe;
1124 struct tpm_chip *chip;
1125
1126 chip = tpmm_chip_alloc(dev, &tpm_tis);
1127 if (IS_ERR(chip))
1128 return PTR_ERR(chip);
1129
1130 #ifdef CONFIG_ACPI
1131 chip->acpi_dev_handle = acpi_dev_handle;
1132 #endif
1133
1134 chip->hwrng.quality = priv->rng_quality;
1135
1136 /* Maximum timeouts */
1137 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
1138 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
1139 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
1140 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
1141 priv->chip = chip;
1142 priv->timeout_min = TPM_TIMEOUT_USECS_MIN;
1143 priv->timeout_max = TPM_TIMEOUT_USECS_MAX;
1144 priv->phy_ops = phy_ops;
1145 priv->locality_count = 0;
1146 mutex_init(&priv->locality_count_mutex);
1147 INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func);
1148
1149 dev_set_drvdata(&chip->dev, priv);
1150
1151 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
1152 if (rc < 0)
1153 return rc;
1154
1155 priv->manufacturer_id = vendor;
1156
1157 if (priv->manufacturer_id == TPM_VID_ATML &&
1158 !(chip->flags & TPM_CHIP_FLAG_TPM2)) {
1159 priv->timeout_min = TIS_TIMEOUT_MIN_ATML;
1160 priv->timeout_max = TIS_TIMEOUT_MAX_ATML;
1161 }
1162
1163 if (priv->manufacturer_id == TPM_VID_IFX)
1164 set_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags);
1165
1166 if (is_bsw()) {
1167 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
1168 ILB_REMAP_SIZE);
1169 if (!priv->ilb_base_addr)
1170 return -ENOMEM;
1171
1172 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
1173 /* Check if CLKRUN# is already not enabled in the LPC bus */
1174 if (!(clkrun_val & LPC_CLKRUN_EN)) {
1175 iounmap(priv->ilb_base_addr);
1176 priv->ilb_base_addr = NULL;
1177 }
1178 }
1179
1180 if (chip->ops->clk_enable != NULL)
1181 chip->ops->clk_enable(chip, true);
1182
1183 if (wait_startup(chip, 0) != 0) {
1184 rc = -ENODEV;
1185 goto out_err;
1186 }
1187
1188 /* Take control of the TPM's interrupt hardware and shut it off */
1189 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1190 if (rc < 0)
1191 goto out_err;
1192
1193 /* Figure out the capabilities */
1194 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
1195 if (rc < 0)
1196 goto out_err;
1197
1198 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
1199 intfcaps);
1200 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
1201 dev_dbg(dev, "\tBurst Count Static\n");
1202 if (intfcaps & TPM_INTF_CMD_READY_INT) {
1203 intmask |= TPM_INTF_CMD_READY_INT;
1204 dev_dbg(dev, "\tCommand Ready Int Support\n");
1205 }
1206 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
1207 dev_dbg(dev, "\tInterrupt Edge Falling\n");
1208 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
1209 dev_dbg(dev, "\tInterrupt Edge Rising\n");
1210 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
1211 dev_dbg(dev, "\tInterrupt Level Low\n");
1212 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
1213 dev_dbg(dev, "\tInterrupt Level High\n");
1214 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) {
1215 intmask |= TPM_INTF_LOCALITY_CHANGE_INT;
1216 dev_dbg(dev, "\tLocality Change Int Support\n");
1217 }
1218 if (intfcaps & TPM_INTF_STS_VALID_INT) {
1219 intmask |= TPM_INTF_STS_VALID_INT;
1220 dev_dbg(dev, "\tSts Valid Int Support\n");
1221 }
1222 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) {
1223 intmask |= TPM_INTF_DATA_AVAIL_INT;
1224 dev_dbg(dev, "\tData Avail Int Support\n");
1225 }
1226
1227 intmask &= ~TPM_GLOBAL_INT_ENABLE;
1228
1229 rc = tpm_tis_request_locality(chip, 0);
1230 if (rc < 0) {
1231 rc = -ENODEV;
1232 goto out_err;
1233 }
1234
1235 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1236 tpm_tis_relinquish_locality(chip, 0);
1237
1238 rc = tpm_chip_start(chip);
1239 if (rc)
1240 goto out_err;
1241 rc = tpm2_probe(chip);
1242 tpm_chip_stop(chip);
1243 if (rc)
1244 goto out_err;
1245
1246 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
1247 if (rc < 0)
1248 goto out_err;
1249
1250 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
1251 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
1252 vendor >> 16, rid);
1253
1254 probe = probe_itpm(chip);
1255 if (probe < 0) {
1256 rc = -ENODEV;
1257 goto out_err;
1258 }
1259
1260 /* INTERRUPT Setup */
1261 init_waitqueue_head(&priv->read_queue);
1262 init_waitqueue_head(&priv->int_queue);
1263
1264 rc = tpm_chip_bootstrap(chip);
1265 if (rc)
1266 goto out_err;
1267
1268 if (irq != -1) {
1269 /*
1270 * Before doing irq testing issue a command to the TPM in polling mode
1271 * to make sure it works. May as well use that command to set the
1272 * proper timeouts for the driver.
1273 */
1274
1275 rc = tpm_tis_request_locality(chip, 0);
1276 if (rc < 0)
1277 goto out_err;
1278
1279 rc = tpm_get_timeouts(chip);
1280
1281 tpm_tis_relinquish_locality(chip, 0);
1282
1283 if (rc) {
1284 dev_err(dev, "Could not get TPM timeouts and durations\n");
1285 rc = -ENODEV;
1286 goto out_err;
1287 }
1288
1289 if (irq)
1290 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
1291 irq);
1292 else
1293 tpm_tis_probe_irq(chip, intmask);
1294
1295 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
1296 priv->int_mask = intmask;
1297 } else {
1298 dev_err(&chip->dev, FW_BUG
1299 "TPM interrupt not working, polling instead\n");
1300
1301 rc = tpm_tis_request_locality(chip, 0);
1302 if (rc < 0)
1303 goto out_err;
1304 tpm_tis_disable_interrupts(chip);
1305 tpm_tis_relinquish_locality(chip, 0);
1306 }
1307 }
1308
1309 rc = tpm_chip_register(chip);
1310 if (rc)
1311 goto out_err;
1312
1313 if (chip->ops->clk_enable != NULL)
1314 chip->ops->clk_enable(chip, false);
1315
1316 return 0;
1317 out_err:
1318 if (chip->ops->clk_enable != NULL)
1319 chip->ops->clk_enable(chip, false);
1320
1321 tpm_tis_remove(chip);
1322
1323 return rc;
1324 }
1325 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1326
1327 #ifdef CONFIG_PM_SLEEP
tpm_tis_reenable_interrupts(struct tpm_chip * chip)1328 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1329 {
1330 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1331 u32 intmask;
1332 int rc;
1333
1334 /*
1335 * Re-enable interrupts that device may have lost or BIOS/firmware may
1336 * have disabled.
1337 */
1338 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1339 if (rc < 0) {
1340 dev_err(&chip->dev, "Setting IRQ failed.\n");
1341 return;
1342 }
1343
1344 intmask = priv->int_mask | TPM_GLOBAL_INT_ENABLE;
1345 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1346 if (rc < 0)
1347 dev_err(&chip->dev, "Enabling interrupts failed.\n");
1348 }
1349
tpm_tis_resume(struct device * dev)1350 int tpm_tis_resume(struct device *dev)
1351 {
1352 struct tpm_chip *chip = dev_get_drvdata(dev);
1353 int ret;
1354
1355 ret = tpm_chip_start(chip);
1356 if (ret)
1357 return ret;
1358
1359 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1360 tpm_tis_reenable_interrupts(chip);
1361
1362 /*
1363 * TPM 1.2 requires self-test on resume. This function actually returns
1364 * an error code but for unknown reason it isn't handled.
1365 */
1366 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1367 tpm1_do_selftest(chip);
1368
1369 tpm_chip_stop(chip);
1370
1371 ret = tpm_pm_resume(dev);
1372 if (ret)
1373 return ret;
1374
1375 return 0;
1376 }
1377 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1378 #endif
1379
1380 MODULE_AUTHOR("Leendert van Doorn <leendert@watson.ibm.com>");
1381 MODULE_DESCRIPTION("TPM Driver");
1382 MODULE_VERSION("2.0");
1383 MODULE_LICENSE("GPL");
1384