1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2005, 2006 IBM Corporation 4 * Copyright (C) 2014, 2015 Intel Corporation 5 * 6 * Authors: 7 * Leendert van Doorn <leendert@watson.ibm.com> 8 * Kylene Hall <kjhall@us.ibm.com> 9 * 10 * Maintained by: <tpmdd-devel@lists.sourceforge.net> 11 * 12 * Device driver for TCG/TCPA TPM (trusted platform module). 13 * Specifications at www.trustedcomputinggroup.org 14 * 15 * This device driver implements the TPM interface as defined in 16 * the TCG TPM Interface Spec version 1.2, revision 1.0. 17 */ 18 #include <linux/init.h> 19 #include <linux/module.h> 20 #include <linux/moduleparam.h> 21 #include <linux/pnp.h> 22 #include <linux/slab.h> 23 #include <linux/interrupt.h> 24 #include <linux/wait.h> 25 #include <linux/acpi.h> 26 #include <linux/freezer.h> 27 #include <linux/dmi.h> 28 #include "tpm.h" 29 #include "tpm_tis_core.h" 30 31 #define TPM_TIS_MAX_UNHANDLED_IRQS 1000 32 33 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value); 34 35 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask, 36 bool check_cancel, bool *canceled) 37 { 38 u8 status = chip->ops->status(chip); 39 40 *canceled = false; 41 if ((status & mask) == mask) 42 return true; 43 if (check_cancel && chip->ops->req_canceled(chip, status)) { 44 *canceled = true; 45 return true; 46 } 47 return false; 48 } 49 50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask) 51 { 52 if (!(int_mask & TPM_INTF_STS_VALID_INT)) 53 sts_mask &= ~TPM_STS_VALID; 54 55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT)) 56 sts_mask &= ~TPM_STS_DATA_AVAIL; 57 58 if (!(int_mask & TPM_INTF_CMD_READY_INT)) 59 sts_mask &= ~TPM_STS_COMMAND_READY; 60 61 return sts_mask; 62 } 63 64 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask, 65 unsigned long timeout, wait_queue_head_t *queue, 66 bool check_cancel) 67 { 68 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 69 DEFINE_WAIT_FUNC(wait, woken_wake_function); 70 unsigned long stop; 71 u8 status; 72 bool canceled = false; 73 u8 sts_mask; 74 int ret = 0; 75 76 /* check current status */ 77 status = chip->ops->status(chip); 78 if ((status & mask) == mask) 79 return 0; 80 81 sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL | 82 TPM_STS_COMMAND_READY); 83 /* check what status changes can be handled by irqs */ 84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask); 85 86 stop = jiffies + timeout; 87 /* process status changes with irq support */ 88 if (sts_mask) { 89 ret = -ETIME; 90 add_wait_queue(queue, &wait); 91 again: 92 if (wait_for_tpm_stat_cond(chip, sts_mask, check_cancel, 93 &canceled)) { 94 ret = canceled ? -ECANCELED : 0; 95 goto out; 96 } 97 98 timeout = stop - jiffies; 99 if ((long)timeout <= 0) 100 goto out; 101 102 if (signal_pending(current)) { 103 if (freezing(current)) { 104 clear_thread_flag(TIF_SIGPENDING); 105 goto again; 106 } 107 goto out; 108 } 109 110 wait_woken(&wait, TASK_INTERRUPTIBLE, timeout); 111 goto again; 112 out: 113 remove_wait_queue(queue, &wait); 114 } 115 116 if (ret) 117 return ret; 118 119 mask &= ~sts_mask; 120 if (!mask) /* all done */ 121 return 0; 122 /* process status changes without irq support */ 123 do { 124 usleep_range(priv->timeout_min, priv->timeout_max); 125 status = chip->ops->status(chip); 126 if ((status & mask) == mask) 127 return 0; 128 } while (time_before(jiffies, stop)); 129 return -ETIME; 130 } 131 132 /* Before we attempt to access the TPM we must see that the valid bit is set. 133 * The specification says that this bit is 0 at reset and remains 0 until the 134 * 'TPM has gone through its self test and initialization and has established 135 * correct values in the other bits.' 136 */ 137 static int wait_startup(struct tpm_chip *chip, int l) 138 { 139 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 140 unsigned long stop = jiffies + chip->timeout_a; 141 142 do { 143 int rc; 144 u8 access; 145 146 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 147 if (rc < 0) 148 return rc; 149 150 if (access & TPM_ACCESS_VALID) 151 return 0; 152 tpm_msleep(TPM_TIMEOUT); 153 } while (time_before(jiffies, stop)); 154 return -1; 155 } 156 157 static bool check_locality(struct tpm_chip *chip, int l) 158 { 159 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 160 int rc; 161 u8 access; 162 163 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access); 164 if (rc < 0) 165 return false; 166 167 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID 168 | TPM_ACCESS_REQUEST_USE)) == 169 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { 170 priv->locality = l; 171 return true; 172 } 173 174 return false; 175 } 176 177 static int __tpm_tis_relinquish_locality(struct tpm_tis_data *priv, int l) 178 { 179 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY); 180 181 if (test_bit(TPM_TIS_SETTLE_AFTER_RELINQUISH, &priv->flags)) 182 tpm_msleep(TPM_TIMEOUT); 183 184 return 0; 185 } 186 187 static int tpm_tis_relinquish_locality(struct tpm_chip *chip, int l) 188 { 189 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 190 191 mutex_lock(&priv->locality_count_mutex); 192 priv->locality_count--; 193 if (priv->locality_count == 0) 194 __tpm_tis_relinquish_locality(priv, l); 195 mutex_unlock(&priv->locality_count_mutex); 196 197 return 0; 198 } 199 200 static int __tpm_tis_request_locality(struct tpm_chip *chip, int l) 201 { 202 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 203 unsigned long stop, timeout; 204 long rc; 205 206 if (check_locality(chip, l)) 207 return l; 208 209 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE); 210 if (rc < 0) 211 return rc; 212 213 stop = jiffies + chip->timeout_a; 214 215 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 216 again: 217 timeout = stop - jiffies; 218 if ((long)timeout <= 0) 219 return -1; 220 rc = wait_event_interruptible_timeout(priv->int_queue, 221 (check_locality 222 (chip, l)), 223 timeout); 224 if (rc > 0) 225 return l; 226 if (rc == -ERESTARTSYS && freezing(current)) { 227 clear_thread_flag(TIF_SIGPENDING); 228 goto again; 229 } 230 } else { 231 /* wait for burstcount */ 232 do { 233 if (check_locality(chip, l)) 234 return l; 235 tpm_msleep(TPM_TIMEOUT); 236 } while (time_before(jiffies, stop)); 237 } 238 return -1; 239 } 240 241 static int tpm_tis_request_locality(struct tpm_chip *chip, int l) 242 { 243 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 244 int ret = 0; 245 246 mutex_lock(&priv->locality_count_mutex); 247 if (priv->locality_count == 0) 248 ret = __tpm_tis_request_locality(chip, l); 249 if (!ret) 250 priv->locality_count++; 251 mutex_unlock(&priv->locality_count_mutex); 252 return ret; 253 } 254 255 static u8 tpm_tis_status(struct tpm_chip *chip) 256 { 257 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 258 int rc; 259 u8 status; 260 261 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status); 262 if (rc < 0) 263 return 0; 264 265 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) { 266 if (!test_and_set_bit(TPM_TIS_INVALID_STATUS, &priv->flags)) { 267 /* 268 * If this trips, the chances are the read is 269 * returning 0xff because the locality hasn't been 270 * acquired. Usually because tpm_try_get_ops() hasn't 271 * been called before doing a TPM operation. 272 */ 273 dev_err(&chip->dev, "invalid TPM_STS.x 0x%02x, dumping stack for forensics\n", 274 status); 275 276 /* 277 * Dump stack for forensics, as invalid TPM_STS.x could be 278 * potentially triggered by impaired tpm_try_get_ops(). 279 */ 280 dump_stack(); 281 } 282 283 return 0; 284 } 285 286 return status; 287 } 288 289 static void tpm_tis_ready(struct tpm_chip *chip) 290 { 291 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 292 293 /* this causes the current command to be aborted */ 294 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY); 295 } 296 297 static int get_burstcount(struct tpm_chip *chip) 298 { 299 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 300 unsigned long stop; 301 int burstcnt, rc; 302 u32 value; 303 304 /* wait for burstcount */ 305 if (chip->flags & TPM_CHIP_FLAG_TPM2) 306 stop = jiffies + chip->timeout_a; 307 else 308 stop = jiffies + chip->timeout_d; 309 do { 310 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value); 311 if (rc < 0) 312 return rc; 313 314 burstcnt = (value >> 8) & 0xFFFF; 315 if (burstcnt) 316 return burstcnt; 317 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX); 318 } while (time_before(jiffies, stop)); 319 return -EBUSY; 320 } 321 322 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count) 323 { 324 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 325 int size = 0, burstcnt, rc; 326 327 while (size < count) { 328 rc = wait_for_tpm_stat(chip, 329 TPM_STS_DATA_AVAIL | TPM_STS_VALID, 330 chip->timeout_c, 331 &priv->read_queue, true); 332 if (rc < 0) 333 return rc; 334 burstcnt = get_burstcount(chip); 335 if (burstcnt < 0) { 336 dev_err(&chip->dev, "Unable to read burstcount\n"); 337 return burstcnt; 338 } 339 burstcnt = min_t(int, burstcnt, count - size); 340 341 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality), 342 burstcnt, buf + size); 343 if (rc < 0) 344 return rc; 345 346 size += burstcnt; 347 } 348 return size; 349 } 350 351 static int tpm_tis_try_recv(struct tpm_chip *chip, u8 *buf, size_t count) 352 { 353 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 354 int size = 0; 355 int status; 356 u32 expected; 357 int rc; 358 359 size = recv_data(chip, buf, TPM_HEADER_SIZE); 360 /* read first 10 bytes, including tag, paramsize, and result */ 361 if (size < TPM_HEADER_SIZE) { 362 dev_err(&chip->dev, "Unable to read header\n"); 363 goto out; 364 } 365 366 expected = be32_to_cpu(*(__be32 *) (buf + 2)); 367 if (expected > count || expected < TPM_HEADER_SIZE) { 368 size = -EIO; 369 goto out; 370 } 371 372 rc = recv_data(chip, &buf[TPM_HEADER_SIZE], 373 expected - TPM_HEADER_SIZE); 374 if (rc < 0) { 375 size = rc; 376 goto out; 377 } 378 size += rc; 379 if (size < expected) { 380 dev_err(&chip->dev, "Unable to read remainder of result\n"); 381 size = -ETIME; 382 goto out; 383 } 384 385 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 386 &priv->int_queue, false) < 0) { 387 size = -ETIME; 388 goto out; 389 } 390 status = tpm_tis_status(chip); 391 if (status & TPM_STS_DATA_AVAIL) { 392 dev_err(&chip->dev, "Error left over data\n"); 393 size = -EIO; 394 goto out; 395 } 396 397 rc = tpm_tis_verify_crc(priv, (size_t)size, buf); 398 if (rc < 0) { 399 dev_err(&chip->dev, "CRC mismatch for response.\n"); 400 size = rc; 401 goto out; 402 } 403 404 out: 405 return size; 406 } 407 408 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count) 409 { 410 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 411 unsigned int try; 412 int rc = 0; 413 414 if (count < TPM_HEADER_SIZE) 415 return -EIO; 416 417 for (try = 0; try < TPM_RETRY; try++) { 418 rc = tpm_tis_try_recv(chip, buf, count); 419 420 if (rc == -EIO) 421 /* Data transfer errors, indicated by EIO, can be 422 * recovered by rereading the response. 423 */ 424 tpm_tis_write8(priv, TPM_STS(priv->locality), 425 TPM_STS_RESPONSE_RETRY); 426 else 427 break; 428 } 429 430 tpm_tis_ready(chip); 431 432 return rc; 433 } 434 435 /* 436 * If interrupts are used (signaled by an irq set in the vendor structure) 437 * tpm.c can skip polling for the data to be available as the interrupt is 438 * waited for here 439 */ 440 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len) 441 { 442 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 443 int rc, status, burstcnt; 444 size_t count = 0; 445 bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 446 447 status = tpm_tis_status(chip); 448 if ((status & TPM_STS_COMMAND_READY) == 0) { 449 tpm_tis_ready(chip); 450 if (wait_for_tpm_stat 451 (chip, TPM_STS_COMMAND_READY, chip->timeout_b, 452 &priv->int_queue, false) < 0) { 453 rc = -ETIME; 454 goto out_err; 455 } 456 } 457 458 while (count < len - 1) { 459 burstcnt = get_burstcount(chip); 460 if (burstcnt < 0) { 461 dev_err(&chip->dev, "Unable to read burstcount\n"); 462 rc = burstcnt; 463 goto out_err; 464 } 465 burstcnt = min_t(int, burstcnt, len - count - 1); 466 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality), 467 burstcnt, buf + count); 468 if (rc < 0) 469 goto out_err; 470 471 count += burstcnt; 472 473 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 474 &priv->int_queue, false) < 0) { 475 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags)) 476 rc = -EAGAIN; 477 else 478 rc = -ETIME; 479 goto out_err; 480 } 481 status = tpm_tis_status(chip); 482 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) { 483 rc = -EIO; 484 dev_err(&chip->dev, "TPM_STS_DATA_EXPECT should be set. sts = 0x%08x\n", 485 status); 486 goto out_err; 487 } 488 } 489 490 /* write last byte */ 491 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]); 492 if (rc < 0) 493 goto out_err; 494 495 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c, 496 &priv->int_queue, false) < 0) { 497 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags)) 498 rc = -EAGAIN; 499 else 500 rc = -ETIME; 501 goto out_err; 502 } 503 status = tpm_tis_status(chip); 504 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) { 505 rc = -EIO; 506 dev_err(&chip->dev, "TPM_STS_DATA_EXPECT should be unset. sts = 0x%08x\n", 507 status); 508 goto out_err; 509 } 510 511 rc = tpm_tis_verify_crc(priv, len, buf); 512 if (rc < 0) { 513 dev_err(&chip->dev, "CRC mismatch for command.\n"); 514 goto out_err; 515 } 516 517 return 0; 518 519 out_err: 520 tpm_tis_ready(chip); 521 return rc; 522 } 523 524 static void __tpm_tis_disable_interrupts(struct tpm_chip *chip) 525 { 526 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 527 u32 int_mask = 0; 528 529 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask); 530 int_mask &= ~TPM_GLOBAL_INT_ENABLE; 531 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask); 532 533 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 534 } 535 536 static void tpm_tis_disable_interrupts(struct tpm_chip *chip) 537 { 538 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 539 540 if (priv->irq == 0) 541 return; 542 543 __tpm_tis_disable_interrupts(chip); 544 545 devm_free_irq(chip->dev.parent, priv->irq, chip); 546 priv->irq = 0; 547 } 548 549 /* 550 * If interrupts are used (signaled by an irq set in the vendor structure) 551 * tpm.c can skip polling for the data to be available as the interrupt is 552 * waited for here 553 */ 554 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len) 555 { 556 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 557 int rc; 558 u32 ordinal; 559 unsigned long dur; 560 unsigned int try; 561 562 for (try = 0; try < TPM_RETRY; try++) { 563 rc = tpm_tis_send_data(chip, buf, len); 564 if (rc >= 0) 565 /* Data transfer done successfully */ 566 break; 567 else if (rc != -EAGAIN && rc != -EIO) 568 /* Data transfer failed, not recoverable */ 569 goto out_err; 570 571 usleep_range(priv->timeout_min, priv->timeout_max); 572 } 573 574 if (rc == -EAGAIN || rc == -EIO) { 575 dev_err(&chip->dev, "Exhausted %d tpm_tis_send_data retries\n", TPM_RETRY); 576 goto out_err; 577 } 578 579 /* go and do it */ 580 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO); 581 if (rc < 0) 582 goto out_err; 583 584 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 585 ordinal = be32_to_cpu(*((__be32 *) (buf + 6))); 586 587 dur = tpm_calc_ordinal_duration(chip, ordinal); 588 if (wait_for_tpm_stat 589 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur, 590 &priv->read_queue, false) < 0) { 591 rc = -ETIME; 592 goto out_err; 593 } 594 } 595 return 0; 596 out_err: 597 tpm_tis_ready(chip); 598 return rc; 599 } 600 601 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz, 602 size_t len) 603 { 604 int rc, irq; 605 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 606 607 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || 608 test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 609 return tpm_tis_send_main(chip, buf, len); 610 611 /* Verify receipt of the expected IRQ */ 612 irq = priv->irq; 613 priv->irq = 0; 614 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 615 rc = tpm_tis_send_main(chip, buf, len); 616 priv->irq = irq; 617 chip->flags |= TPM_CHIP_FLAG_IRQ; 618 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 619 tpm_msleep(1); 620 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags)) 621 tpm_tis_disable_interrupts(chip); 622 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 623 return rc; 624 } 625 626 struct tis_vendor_durations_override { 627 u32 did_vid; 628 struct tpm1_version version; 629 unsigned long durations[3]; 630 }; 631 632 static const struct tis_vendor_durations_override vendor_dur_overrides[] = { 633 /* STMicroelectronics 0x104a */ 634 { 0x0000104a, 635 { 1, 2, 8, 28 }, 636 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } }, 637 }; 638 639 static void tpm_tis_update_durations(struct tpm_chip *chip, 640 unsigned long *duration_cap) 641 { 642 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 643 struct tpm1_version *version; 644 u32 did_vid; 645 int i, rc; 646 cap_t cap; 647 648 chip->duration_adjusted = false; 649 650 if (chip->ops->clk_enable != NULL) 651 chip->ops->clk_enable(chip, true); 652 653 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 654 if (rc < 0) { 655 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n", 656 __func__, rc); 657 goto out; 658 } 659 660 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */ 661 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap, 662 "attempting to determine the 1.2 version", 663 sizeof(cap.version2)); 664 if (!rc) { 665 version = &cap.version2.version; 666 } else { 667 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap, 668 "attempting to determine the 1.1 version", 669 sizeof(cap.version1)); 670 671 if (rc) 672 goto out; 673 674 version = &cap.version1; 675 } 676 677 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) { 678 if (vendor_dur_overrides[i].did_vid != did_vid) 679 continue; 680 681 if ((version->major == 682 vendor_dur_overrides[i].version.major) && 683 (version->minor == 684 vendor_dur_overrides[i].version.minor) && 685 (version->rev_major == 686 vendor_dur_overrides[i].version.rev_major) && 687 (version->rev_minor == 688 vendor_dur_overrides[i].version.rev_minor)) { 689 690 memcpy(duration_cap, 691 vendor_dur_overrides[i].durations, 692 sizeof(vendor_dur_overrides[i].durations)); 693 694 chip->duration_adjusted = true; 695 goto out; 696 } 697 } 698 699 out: 700 if (chip->ops->clk_enable != NULL) 701 chip->ops->clk_enable(chip, false); 702 } 703 704 struct tis_vendor_timeout_override { 705 u32 did_vid; 706 unsigned long timeout_us[4]; 707 }; 708 709 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = { 710 /* Atmel 3204 */ 711 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000), 712 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } }, 713 }; 714 715 static void tpm_tis_update_timeouts(struct tpm_chip *chip, 716 unsigned long *timeout_cap) 717 { 718 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 719 int i, rc; 720 u32 did_vid; 721 722 chip->timeout_adjusted = false; 723 724 if (chip->ops->clk_enable != NULL) 725 chip->ops->clk_enable(chip, true); 726 727 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid); 728 if (rc < 0) { 729 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n", 730 __func__, rc); 731 goto out; 732 } 733 734 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) { 735 if (vendor_timeout_overrides[i].did_vid != did_vid) 736 continue; 737 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us, 738 sizeof(vendor_timeout_overrides[i].timeout_us)); 739 chip->timeout_adjusted = true; 740 } 741 742 out: 743 if (chip->ops->clk_enable != NULL) 744 chip->ops->clk_enable(chip, false); 745 746 return; 747 } 748 749 /* 750 * Early probing for iTPM with STS_DATA_EXPECT flaw. 751 * Try sending command without itpm flag set and if that 752 * fails, repeat with itpm flag set. 753 */ 754 static int probe_itpm(struct tpm_chip *chip) 755 { 756 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 757 int rc = 0; 758 static const u8 cmd_getticks[] = { 759 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a, 760 0x00, 0x00, 0x00, 0xf1 761 }; 762 size_t len = sizeof(cmd_getticks); 763 u16 vendor; 764 765 if (test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags)) 766 return 0; 767 768 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor); 769 if (rc < 0) 770 return rc; 771 772 /* probe only iTPMS */ 773 if (vendor != TPM_VID_INTEL) 774 return 0; 775 776 if (tpm_tis_request_locality(chip, 0) != 0) 777 return -EBUSY; 778 779 rc = tpm_tis_send_data(chip, cmd_getticks, len); 780 if (rc == 0) 781 goto out; 782 783 tpm_tis_ready(chip); 784 785 set_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 786 787 rc = tpm_tis_send_data(chip, cmd_getticks, len); 788 if (rc == 0) 789 dev_info(&chip->dev, "Detected an iTPM.\n"); 790 else { 791 clear_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags); 792 rc = -EFAULT; 793 } 794 795 out: 796 tpm_tis_ready(chip); 797 tpm_tis_relinquish_locality(chip, priv->locality); 798 799 return rc; 800 } 801 802 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status) 803 { 804 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 805 u16 vendor_id = priv->did_vid; 806 807 if (!test_bit(TPM_TIS_DEFAULT_CANCELLATION, &priv->flags)) { 808 switch (vendor_id) { 809 case TPM_VID_WINBOND: 810 return ((status == TPM_STS_VALID) || 811 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY))); 812 case TPM_VID_STM: 813 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)); 814 default: 815 break; 816 } 817 } 818 819 return status == TPM_STS_COMMAND_READY; 820 } 821 822 static irqreturn_t tpm_tis_revert_interrupts(struct tpm_chip *chip) 823 { 824 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 825 const char *product; 826 const char *vendor; 827 828 dev_warn(&chip->dev, FW_BUG 829 "TPM interrupt storm detected, polling instead\n"); 830 831 vendor = dmi_get_system_info(DMI_SYS_VENDOR); 832 product = dmi_get_system_info(DMI_PRODUCT_VERSION); 833 834 if (vendor && product) { 835 dev_info(&chip->dev, 836 "Consider adding the following entry to tpm_tis_dmi_table:\n"); 837 dev_info(&chip->dev, "\tDMI_SYS_VENDOR: %s\n", vendor); 838 dev_info(&chip->dev, "\tDMI_PRODUCT_VERSION: %s\n", product); 839 } 840 841 if (tpm_tis_request_locality(chip, 0) != 0) 842 return IRQ_NONE; 843 844 __tpm_tis_disable_interrupts(chip); 845 tpm_tis_relinquish_locality(chip, 0); 846 847 schedule_work(&priv->free_irq_work); 848 849 return IRQ_HANDLED; 850 } 851 852 static irqreturn_t tpm_tis_update_unhandled_irqs(struct tpm_chip *chip) 853 { 854 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 855 irqreturn_t irqret = IRQ_HANDLED; 856 857 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) 858 return IRQ_HANDLED; 859 860 if (time_after(jiffies, priv->last_unhandled_irq + HZ/10)) 861 priv->unhandled_irqs = 1; 862 else 863 priv->unhandled_irqs++; 864 865 priv->last_unhandled_irq = jiffies; 866 867 if (priv->unhandled_irqs > TPM_TIS_MAX_UNHANDLED_IRQS) 868 irqret = tpm_tis_revert_interrupts(chip); 869 870 return irqret; 871 } 872 873 static irqreturn_t tis_int_handler(int dummy, void *dev_id) 874 { 875 struct tpm_chip *chip = dev_id; 876 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 877 u32 interrupt; 878 int rc; 879 880 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 881 if (rc < 0) 882 goto err; 883 884 if (interrupt == 0) 885 goto err; 886 887 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 888 if (interrupt & TPM_INTF_DATA_AVAIL_INT) 889 wake_up_interruptible(&priv->read_queue); 890 891 if (interrupt & 892 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT | 893 TPM_INTF_CMD_READY_INT)) 894 wake_up_interruptible(&priv->int_queue); 895 896 /* Clear interrupts handled with TPM_EOI */ 897 tpm_tis_request_locality(chip, 0); 898 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt); 899 tpm_tis_relinquish_locality(chip, 0); 900 if (rc < 0) 901 goto err; 902 903 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt); 904 return IRQ_HANDLED; 905 906 err: 907 return tpm_tis_update_unhandled_irqs(chip); 908 } 909 910 static void tpm_tis_gen_interrupt(struct tpm_chip *chip) 911 { 912 const char *desc = "attempting to generate an interrupt"; 913 u32 cap2; 914 cap_t cap; 915 int ret; 916 917 chip->flags |= TPM_CHIP_FLAG_IRQ; 918 919 if (chip->flags & TPM_CHIP_FLAG_TPM2) 920 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc); 921 else 922 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0); 923 924 if (ret) 925 chip->flags &= ~TPM_CHIP_FLAG_IRQ; 926 } 927 928 static void tpm_tis_free_irq_func(struct work_struct *work) 929 { 930 struct tpm_tis_data *priv = container_of(work, typeof(*priv), free_irq_work); 931 struct tpm_chip *chip = priv->chip; 932 933 devm_free_irq(chip->dev.parent, priv->irq, chip); 934 priv->irq = 0; 935 } 936 937 /* Register the IRQ and issue a command that will cause an interrupt. If an 938 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse 939 * everything and leave in polling mode. Returns 0 on success. 940 */ 941 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask, 942 int flags, int irq) 943 { 944 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 945 u8 original_int_vec; 946 int rc; 947 u32 int_status; 948 949 rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL, 950 tis_int_handler, IRQF_ONESHOT | flags, 951 dev_name(&chip->dev), chip); 952 if (rc) { 953 dev_info(&chip->dev, "Unable to request irq: %d for probe\n", 954 irq); 955 return -1; 956 } 957 priv->irq = irq; 958 959 rc = tpm_tis_request_locality(chip, 0); 960 if (rc < 0) 961 return rc; 962 963 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 964 &original_int_vec); 965 if (rc < 0) { 966 tpm_tis_relinquish_locality(chip, priv->locality); 967 return rc; 968 } 969 970 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq); 971 if (rc < 0) 972 goto restore_irqs; 973 974 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status); 975 if (rc < 0) 976 goto restore_irqs; 977 978 /* Clear all existing */ 979 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status); 980 if (rc < 0) 981 goto restore_irqs; 982 /* Turn on */ 983 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), 984 intmask | TPM_GLOBAL_INT_ENABLE); 985 if (rc < 0) 986 goto restore_irqs; 987 988 clear_bit(TPM_TIS_IRQ_TESTED, &priv->flags); 989 990 /* Generate an interrupt by having the core call through to 991 * tpm_tis_send 992 */ 993 tpm_tis_gen_interrupt(chip); 994 995 restore_irqs: 996 /* tpm_tis_send will either confirm the interrupt is working or it 997 * will call disable_irq which undoes all of the above. 998 */ 999 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) { 1000 tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), 1001 original_int_vec); 1002 rc = -1; 1003 } 1004 1005 tpm_tis_relinquish_locality(chip, priv->locality); 1006 1007 return rc; 1008 } 1009 1010 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that 1011 * do not have ACPI/etc. We typically expect the interrupt to be declared if 1012 * present. 1013 */ 1014 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask) 1015 { 1016 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 1017 u8 original_int_vec; 1018 int i, rc; 1019 1020 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality), 1021 &original_int_vec); 1022 if (rc < 0) 1023 return; 1024 1025 if (!original_int_vec) { 1026 if (IS_ENABLED(CONFIG_X86)) 1027 for (i = 3; i <= 15; i++) 1028 if (!tpm_tis_probe_irq_single(chip, intmask, 0, 1029 i)) 1030 return; 1031 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0, 1032 original_int_vec)) 1033 return; 1034 } 1035 1036 void tpm_tis_remove(struct tpm_chip *chip) 1037 { 1038 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 1039 u32 reg = TPM_INT_ENABLE(priv->locality); 1040 u32 interrupt; 1041 int rc; 1042 1043 tpm_tis_clkrun_enable(chip, true); 1044 1045 rc = tpm_tis_read32(priv, reg, &interrupt); 1046 if (rc < 0) 1047 interrupt = 0; 1048 1049 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt); 1050 if (priv->free_irq_work.func) 1051 flush_work(&priv->free_irq_work); 1052 1053 tpm_tis_clkrun_enable(chip, false); 1054 1055 if (priv->ilb_base_addr) 1056 iounmap(priv->ilb_base_addr); 1057 } 1058 EXPORT_SYMBOL_GPL(tpm_tis_remove); 1059 1060 /** 1061 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration 1062 * of a single TPM command 1063 * @chip: TPM chip to use 1064 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running 1065 * 0 - Enable CLKRUN protocol 1066 * Call this function directly in tpm_tis_remove() in error or driver removal 1067 * path, since the chip->ops is set to NULL in tpm_chip_unregister(). 1068 */ 1069 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value) 1070 { 1071 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev); 1072 u32 clkrun_val; 1073 1074 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() || 1075 !data->ilb_base_addr) 1076 return; 1077 1078 if (value) { 1079 data->clkrun_enabled++; 1080 if (data->clkrun_enabled > 1) 1081 return; 1082 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 1083 1084 /* Disable LPC CLKRUN# */ 1085 clkrun_val &= ~LPC_CLKRUN_EN; 1086 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 1087 1088 } else { 1089 data->clkrun_enabled--; 1090 if (data->clkrun_enabled) 1091 return; 1092 1093 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET); 1094 1095 /* Enable LPC CLKRUN# */ 1096 clkrun_val |= LPC_CLKRUN_EN; 1097 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET); 1098 } 1099 1100 #ifdef CONFIG_HAS_IOPORT 1101 /* 1102 * Write any random value on port 0x80 which is on LPC, to make 1103 * sure LPC clock is running before sending any TPM command. 1104 */ 1105 outb(0xCC, 0x80); 1106 #endif 1107 } 1108 1109 static const struct tpm_class_ops tpm_tis = { 1110 .flags = TPM_OPS_AUTO_STARTUP, 1111 .status = tpm_tis_status, 1112 .recv = tpm_tis_recv, 1113 .send = tpm_tis_send, 1114 .cancel = tpm_tis_ready, 1115 .update_timeouts = tpm_tis_update_timeouts, 1116 .update_durations = tpm_tis_update_durations, 1117 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 1118 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, 1119 .req_canceled = tpm_tis_req_canceled, 1120 .request_locality = tpm_tis_request_locality, 1121 .relinquish_locality = tpm_tis_relinquish_locality, 1122 .clk_enable = tpm_tis_clkrun_enable, 1123 }; 1124 1125 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, 1126 const struct tpm_tis_phy_ops *phy_ops, 1127 acpi_handle acpi_dev_handle) 1128 { 1129 u16 vendor_id; 1130 u16 device_id; 1131 u32 intfcaps; 1132 u32 intmask; 1133 u32 clkrun_val; 1134 u8 rid; 1135 int rc, probe; 1136 struct tpm_chip *chip; 1137 1138 chip = tpmm_chip_alloc(dev, &tpm_tis); 1139 if (IS_ERR(chip)) 1140 return PTR_ERR(chip); 1141 1142 #ifdef CONFIG_ACPI 1143 chip->acpi_dev_handle = acpi_dev_handle; 1144 #endif 1145 1146 chip->hwrng.quality = priv->rng_quality; 1147 1148 /* Maximum timeouts */ 1149 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX); 1150 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX); 1151 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX); 1152 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX); 1153 priv->chip = chip; 1154 priv->timeout_min = TPM_TIMEOUT_USECS_MIN; 1155 priv->timeout_max = TPM_TIMEOUT_USECS_MAX; 1156 priv->phy_ops = phy_ops; 1157 priv->locality_count = 0; 1158 mutex_init(&priv->locality_count_mutex); 1159 INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func); 1160 1161 dev_set_drvdata(&chip->dev, priv); 1162 1163 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &priv->did_vid); 1164 if (rc < 0) 1165 return rc; 1166 1167 vendor_id = priv->did_vid; 1168 device_id = priv->did_vid >> 16; 1169 1170 if (vendor_id == TPM_VID_ATML && 1171 !(chip->flags & TPM_CHIP_FLAG_TPM2)) { 1172 priv->timeout_min = TIS_TIMEOUT_MIN_ATML; 1173 priv->timeout_max = TIS_TIMEOUT_MAX_ATML; 1174 } 1175 1176 if (vendor_id == TPM_VID_IFX) 1177 set_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags); 1178 1179 if (vendor_id == TPM_VID_WINBOND && device_id == 0x00FE) 1180 set_bit(TPM_TIS_SETTLE_AFTER_RELINQUISH, &priv->flags); 1181 1182 if (is_bsw()) { 1183 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR, 1184 ILB_REMAP_SIZE); 1185 if (!priv->ilb_base_addr) 1186 return -ENOMEM; 1187 1188 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET); 1189 /* Check if CLKRUN# is already not enabled in the LPC bus */ 1190 if (!(clkrun_val & LPC_CLKRUN_EN)) { 1191 iounmap(priv->ilb_base_addr); 1192 priv->ilb_base_addr = NULL; 1193 } 1194 } 1195 1196 if (chip->ops->clk_enable != NULL) 1197 chip->ops->clk_enable(chip, true); 1198 1199 if (wait_startup(chip, 0) != 0) { 1200 rc = -ENODEV; 1201 goto out_err; 1202 } 1203 1204 /* Take control of the TPM's interrupt hardware and shut it off */ 1205 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask); 1206 if (rc < 0) 1207 goto out_err; 1208 1209 /* Figure out the capabilities */ 1210 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps); 1211 if (rc < 0) 1212 goto out_err; 1213 1214 dev_dbg(dev, "TPM interface capabilities (0x%x):\n", 1215 intfcaps); 1216 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC) 1217 dev_dbg(dev, "\tBurst Count Static\n"); 1218 if (intfcaps & TPM_INTF_CMD_READY_INT) { 1219 intmask |= TPM_INTF_CMD_READY_INT; 1220 dev_dbg(dev, "\tCommand Ready Int Support\n"); 1221 } 1222 if (intfcaps & TPM_INTF_INT_EDGE_FALLING) 1223 dev_dbg(dev, "\tInterrupt Edge Falling\n"); 1224 if (intfcaps & TPM_INTF_INT_EDGE_RISING) 1225 dev_dbg(dev, "\tInterrupt Edge Rising\n"); 1226 if (intfcaps & TPM_INTF_INT_LEVEL_LOW) 1227 dev_dbg(dev, "\tInterrupt Level Low\n"); 1228 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH) 1229 dev_dbg(dev, "\tInterrupt Level High\n"); 1230 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) { 1231 intmask |= TPM_INTF_LOCALITY_CHANGE_INT; 1232 dev_dbg(dev, "\tLocality Change Int Support\n"); 1233 } 1234 if (intfcaps & TPM_INTF_STS_VALID_INT) { 1235 intmask |= TPM_INTF_STS_VALID_INT; 1236 dev_dbg(dev, "\tSts Valid Int Support\n"); 1237 } 1238 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) { 1239 intmask |= TPM_INTF_DATA_AVAIL_INT; 1240 dev_dbg(dev, "\tData Avail Int Support\n"); 1241 } 1242 1243 intmask &= ~TPM_GLOBAL_INT_ENABLE; 1244 1245 rc = tpm_tis_request_locality(chip, 0); 1246 if (rc < 0) { 1247 rc = -ENODEV; 1248 goto out_err; 1249 } 1250 1251 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1252 tpm_tis_relinquish_locality(chip, 0); 1253 1254 rc = tpm_chip_start(chip); 1255 if (rc) 1256 goto out_err; 1257 rc = tpm2_probe(chip); 1258 tpm_chip_stop(chip); 1259 if (rc) 1260 goto out_err; 1261 1262 rc = tpm_tis_read8(priv, TPM_RID(0), &rid); 1263 if (rc < 0) 1264 goto out_err; 1265 1266 dev_info(dev, "%s TPM (vendor-id 0x%X, device-id 0x%X, rev-id %d)\n", 1267 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2", 1268 vendor_id, device_id, rid); 1269 1270 probe = probe_itpm(chip); 1271 if (probe < 0) { 1272 rc = -ENODEV; 1273 goto out_err; 1274 } 1275 1276 /* INTERRUPT Setup */ 1277 init_waitqueue_head(&priv->read_queue); 1278 init_waitqueue_head(&priv->int_queue); 1279 1280 rc = tpm_chip_bootstrap(chip); 1281 if (rc) 1282 goto out_err; 1283 1284 if (irq != -1) { 1285 /* 1286 * Before doing irq testing issue a command to the TPM in polling mode 1287 * to make sure it works. May as well use that command to set the 1288 * proper timeouts for the driver. 1289 */ 1290 1291 rc = tpm_tis_request_locality(chip, 0); 1292 if (rc < 0) 1293 goto out_err; 1294 1295 rc = tpm_get_timeouts(chip); 1296 1297 tpm_tis_relinquish_locality(chip, 0); 1298 1299 if (rc) { 1300 dev_err(dev, "Could not get TPM timeouts and durations\n"); 1301 rc = -ENODEV; 1302 goto out_err; 1303 } 1304 1305 if (irq) 1306 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED, 1307 irq); 1308 else 1309 tpm_tis_probe_irq(chip, intmask); 1310 1311 if (chip->flags & TPM_CHIP_FLAG_IRQ) { 1312 priv->int_mask = intmask; 1313 } else { 1314 dev_err(&chip->dev, FW_BUG 1315 "TPM interrupt not working, polling instead\n"); 1316 1317 rc = tpm_tis_request_locality(chip, 0); 1318 if (rc < 0) 1319 goto out_err; 1320 tpm_tis_disable_interrupts(chip); 1321 tpm_tis_relinquish_locality(chip, 0); 1322 } 1323 } 1324 1325 rc = tpm_chip_register(chip); 1326 if (rc) 1327 goto out_err; 1328 1329 if (chip->ops->clk_enable != NULL) 1330 chip->ops->clk_enable(chip, false); 1331 1332 return 0; 1333 out_err: 1334 dev_err(dev, "TPM vid 0x%X, did 0x%X init failed with error %d\n", 1335 vendor_id, device_id, rc); 1336 1337 if (chip->ops->clk_enable != NULL) 1338 chip->ops->clk_enable(chip, false); 1339 1340 tpm_tis_remove(chip); 1341 1342 return rc; 1343 } 1344 EXPORT_SYMBOL_GPL(tpm_tis_core_init); 1345 1346 #ifdef CONFIG_PM_SLEEP 1347 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip) 1348 { 1349 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev); 1350 u32 intmask; 1351 int rc; 1352 1353 /* 1354 * Re-enable interrupts that device may have lost or BIOS/firmware may 1355 * have disabled. 1356 */ 1357 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq); 1358 if (rc < 0) { 1359 dev_err(&chip->dev, "Setting IRQ failed.\n"); 1360 return; 1361 } 1362 1363 intmask = priv->int_mask | TPM_GLOBAL_INT_ENABLE; 1364 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask); 1365 if (rc < 0) 1366 dev_err(&chip->dev, "Enabling interrupts failed.\n"); 1367 } 1368 1369 int tpm_tis_resume(struct device *dev) 1370 { 1371 struct tpm_chip *chip = dev_get_drvdata(dev); 1372 int ret; 1373 1374 ret = tpm_chip_start(chip); 1375 if (ret) 1376 return ret; 1377 1378 if (chip->flags & TPM_CHIP_FLAG_IRQ) 1379 tpm_tis_reenable_interrupts(chip); 1380 1381 /* 1382 * TPM 1.2 requires self-test on resume. This function actually returns 1383 * an error code but for unknown reason it isn't handled. 1384 */ 1385 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) 1386 tpm1_do_selftest(chip); 1387 1388 tpm_chip_stop(chip); 1389 1390 ret = tpm_pm_resume(dev); 1391 if (ret) 1392 return ret; 1393 1394 return 0; 1395 } 1396 EXPORT_SYMBOL_GPL(tpm_tis_resume); 1397 #endif 1398 1399 MODULE_AUTHOR("Leendert van Doorn <leendert@watson.ibm.com>"); 1400 MODULE_DESCRIPTION("TPM Driver"); 1401 MODULE_VERSION("2.0"); 1402 MODULE_LICENSE("GPL"); 1403