1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 7 #ifndef ATH12K_CORE_H 8 #define ATH12K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/firmware.h> 17 #include <linux/of_reserved_mem.h> 18 #include <linux/average.h> 19 #include <linux/of.h> 20 #include <linux/rhashtable.h> 21 #include "qmi.h" 22 #include "htc.h" 23 #include "wmi.h" 24 #include "hal.h" 25 #include "dp.h" 26 #include "ce.h" 27 #include "mac.h" 28 #include "hw.h" 29 #include "reg.h" 30 #include "dbring.h" 31 #include "fw.h" 32 #include "acpi.h" 33 #include "wow.h" 34 #include "debugfs_htt_stats.h" 35 #include "coredump.h" 36 #include "cmn_defs.h" 37 #include "dp_cmn.h" 38 #include "thermal.h" 39 40 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 41 42 #define ATH12K_TX_MGMT_NUM_PENDING_MAX 512 43 44 #define ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 45 46 /* Pending management packets threshold for dropping probe responses */ 47 #define ATH12K_PRB_RSP_DROP_THRESHOLD ((ATH12K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 48 49 /* SMBIOS type containing Board Data File Name Extension */ 50 #define ATH12K_SMBIOS_BDF_EXT_TYPE 0xF8 51 52 /* SMBIOS type structure length (excluding strings-set) */ 53 #define ATH12K_SMBIOS_BDF_EXT_LENGTH 0x9 54 55 /* The magic used by QCA spec */ 56 #define ATH12K_SMBIOS_BDF_EXT_MAGIC "BDF_" 57 58 #define ATH12K_INVALID_HW_MAC_ID 0xFF 59 #define ATH12K_CONNECTION_LOSS_HZ (3 * HZ) 60 61 #define ATH12K_MON_TIMER_INTERVAL 10 62 #define ATH12K_RESET_TIMEOUT_HZ (20 * HZ) 63 #define ATH12K_RESET_MAX_FAIL_COUNT_FIRST 3 64 #define ATH12K_RESET_MAX_FAIL_COUNT_FINAL 5 65 #define ATH12K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 66 #define ATH12K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 67 #define ATH12K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 68 69 #define ATH12K_INVALID_GROUP_ID 0xFF 70 #define ATH12K_INVALID_DEVICE_ID 0xFF 71 72 #define ATH12K_MAX_MLO_PEERS 256 73 #define ATH12K_MLO_PEER_ID_INVALID 0xFFFF 74 #define ATH12K_MLO_PEER_ID_PENDING 0xFFFE 75 76 #define ATH12K_INVALID_RSSI_FULL -1 77 #define ATH12K_INVALID_RSSI_EMPTY -128 78 79 enum ath12k_bdf_search { 80 ATH12K_BDF_SEARCH_DEFAULT, 81 ATH12K_BDF_SEARCH_BUS_AND_BOARD, 82 }; 83 84 enum wme_ac { 85 WME_AC_BE, 86 WME_AC_BK, 87 WME_AC_VI, 88 WME_AC_VO, 89 WME_NUM_AC 90 }; 91 92 #define ATH12K_HT_MCS_MAX 7 93 #define ATH12K_VHT_MCS_MAX 9 94 #define ATH12K_HE_MCS_MAX 11 95 #define ATH12K_EHT_MCS_MAX 15 96 97 enum ath12k_crypt_mode { 98 /* Only use hardware crypto engine */ 99 ATH12K_CRYPT_MODE_HW, 100 /* Only use software crypto */ 101 ATH12K_CRYPT_MODE_SW, 102 }; 103 104 static inline enum wme_ac ath12k_tid_to_ac(u32 tid) 105 { 106 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 107 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 108 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 109 WME_AC_VO); 110 } 111 112 static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo) 113 { 114 u64 hi64 = le32_to_cpu(hi); 115 u64 lo64 = le32_to_cpu(lo); 116 117 return (hi64 << 32) | lo64; 118 } 119 120 enum ath12k_skb_flags { 121 ATH12K_SKB_HW_80211_ENCAP = BIT(0), 122 ATH12K_SKB_CIPHER_SET = BIT(1), 123 ATH12K_SKB_MLO_STA = BIT(2), 124 }; 125 126 struct ath12k_skb_cb { 127 dma_addr_t paddr; 128 struct ath12k *ar; 129 struct ieee80211_vif *vif; 130 dma_addr_t paddr_ext_desc; 131 u32 cipher; 132 u8 flags; 133 u8 link_id; 134 }; 135 136 struct ath12k_skb_rxcb { 137 dma_addr_t paddr; 138 bool is_first_msdu; 139 bool is_last_msdu; 140 bool is_continuation; 141 bool is_mcbc; 142 bool is_eapol; 143 struct hal_rx_desc *rx_desc; 144 u8 err_rel_src; 145 u8 err_code; 146 u8 hw_link_id; 147 u8 unmapped; 148 u8 is_frag; 149 u8 tid; 150 u16 peer_id; 151 bool is_end_of_ppdu; 152 }; 153 154 enum ath12k_hw_rev { 155 ATH12K_HW_QCN9274_HW10, 156 ATH12K_HW_QCN9274_HW20, 157 ATH12K_HW_WCN7850_HW20, 158 ATH12K_HW_IPQ5332_HW10, 159 ATH12K_HW_QCC2072_HW10, 160 ATH12K_HW_IPQ5424_HW10, 161 }; 162 163 #define ATH12K_IRQ_NUM_MAX 57 164 #define ATH12K_EXT_IRQ_NUM_MAX 16 165 #define ATH12K_MAX_TCL_RING_NUM 3 166 167 struct ath12k_ext_irq_grp { 168 struct ath12k_base *ab; 169 u32 irqs[ATH12K_EXT_IRQ_NUM_MAX]; 170 u32 num_irq; 171 u32 grp_id; 172 u64 timestamp; 173 bool napi_enabled; 174 struct napi_struct napi; 175 struct net_device *napi_ndev; 176 }; 177 178 enum ath12k_smbios_cc_type { 179 /* disable country code setting from SMBIOS */ 180 ATH12K_SMBIOS_CC_DISABLE = 0, 181 182 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 183 ATH12K_SMBIOS_CC_ISO = 1, 184 185 /* worldwide regdomain */ 186 ATH12K_SMBIOS_CC_WW = 2, 187 }; 188 189 struct ath12k_smbios_bdf { 190 struct dmi_header hdr; 191 u8 features_disabled; 192 193 /* enum ath12k_smbios_cc_type */ 194 u8 country_code_flag; 195 196 /* To set specific country, you need to set country code 197 * flag=ATH12K_SMBIOS_CC_ISO first, then if country is United 198 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 199 * 0x53). To set country to INDONESIA, then country code value = 200 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 201 * ATH12K_SMBIOS_CC_WW, then you can use worldwide regulatory 202 * setting. 203 */ 204 u16 cc_code; 205 206 u8 bdf_enabled; 207 u8 bdf_ext[]; 208 } __packed; 209 210 #define HEHANDLE_CAP_PHYINFO_SIZE 3 211 #define HECAP_PHYINFO_SIZE 9 212 #define HECAP_MACINFO_SIZE 5 213 #define HECAP_TXRX_MCS_NSS_SIZE 2 214 #define HECAP_PPET16_PPET8_MAX_SIZE 25 215 216 #define HE_PPET16_PPET8_SIZE 8 217 218 /* 802.11ax PPE (PPDU packet Extension) threshold */ 219 struct he_ppe_threshold { 220 u32 numss_m1; 221 u32 ru_mask; 222 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 223 }; 224 225 struct ath12k_he { 226 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 227 u32 hecap_rxmcsnssmap; 228 u32 hecap_txmcsnssmap; 229 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 230 struct he_ppe_threshold hecap_ppet; 231 u32 heop_param; 232 }; 233 234 enum { 235 WMI_HOST_TP_SCALE_MAX = 0, 236 WMI_HOST_TP_SCALE_50 = 1, 237 WMI_HOST_TP_SCALE_25 = 2, 238 WMI_HOST_TP_SCALE_12 = 3, 239 WMI_HOST_TP_SCALE_MIN = 4, 240 WMI_HOST_TP_SCALE_SIZE = 5, 241 }; 242 243 enum ath12k_scan_state { 244 ATH12K_SCAN_IDLE, 245 ATH12K_SCAN_STARTING, 246 ATH12K_SCAN_RUNNING, 247 ATH12K_SCAN_ABORTING, 248 }; 249 250 enum ath12k_11d_state { 251 ATH12K_11D_IDLE, 252 ATH12K_11D_PREPARING, 253 ATH12K_11D_RUNNING, 254 }; 255 256 enum ath12k_hw_group_flags { 257 ATH12K_GROUP_FLAG_REGISTERED, 258 ATH12K_GROUP_FLAG_UNREGISTER, 259 }; 260 261 enum ath12k_dev_flags { 262 ATH12K_FLAG_CAC_RUNNING, 263 ATH12K_FLAG_CRASH_FLUSH, 264 ATH12K_FLAG_RAW_MODE, 265 ATH12K_FLAG_HW_CRYPTO_DISABLED, 266 ATH12K_FLAG_RECOVERY, 267 ATH12K_FLAG_UNREGISTERING, 268 ATH12K_FLAG_REGISTERED, 269 ATH12K_FLAG_QMI_FAIL, 270 ATH12K_FLAG_HTC_SUSPEND_COMPLETE, 271 ATH12K_FLAG_CE_IRQ_ENABLED, 272 ATH12K_FLAG_EXT_IRQ_ENABLED, 273 ATH12K_FLAG_QMI_FW_READY_COMPLETE, 274 ATH12K_FLAG_FTM_SEGMENTED, 275 ATH12K_FLAG_FIXED_MEM_REGION, 276 }; 277 278 struct ath12k_tx_conf { 279 bool changed; 280 u16 ac; 281 struct ieee80211_tx_queue_params tx_queue_params; 282 }; 283 284 struct ath12k_key_conf { 285 enum set_key_cmd cmd; 286 struct list_head list; 287 struct ieee80211_sta *sta; 288 struct ieee80211_key_conf *key; 289 }; 290 291 struct ath12k_vif_cache { 292 struct ath12k_tx_conf tx_conf; 293 struct ath12k_key_conf key_conf; 294 u32 bss_conf_changed; 295 }; 296 297 struct ath12k_rekey_data { 298 u8 kck[NL80211_KCK_LEN]; 299 u8 kek[NL80211_KCK_LEN]; 300 u64 replay_ctr; 301 bool enable_offload; 302 }; 303 304 struct ath12k_link_vif { 305 u32 vdev_id; 306 u32 beacon_interval; 307 u32 dtim_period; 308 309 struct ath12k *ar; 310 311 bool beacon_prot; 312 313 struct wmi_wmm_params_all_arg wmm_params; 314 struct list_head list; 315 316 bool is_created; 317 bool is_started; 318 bool is_up; 319 u8 bssid[ETH_ALEN]; 320 struct cfg80211_bitrate_mask bitrate_mask; 321 struct delayed_work connection_loss_work; 322 int num_legacy_stations; 323 int rtscts_prot_mode; 324 int txpower; 325 bool rsnie_present; 326 bool wpaie_present; 327 u8 vdev_stats_id; 328 u32 punct_bitmap; 329 u8 link_id; 330 struct ath12k_vif *ahvif; 331 struct ath12k_rekey_data rekey_data; 332 struct ath12k_link_stats link_stats; 333 spinlock_t link_stats_lock; /* Protects updates to link_stats */ 334 335 u8 current_cntdown_counter; 336 337 /* only used in station mode */ 338 bool is_sta_assoc_link; 339 340 struct ath12k_reg_tpc_power_info reg_tpc_info; 341 342 bool group_key_valid; 343 struct wmi_vdev_install_key_arg group_key; 344 bool pairwise_key_done; 345 u16 num_stations; 346 bool is_csa_in_progress; 347 struct wiphy_work bcn_tx_work; 348 349 bool set_wds_vdev_param; 350 bool nawds_enabled; 351 }; 352 353 struct ath12k_vif { 354 struct ath12k_dp_vif dp_vif; 355 356 enum wmi_vdev_type vdev_type; 357 enum wmi_vdev_subtype vdev_subtype; 358 struct ieee80211_vif *vif; 359 struct ath12k_hw *ah; 360 361 union { 362 struct { 363 u32 uapsd; 364 } sta; 365 struct { 366 /* 127 stations; wmi limit */ 367 u8 tim_bitmap[16]; 368 u8 tim_len; 369 u32 ssid_len; 370 u8 ssid[IEEE80211_MAX_SSID_LEN]; 371 bool hidden_ssid; 372 /* P2P_IE with NoA attribute for P2P_GO case */ 373 u32 noa_len; 374 u8 *noa_data; 375 } ap; 376 } u; 377 378 u32 aid; 379 bool ps; 380 381 struct ath12k_link_vif deflink; 382 struct ath12k_link_vif __rcu *link[ATH12K_NUM_MAX_LINKS]; 383 struct ath12k_vif_cache *cache[IEEE80211_MLD_MAX_NUM_LINKS]; 384 /* indicates bitmap of link vif created in FW */ 385 u32 links_map; 386 /* Must be last - ends in a flexible-array member. 387 * 388 * FIXME: Driver should not copy struct ieee80211_chanctx_conf, 389 * especially because it has a flexible array. Find a better way. 390 */ 391 struct ieee80211_chanctx_conf chanctx; 392 }; 393 394 struct ath12k_vif_iter { 395 u32 vdev_id; 396 struct ath12k *ar; 397 struct ath12k_link_vif *arvif; 398 }; 399 400 #define ATH12K_SCAN_TIMEOUT_HZ (20 * HZ) 401 402 #define ATH12K_HE_MCS_NUM 12 403 #define ATH12K_VHT_MCS_NUM 10 404 #define ATH12K_BW_NUM 5 405 #define ATH12K_NSS_NUM 4 406 #define ATH12K_LEGACY_NUM 12 407 #define ATH12K_GI_NUM 4 408 #define ATH12K_HT_MCS_NUM 32 409 410 enum ath12k_pkt_rx_err { 411 ATH12K_PKT_RX_ERR_FCS, 412 ATH12K_PKT_RX_ERR_TKIP, 413 ATH12K_PKT_RX_ERR_CRYPT, 414 ATH12K_PKT_RX_ERR_PEER_IDX_INVAL, 415 ATH12K_PKT_RX_ERR_MAX, 416 }; 417 418 enum ath12k_ampdu_subfrm_num { 419 ATH12K_AMPDU_SUBFRM_NUM_10, 420 ATH12K_AMPDU_SUBFRM_NUM_20, 421 ATH12K_AMPDU_SUBFRM_NUM_30, 422 ATH12K_AMPDU_SUBFRM_NUM_40, 423 ATH12K_AMPDU_SUBFRM_NUM_50, 424 ATH12K_AMPDU_SUBFRM_NUM_60, 425 ATH12K_AMPDU_SUBFRM_NUM_MORE, 426 ATH12K_AMPDU_SUBFRM_NUM_MAX, 427 }; 428 429 enum ath12k_amsdu_subfrm_num { 430 ATH12K_AMSDU_SUBFRM_NUM_1, 431 ATH12K_AMSDU_SUBFRM_NUM_2, 432 ATH12K_AMSDU_SUBFRM_NUM_3, 433 ATH12K_AMSDU_SUBFRM_NUM_4, 434 ATH12K_AMSDU_SUBFRM_NUM_MORE, 435 ATH12K_AMSDU_SUBFRM_NUM_MAX, 436 }; 437 438 enum ath12k_counter_type { 439 ATH12K_COUNTER_TYPE_BYTES, 440 ATH12K_COUNTER_TYPE_PKTS, 441 ATH12K_COUNTER_TYPE_MAX, 442 }; 443 444 enum ath12k_stats_type { 445 ATH12K_STATS_TYPE_SUCC, 446 ATH12K_STATS_TYPE_FAIL, 447 ATH12K_STATS_TYPE_RETRY, 448 ATH12K_STATS_TYPE_AMPDU, 449 ATH12K_STATS_TYPE_MAX, 450 }; 451 452 struct ath12k_htt_data_stats { 453 u64 legacy[ATH12K_COUNTER_TYPE_MAX][ATH12K_LEGACY_NUM]; 454 u64 ht[ATH12K_COUNTER_TYPE_MAX][ATH12K_HT_MCS_NUM]; 455 u64 vht[ATH12K_COUNTER_TYPE_MAX][ATH12K_VHT_MCS_NUM]; 456 u64 he[ATH12K_COUNTER_TYPE_MAX][ATH12K_HE_MCS_NUM]; 457 u64 bw[ATH12K_COUNTER_TYPE_MAX][ATH12K_BW_NUM]; 458 u64 nss[ATH12K_COUNTER_TYPE_MAX][ATH12K_NSS_NUM]; 459 u64 gi[ATH12K_COUNTER_TYPE_MAX][ATH12K_GI_NUM]; 460 u64 transmit_type[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RECEPTION_TYPE_MAX]; 461 u64 ru_loc[ATH12K_COUNTER_TYPE_MAX][HAL_RX_RU_ALLOC_TYPE_MAX]; 462 }; 463 464 struct ath12k_htt_tx_stats { 465 struct ath12k_htt_data_stats stats[ATH12K_STATS_TYPE_MAX]; 466 u64 tx_duration; 467 u64 ba_fails; 468 u64 ack_fails; 469 u16 ru_start; 470 u16 ru_tones; 471 u32 mu_group[MAX_MU_GROUP_ID]; 472 }; 473 474 struct ath12k_per_ppdu_tx_stats { 475 u16 succ_pkts; 476 u16 failed_pkts; 477 u16 retry_pkts; 478 u32 succ_bytes; 479 u32 failed_bytes; 480 u32 retry_bytes; 481 }; 482 483 struct ath12k_link_sta { 484 struct ath12k_link_vif *arvif; 485 struct ath12k_sta *ahsta; 486 487 /* link address similar to ieee80211_link_sta */ 488 u8 addr[ETH_ALEN]; 489 490 u16 tcl_metadata; 491 u16 ast_hash; 492 u16 ast_idx; 493 494 /* the following are protected by ar->data_lock */ 495 u32 changed; /* IEEE80211_RC_* */ 496 u32 bw; 497 u32 nss; 498 u32 smps; 499 500 struct wiphy_work update_wk; 501 u8 link_id; 502 u32 bw_prev; 503 u32 peer_nss; 504 s8 rssi_beacon; 505 s8 chain_signal[IEEE80211_MAX_CHAINS]; 506 507 /* For now the assoc link will be considered primary */ 508 bool is_assoc_link; 509 510 /* for firmware use only */ 511 u8 link_idx; 512 513 /* peer addr based rhashtable list pointer */ 514 struct rhash_head rhash_addr; 515 }; 516 517 struct ath12k_sta { 518 struct ath12k_vif *ahvif; 519 enum hal_pn_type pn_type; 520 struct ath12k_link_sta deflink; 521 struct ath12k_link_sta __rcu *link[IEEE80211_MLD_MAX_NUM_LINKS]; 522 /* indicates bitmap of link sta created in FW */ 523 u16 links_map; 524 u8 assoc_link_id; 525 u16 ml_peer_id; 526 u16 free_logical_link_idx_map; 527 528 enum ieee80211_sta_state state; 529 530 bool enable_4addr; 531 }; 532 533 #define ATH12K_HALF_20MHZ_BW 10 534 #define ATH12K_2GHZ_MIN_CENTER 2412 535 #define ATH12K_2GHZ_MAX_CENTER 2484 536 #define ATH12K_5GHZ_MIN_CENTER 4900 537 #define ATH12K_5GHZ_MAX_CENTER 5920 538 #define ATH12K_6GHZ_MIN_CENTER 5935 539 #define ATH12K_6GHZ_MAX_CENTER 7115 540 #define ATH12K_MIN_2GHZ_FREQ (ATH12K_2GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW - 1) 541 #define ATH12K_MAX_2GHZ_FREQ (ATH12K_2GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW + 1) 542 #define ATH12K_MIN_5GHZ_FREQ (ATH12K_5GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 543 #define ATH12K_MAX_5GHZ_FREQ (ATH12K_5GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 544 #define ATH12K_MIN_6GHZ_FREQ (ATH12K_6GHZ_MIN_CENTER - ATH12K_HALF_20MHZ_BW) 545 #define ATH12K_MAX_6GHZ_FREQ (ATH12K_6GHZ_MAX_CENTER + ATH12K_HALF_20MHZ_BW) 546 #define ATH12K_NUM_CHANS 102 547 #define ATH12K_MAX_5GHZ_CHAN 177 548 549 static inline bool ath12k_is_2ghz_channel_freq(u32 freq) 550 { 551 return freq >= ATH12K_MIN_2GHZ_FREQ && 552 freq <= ATH12K_MAX_2GHZ_FREQ; 553 } 554 555 enum ath12k_hw_state { 556 ATH12K_HW_STATE_OFF, 557 ATH12K_HW_STATE_ON, 558 ATH12K_HW_STATE_RESTARTING, 559 ATH12K_HW_STATE_RESTARTED, 560 ATH12K_HW_STATE_WEDGED, 561 ATH12K_HW_STATE_TM, 562 /* Add other states as required */ 563 }; 564 565 /* Antenna noise floor */ 566 #define ATH12K_DEFAULT_NOISE_FLOOR -95 567 568 struct ath12k_ftm_event_obj { 569 u32 data_pos; 570 u32 expected_seq; 571 u8 *eventdata; 572 }; 573 574 struct ath12k_fw_stats { 575 u32 pdev_id; 576 u32 stats_id; 577 struct list_head pdevs; 578 struct list_head vdevs; 579 struct list_head bcn; 580 u32 num_vdev_recvd; 581 }; 582 583 struct ath12k_dbg_htt_stats { 584 enum ath12k_dbg_htt_ext_stats_type type; 585 u32 cfg_param[4]; 586 u8 reset; 587 struct debug_htt_stats_req *stats_req; 588 }; 589 590 struct ath12k_debug { 591 struct dentry *debugfs_pdev; 592 struct dentry *debugfs_pdev_symlink; 593 struct dentry *debugfs_pdev_symlink_default; 594 struct ath12k_dbg_htt_stats htt_stats; 595 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type; 596 bool tpc_request; 597 struct completion tpc_complete; 598 struct wmi_tpc_stats_arg *tpc_stats; 599 u32 rx_filter; 600 bool extd_rx_stats; 601 }; 602 603 struct ath12k_pdev_rssi_offsets { 604 s32 temp_offset; 605 s8 min_nf_dbm; 606 /* Cache the sum here to avoid calculating it every time in hot path 607 * noise_floor = min_nf_dbm + temp_offset 608 */ 609 s32 noise_floor; 610 }; 611 612 #define ATH12K_FLUSH_TIMEOUT (5 * HZ) 613 #define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 614 615 struct ath12k { 616 struct ath12k_base *ab; 617 struct ath12k_pdev *pdev; 618 struct ath12k_hw *ah; 619 struct ath12k_wmi_pdev *wmi; 620 struct ath12k_pdev_dp dp; 621 u8 mac_addr[ETH_ALEN]; 622 u32 ht_cap_info; 623 u32 vht_cap_info; 624 struct ath12k_he ar_he; 625 bool supports_6ghz; 626 struct { 627 struct completion started; 628 struct completion completed; 629 struct completion on_channel; 630 struct delayed_work timeout; 631 enum ath12k_scan_state state; 632 bool is_roc; 633 int roc_freq; 634 bool roc_notify; 635 struct wiphy_work vdev_clean_wk; 636 struct ath12k_link_vif *arvif; 637 } scan; 638 639 struct { 640 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 641 struct ieee80211_sband_iftype_data 642 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 643 } mac; 644 645 unsigned long dev_flags; 646 unsigned int filter_flags; 647 u32 min_tx_power; 648 u32 max_tx_power; 649 u32 txpower_limit_2g; 650 u32 txpower_limit_5g; 651 u32 txpower_scale; 652 u32 power_scale; 653 u32 chan_tx_pwr; 654 u32 rts_threshold; 655 u32 num_stations; 656 u32 max_num_stations; 657 658 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 659 * vdev_stop_status info, scan data, ath12k_sta info, ath12k_link_vif info, 660 * channel context data, test mode data, regd_channel_update_queue, 661 * peer_delete_waits. 662 */ 663 spinlock_t data_lock; 664 665 struct list_head arvifs; 666 /* should never be NULL; needed for regular htt rx */ 667 struct ieee80211_channel *rx_channel; 668 669 /* valid during scan; needed for mgmt rx during scan */ 670 struct ieee80211_channel *scan_channel; 671 672 u8 cfg_tx_chainmask; 673 u8 cfg_rx_chainmask; 674 u8 num_rx_chains; 675 u8 num_tx_chains; 676 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 677 u8 pdev_idx; 678 u8 lmac_id; 679 u8 hw_link_id; 680 u8 radio_idx; 681 682 struct completion peer_assoc_done; 683 struct list_head peer_delete_waits; 684 685 int install_key_status; 686 struct completion install_key_done; 687 688 int last_wmi_vdev_start_status; 689 struct completion vdev_setup_done; 690 struct completion vdev_delete_done; 691 692 int num_peers; 693 int max_num_peers; 694 u32 num_started_vdevs; 695 u32 num_created_vdevs; 696 unsigned long long allocated_vdev_map; 697 698 struct idr txmgmt_idr; 699 /* protects txmgmt_idr data */ 700 spinlock_t txmgmt_idr_lock; 701 atomic_t num_pending_mgmt_tx; 702 wait_queue_head_t txmgmt_empty_waitq; 703 704 /* cycle count is reported twice for each visited channel during scan. 705 * access protected by data_lock 706 */ 707 u32 survey_last_rx_clear_count; 708 u32 survey_last_cycle_count; 709 710 /* Channel info events are expected to come in pairs without and with 711 * COMPLETE flag set respectively for each channel visit during scan. 712 * 713 * However there are deviations from this rule. This flag is used to 714 * avoid reporting garbage data. 715 */ 716 bool ch_info_can_report_survey; 717 struct completion bss_survey_done; 718 719 struct work_struct regd_update_work; 720 struct work_struct regd_channel_update_work; 721 struct list_head regd_channel_update_queue; 722 723 struct wiphy_work wmi_mgmt_tx_work; 724 struct sk_buff_head wmi_mgmt_tx_queue; 725 726 struct ath12k_wow wow; 727 struct completion target_suspend; 728 bool target_suspend_ack; 729 730 struct ath12k_per_peer_tx_stats cached_stats; 731 u32 last_ppdu_id; 732 u32 cached_ppdu_id; 733 #ifdef CONFIG_ATH12K_DEBUGFS 734 struct ath12k_debug debug; 735 #endif 736 737 bool dfs_block_radar_events; 738 bool monitor_vdev_created; 739 bool monitor_started; 740 int monitor_vdev_id; 741 742 struct wiphy_radio_freq_range freq_range; 743 744 bool nlo_enabled; 745 746 /* Protected by wiphy::mtx lock. */ 747 u32 vdev_id_11d_scan; 748 struct completion completed_11d_scan; 749 enum ath12k_11d_state state_11d; 750 u8 alpha2[REG_ALPHA2_LEN]; 751 bool regdom_set_by_user; 752 struct completion regd_update_completed; 753 754 struct completion fw_stats_complete; 755 struct completion fw_stats_done; 756 757 struct completion mlo_setup_done; 758 u32 mlo_setup_status; 759 u8 ftm_msgref; 760 struct ath12k_fw_stats fw_stats; 761 unsigned long last_tx_power_update; 762 763 s8 max_allowed_tx_power; 764 struct ath12k_pdev_rssi_offsets rssi_info; 765 766 struct ath12k_thermal thermal; 767 768 /* Protected by ar->data_lock */ 769 struct ath12k_incumbent_signal_interference { 770 u32 center_freq; 771 enum nl80211_chan_width width; 772 u32 chan_bw_interference_bitmap; 773 bool handling_in_progress; 774 } incumbent_signal_interference; 775 }; 776 777 struct ath12k_hw { 778 struct ieee80211_hw *hw; 779 struct device *dev; 780 781 /* Protect the write operation of the hardware state ath12k_hw::state 782 * between hardware start<=>reconfigure<=>stop transitions. 783 */ 784 struct mutex hw_mutex; 785 enum ath12k_hw_state state; 786 787 /* protects survey[] shared across radios of this hw. */ 788 spinlock_t survey_lock; 789 struct survey_info survey[ATH12K_NUM_CHANS]; 790 791 bool regd_updated; 792 bool use_6ghz_regd; 793 bool host_alloc_ml_id; 794 struct completion peer_ml_id_done; 795 796 u8 num_radio; 797 798 DECLARE_BITMAP(free_ml_peer_id_map, ATH12K_MAX_MLO_PEERS); 799 800 struct ath12k_dp_hw dp_hw; 801 802 /* Keep last */ 803 struct ath12k radio[] __aligned(sizeof(void *)); 804 }; 805 806 struct ath12k_band_cap { 807 u32 phy_id; 808 u32 max_bw_supported; 809 u32 ht_cap_info; 810 u32 he_cap_info[2]; 811 u32 he_mcs; 812 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 813 struct ath12k_wmi_ppe_threshold_arg he_ppet; 814 u16 he_6ghz_capa; 815 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 816 u32 eht_cap_phy_info[WMI_MAX_EHTCAP_PHY_SIZE]; 817 u32 eht_mcs_20_only; 818 u32 eht_mcs_80; 819 u32 eht_mcs_160; 820 u32 eht_mcs_320; 821 struct ath12k_wmi_ppe_threshold_arg eht_ppet; 822 u32 eht_cap_info_internal; 823 }; 824 825 struct ath12k_pdev_cap { 826 u32 supported_bands; 827 u32 ampdu_density; 828 u32 vht_cap; 829 u32 vht_mcs; 830 u32 he_mcs; 831 u32 tx_chain_mask; 832 u32 rx_chain_mask; 833 u32 tx_chain_mask_shift; 834 u32 rx_chain_mask_shift; 835 struct ath12k_band_cap band[NUM_NL80211_BANDS]; 836 u32 eml_cap; 837 u32 mld_cap; 838 bool nss_ratio_enabled; 839 u8 nss_ratio_info; 840 }; 841 842 struct mlo_timestamp { 843 u32 info; 844 u32 sync_timestamp_lo_us; 845 u32 sync_timestamp_hi_us; 846 u32 mlo_offset_lo; 847 u32 mlo_offset_hi; 848 u32 mlo_offset_clks; 849 u32 mlo_comp_clks; 850 u32 mlo_comp_timer; 851 }; 852 853 struct ath12k_pdev { 854 struct ath12k *ar; 855 u32 pdev_id; 856 u32 hw_link_id; 857 struct ath12k_pdev_cap cap; 858 u8 mac_addr[ETH_ALEN]; 859 struct mlo_timestamp timestamp; 860 }; 861 862 struct ath12k_fw_pdev { 863 u32 pdev_id; 864 u32 phy_id; 865 u32 supported_bands; 866 }; 867 868 struct ath12k_board_data { 869 const struct firmware *fw; 870 const void *data; 871 size_t len; 872 }; 873 874 struct ath12k_reg_freq { 875 u32 start_freq; 876 u32 end_freq; 877 }; 878 879 struct ath12k_mlo_memory { 880 struct target_mem_chunk chunk[ATH12K_QMI_WLANFW_MAX_NUM_MEM_SEG_V01]; 881 int mlo_mem_size; 882 bool init_done; 883 }; 884 885 struct ath12k_hw_link { 886 u8 device_id; 887 u8 pdev_idx; 888 }; 889 890 /* Holds info on the group of devices that are registered as a single 891 * wiphy, protected with struct ath12k_hw_group::mutex. 892 */ 893 struct ath12k_hw_group { 894 /* Keep dp_hw_grp as the first member to allow efficient 895 * usage of cache lines for DP fields 896 */ 897 struct ath12k_dp_hw_group dp_hw_grp; 898 struct ath12k_hw_link hw_links[ATH12K_GROUP_MAX_RADIO]; 899 struct list_head list; 900 u8 id; 901 u8 num_devices; 902 u8 num_probed; 903 u8 num_started; 904 unsigned long flags; 905 struct ath12k_base *ab[ATH12K_MAX_DEVICES]; 906 907 /* protects access to this struct */ 908 struct mutex mutex; 909 910 /* Holds information of wiphy (hw) registration. 911 * 912 * In Multi/Single Link Operation case, all pdevs are registered as 913 * a single wiphy. In other (legacy/Non-MLO) cases, each pdev is 914 * registered as separate wiphys. 915 */ 916 struct ath12k_hw *ah[ATH12K_GROUP_MAX_RADIO]; 917 u8 num_hw; 918 bool mlo_capable; 919 struct device_node *wsi_node[ATH12K_MAX_DEVICES]; 920 struct ath12k_mlo_memory mlo_mem; 921 bool hw_link_id_init_done; 922 }; 923 924 /* Holds WSI info specific to each device, excluding WSI group info */ 925 struct ath12k_wsi_info { 926 u32 index; 927 u32 hw_link_id_base; 928 }; 929 930 struct ath12k_dp_profile_params { 931 u32 tx_comp_ring_size; 932 u32 rxdma_monitor_buf_ring_size; 933 u32 rxdma_monitor_dst_ring_size; 934 u32 num_pool_tx_desc; 935 u32 rx_desc_count; 936 u32 rx_release_ring_size; 937 }; 938 939 struct ath12k_mem_profile_based_param { 940 u32 num_vdevs; 941 u32 max_client_single; 942 u32 max_client_dbs; 943 u32 max_client_dbs_sbs; 944 struct ath12k_dp_profile_params dp_params; 945 }; 946 947 enum ath12k_device_family { 948 ATH12K_DEVICE_FAMILY_START, 949 ATH12K_DEVICE_FAMILY_WIFI7 = ATH12K_DEVICE_FAMILY_START, 950 ATH12K_DEVICE_FAMILY_MAX, 951 }; 952 953 /* Master structure to hold the hw data which may be used in core module */ 954 struct ath12k_base { 955 enum ath12k_hw_rev hw_rev; 956 struct platform_device *pdev; 957 struct device *dev; 958 struct ath12k_qmi qmi; 959 struct ath12k_wmi_base wmi_ab; 960 struct completion fw_ready; 961 u8 device_id; 962 int num_radios; 963 /* HW channel counters frequency value in hertz common to all MACs */ 964 u32 cc_freq_hz; 965 966 struct ath12k_dump_file_data *dump_data; 967 size_t ath12k_coredump_len; 968 struct work_struct dump_work; 969 970 struct ath12k_htc htc; 971 972 struct ath12k_dp *dp; 973 974 void __iomem *mem; 975 unsigned long mem_len; 976 977 void __iomem *mem_ce; 978 u32 ce_remap_base_addr; 979 u32 cmem_offset; 980 bool ce_remap; 981 982 struct { 983 enum ath12k_bus bus; 984 const struct ath12k_hif_ops *ops; 985 } hif; 986 987 struct { 988 struct completion wakeup_completed; 989 u32 wmi_conf_rx_decap_mode; 990 } wow; 991 992 struct ath12k_ce ce; 993 struct timer_list rx_replenish_retry; 994 struct ath12k_hal hal; 995 /* To synchronize core_start/core_stop */ 996 struct mutex core_lock; 997 /* Protects data like peers */ 998 spinlock_t base_lock; 999 1000 /* Single pdev device (struct ath12k_hw_params::single_pdev_only): 1001 * 1002 * Firmware maintains data for all bands but advertises a single 1003 * phy to the host which is stored as a single element in this 1004 * array. 1005 * 1006 * Other devices: 1007 * 1008 * This array will contain as many elements as the number of 1009 * radios. 1010 */ 1011 struct ath12k_pdev pdevs[MAX_RADIOS]; 1012 1013 /* struct ath12k_hw_params::single_pdev_only devices use this to 1014 * store phy specific data 1015 */ 1016 struct ath12k_fw_pdev fw_pdev[MAX_RADIOS]; 1017 u8 fw_pdev_count; 1018 1019 struct ath12k_pdev __rcu *pdevs_active[MAX_RADIOS]; 1020 1021 struct ath12k_wmi_hal_reg_capabilities_ext_arg hal_reg_cap[MAX_RADIOS]; 1022 unsigned long long free_vdev_map; 1023 unsigned long long free_vdev_stats_id_map; 1024 wait_queue_head_t peer_mapping_wq; 1025 u8 mac_addr[ETH_ALEN]; 1026 bool wmi_ready; 1027 u32 wlan_init_status; 1028 int irq_num[ATH12K_IRQ_NUM_MAX]; 1029 struct ath12k_ext_irq_grp ext_irq_grp[ATH12K_EXT_IRQ_GRP_NUM_MAX]; 1030 struct napi_struct *napi; 1031 struct ath12k_wmi_target_cap_arg target_caps; 1032 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 1033 bool pdevs_macaddr_valid; 1034 1035 const struct ath12k_hw_params *hw_params; 1036 1037 const struct firmware *cal_file; 1038 1039 /* Below regd's are protected by ab->data_lock */ 1040 /* This is the regd set for every radio 1041 * by the firmware during initialization 1042 */ 1043 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 1044 /* This regd is set during dynamic country setting 1045 * This may or may not be used during the runtime 1046 */ 1047 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 1048 1049 struct ath12k_reg_info *reg_info[MAX_RADIOS]; 1050 1051 /* Current DFS Regulatory */ 1052 enum ath12k_dfs_region dfs_region; 1053 #ifdef CONFIG_ATH12K_DEBUGFS 1054 struct dentry *debugfs_soc; 1055 #endif 1056 1057 unsigned long dev_flags; 1058 struct completion driver_recovery; 1059 struct workqueue_struct *workqueue; 1060 struct work_struct restart_work; 1061 struct workqueue_struct *workqueue_aux; 1062 struct work_struct reset_work; 1063 atomic_t reset_count; 1064 atomic_t recovery_count; 1065 bool is_reset; 1066 struct completion reset_complete; 1067 /* continuous recovery fail count */ 1068 atomic_t fail_cont_count; 1069 unsigned long reset_fail_timeout; 1070 struct work_struct update_11d_work; 1071 u8 new_alpha2[2]; 1072 struct { 1073 /* protected by data_lock */ 1074 u32 fw_crash_counter; 1075 } stats; 1076 u32 pktlog_defs_checksum; 1077 1078 struct ath12k_dbring_cap *db_caps; 1079 u32 num_db_cap; 1080 1081 struct completion htc_suspend; 1082 1083 u64 fw_soc_drop_count; 1084 bool static_window_map; 1085 1086 struct work_struct rfkill_work; 1087 /* true means radio is on */ 1088 bool rfkill_radio_on; 1089 1090 struct { 1091 enum ath12k_bdf_search bdf_search; 1092 u32 vendor; 1093 u32 device; 1094 u32 subsystem_vendor; 1095 u32 subsystem_device; 1096 } id; 1097 1098 struct { 1099 u32 api_version; 1100 1101 const struct firmware *fw; 1102 const u8 *amss_data; 1103 size_t amss_len; 1104 const u8 *amss_dualmac_data; 1105 size_t amss_dualmac_len; 1106 const u8 *m3_data; 1107 size_t m3_len; 1108 const u8 *aux_uc_data; 1109 size_t aux_uc_len; 1110 1111 DECLARE_BITMAP(fw_features, ATH12K_FW_FEATURE_COUNT); 1112 bool fw_features_valid; 1113 } fw; 1114 1115 struct completion restart_completed; 1116 1117 #ifdef CONFIG_ACPI 1118 1119 struct { 1120 bool started; 1121 u32 func_bit; 1122 bool acpi_tas_enable; 1123 bool acpi_bios_sar_enable; 1124 bool acpi_disable_11be; 1125 bool acpi_disable_rfkill; 1126 bool acpi_cca_enable; 1127 bool acpi_band_edge_enable; 1128 bool acpi_enable_bdf; 1129 u32 bit_flag; 1130 char bdf_string[ATH12K_ACPI_BDF_MAX_LEN]; 1131 u8 tas_cfg[ATH12K_ACPI_DSM_TAS_CFG_SIZE]; 1132 u8 tas_sar_power_table[ATH12K_ACPI_DSM_TAS_DATA_SIZE]; 1133 u8 bios_sar_data[ATH12K_ACPI_DSM_BIOS_SAR_DATA_SIZE]; 1134 u8 geo_offset_data[ATH12K_ACPI_DSM_GEO_OFFSET_DATA_SIZE]; 1135 u8 cca_data[ATH12K_ACPI_DSM_CCA_DATA_SIZE]; 1136 u8 band_edge_power[ATH12K_ACPI_DSM_BAND_EDGE_DATA_SIZE]; 1137 } acpi; 1138 1139 #endif /* CONFIG_ACPI */ 1140 1141 struct ath12k_hw_group *ag; 1142 struct ath12k_wsi_info wsi_info; 1143 enum ath12k_qmi_firmware_mode fw_mode; 1144 struct ath12k_ftm_event_obj ftm_event_obj; 1145 bool hw_group_ref; 1146 1147 /* Denote whether MLO is possible within the device */ 1148 bool single_chip_mlo_support; 1149 1150 struct ath12k_reg_freq reg_freq_2ghz; 1151 struct ath12k_reg_freq reg_freq_5ghz; 1152 struct ath12k_reg_freq reg_freq_6ghz; 1153 const struct ath12k_mem_profile_based_param *profile_param; 1154 enum ath12k_qmi_mem_mode target_mem_mode; 1155 1156 /* FIXME: Define this field in a ag equivalent object available 1157 * during the initial phase of probe later. 1158 */ 1159 const struct ieee80211_ops *ath12k_ops; 1160 1161 struct rhashtable *rhead_sta_addr; 1162 struct rhashtable_params rhash_sta_addr_param; 1163 1164 /* must be last */ 1165 u8 drv_priv[] __aligned(sizeof(void *)); 1166 }; 1167 1168 struct ath12k_pdev_map { 1169 struct ath12k_base *ab; 1170 u8 pdev_idx; 1171 }; 1172 1173 struct ath12k_fw_stats_vdev { 1174 struct list_head list; 1175 1176 u32 vdev_id; 1177 u32 beacon_snr; 1178 u32 data_snr; 1179 u32 num_tx_frames[WLAN_MAX_AC]; 1180 u32 num_rx_frames; 1181 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1182 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1183 u32 num_rts_fail; 1184 u32 num_rts_success; 1185 u32 num_rx_err; 1186 u32 num_rx_discard; 1187 u32 num_tx_not_acked; 1188 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1189 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1190 }; 1191 1192 struct ath12k_fw_stats_bcn { 1193 struct list_head list; 1194 1195 u32 vdev_id; 1196 u32 tx_bcn_succ_cnt; 1197 u32 tx_bcn_outage_cnt; 1198 }; 1199 1200 struct ath12k_fw_stats_pdev { 1201 struct list_head list; 1202 1203 /* PDEV stats */ 1204 s32 ch_noise_floor; 1205 u32 tx_frame_count; 1206 u32 rx_frame_count; 1207 u32 rx_clear_count; 1208 u32 cycle_count; 1209 u32 phy_err_count; 1210 u32 chan_tx_power; 1211 u32 ack_rx_bad; 1212 u32 rts_bad; 1213 u32 rts_good; 1214 u32 fcs_bad; 1215 u32 no_beacons; 1216 u32 mib_int_count; 1217 1218 /* PDEV TX stats */ 1219 s32 comp_queued; 1220 s32 comp_delivered; 1221 s32 msdu_enqued; 1222 s32 mpdu_enqued; 1223 s32 wmm_drop; 1224 s32 local_enqued; 1225 s32 local_freed; 1226 s32 hw_queued; 1227 s32 hw_reaped; 1228 s32 underrun; 1229 s32 tx_abort; 1230 s32 mpdus_requed; 1231 u32 tx_ko; 1232 u32 data_rc; 1233 u32 self_triggers; 1234 u32 sw_retry_failure; 1235 u32 illgl_rate_phy_err; 1236 u32 pdev_cont_xretry; 1237 u32 pdev_tx_timeout; 1238 u32 pdev_resets; 1239 u32 stateless_tid_alloc_failure; 1240 u32 phy_underrun; 1241 u32 txop_ovf; 1242 1243 /* PDEV RX stats */ 1244 s32 mid_ppdu_route_change; 1245 s32 status_rcvd; 1246 s32 r0_frags; 1247 s32 r1_frags; 1248 s32 r2_frags; 1249 s32 r3_frags; 1250 s32 htt_msdus; 1251 s32 htt_mpdus; 1252 s32 loc_msdus; 1253 s32 loc_mpdus; 1254 s32 oversize_amsdu; 1255 s32 phy_errs; 1256 s32 phy_err_drop; 1257 s32 mpdu_errs; 1258 }; 1259 1260 int ath12k_core_qmi_firmware_ready(struct ath12k_base *ab); 1261 void ath12k_core_hw_group_cleanup(struct ath12k_hw_group *ag); 1262 int ath12k_core_pre_init(struct ath12k_base *ab); 1263 int ath12k_core_init(struct ath12k_base *ath12k); 1264 void ath12k_core_deinit(struct ath12k_base *ath12k); 1265 struct ath12k_base *ath12k_core_alloc(struct device *dev, size_t priv_size, 1266 enum ath12k_bus bus); 1267 void ath12k_core_free(struct ath12k_base *ath12k); 1268 int ath12k_core_fetch_board_data_api_1(struct ath12k_base *ab, 1269 struct ath12k_board_data *bd, 1270 char *filename); 1271 int ath12k_core_fetch_bdf(struct ath12k_base *ath12k, 1272 struct ath12k_board_data *bd); 1273 void ath12k_core_free_bdf(struct ath12k_base *ab, struct ath12k_board_data *bd); 1274 int ath12k_core_fetch_regdb(struct ath12k_base *ab, struct ath12k_board_data *bd); 1275 int ath12k_core_check_dt(struct ath12k_base *ath12k); 1276 int ath12k_core_check_smbios(struct ath12k_base *ab); 1277 void ath12k_core_halt(struct ath12k *ar); 1278 int ath12k_core_resume_early(struct ath12k_base *ab); 1279 int ath12k_core_resume(struct ath12k_base *ab); 1280 int ath12k_core_suspend(struct ath12k_base *ab); 1281 int ath12k_core_suspend_late(struct ath12k_base *ab); 1282 void ath12k_core_hw_group_unassign(struct ath12k_base *ab); 1283 u8 ath12k_get_num_partner_link(struct ath12k *ar); 1284 1285 const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab, 1286 const char *filename); 1287 u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab); 1288 u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab); 1289 1290 void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag); 1291 void ath12k_fw_stats_init(struct ath12k *ar); 1292 void ath12k_fw_stats_bcn_free(struct list_head *head); 1293 void ath12k_fw_stats_free(struct ath12k_fw_stats *stats); 1294 void ath12k_fw_stats_reset(struct ath12k *ar); 1295 enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab); 1296 1297 static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state) 1298 { 1299 switch (state) { 1300 case ATH12K_SCAN_IDLE: 1301 return "idle"; 1302 case ATH12K_SCAN_STARTING: 1303 return "starting"; 1304 case ATH12K_SCAN_RUNNING: 1305 return "running"; 1306 case ATH12K_SCAN_ABORTING: 1307 return "aborting"; 1308 } 1309 1310 return "unknown"; 1311 } 1312 1313 static inline struct ath12k_skb_cb *ATH12K_SKB_CB(struct sk_buff *skb) 1314 { 1315 BUILD_BUG_ON(sizeof(struct ath12k_skb_cb) > 1316 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1317 return (struct ath12k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1318 } 1319 1320 static inline struct ath12k_skb_rxcb *ATH12K_SKB_RXCB(struct sk_buff *skb) 1321 { 1322 BUILD_BUG_ON(sizeof(struct ath12k_skb_rxcb) > sizeof(skb->cb)); 1323 return (struct ath12k_skb_rxcb *)skb->cb; 1324 } 1325 1326 static inline struct ath12k_vif *ath12k_vif_to_ahvif(struct ieee80211_vif *vif) 1327 { 1328 return (struct ath12k_vif *)vif->drv_priv; 1329 } 1330 1331 static inline struct ath12k_sta *ath12k_sta_to_ahsta(struct ieee80211_sta *sta) 1332 { 1333 return (struct ath12k_sta *)sta->drv_priv; 1334 } 1335 1336 static inline struct ieee80211_sta *ath12k_ahsta_to_sta(struct ath12k_sta *ahsta) 1337 { 1338 return container_of((void *)ahsta, struct ieee80211_sta, drv_priv); 1339 } 1340 1341 static inline struct ieee80211_vif *ath12k_ahvif_to_vif(struct ath12k_vif *ahvif) 1342 { 1343 return container_of((void *)ahvif, struct ieee80211_vif, drv_priv); 1344 } 1345 1346 static inline struct ath12k *ath12k_ab_to_ar(struct ath12k_base *ab, 1347 int mac_id) 1348 { 1349 return ab->pdevs[ath12k_hw_mac_id_to_pdev_id(ab->hw_params, mac_id)].ar; 1350 } 1351 1352 static inline void ath12k_core_create_firmware_path(struct ath12k_base *ab, 1353 const char *filename, 1354 void *buf, size_t buf_len) 1355 { 1356 const char *fw_name = NULL; 1357 1358 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name); 1359 1360 if (fw_name && strncmp(filename, "board", 5)) 1361 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH12K_FW_DIR, 1362 ab->hw_params->fw.dir, fw_name, filename); 1363 else 1364 snprintf(buf, buf_len, "%s/%s/%s", ATH12K_FW_DIR, 1365 ab->hw_params->fw.dir, filename); 1366 } 1367 1368 static inline const char *ath12k_bus_str(enum ath12k_bus bus) 1369 { 1370 switch (bus) { 1371 case ATH12K_BUS_PCI: 1372 return "pci"; 1373 case ATH12K_BUS_AHB: 1374 return "ahb"; 1375 } 1376 1377 return "unknown"; 1378 } 1379 1380 static inline struct ath12k_hw *ath12k_hw_to_ah(struct ieee80211_hw *hw) 1381 { 1382 return hw->priv; 1383 } 1384 1385 static inline struct ath12k *ath12k_ah_to_ar(struct ath12k_hw *ah, u8 radio_idx) 1386 { 1387 if (WARN(radio_idx >= ah->num_radio, 1388 "bad radio index %d, use default radio\n", radio_idx)) 1389 radio_idx = 0; 1390 1391 return &ah->radio[radio_idx]; 1392 } 1393 1394 static inline struct ath12k_hw *ath12k_ar_to_ah(struct ath12k *ar) 1395 { 1396 return ar->ah; 1397 } 1398 1399 static inline struct ieee80211_hw *ath12k_ar_to_hw(struct ath12k *ar) 1400 { 1401 return ar->ah->hw; 1402 } 1403 1404 #define for_each_ar(ah, ar, index) \ 1405 for ((index) = 0; ((index) < (ah)->num_radio && \ 1406 ((ar) = &(ah)->radio[(index)])); (index)++) 1407 1408 static inline struct ath12k_hw *ath12k_ag_to_ah(struct ath12k_hw_group *ag, int idx) 1409 { 1410 return ag->ah[idx]; 1411 } 1412 1413 static inline void ath12k_ag_set_ah(struct ath12k_hw_group *ag, int idx, 1414 struct ath12k_hw *ah) 1415 { 1416 ag->ah[idx] = ah; 1417 } 1418 1419 static inline struct ath12k_hw_group *ath12k_ab_to_ag(struct ath12k_base *ab) 1420 { 1421 return ab->ag; 1422 } 1423 1424 static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag, 1425 u8 device_id) 1426 { 1427 return ag->ab[device_id]; 1428 } 1429 1430 static inline s32 ath12k_pdev_get_noise_floor(struct ath12k *ar) 1431 { 1432 lockdep_assert_held(&ar->data_lock); 1433 1434 return ar->rssi_info.noise_floor; 1435 } 1436 1437 /* The @ab->dp NULL check or assertion is intentionally omitted because 1438 * @ab->dp is guaranteed to be non-NULL after a successful probe and 1439 * remains valid until teardown. Invoking this before allocation or 1440 * after teardown is considered invalid usage. 1441 */ 1442 static inline struct ath12k_dp *ath12k_ab_to_dp(struct ath12k_base *ab) 1443 { 1444 return ab->dp; 1445 } 1446 1447 static inline struct ath12k *ath12k_pdev_dp_to_ar(struct ath12k_pdev_dp *dp) 1448 { 1449 return container_of(dp, struct ath12k, dp); 1450 } 1451 #endif /* _CORE_H_ */ 1452