1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Texas Instruments
4 * Author: Rob Clark <robdclark@gmail.com>
5 */
6
7 /* LCDC DRM driver, based on da8xx-fb */
8
9 #include <linux/component.h>
10 #include <linux/mod_devicetable.h>
11 #include <linux/module.h>
12 #include <linux/pinctrl/consumer.h>
13 #include <linux/platform_device.h>
14 #include <linux/pm_runtime.h>
15
16 #include <drm/clients/drm_client_setup.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_debugfs.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_fbdev_dma.h>
21 #include <drm/drm_fourcc.h>
22 #include <drm/drm_gem_dma_helper.h>
23 #include <drm/drm_gem_framebuffer_helper.h>
24 #include <drm/drm_mm.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
27
28
29 #include "tilcdc_drv.h"
30 #include "tilcdc_external.h"
31 #include "tilcdc_panel.h"
32 #include "tilcdc_regs.h"
33
34 static LIST_HEAD(module_list);
35
36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
37
38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
39 DRM_FORMAT_BGR888,
40 DRM_FORMAT_XBGR8888 };
41
42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
43 DRM_FORMAT_RGB888,
44 DRM_FORMAT_XRGB8888 };
45
46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
47 DRM_FORMAT_RGB888,
48 DRM_FORMAT_XRGB8888 };
49
tilcdc_module_init(struct tilcdc_module * mod,const char * name,const struct tilcdc_module_ops * funcs)50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
51 const struct tilcdc_module_ops *funcs)
52 {
53 mod->name = name;
54 mod->funcs = funcs;
55 INIT_LIST_HEAD(&mod->list);
56 list_add(&mod->list, &module_list);
57 }
58
tilcdc_module_cleanup(struct tilcdc_module * mod)59 void tilcdc_module_cleanup(struct tilcdc_module *mod)
60 {
61 list_del(&mod->list);
62 }
63
tilcdc_atomic_check(struct drm_device * dev,struct drm_atomic_state * state)64 static int tilcdc_atomic_check(struct drm_device *dev,
65 struct drm_atomic_state *state)
66 {
67 int ret;
68
69 ret = drm_atomic_helper_check_modeset(dev, state);
70 if (ret)
71 return ret;
72
73 ret = drm_atomic_helper_check_planes(dev, state);
74 if (ret)
75 return ret;
76
77 /*
78 * tilcdc ->atomic_check can update ->mode_changed if pixel format
79 * changes, hence will we check modeset changes again.
80 */
81 ret = drm_atomic_helper_check_modeset(dev, state);
82 if (ret)
83 return ret;
84
85 return ret;
86 }
87
88 static const struct drm_mode_config_funcs mode_config_funcs = {
89 .fb_create = drm_gem_fb_create,
90 .atomic_check = tilcdc_atomic_check,
91 .atomic_commit = drm_atomic_helper_commit,
92 };
93
modeset_init(struct drm_device * dev)94 static void modeset_init(struct drm_device *dev)
95 {
96 struct tilcdc_drm_private *priv = dev->dev_private;
97 struct tilcdc_module *mod;
98
99 list_for_each_entry(mod, &module_list, list) {
100 DBG("loading module: %s", mod->name);
101 mod->funcs->modeset_init(mod, dev);
102 }
103
104 dev->mode_config.min_width = 0;
105 dev->mode_config.min_height = 0;
106 dev->mode_config.max_width = priv->max_width;
107 dev->mode_config.max_height = 2048;
108 dev->mode_config.funcs = &mode_config_funcs;
109 }
110
111 #ifdef CONFIG_CPU_FREQ
cpufreq_transition(struct notifier_block * nb,unsigned long val,void * data)112 static int cpufreq_transition(struct notifier_block *nb,
113 unsigned long val, void *data)
114 {
115 struct tilcdc_drm_private *priv = container_of(nb,
116 struct tilcdc_drm_private, freq_transition);
117
118 if (val == CPUFREQ_POSTCHANGE)
119 tilcdc_crtc_update_clk(priv->crtc);
120
121 return 0;
122 }
123 #endif
124
tilcdc_irq(int irq,void * arg)125 static irqreturn_t tilcdc_irq(int irq, void *arg)
126 {
127 struct drm_device *dev = arg;
128 struct tilcdc_drm_private *priv = dev->dev_private;
129
130 return tilcdc_crtc_irq(priv->crtc);
131 }
132
tilcdc_irq_install(struct drm_device * dev,unsigned int irq)133 static int tilcdc_irq_install(struct drm_device *dev, unsigned int irq)
134 {
135 struct tilcdc_drm_private *priv = dev->dev_private;
136 int ret;
137
138 ret = request_irq(irq, tilcdc_irq, 0, dev->driver->name, dev);
139 if (ret)
140 return ret;
141
142 priv->irq_enabled = true;
143
144 return 0;
145 }
146
tilcdc_irq_uninstall(struct drm_device * dev)147 static void tilcdc_irq_uninstall(struct drm_device *dev)
148 {
149 struct tilcdc_drm_private *priv = dev->dev_private;
150
151 if (!priv->irq_enabled)
152 return;
153
154 free_irq(priv->irq, dev);
155 priv->irq_enabled = false;
156 }
157
158 /*
159 * DRM operations:
160 */
161
tilcdc_fini(struct drm_device * dev)162 static void tilcdc_fini(struct drm_device *dev)
163 {
164 struct tilcdc_drm_private *priv = dev->dev_private;
165
166 #ifdef CONFIG_CPU_FREQ
167 if (priv->freq_transition.notifier_call)
168 cpufreq_unregister_notifier(&priv->freq_transition,
169 CPUFREQ_TRANSITION_NOTIFIER);
170 #endif
171
172 if (priv->crtc)
173 tilcdc_crtc_shutdown(priv->crtc);
174
175 drm_dev_unregister(dev);
176
177 drm_kms_helper_poll_fini(dev);
178 drm_atomic_helper_shutdown(dev);
179 tilcdc_irq_uninstall(dev);
180 drm_mode_config_cleanup(dev);
181
182 if (priv->clk)
183 clk_put(priv->clk);
184
185 if (priv->wq)
186 destroy_workqueue(priv->wq);
187
188 dev->dev_private = NULL;
189
190 pm_runtime_disable(dev->dev);
191
192 drm_dev_put(dev);
193 }
194
tilcdc_init(const struct drm_driver * ddrv,struct device * dev)195 static int tilcdc_init(const struct drm_driver *ddrv, struct device *dev)
196 {
197 struct drm_device *ddev;
198 struct platform_device *pdev = to_platform_device(dev);
199 struct device_node *node = dev->of_node;
200 struct tilcdc_drm_private *priv;
201 u32 bpp = 0;
202 int ret;
203
204 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
205 if (!priv)
206 return -ENOMEM;
207
208 ddev = drm_dev_alloc(ddrv, dev);
209 if (IS_ERR(ddev))
210 return PTR_ERR(ddev);
211
212 ddev->dev_private = priv;
213 platform_set_drvdata(pdev, ddev);
214 drm_mode_config_init(ddev);
215
216 priv->is_componentized =
217 tilcdc_get_external_components(dev, NULL) > 0;
218
219 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
220 if (!priv->wq) {
221 ret = -ENOMEM;
222 goto put_drm;
223 }
224
225 priv->mmio = devm_platform_ioremap_resource(pdev, 0);
226 if (IS_ERR(priv->mmio)) {
227 dev_err(dev, "failed to request / ioremap\n");
228 ret = PTR_ERR(priv->mmio);
229 goto free_wq;
230 }
231
232 priv->clk = clk_get(dev, "fck");
233 if (IS_ERR(priv->clk)) {
234 dev_err(dev, "failed to get functional clock\n");
235 ret = -ENODEV;
236 goto free_wq;
237 }
238
239 pm_runtime_enable(dev);
240
241 /* Determine LCD IP Version */
242 pm_runtime_get_sync(dev);
243 switch (tilcdc_read(ddev, LCDC_PID_REG)) {
244 case 0x4c100102:
245 priv->rev = 1;
246 break;
247 case 0x4f200800:
248 case 0x4f201000:
249 priv->rev = 2;
250 break;
251 default:
252 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
253 "defaulting to LCD revision 1\n",
254 tilcdc_read(ddev, LCDC_PID_REG));
255 priv->rev = 1;
256 break;
257 }
258
259 pm_runtime_put_sync(dev);
260
261 if (priv->rev == 1) {
262 DBG("Revision 1 LCDC supports only RGB565 format");
263 priv->pixelformats = tilcdc_rev1_formats;
264 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
265 bpp = 16;
266 } else {
267 const char *str = "\0";
268
269 of_property_read_string(node, "blue-and-red-wiring", &str);
270 if (0 == strcmp(str, "crossed")) {
271 DBG("Configured for crossed blue and red wires");
272 priv->pixelformats = tilcdc_crossed_formats;
273 priv->num_pixelformats =
274 ARRAY_SIZE(tilcdc_crossed_formats);
275 bpp = 32; /* Choose bpp with RGB support for fbdef */
276 } else if (0 == strcmp(str, "straight")) {
277 DBG("Configured for straight blue and red wires");
278 priv->pixelformats = tilcdc_straight_formats;
279 priv->num_pixelformats =
280 ARRAY_SIZE(tilcdc_straight_formats);
281 bpp = 16; /* Choose bpp with RGB support for fbdef */
282 } else {
283 DBG("Blue and red wiring '%s' unknown, use legacy mode",
284 str);
285 priv->pixelformats = tilcdc_legacy_formats;
286 priv->num_pixelformats =
287 ARRAY_SIZE(tilcdc_legacy_formats);
288 bpp = 16; /* This is just a guess */
289 }
290 }
291
292 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
293 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
294
295 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
296
297 if (of_property_read_u32(node, "max-width", &priv->max_width)) {
298 if (priv->rev == 1)
299 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1;
300 else
301 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2;
302 }
303
304 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
305
306 if (of_property_read_u32(node, "max-pixelclock",
307 &priv->max_pixelclock))
308 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
309
310 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
311
312 ret = tilcdc_crtc_create(ddev);
313 if (ret < 0) {
314 dev_err(dev, "failed to create crtc\n");
315 goto disable_pm;
316 }
317 modeset_init(ddev);
318
319 #ifdef CONFIG_CPU_FREQ
320 priv->freq_transition.notifier_call = cpufreq_transition;
321 ret = cpufreq_register_notifier(&priv->freq_transition,
322 CPUFREQ_TRANSITION_NOTIFIER);
323 if (ret) {
324 dev_err(dev, "failed to register cpufreq notifier\n");
325 priv->freq_transition.notifier_call = NULL;
326 goto destroy_crtc;
327 }
328 #endif
329
330 if (priv->is_componentized) {
331 ret = component_bind_all(dev, ddev);
332 if (ret < 0)
333 goto unregister_cpufreq_notif;
334
335 ret = tilcdc_add_component_encoder(ddev);
336 if (ret < 0)
337 goto unbind_component;
338 } else {
339 ret = tilcdc_attach_external_device(ddev);
340 if (ret)
341 goto unregister_cpufreq_notif;
342 }
343
344 if (!priv->external_connector &&
345 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
346 dev_err(dev, "no encoders/connectors found\n");
347 ret = -EPROBE_DEFER;
348 goto unbind_component;
349 }
350
351 ret = drm_vblank_init(ddev, 1);
352 if (ret < 0) {
353 dev_err(dev, "failed to initialize vblank\n");
354 goto unbind_component;
355 }
356
357 ret = platform_get_irq(pdev, 0);
358 if (ret < 0)
359 goto unbind_component;
360 priv->irq = ret;
361
362 ret = tilcdc_irq_install(ddev, priv->irq);
363 if (ret < 0) {
364 dev_err(dev, "failed to install IRQ handler\n");
365 goto unbind_component;
366 }
367
368 drm_mode_config_reset(ddev);
369
370 drm_kms_helper_poll_init(ddev);
371
372 ret = drm_dev_register(ddev, 0);
373 if (ret)
374 goto stop_poll;
375
376 drm_client_setup_with_color_mode(ddev, bpp);
377
378 return 0;
379
380 stop_poll:
381 drm_kms_helper_poll_fini(ddev);
382 tilcdc_irq_uninstall(ddev);
383 unbind_component:
384 if (priv->is_componentized)
385 component_unbind_all(dev, ddev);
386 unregister_cpufreq_notif:
387 #ifdef CONFIG_CPU_FREQ
388 cpufreq_unregister_notifier(&priv->freq_transition,
389 CPUFREQ_TRANSITION_NOTIFIER);
390 destroy_crtc:
391 #endif
392 tilcdc_crtc_destroy(priv->crtc);
393 disable_pm:
394 pm_runtime_disable(dev);
395 clk_put(priv->clk);
396 free_wq:
397 destroy_workqueue(priv->wq);
398 put_drm:
399 platform_set_drvdata(pdev, NULL);
400 ddev->dev_private = NULL;
401 drm_dev_put(ddev);
402
403 return ret;
404 }
405
406 #if defined(CONFIG_DEBUG_FS)
407 static const struct {
408 const char *name;
409 uint8_t rev;
410 uint8_t save;
411 uint32_t reg;
412 } registers[] = {
413 #define REG(rev, save, reg) { #reg, rev, save, reg }
414 /* exists in revision 1: */
415 REG(1, false, LCDC_PID_REG),
416 REG(1, true, LCDC_CTRL_REG),
417 REG(1, false, LCDC_STAT_REG),
418 REG(1, true, LCDC_RASTER_CTRL_REG),
419 REG(1, true, LCDC_RASTER_TIMING_0_REG),
420 REG(1, true, LCDC_RASTER_TIMING_1_REG),
421 REG(1, true, LCDC_RASTER_TIMING_2_REG),
422 REG(1, true, LCDC_DMA_CTRL_REG),
423 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
424 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
425 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
426 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
427 /* new in revision 2: */
428 REG(2, false, LCDC_RAW_STAT_REG),
429 REG(2, false, LCDC_MASKED_STAT_REG),
430 REG(2, true, LCDC_INT_ENABLE_SET_REG),
431 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
432 REG(2, false, LCDC_END_OF_INT_IND_REG),
433 REG(2, true, LCDC_CLK_ENABLE_REG),
434 #undef REG
435 };
436
437 #endif
438
439 #ifdef CONFIG_DEBUG_FS
tilcdc_regs_show(struct seq_file * m,void * arg)440 static int tilcdc_regs_show(struct seq_file *m, void *arg)
441 {
442 struct drm_info_node *node = (struct drm_info_node *) m->private;
443 struct drm_device *dev = node->minor->dev;
444 struct tilcdc_drm_private *priv = dev->dev_private;
445 unsigned i;
446
447 pm_runtime_get_sync(dev->dev);
448
449 seq_printf(m, "revision: %d\n", priv->rev);
450
451 for (i = 0; i < ARRAY_SIZE(registers); i++)
452 if (priv->rev >= registers[i].rev)
453 seq_printf(m, "%s:\t %08x\n", registers[i].name,
454 tilcdc_read(dev, registers[i].reg));
455
456 pm_runtime_put_sync(dev->dev);
457
458 return 0;
459 }
460
tilcdc_mm_show(struct seq_file * m,void * arg)461 static int tilcdc_mm_show(struct seq_file *m, void *arg)
462 {
463 struct drm_info_node *node = (struct drm_info_node *) m->private;
464 struct drm_device *dev = node->minor->dev;
465 struct drm_printer p = drm_seq_file_printer(m);
466 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
467 return 0;
468 }
469
470 static struct drm_info_list tilcdc_debugfs_list[] = {
471 { "regs", tilcdc_regs_show, 0, NULL },
472 { "mm", tilcdc_mm_show, 0, NULL },
473 };
474
tilcdc_debugfs_init(struct drm_minor * minor)475 static void tilcdc_debugfs_init(struct drm_minor *minor)
476 {
477 struct tilcdc_module *mod;
478
479 drm_debugfs_create_files(tilcdc_debugfs_list,
480 ARRAY_SIZE(tilcdc_debugfs_list),
481 minor->debugfs_root, minor);
482
483 list_for_each_entry(mod, &module_list, list)
484 if (mod->funcs->debugfs_init)
485 mod->funcs->debugfs_init(mod, minor);
486 }
487 #endif
488
489 DEFINE_DRM_GEM_DMA_FOPS(fops);
490
491 static const struct drm_driver tilcdc_driver = {
492 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
493 DRM_GEM_DMA_DRIVER_OPS,
494 DRM_FBDEV_DMA_DRIVER_OPS,
495 #ifdef CONFIG_DEBUG_FS
496 .debugfs_init = tilcdc_debugfs_init,
497 #endif
498 .fops = &fops,
499 .name = "tilcdc",
500 .desc = "TI LCD Controller DRM",
501 .major = 1,
502 .minor = 0,
503 };
504
505 /*
506 * Power management:
507 */
508
tilcdc_pm_suspend(struct device * dev)509 static int tilcdc_pm_suspend(struct device *dev)
510 {
511 struct drm_device *ddev = dev_get_drvdata(dev);
512 int ret = 0;
513
514 ret = drm_mode_config_helper_suspend(ddev);
515
516 /* Select sleep pin state */
517 pinctrl_pm_select_sleep_state(dev);
518
519 return ret;
520 }
521
tilcdc_pm_resume(struct device * dev)522 static int tilcdc_pm_resume(struct device *dev)
523 {
524 struct drm_device *ddev = dev_get_drvdata(dev);
525
526 /* Select default pin state */
527 pinctrl_pm_select_default_state(dev);
528 return drm_mode_config_helper_resume(ddev);
529 }
530
531 static DEFINE_SIMPLE_DEV_PM_OPS(tilcdc_pm_ops,
532 tilcdc_pm_suspend, tilcdc_pm_resume);
533
534 /*
535 * Platform driver:
536 */
tilcdc_bind(struct device * dev)537 static int tilcdc_bind(struct device *dev)
538 {
539 return tilcdc_init(&tilcdc_driver, dev);
540 }
541
tilcdc_unbind(struct device * dev)542 static void tilcdc_unbind(struct device *dev)
543 {
544 struct drm_device *ddev = dev_get_drvdata(dev);
545
546 /* Check if a subcomponent has already triggered the unloading. */
547 if (!ddev->dev_private)
548 return;
549
550 tilcdc_fini(ddev);
551 dev_set_drvdata(dev, NULL);
552 }
553
554 static const struct component_master_ops tilcdc_comp_ops = {
555 .bind = tilcdc_bind,
556 .unbind = tilcdc_unbind,
557 };
558
tilcdc_pdev_probe(struct platform_device * pdev)559 static int tilcdc_pdev_probe(struct platform_device *pdev)
560 {
561 struct component_match *match = NULL;
562 int ret;
563
564 /* bail out early if no DT data: */
565 if (!pdev->dev.of_node) {
566 dev_err(&pdev->dev, "device-tree data is missing\n");
567 return -ENXIO;
568 }
569
570 ret = tilcdc_get_external_components(&pdev->dev, &match);
571 if (ret < 0)
572 return ret;
573 else if (ret == 0)
574 return tilcdc_init(&tilcdc_driver, &pdev->dev);
575 else
576 return component_master_add_with_match(&pdev->dev,
577 &tilcdc_comp_ops,
578 match);
579 }
580
tilcdc_pdev_remove(struct platform_device * pdev)581 static void tilcdc_pdev_remove(struct platform_device *pdev)
582 {
583 int ret;
584
585 ret = tilcdc_get_external_components(&pdev->dev, NULL);
586 if (ret < 0)
587 dev_err(&pdev->dev, "tilcdc_get_external_components() failed (%pe)\n",
588 ERR_PTR(ret));
589 else if (ret == 0)
590 tilcdc_fini(platform_get_drvdata(pdev));
591 else
592 component_master_del(&pdev->dev, &tilcdc_comp_ops);
593 }
594
tilcdc_pdev_shutdown(struct platform_device * pdev)595 static void tilcdc_pdev_shutdown(struct platform_device *pdev)
596 {
597 drm_atomic_helper_shutdown(platform_get_drvdata(pdev));
598 }
599
600 static const struct of_device_id tilcdc_of_match[] = {
601 { .compatible = "ti,am33xx-tilcdc", },
602 { .compatible = "ti,da850-tilcdc", },
603 { },
604 };
605 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
606
607 static struct platform_driver tilcdc_platform_driver = {
608 .probe = tilcdc_pdev_probe,
609 .remove = tilcdc_pdev_remove,
610 .shutdown = tilcdc_pdev_shutdown,
611 .driver = {
612 .name = "tilcdc",
613 .pm = pm_sleep_ptr(&tilcdc_pm_ops),
614 .of_match_table = tilcdc_of_match,
615 },
616 };
617
tilcdc_drm_init(void)618 static int __init tilcdc_drm_init(void)
619 {
620 if (drm_firmware_drivers_only())
621 return -ENODEV;
622
623 DBG("init");
624 tilcdc_panel_init();
625 return platform_driver_register(&tilcdc_platform_driver);
626 }
627
tilcdc_drm_fini(void)628 static void __exit tilcdc_drm_fini(void)
629 {
630 DBG("fini");
631 platform_driver_unregister(&tilcdc_platform_driver);
632 tilcdc_panel_fini();
633 }
634
635 module_init(tilcdc_drm_init);
636 module_exit(tilcdc_drm_fini);
637
638 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
639 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
640 MODULE_LICENSE("GPL");
641