xref: /linux/drivers/gpu/drm/msm/dp/dp_link.h (revision 3f1c07fc21c68bd3bd2df9d2c9441f6485e934d9)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DP_LINK_H_
7 #define _DP_LINK_H_
8 
9 #include "dp_aux.h"
10 #include <drm/display/drm_dp_helper.h>
11 
12 #define DS_PORT_STATUS_CHANGED 0x200
13 #define DP_TEST_BIT_DEPTH_UNKNOWN 0xFFFFFFFF
14 #define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0)
15 #define DP_MAX_NUM_DP_LANES    4
16 
17 struct msm_dp_link_info {
18 	unsigned char revision;
19 	unsigned int rate;
20 	unsigned int num_lanes;
21 	unsigned long capabilities;
22 };
23 
24 #define DP_TRAIN_LEVEL_MAX	3
25 
26 struct msm_dp_link_test_video {
27 	u32 test_video_pattern;
28 	u32 test_bit_depth;
29 	u32 test_dyn_range;
30 	u32 test_h_total;
31 	u32 test_v_total;
32 	u32 test_h_start;
33 	u32 test_v_start;
34 	u32 test_hsync_pol;
35 	u32 test_hsync_width;
36 	u32 test_vsync_pol;
37 	u32 test_vsync_width;
38 	u32 test_h_width;
39 	u32 test_v_height;
40 	u32 test_rr_d;
41 	u32 test_rr_n;
42 };
43 
44 struct msm_dp_link_test_audio {
45 	u32 test_audio_sampling_rate;
46 	u32 test_audio_channel_count;
47 	u32 test_audio_pattern_type;
48 	u32 test_audio_period_ch_1;
49 	u32 test_audio_period_ch_2;
50 	u32 test_audio_period_ch_3;
51 	u32 test_audio_period_ch_4;
52 	u32 test_audio_period_ch_5;
53 	u32 test_audio_period_ch_6;
54 	u32 test_audio_period_ch_7;
55 	u32 test_audio_period_ch_8;
56 };
57 
58 struct msm_dp_link_phy_params {
59 	u32 phy_test_pattern_sel;
60 	u8 v_level;
61 	u8 p_level;
62 };
63 
64 struct msm_dp_link {
65 	u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];
66 	int lttpr_count;
67 
68 	u32 sink_request;
69 	u32 test_response;
70 
71 	u8 sink_count;
72 	struct msm_dp_link_test_video test_video;
73 	struct msm_dp_link_test_audio test_audio;
74 	struct msm_dp_link_phy_params phy_params;
75 	struct msm_dp_link_info link_params;
76 
77 	u32 lane_map[DP_MAX_NUM_DP_LANES];
78 	u32 max_dp_lanes;
79 	u32 max_dp_link_rate;
80 };
81 
82 /**
83  * mdss_dp_test_bit_depth_to_bpp() - convert test bit depth to bpp
84  * @tbd: test bit depth
85  *
86  * Returns the bits per pixel (bpp) to be used corresponding to the
87  * git bit depth value. This function assumes that bit depth has
88  * already been validated.
89  */
msm_dp_link_bit_depth_to_bpp(u32 tbd)90 static inline u32 msm_dp_link_bit_depth_to_bpp(u32 tbd)
91 {
92 	/*
93 	 * Few simplistic rules and assumptions made here:
94 	 *    1. Bit depth is per color component
95 	 *    2. If bit depth is unknown return 0
96 	 *    3. Assume 3 color components
97 	 */
98 	switch (tbd) {
99 	case DP_TEST_BIT_DEPTH_6:
100 		return 18;
101 	case DP_TEST_BIT_DEPTH_8:
102 		return 24;
103 	case DP_TEST_BIT_DEPTH_10:
104 		return 30;
105 	case DP_TEST_BIT_DEPTH_UNKNOWN:
106 	default:
107 		return 0;
108 	}
109 }
110 
111 void msm_dp_link_reset_phy_params_vx_px(struct msm_dp_link *msm_dp_link);
112 u32 msm_dp_link_get_test_bits_depth(struct msm_dp_link *msm_dp_link, u32 bpp);
113 int msm_dp_link_process_request(struct msm_dp_link *msm_dp_link);
114 int msm_dp_link_get_colorimetry_config(struct msm_dp_link *msm_dp_link);
115 int msm_dp_link_adjust_levels(struct msm_dp_link *msm_dp_link, u8 *link_status);
116 bool msm_dp_link_send_test_response(struct msm_dp_link *msm_dp_link);
117 int msm_dp_link_psm_config(struct msm_dp_link *msm_dp_link,
118 		struct msm_dp_link_info *link_info, bool enable);
119 bool msm_dp_link_send_edid_checksum(struct msm_dp_link *msm_dp_link, u8 checksum);
120 
121 /**
122  * msm_dp_link_get() - get the functionalities of dp test module
123  *
124  *
125  * return: a pointer to msm_dp_link struct
126  */
127 struct msm_dp_link *msm_dp_link_get(struct device *dev, struct drm_dp_aux *aux);
128 
129 #endif /* _DP_LINK_H_ */
130