1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2015 Microchip Technology 4 */ 5 #include <linux/module.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/ethtool.h> 9 #include <linux/phylink.h> 10 #include <linux/usb.h> 11 #include <linux/crc32.h> 12 #include <linux/signal.h> 13 #include <linux/slab.h> 14 #include <linux/if_vlan.h> 15 #include <linux/uaccess.h> 16 #include <linux/linkmode.h> 17 #include <linux/list.h> 18 #include <linux/ip.h> 19 #include <linux/ipv6.h> 20 #include <linux/mdio.h> 21 #include <linux/phy.h> 22 #include <net/ip6_checksum.h> 23 #include <net/selftests.h> 24 #include <net/vxlan.h> 25 #include <linux/interrupt.h> 26 #include <linux/irqdomain.h> 27 #include <linux/irq.h> 28 #include <linux/irqchip/chained_irq.h> 29 #include <linux/microchipphy.h> 30 #include <linux/of_mdio.h> 31 #include <linux/of_net.h> 32 #include "lan78xx.h" 33 34 #define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>" 35 #define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices" 36 #define DRIVER_NAME "lan78xx" 37 38 #define TX_TIMEOUT_JIFFIES (5 * HZ) 39 #define THROTTLE_JIFFIES (HZ / 8) 40 #define UNLINK_TIMEOUT_MS 3 41 42 #define RX_MAX_QUEUE_MEMORY (60 * 1518) 43 44 #define SS_USB_PKT_SIZE (1024) 45 #define HS_USB_PKT_SIZE (512) 46 #define FS_USB_PKT_SIZE (64) 47 48 #define MAX_RX_FIFO_SIZE (12 * 1024) 49 #define MAX_TX_FIFO_SIZE (12 * 1024) 50 51 #define FLOW_THRESHOLD(n) ((((n) + 511) / 512) & 0x7F) 52 #define FLOW_CTRL_THRESHOLD(on, off) ((FLOW_THRESHOLD(on) << 0) | \ 53 (FLOW_THRESHOLD(off) << 8)) 54 55 /* Flow control turned on when Rx FIFO level rises above this level (bytes) */ 56 #define FLOW_ON_SS 9216 57 #define FLOW_ON_HS 8704 58 59 /* Flow control turned off when Rx FIFO level falls below this level (bytes) */ 60 #define FLOW_OFF_SS 4096 61 #define FLOW_OFF_HS 1024 62 63 #define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE) 64 #define DEFAULT_BULK_IN_DELAY (0x0800) 65 #define MAX_SINGLE_PACKET_SIZE (9000) 66 #define DEFAULT_TX_CSUM_ENABLE (true) 67 #define DEFAULT_RX_CSUM_ENABLE (true) 68 #define DEFAULT_TSO_CSUM_ENABLE (true) 69 #define DEFAULT_VLAN_FILTER_ENABLE (true) 70 #define DEFAULT_VLAN_RX_OFFLOAD (true) 71 #define TX_ALIGNMENT (4) 72 #define RXW_PADDING 2 73 74 #define LAN78XX_USB_VENDOR_ID (0x0424) 75 #define LAN7800_USB_PRODUCT_ID (0x7800) 76 #define LAN7850_USB_PRODUCT_ID (0x7850) 77 #define LAN7801_USB_PRODUCT_ID (0x7801) 78 #define LAN78XX_EEPROM_MAGIC (0x78A5) 79 #define LAN78XX_OTP_MAGIC (0x78F3) 80 #define AT29M2AF_USB_VENDOR_ID (0x07C9) 81 #define AT29M2AF_USB_PRODUCT_ID (0x0012) 82 83 #define MII_READ 1 84 #define MII_WRITE 0 85 86 #define EEPROM_INDICATOR (0xA5) 87 #define EEPROM_MAC_OFFSET (0x01) 88 #define MAX_EEPROM_SIZE 512 89 #define OTP_INDICATOR_1 (0xF3) 90 #define OTP_INDICATOR_2 (0xF7) 91 92 #define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \ 93 WAKE_MCAST | WAKE_BCAST | \ 94 WAKE_ARP | WAKE_MAGIC) 95 96 #define TX_URB_NUM 10 97 #define TX_SS_URB_NUM TX_URB_NUM 98 #define TX_HS_URB_NUM TX_URB_NUM 99 #define TX_FS_URB_NUM TX_URB_NUM 100 101 /* A single URB buffer must be large enough to hold a complete jumbo packet 102 */ 103 #define TX_SS_URB_SIZE (32 * 1024) 104 #define TX_HS_URB_SIZE (16 * 1024) 105 #define TX_FS_URB_SIZE (10 * 1024) 106 107 #define RX_SS_URB_NUM 30 108 #define RX_HS_URB_NUM 10 109 #define RX_FS_URB_NUM 10 110 #define RX_SS_URB_SIZE TX_SS_URB_SIZE 111 #define RX_HS_URB_SIZE TX_HS_URB_SIZE 112 #define RX_FS_URB_SIZE TX_FS_URB_SIZE 113 114 #define SS_BURST_CAP_SIZE RX_SS_URB_SIZE 115 #define SS_BULK_IN_DELAY 0x2000 116 #define HS_BURST_CAP_SIZE RX_HS_URB_SIZE 117 #define HS_BULK_IN_DELAY 0x2000 118 #define FS_BURST_CAP_SIZE RX_FS_URB_SIZE 119 #define FS_BULK_IN_DELAY 0x2000 120 121 #define TX_CMD_LEN 8 122 #define TX_SKB_MIN_LEN (TX_CMD_LEN + ETH_HLEN) 123 #define LAN78XX_TSO_SIZE(dev) ((dev)->tx_urb_size - TX_SKB_MIN_LEN) 124 125 #define RX_CMD_LEN 10 126 #define RX_SKB_MIN_LEN (RX_CMD_LEN + ETH_HLEN) 127 #define RX_MAX_FRAME_LEN(mtu) ((mtu) + ETH_HLEN + VLAN_HLEN) 128 129 /* USB related defines */ 130 #define BULK_IN_PIPE 1 131 #define BULK_OUT_PIPE 2 132 133 /* default autosuspend delay (mSec)*/ 134 #define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000) 135 136 /* statistic update interval (mSec) */ 137 #define STAT_UPDATE_TIMER (1 * 1000) 138 139 /* time to wait for MAC or FCT to stop (jiffies) */ 140 #define HW_DISABLE_TIMEOUT (HZ / 10) 141 142 /* time to wait between polling MAC or FCT state (ms) */ 143 #define HW_DISABLE_DELAY_MS 1 144 145 /* defines interrupts from interrupt EP */ 146 #define MAX_INT_EP (32) 147 #define INT_EP_INTEP (31) 148 #define INT_EP_OTP_WR_DONE (28) 149 #define INT_EP_EEE_TX_LPI_START (26) 150 #define INT_EP_EEE_TX_LPI_STOP (25) 151 #define INT_EP_EEE_RX_LPI (24) 152 #define INT_EP_MAC_RESET_TIMEOUT (23) 153 #define INT_EP_RDFO (22) 154 #define INT_EP_TXE (21) 155 #define INT_EP_USB_STATUS (20) 156 #define INT_EP_TX_DIS (19) 157 #define INT_EP_RX_DIS (18) 158 #define INT_EP_PHY (17) 159 #define INT_EP_DP (16) 160 #define INT_EP_MAC_ERR (15) 161 #define INT_EP_TDFU (14) 162 #define INT_EP_TDFO (13) 163 #define INT_EP_UTX (12) 164 #define INT_EP_GPIO_11 (11) 165 #define INT_EP_GPIO_10 (10) 166 #define INT_EP_GPIO_9 (9) 167 #define INT_EP_GPIO_8 (8) 168 #define INT_EP_GPIO_7 (7) 169 #define INT_EP_GPIO_6 (6) 170 #define INT_EP_GPIO_5 (5) 171 #define INT_EP_GPIO_4 (4) 172 #define INT_EP_GPIO_3 (3) 173 #define INT_EP_GPIO_2 (2) 174 #define INT_EP_GPIO_1 (1) 175 #define INT_EP_GPIO_0 (0) 176 177 static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = { 178 "RX FCS Errors", 179 "RX Alignment Errors", 180 "Rx Fragment Errors", 181 "RX Jabber Errors", 182 "RX Undersize Frame Errors", 183 "RX Oversize Frame Errors", 184 "RX Dropped Frames", 185 "RX Unicast Byte Count", 186 "RX Broadcast Byte Count", 187 "RX Multicast Byte Count", 188 "RX Unicast Frames", 189 "RX Broadcast Frames", 190 "RX Multicast Frames", 191 "RX Pause Frames", 192 "RX 64 Byte Frames", 193 "RX 65 - 127 Byte Frames", 194 "RX 128 - 255 Byte Frames", 195 "RX 256 - 511 Bytes Frames", 196 "RX 512 - 1023 Byte Frames", 197 "RX 1024 - 1518 Byte Frames", 198 "RX Greater 1518 Byte Frames", 199 "EEE RX LPI Transitions", 200 "EEE RX LPI Time", 201 "TX FCS Errors", 202 "TX Excess Deferral Errors", 203 "TX Carrier Errors", 204 "TX Bad Byte Count", 205 "TX Single Collisions", 206 "TX Multiple Collisions", 207 "TX Excessive Collision", 208 "TX Late Collisions", 209 "TX Unicast Byte Count", 210 "TX Broadcast Byte Count", 211 "TX Multicast Byte Count", 212 "TX Unicast Frames", 213 "TX Broadcast Frames", 214 "TX Multicast Frames", 215 "TX Pause Frames", 216 "TX 64 Byte Frames", 217 "TX 65 - 127 Byte Frames", 218 "TX 128 - 255 Byte Frames", 219 "TX 256 - 511 Bytes Frames", 220 "TX 512 - 1023 Byte Frames", 221 "TX 1024 - 1518 Byte Frames", 222 "TX Greater 1518 Byte Frames", 223 "EEE TX LPI Transitions", 224 "EEE TX LPI Time", 225 }; 226 227 struct lan78xx_statstage { 228 u32 rx_fcs_errors; 229 u32 rx_alignment_errors; 230 u32 rx_fragment_errors; 231 u32 rx_jabber_errors; 232 u32 rx_undersize_frame_errors; 233 u32 rx_oversize_frame_errors; 234 u32 rx_dropped_frames; 235 u32 rx_unicast_byte_count; 236 u32 rx_broadcast_byte_count; 237 u32 rx_multicast_byte_count; 238 u32 rx_unicast_frames; 239 u32 rx_broadcast_frames; 240 u32 rx_multicast_frames; 241 u32 rx_pause_frames; 242 u32 rx_64_byte_frames; 243 u32 rx_65_127_byte_frames; 244 u32 rx_128_255_byte_frames; 245 u32 rx_256_511_bytes_frames; 246 u32 rx_512_1023_byte_frames; 247 u32 rx_1024_1518_byte_frames; 248 u32 rx_greater_1518_byte_frames; 249 u32 eee_rx_lpi_transitions; 250 u32 eee_rx_lpi_time; 251 u32 tx_fcs_errors; 252 u32 tx_excess_deferral_errors; 253 u32 tx_carrier_errors; 254 u32 tx_bad_byte_count; 255 u32 tx_single_collisions; 256 u32 tx_multiple_collisions; 257 u32 tx_excessive_collision; 258 u32 tx_late_collisions; 259 u32 tx_unicast_byte_count; 260 u32 tx_broadcast_byte_count; 261 u32 tx_multicast_byte_count; 262 u32 tx_unicast_frames; 263 u32 tx_broadcast_frames; 264 u32 tx_multicast_frames; 265 u32 tx_pause_frames; 266 u32 tx_64_byte_frames; 267 u32 tx_65_127_byte_frames; 268 u32 tx_128_255_byte_frames; 269 u32 tx_256_511_bytes_frames; 270 u32 tx_512_1023_byte_frames; 271 u32 tx_1024_1518_byte_frames; 272 u32 tx_greater_1518_byte_frames; 273 u32 eee_tx_lpi_transitions; 274 u32 eee_tx_lpi_time; 275 }; 276 277 struct lan78xx_statstage64 { 278 u64 rx_fcs_errors; 279 u64 rx_alignment_errors; 280 u64 rx_fragment_errors; 281 u64 rx_jabber_errors; 282 u64 rx_undersize_frame_errors; 283 u64 rx_oversize_frame_errors; 284 u64 rx_dropped_frames; 285 u64 rx_unicast_byte_count; 286 u64 rx_broadcast_byte_count; 287 u64 rx_multicast_byte_count; 288 u64 rx_unicast_frames; 289 u64 rx_broadcast_frames; 290 u64 rx_multicast_frames; 291 u64 rx_pause_frames; 292 u64 rx_64_byte_frames; 293 u64 rx_65_127_byte_frames; 294 u64 rx_128_255_byte_frames; 295 u64 rx_256_511_bytes_frames; 296 u64 rx_512_1023_byte_frames; 297 u64 rx_1024_1518_byte_frames; 298 u64 rx_greater_1518_byte_frames; 299 u64 eee_rx_lpi_transitions; 300 u64 eee_rx_lpi_time; 301 u64 tx_fcs_errors; 302 u64 tx_excess_deferral_errors; 303 u64 tx_carrier_errors; 304 u64 tx_bad_byte_count; 305 u64 tx_single_collisions; 306 u64 tx_multiple_collisions; 307 u64 tx_excessive_collision; 308 u64 tx_late_collisions; 309 u64 tx_unicast_byte_count; 310 u64 tx_broadcast_byte_count; 311 u64 tx_multicast_byte_count; 312 u64 tx_unicast_frames; 313 u64 tx_broadcast_frames; 314 u64 tx_multicast_frames; 315 u64 tx_pause_frames; 316 u64 tx_64_byte_frames; 317 u64 tx_65_127_byte_frames; 318 u64 tx_128_255_byte_frames; 319 u64 tx_256_511_bytes_frames; 320 u64 tx_512_1023_byte_frames; 321 u64 tx_1024_1518_byte_frames; 322 u64 tx_greater_1518_byte_frames; 323 u64 eee_tx_lpi_transitions; 324 u64 eee_tx_lpi_time; 325 }; 326 327 static u32 lan78xx_regs[] = { 328 ID_REV, 329 INT_STS, 330 HW_CFG, 331 PMT_CTL, 332 E2P_CMD, 333 E2P_DATA, 334 USB_STATUS, 335 VLAN_TYPE, 336 MAC_CR, 337 MAC_RX, 338 MAC_TX, 339 FLOW, 340 ERR_STS, 341 MII_ACC, 342 MII_DATA, 343 EEE_TX_LPI_REQ_DLY, 344 EEE_TW_TX_SYS, 345 EEE_TX_LPI_REM_DLY, 346 WUCSR 347 }; 348 349 #define PHY_REG_SIZE (32 * sizeof(u32)) 350 351 struct lan78xx_net; 352 353 struct lan78xx_priv { 354 struct lan78xx_net *dev; 355 u32 rfe_ctl; 356 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicast hash table */ 357 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */ 358 u32 vlan_table[DP_SEL_VHF_VLAN_LEN]; 359 struct mutex dataport_mutex; /* for dataport access */ 360 spinlock_t rfe_ctl_lock; /* for rfe register access */ 361 struct work_struct set_multicast; 362 struct work_struct set_vlan; 363 u32 wol; 364 }; 365 366 enum skb_state { 367 illegal = 0, 368 tx_start, 369 tx_done, 370 rx_start, 371 rx_done, 372 rx_cleanup, 373 unlink_start 374 }; 375 376 struct skb_data { /* skb->cb is one of these */ 377 struct urb *urb; 378 struct lan78xx_net *dev; 379 enum skb_state state; 380 size_t length; 381 int num_of_packet; 382 }; 383 384 #define EVENT_TX_HALT 0 385 #define EVENT_RX_HALT 1 386 #define EVENT_RX_MEMORY 2 387 #define EVENT_STS_SPLIT 3 388 #define EVENT_PHY_INT_ACK 4 389 #define EVENT_RX_PAUSED 5 390 #define EVENT_DEV_WAKING 6 391 #define EVENT_DEV_ASLEEP 7 392 #define EVENT_DEV_OPEN 8 393 #define EVENT_STAT_UPDATE 9 394 #define EVENT_DEV_DISCONNECT 10 395 396 struct statstage { 397 struct mutex access_lock; /* for stats access */ 398 struct lan78xx_statstage saved; 399 struct lan78xx_statstage rollover_count; 400 struct lan78xx_statstage rollover_max; 401 struct lan78xx_statstage64 curr_stat; 402 }; 403 404 struct irq_domain_data { 405 struct irq_domain *irqdomain; 406 unsigned int phyirq; 407 struct irq_chip *irqchip; 408 irq_flow_handler_t irq_handler; 409 u32 irqenable; 410 struct mutex irq_lock; /* for irq bus access */ 411 }; 412 413 struct lan78xx_net { 414 struct net_device *net; 415 struct usb_device *udev; 416 struct usb_interface *intf; 417 418 unsigned int tx_pend_data_len; 419 size_t n_tx_urbs; 420 size_t n_rx_urbs; 421 size_t tx_urb_size; 422 size_t rx_urb_size; 423 424 struct sk_buff_head rxq_free; 425 struct sk_buff_head rxq; 426 struct sk_buff_head rxq_done; 427 struct sk_buff_head rxq_overflow; 428 struct sk_buff_head txq_free; 429 struct sk_buff_head txq; 430 struct sk_buff_head txq_pend; 431 432 struct napi_struct napi; 433 434 struct delayed_work wq; 435 436 int msg_enable; 437 438 struct urb *urb_intr; 439 struct usb_anchor deferred; 440 441 struct mutex dev_mutex; /* serialise open/stop wrt suspend/resume */ 442 struct mutex mdiobus_mutex; /* for MDIO bus access */ 443 unsigned int pipe_in, pipe_out, pipe_intr; 444 445 unsigned int bulk_in_delay; 446 unsigned int burst_cap; 447 448 unsigned long flags; 449 450 wait_queue_head_t *wait; 451 452 unsigned int maxpacket; 453 struct timer_list stat_monitor; 454 455 unsigned long data[5]; 456 457 u32 chipid; 458 u32 chiprev; 459 struct mii_bus *mdiobus; 460 phy_interface_t interface; 461 462 int delta; 463 struct statstage stats; 464 465 struct irq_domain_data domain_data; 466 467 struct phylink *phylink; 468 struct phylink_config phylink_config; 469 }; 470 471 /* use ethtool to change the level for any given device */ 472 static int msg_level = -1; 473 module_param(msg_level, int, 0); 474 MODULE_PARM_DESC(msg_level, "Override default message level"); 475 476 static struct sk_buff *lan78xx_get_buf(struct sk_buff_head *buf_pool) 477 { 478 if (skb_queue_empty(buf_pool)) 479 return NULL; 480 481 return skb_dequeue(buf_pool); 482 } 483 484 static void lan78xx_release_buf(struct sk_buff_head *buf_pool, 485 struct sk_buff *buf) 486 { 487 buf->data = buf->head; 488 skb_reset_tail_pointer(buf); 489 490 buf->len = 0; 491 buf->data_len = 0; 492 493 skb_queue_tail(buf_pool, buf); 494 } 495 496 static void lan78xx_free_buf_pool(struct sk_buff_head *buf_pool) 497 { 498 struct skb_data *entry; 499 struct sk_buff *buf; 500 501 while (!skb_queue_empty(buf_pool)) { 502 buf = skb_dequeue(buf_pool); 503 if (buf) { 504 entry = (struct skb_data *)buf->cb; 505 usb_free_urb(entry->urb); 506 dev_kfree_skb_any(buf); 507 } 508 } 509 } 510 511 static int lan78xx_alloc_buf_pool(struct sk_buff_head *buf_pool, 512 size_t n_urbs, size_t urb_size, 513 struct lan78xx_net *dev) 514 { 515 struct skb_data *entry; 516 struct sk_buff *buf; 517 struct urb *urb; 518 int i; 519 520 skb_queue_head_init(buf_pool); 521 522 for (i = 0; i < n_urbs; i++) { 523 buf = alloc_skb(urb_size, GFP_ATOMIC); 524 if (!buf) 525 goto error; 526 527 if (skb_linearize(buf) != 0) { 528 dev_kfree_skb_any(buf); 529 goto error; 530 } 531 532 urb = usb_alloc_urb(0, GFP_ATOMIC); 533 if (!urb) { 534 dev_kfree_skb_any(buf); 535 goto error; 536 } 537 538 entry = (struct skb_data *)buf->cb; 539 entry->urb = urb; 540 entry->dev = dev; 541 entry->length = 0; 542 entry->num_of_packet = 0; 543 544 skb_queue_tail(buf_pool, buf); 545 } 546 547 return 0; 548 549 error: 550 lan78xx_free_buf_pool(buf_pool); 551 552 return -ENOMEM; 553 } 554 555 static struct sk_buff *lan78xx_get_rx_buf(struct lan78xx_net *dev) 556 { 557 return lan78xx_get_buf(&dev->rxq_free); 558 } 559 560 static void lan78xx_release_rx_buf(struct lan78xx_net *dev, 561 struct sk_buff *rx_buf) 562 { 563 lan78xx_release_buf(&dev->rxq_free, rx_buf); 564 } 565 566 static void lan78xx_free_rx_resources(struct lan78xx_net *dev) 567 { 568 lan78xx_free_buf_pool(&dev->rxq_free); 569 } 570 571 static int lan78xx_alloc_rx_resources(struct lan78xx_net *dev) 572 { 573 return lan78xx_alloc_buf_pool(&dev->rxq_free, 574 dev->n_rx_urbs, dev->rx_urb_size, dev); 575 } 576 577 static struct sk_buff *lan78xx_get_tx_buf(struct lan78xx_net *dev) 578 { 579 return lan78xx_get_buf(&dev->txq_free); 580 } 581 582 static void lan78xx_release_tx_buf(struct lan78xx_net *dev, 583 struct sk_buff *tx_buf) 584 { 585 lan78xx_release_buf(&dev->txq_free, tx_buf); 586 } 587 588 static void lan78xx_free_tx_resources(struct lan78xx_net *dev) 589 { 590 lan78xx_free_buf_pool(&dev->txq_free); 591 } 592 593 static int lan78xx_alloc_tx_resources(struct lan78xx_net *dev) 594 { 595 return lan78xx_alloc_buf_pool(&dev->txq_free, 596 dev->n_tx_urbs, dev->tx_urb_size, dev); 597 } 598 599 static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data) 600 { 601 u32 *buf; 602 int ret; 603 604 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 605 return -ENODEV; 606 607 buf = kmalloc(sizeof(u32), GFP_KERNEL); 608 if (!buf) 609 return -ENOMEM; 610 611 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 612 USB_VENDOR_REQUEST_READ_REGISTER, 613 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 614 0, index, buf, 4, USB_CTRL_GET_TIMEOUT); 615 if (likely(ret >= 0)) { 616 le32_to_cpus(buf); 617 *data = *buf; 618 } else if (net_ratelimit()) { 619 netdev_warn(dev->net, 620 "Failed to read register index 0x%08x. ret = %pe", 621 index, ERR_PTR(ret)); 622 } 623 624 kfree(buf); 625 626 return ret < 0 ? ret : 0; 627 } 628 629 static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data) 630 { 631 u32 *buf; 632 int ret; 633 634 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 635 return -ENODEV; 636 637 buf = kmalloc(sizeof(u32), GFP_KERNEL); 638 if (!buf) 639 return -ENOMEM; 640 641 *buf = data; 642 cpu_to_le32s(buf); 643 644 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 645 USB_VENDOR_REQUEST_WRITE_REGISTER, 646 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 647 0, index, buf, 4, USB_CTRL_SET_TIMEOUT); 648 if (unlikely(ret < 0) && 649 net_ratelimit()) { 650 netdev_warn(dev->net, 651 "Failed to write register index 0x%08x. ret = %pe", 652 index, ERR_PTR(ret)); 653 } 654 655 kfree(buf); 656 657 return ret < 0 ? ret : 0; 658 } 659 660 static int lan78xx_update_reg(struct lan78xx_net *dev, u32 reg, u32 mask, 661 u32 data) 662 { 663 int ret; 664 u32 buf; 665 666 ret = lan78xx_read_reg(dev, reg, &buf); 667 if (ret < 0) 668 return ret; 669 670 buf &= ~mask; 671 buf |= (mask & data); 672 673 return lan78xx_write_reg(dev, reg, buf); 674 } 675 676 static int lan78xx_read_stats(struct lan78xx_net *dev, 677 struct lan78xx_statstage *data) 678 { 679 int ret = 0; 680 int i; 681 struct lan78xx_statstage *stats; 682 u32 *src; 683 u32 *dst; 684 685 stats = kmalloc_obj(*stats); 686 if (!stats) 687 return -ENOMEM; 688 689 ret = usb_control_msg(dev->udev, 690 usb_rcvctrlpipe(dev->udev, 0), 691 USB_VENDOR_REQUEST_GET_STATS, 692 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 693 0, 694 0, 695 (void *)stats, 696 sizeof(*stats), 697 USB_CTRL_SET_TIMEOUT); 698 if (likely(ret >= 0)) { 699 src = (u32 *)stats; 700 dst = (u32 *)data; 701 for (i = 0; i < sizeof(*stats) / sizeof(u32); i++) { 702 le32_to_cpus(&src[i]); 703 dst[i] = src[i]; 704 } 705 } else { 706 netdev_warn(dev->net, 707 "Failed to read stat ret = %d", ret); 708 } 709 710 kfree(stats); 711 712 return ret; 713 } 714 715 #define check_counter_rollover(struct1, dev_stats, member) \ 716 do { \ 717 if ((struct1)->member < (dev_stats).saved.member) \ 718 (dev_stats).rollover_count.member++; \ 719 } while (0) 720 721 static void lan78xx_check_stat_rollover(struct lan78xx_net *dev, 722 struct lan78xx_statstage *stats) 723 { 724 check_counter_rollover(stats, dev->stats, rx_fcs_errors); 725 check_counter_rollover(stats, dev->stats, rx_alignment_errors); 726 check_counter_rollover(stats, dev->stats, rx_fragment_errors); 727 check_counter_rollover(stats, dev->stats, rx_jabber_errors); 728 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors); 729 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors); 730 check_counter_rollover(stats, dev->stats, rx_dropped_frames); 731 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count); 732 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count); 733 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count); 734 check_counter_rollover(stats, dev->stats, rx_unicast_frames); 735 check_counter_rollover(stats, dev->stats, rx_broadcast_frames); 736 check_counter_rollover(stats, dev->stats, rx_multicast_frames); 737 check_counter_rollover(stats, dev->stats, rx_pause_frames); 738 check_counter_rollover(stats, dev->stats, rx_64_byte_frames); 739 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames); 740 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames); 741 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames); 742 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames); 743 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames); 744 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames); 745 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions); 746 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time); 747 check_counter_rollover(stats, dev->stats, tx_fcs_errors); 748 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors); 749 check_counter_rollover(stats, dev->stats, tx_carrier_errors); 750 check_counter_rollover(stats, dev->stats, tx_bad_byte_count); 751 check_counter_rollover(stats, dev->stats, tx_single_collisions); 752 check_counter_rollover(stats, dev->stats, tx_multiple_collisions); 753 check_counter_rollover(stats, dev->stats, tx_excessive_collision); 754 check_counter_rollover(stats, dev->stats, tx_late_collisions); 755 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count); 756 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count); 757 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count); 758 check_counter_rollover(stats, dev->stats, tx_unicast_frames); 759 check_counter_rollover(stats, dev->stats, tx_broadcast_frames); 760 check_counter_rollover(stats, dev->stats, tx_multicast_frames); 761 check_counter_rollover(stats, dev->stats, tx_pause_frames); 762 check_counter_rollover(stats, dev->stats, tx_64_byte_frames); 763 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames); 764 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames); 765 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames); 766 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames); 767 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames); 768 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames); 769 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions); 770 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time); 771 772 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage)); 773 } 774 775 static void lan78xx_update_stats(struct lan78xx_net *dev) 776 { 777 u32 *p, *count, *max; 778 u64 *data; 779 int i; 780 struct lan78xx_statstage lan78xx_stats; 781 782 if (usb_autopm_get_interface(dev->intf) < 0) 783 return; 784 785 p = (u32 *)&lan78xx_stats; 786 count = (u32 *)&dev->stats.rollover_count; 787 max = (u32 *)&dev->stats.rollover_max; 788 data = (u64 *)&dev->stats.curr_stat; 789 790 mutex_lock(&dev->stats.access_lock); 791 792 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0) 793 lan78xx_check_stat_rollover(dev, &lan78xx_stats); 794 795 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++) 796 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1)); 797 798 mutex_unlock(&dev->stats.access_lock); 799 800 usb_autopm_put_interface(dev->intf); 801 } 802 803 static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable) 804 { 805 return lan78xx_update_reg(dev, reg, hw_enable, hw_enable); 806 } 807 808 static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled, 809 u32 hw_disabled) 810 { 811 unsigned long timeout; 812 bool stopped = true; 813 int ret; 814 u32 buf; 815 816 /* Stop the h/w block (if not already stopped) */ 817 818 ret = lan78xx_read_reg(dev, reg, &buf); 819 if (ret < 0) 820 return ret; 821 822 if (buf & hw_enabled) { 823 buf &= ~hw_enabled; 824 825 ret = lan78xx_write_reg(dev, reg, buf); 826 if (ret < 0) 827 return ret; 828 829 stopped = false; 830 timeout = jiffies + HW_DISABLE_TIMEOUT; 831 do { 832 ret = lan78xx_read_reg(dev, reg, &buf); 833 if (ret < 0) 834 return ret; 835 836 if (buf & hw_disabled) 837 stopped = true; 838 else 839 msleep(HW_DISABLE_DELAY_MS); 840 } while (!stopped && !time_after(jiffies, timeout)); 841 } 842 843 return stopped ? 0 : -ETIMEDOUT; 844 } 845 846 static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush) 847 { 848 return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush); 849 } 850 851 static int lan78xx_start_tx_path(struct lan78xx_net *dev) 852 { 853 int ret; 854 855 netif_dbg(dev, drv, dev->net, "start tx path"); 856 857 /* Start the MAC transmitter */ 858 859 ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_); 860 if (ret < 0) 861 return ret; 862 863 /* Start the Tx FIFO */ 864 865 ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_); 866 if (ret < 0) 867 return ret; 868 869 return 0; 870 } 871 872 static int lan78xx_stop_tx_path(struct lan78xx_net *dev) 873 { 874 int ret; 875 876 netif_dbg(dev, drv, dev->net, "stop tx path"); 877 878 /* Stop the Tx FIFO */ 879 880 ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_); 881 if (ret < 0) 882 return ret; 883 884 /* Stop the MAC transmitter */ 885 886 ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_); 887 if (ret < 0) 888 return ret; 889 890 return 0; 891 } 892 893 /* The caller must ensure the Tx path is stopped before calling 894 * lan78xx_flush_tx_fifo(). 895 */ 896 static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev) 897 { 898 return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_); 899 } 900 901 static int lan78xx_start_rx_path(struct lan78xx_net *dev) 902 { 903 int ret; 904 905 netif_dbg(dev, drv, dev->net, "start rx path"); 906 907 /* Start the Rx FIFO */ 908 909 ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_); 910 if (ret < 0) 911 return ret; 912 913 /* Start the MAC receiver*/ 914 915 ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_); 916 if (ret < 0) 917 return ret; 918 919 return 0; 920 } 921 922 static int lan78xx_stop_rx_path(struct lan78xx_net *dev) 923 { 924 int ret; 925 926 netif_dbg(dev, drv, dev->net, "stop rx path"); 927 928 /* Stop the MAC receiver */ 929 930 ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_); 931 if (ret < 0) 932 return ret; 933 934 /* Stop the Rx FIFO */ 935 936 ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_); 937 if (ret < 0) 938 return ret; 939 940 return 0; 941 } 942 943 /* The caller must ensure the Rx path is stopped before calling 944 * lan78xx_flush_rx_fifo(). 945 */ 946 static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev) 947 { 948 return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_); 949 } 950 951 /* Loop until the read is completed with timeout called with mdiobus_mutex held */ 952 static int lan78xx_mdiobus_wait_not_busy(struct lan78xx_net *dev) 953 { 954 unsigned long start_time = jiffies; 955 u32 val; 956 int ret; 957 958 do { 959 ret = lan78xx_read_reg(dev, MII_ACC, &val); 960 if (ret < 0) 961 return ret; 962 963 if (!(val & MII_ACC_MII_BUSY_)) 964 return 0; 965 } while (!time_after(jiffies, start_time + HZ)); 966 967 return -ETIMEDOUT; 968 } 969 970 static inline u32 mii_access(int id, int index, int read) 971 { 972 u32 ret; 973 974 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_; 975 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_; 976 if (read) 977 ret |= MII_ACC_MII_READ_; 978 else 979 ret |= MII_ACC_MII_WRITE_; 980 ret |= MII_ACC_MII_BUSY_; 981 982 return ret; 983 } 984 985 static int lan78xx_wait_eeprom(struct lan78xx_net *dev) 986 { 987 unsigned long start_time = jiffies; 988 u32 val; 989 int ret; 990 991 do { 992 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 993 if (ret < 0) 994 return ret; 995 996 if (!(val & E2P_CMD_EPC_BUSY_) || 997 (val & E2P_CMD_EPC_TIMEOUT_)) 998 break; 999 usleep_range(40, 100); 1000 } while (!time_after(jiffies, start_time + HZ)); 1001 1002 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) { 1003 netdev_warn(dev->net, "EEPROM read operation timeout"); 1004 return -ETIMEDOUT; 1005 } 1006 1007 return 0; 1008 } 1009 1010 static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev) 1011 { 1012 unsigned long start_time = jiffies; 1013 u32 val; 1014 int ret; 1015 1016 do { 1017 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 1018 if (ret < 0) 1019 return ret; 1020 1021 if (!(val & E2P_CMD_EPC_BUSY_)) 1022 return 0; 1023 1024 usleep_range(40, 100); 1025 } while (!time_after(jiffies, start_time + HZ)); 1026 1027 netdev_warn(dev->net, "EEPROM is busy"); 1028 return -ETIMEDOUT; 1029 } 1030 1031 static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset, 1032 u32 length, u8 *data) 1033 { 1034 u32 val, saved; 1035 int i, ret; 1036 1037 /* depends on chip, some EEPROM pins are muxed with LED function. 1038 * disable & restore LED function to access EEPROM. 1039 */ 1040 ret = lan78xx_read_reg(dev, HW_CFG, &val); 1041 if (ret < 0) 1042 return ret; 1043 1044 saved = val; 1045 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1046 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1047 ret = lan78xx_write_reg(dev, HW_CFG, val); 1048 if (ret < 0) 1049 return ret; 1050 } 1051 1052 ret = lan78xx_eeprom_confirm_not_busy(dev); 1053 if (ret == -ETIMEDOUT) 1054 goto read_raw_eeprom_done; 1055 /* If USB fails, there is nothing to do */ 1056 if (ret < 0) 1057 return ret; 1058 1059 for (i = 0; i < length; i++) { 1060 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_; 1061 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1062 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1063 if (ret < 0) 1064 return ret; 1065 1066 ret = lan78xx_wait_eeprom(dev); 1067 /* Looks like not USB specific error, try to recover */ 1068 if (ret == -ETIMEDOUT) 1069 goto read_raw_eeprom_done; 1070 /* If USB fails, there is nothing to do */ 1071 if (ret < 0) 1072 return ret; 1073 1074 ret = lan78xx_read_reg(dev, E2P_DATA, &val); 1075 if (ret < 0) 1076 return ret; 1077 1078 data[i] = val & 0xFF; 1079 offset++; 1080 } 1081 1082 read_raw_eeprom_done: 1083 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1084 int rc = lan78xx_write_reg(dev, HW_CFG, saved); 1085 /* If USB fails, there is nothing to do */ 1086 if (rc < 0) 1087 return rc; 1088 } 1089 return ret; 1090 } 1091 1092 static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset, 1093 u32 length, u8 *data) 1094 { 1095 int ret; 1096 u8 sig; 1097 1098 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig); 1099 if (ret < 0) 1100 return ret; 1101 1102 if (sig != EEPROM_INDICATOR) 1103 return -ENODATA; 1104 1105 return lan78xx_read_raw_eeprom(dev, offset, length, data); 1106 } 1107 1108 static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset, 1109 u32 length, u8 *data) 1110 { 1111 u32 val; 1112 u32 saved; 1113 int i, ret; 1114 1115 /* depends on chip, some EEPROM pins are muxed with LED function. 1116 * disable & restore LED function to access EEPROM. 1117 */ 1118 ret = lan78xx_read_reg(dev, HW_CFG, &val); 1119 if (ret < 0) 1120 return ret; 1121 1122 saved = val; 1123 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1124 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1125 ret = lan78xx_write_reg(dev, HW_CFG, val); 1126 if (ret < 0) 1127 return ret; 1128 } 1129 1130 ret = lan78xx_eeprom_confirm_not_busy(dev); 1131 /* Looks like not USB specific error, try to recover */ 1132 if (ret == -ETIMEDOUT) 1133 goto write_raw_eeprom_done; 1134 /* If USB fails, there is nothing to do */ 1135 if (ret < 0) 1136 return ret; 1137 1138 /* Issue write/erase enable command */ 1139 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_; 1140 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1141 if (ret < 0) 1142 return ret; 1143 1144 ret = lan78xx_wait_eeprom(dev); 1145 /* Looks like not USB specific error, try to recover */ 1146 if (ret == -ETIMEDOUT) 1147 goto write_raw_eeprom_done; 1148 /* If USB fails, there is nothing to do */ 1149 if (ret < 0) 1150 return ret; 1151 1152 for (i = 0; i < length; i++) { 1153 /* Fill data register */ 1154 val = data[i]; 1155 ret = lan78xx_write_reg(dev, E2P_DATA, val); 1156 if (ret < 0) 1157 return ret; 1158 1159 /* Send "write" command */ 1160 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_; 1161 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1162 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1163 if (ret < 0) 1164 return ret; 1165 1166 ret = lan78xx_wait_eeprom(dev); 1167 /* Looks like not USB specific error, try to recover */ 1168 if (ret == -ETIMEDOUT) 1169 goto write_raw_eeprom_done; 1170 /* If USB fails, there is nothing to do */ 1171 if (ret < 0) 1172 return ret; 1173 1174 offset++; 1175 } 1176 1177 write_raw_eeprom_done: 1178 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1179 int rc = lan78xx_write_reg(dev, HW_CFG, saved); 1180 /* If USB fails, there is nothing to do */ 1181 if (rc < 0) 1182 return rc; 1183 } 1184 return ret; 1185 } 1186 1187 static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset, 1188 u32 length, u8 *data) 1189 { 1190 unsigned long timeout; 1191 int ret, i; 1192 u32 buf; 1193 1194 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1195 if (ret < 0) 1196 return ret; 1197 1198 if (buf & OTP_PWR_DN_PWRDN_N_) { 1199 /* clear it and wait to be cleared */ 1200 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1201 if (ret < 0) 1202 return ret; 1203 1204 timeout = jiffies + HZ; 1205 do { 1206 usleep_range(1, 10); 1207 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1208 if (ret < 0) 1209 return ret; 1210 1211 if (time_after(jiffies, timeout)) { 1212 netdev_warn(dev->net, 1213 "timeout on OTP_PWR_DN"); 1214 return -ETIMEDOUT; 1215 } 1216 } while (buf & OTP_PWR_DN_PWRDN_N_); 1217 } 1218 1219 for (i = 0; i < length; i++) { 1220 ret = lan78xx_write_reg(dev, OTP_ADDR1, 1221 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1222 if (ret < 0) 1223 return ret; 1224 1225 ret = lan78xx_write_reg(dev, OTP_ADDR2, 1226 ((offset + i) & OTP_ADDR2_10_3)); 1227 if (ret < 0) 1228 return ret; 1229 1230 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 1231 if (ret < 0) 1232 return ret; 1233 1234 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1235 if (ret < 0) 1236 return ret; 1237 1238 timeout = jiffies + HZ; 1239 do { 1240 udelay(1); 1241 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1242 if (ret < 0) 1243 return ret; 1244 1245 if (time_after(jiffies, timeout)) { 1246 netdev_warn(dev->net, 1247 "timeout on OTP_STATUS"); 1248 return -ETIMEDOUT; 1249 } 1250 } while (buf & OTP_STATUS_BUSY_); 1251 1252 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf); 1253 if (ret < 0) 1254 return ret; 1255 1256 data[i] = (u8)(buf & 0xFF); 1257 } 1258 1259 return 0; 1260 } 1261 1262 static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset, 1263 u32 length, u8 *data) 1264 { 1265 int i; 1266 u32 buf; 1267 unsigned long timeout; 1268 int ret; 1269 1270 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1271 if (ret < 0) 1272 return ret; 1273 1274 if (buf & OTP_PWR_DN_PWRDN_N_) { 1275 /* clear it and wait to be cleared */ 1276 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1277 if (ret < 0) 1278 return ret; 1279 1280 timeout = jiffies + HZ; 1281 do { 1282 udelay(1); 1283 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1284 if (ret < 0) 1285 return ret; 1286 1287 if (time_after(jiffies, timeout)) { 1288 netdev_warn(dev->net, 1289 "timeout on OTP_PWR_DN completion"); 1290 return -ETIMEDOUT; 1291 } 1292 } while (buf & OTP_PWR_DN_PWRDN_N_); 1293 } 1294 1295 /* set to BYTE program mode */ 1296 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_); 1297 if (ret < 0) 1298 return ret; 1299 1300 for (i = 0; i < length; i++) { 1301 ret = lan78xx_write_reg(dev, OTP_ADDR1, 1302 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1303 if (ret < 0) 1304 return ret; 1305 1306 ret = lan78xx_write_reg(dev, OTP_ADDR2, 1307 ((offset + i) & OTP_ADDR2_10_3)); 1308 if (ret < 0) 1309 return ret; 1310 1311 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]); 1312 if (ret < 0) 1313 return ret; 1314 1315 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_); 1316 if (ret < 0) 1317 return ret; 1318 1319 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1320 if (ret < 0) 1321 return ret; 1322 1323 timeout = jiffies + HZ; 1324 do { 1325 udelay(1); 1326 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1327 if (ret < 0) 1328 return ret; 1329 1330 if (time_after(jiffies, timeout)) { 1331 netdev_warn(dev->net, 1332 "Timeout on OTP_STATUS completion"); 1333 return -ETIMEDOUT; 1334 } 1335 } while (buf & OTP_STATUS_BUSY_); 1336 } 1337 1338 return 0; 1339 } 1340 1341 static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset, 1342 u32 length, u8 *data) 1343 { 1344 u8 sig; 1345 int ret; 1346 1347 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig); 1348 1349 if (ret == 0) { 1350 if (sig == OTP_INDICATOR_2) 1351 offset += 0x100; 1352 else if (sig != OTP_INDICATOR_1) 1353 ret = -EINVAL; 1354 if (!ret) 1355 ret = lan78xx_read_raw_otp(dev, offset, length, data); 1356 } 1357 1358 return ret; 1359 } 1360 1361 static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev) 1362 { 1363 int i, ret; 1364 1365 for (i = 0; i < 100; i++) { 1366 u32 dp_sel; 1367 1368 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel); 1369 if (unlikely(ret < 0)) 1370 return ret; 1371 1372 if (dp_sel & DP_SEL_DPRDY_) 1373 return 0; 1374 1375 usleep_range(40, 100); 1376 } 1377 1378 netdev_warn(dev->net, "%s timed out", __func__); 1379 1380 return -ETIMEDOUT; 1381 } 1382 1383 static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select, 1384 u32 addr, u32 length, u32 *buf) 1385 { 1386 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1387 int i, ret; 1388 1389 ret = usb_autopm_get_interface(dev->intf); 1390 if (ret < 0) 1391 return ret; 1392 1393 mutex_lock(&pdata->dataport_mutex); 1394 1395 ret = lan78xx_dataport_wait_not_busy(dev); 1396 if (ret < 0) 1397 goto dataport_write; 1398 1399 ret = lan78xx_update_reg(dev, DP_SEL, DP_SEL_RSEL_MASK_, ram_select); 1400 if (ret < 0) 1401 goto dataport_write; 1402 1403 for (i = 0; i < length; i++) { 1404 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i); 1405 if (ret < 0) 1406 goto dataport_write; 1407 1408 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]); 1409 if (ret < 0) 1410 goto dataport_write; 1411 1412 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_); 1413 if (ret < 0) 1414 goto dataport_write; 1415 1416 ret = lan78xx_dataport_wait_not_busy(dev); 1417 if (ret < 0) 1418 goto dataport_write; 1419 } 1420 1421 dataport_write: 1422 if (ret < 0) 1423 netdev_warn(dev->net, "dataport write failed %pe", ERR_PTR(ret)); 1424 1425 mutex_unlock(&pdata->dataport_mutex); 1426 usb_autopm_put_interface(dev->intf); 1427 1428 return ret; 1429 } 1430 1431 static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata, 1432 int index, u8 addr[ETH_ALEN]) 1433 { 1434 u32 temp; 1435 1436 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) { 1437 temp = addr[3]; 1438 temp = addr[2] | (temp << 8); 1439 temp = addr[1] | (temp << 8); 1440 temp = addr[0] | (temp << 8); 1441 pdata->pfilter_table[index][1] = temp; 1442 temp = addr[5]; 1443 temp = addr[4] | (temp << 8); 1444 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_; 1445 pdata->pfilter_table[index][0] = temp; 1446 } 1447 } 1448 1449 /* returns hash bit number for given MAC address */ 1450 static inline u32 lan78xx_hash(char addr[ETH_ALEN]) 1451 { 1452 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 1453 } 1454 1455 static int lan78xx_write_mchash_table(struct lan78xx_net *dev) 1456 { 1457 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1458 1459 return lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 1460 DP_SEL_VHF_VLAN_LEN, 1461 DP_SEL_VHF_HASH_LEN, pdata->mchash_table); 1462 } 1463 1464 static void lan78xx_deferred_multicast_write(struct work_struct *param) 1465 { 1466 struct lan78xx_priv *pdata = 1467 container_of(param, struct lan78xx_priv, set_multicast); 1468 struct lan78xx_net *dev = pdata->dev; 1469 int i, ret; 1470 1471 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", 1472 pdata->rfe_ctl); 1473 1474 ret = lan78xx_write_mchash_table(dev); 1475 if (ret < 0) 1476 goto multicast_write_done; 1477 1478 for (i = 1; i < NUM_OF_MAF; i++) { 1479 ret = lan78xx_write_reg(dev, MAF_HI(i), 0); 1480 if (ret < 0) 1481 goto multicast_write_done; 1482 1483 ret = lan78xx_write_reg(dev, MAF_LO(i), 1484 pdata->pfilter_table[i][1]); 1485 if (ret < 0) 1486 goto multicast_write_done; 1487 1488 ret = lan78xx_write_reg(dev, MAF_HI(i), 1489 pdata->pfilter_table[i][0]); 1490 if (ret < 0) 1491 goto multicast_write_done; 1492 } 1493 1494 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 1495 1496 multicast_write_done: 1497 if (ret < 0) 1498 netdev_warn(dev->net, "multicast write failed %pe", ERR_PTR(ret)); 1499 return; 1500 } 1501 1502 static void lan78xx_set_multicast(struct net_device *netdev) 1503 { 1504 struct lan78xx_net *dev = netdev_priv(netdev); 1505 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1506 unsigned long flags; 1507 int i; 1508 1509 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 1510 1511 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ | 1512 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1513 1514 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 1515 pdata->mchash_table[i] = 0; 1516 1517 /* pfilter_table[0] has own HW address */ 1518 for (i = 1; i < NUM_OF_MAF; i++) { 1519 pdata->pfilter_table[i][0] = 0; 1520 pdata->pfilter_table[i][1] = 0; 1521 } 1522 1523 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_; 1524 1525 if (dev->net->flags & IFF_PROMISC) { 1526 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); 1527 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_; 1528 } else { 1529 if (dev->net->flags & IFF_ALLMULTI) { 1530 netif_dbg(dev, drv, dev->net, 1531 "receive all multicast enabled"); 1532 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_; 1533 } 1534 } 1535 1536 if (netdev_mc_count(dev->net)) { 1537 struct netdev_hw_addr *ha; 1538 int i; 1539 1540 netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); 1541 1542 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_; 1543 1544 i = 1; 1545 netdev_for_each_mc_addr(ha, netdev) { 1546 /* set first 32 into Perfect Filter */ 1547 if (i < 33) { 1548 lan78xx_set_addr_filter(pdata, i, ha->addr); 1549 } else { 1550 u32 bitnum = lan78xx_hash(ha->addr); 1551 1552 pdata->mchash_table[bitnum / 32] |= 1553 (1 << (bitnum % 32)); 1554 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_; 1555 } 1556 i++; 1557 } 1558 } 1559 1560 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 1561 1562 /* defer register writes to a sleepable context */ 1563 schedule_work(&pdata->set_multicast); 1564 } 1565 1566 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev); 1567 static int lan78xx_write_vlan_table(struct lan78xx_net *dev); 1568 1569 static int lan78xx_mac_reset(struct lan78xx_net *dev) 1570 { 1571 unsigned long start_time = jiffies; 1572 u32 val; 1573 int ret; 1574 1575 mutex_lock(&dev->mdiobus_mutex); 1576 1577 /* Resetting the device while there is activity on the MDIO 1578 * bus can result in the MAC interface locking up and not 1579 * completing register access transactions. 1580 */ 1581 ret = lan78xx_mdiobus_wait_not_busy(dev); 1582 if (ret < 0) 1583 goto exit_unlock; 1584 1585 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1586 if (ret < 0) 1587 goto exit_unlock; 1588 1589 val |= MAC_CR_RST_; 1590 ret = lan78xx_write_reg(dev, MAC_CR, val); 1591 if (ret < 0) 1592 goto exit_unlock; 1593 1594 /* Wait for the reset to complete before allowing any further 1595 * MAC register accesses otherwise the MAC may lock up. 1596 */ 1597 do { 1598 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1599 if (ret < 0) 1600 goto exit_unlock; 1601 1602 if (!(val & MAC_CR_RST_)) { 1603 ret = 0; 1604 goto exit_unlock; 1605 } 1606 } while (!time_after(jiffies, start_time + HZ)); 1607 1608 ret = -ETIMEDOUT; 1609 exit_unlock: 1610 mutex_unlock(&dev->mdiobus_mutex); 1611 1612 return ret; 1613 } 1614 1615 /** 1616 * lan78xx_phy_int_ack - Acknowledge PHY interrupt 1617 * @dev: pointer to the LAN78xx device structure 1618 * 1619 * This function acknowledges the PHY interrupt by setting the 1620 * INT_STS_PHY_INT_ bit in the interrupt status register (INT_STS). 1621 * 1622 * Return: 0 on success or a negative error code on failure. 1623 */ 1624 static int lan78xx_phy_int_ack(struct lan78xx_net *dev) 1625 { 1626 return lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_); 1627 } 1628 1629 /* some work can't be done in tasklets, so we use keventd 1630 * 1631 * NOTE: annoying asymmetry: if it's active, schedule_work() fails, 1632 * but tasklet_schedule() doesn't. hope the failure is rare. 1633 */ 1634 static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work) 1635 { 1636 set_bit(work, &dev->flags); 1637 if (!schedule_delayed_work(&dev->wq, 0)) 1638 netdev_err(dev->net, "kevent %d may have been dropped\n", work); 1639 } 1640 1641 static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb) 1642 { 1643 u32 intdata; 1644 1645 if (urb->actual_length != 4) { 1646 netdev_warn(dev->net, 1647 "unexpected urb length %d", urb->actual_length); 1648 return; 1649 } 1650 1651 intdata = get_unaligned_le32(urb->transfer_buffer); 1652 1653 if (intdata & INT_ENP_PHY_INT) { 1654 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata); 1655 lan78xx_defer_kevent(dev, EVENT_PHY_INT_ACK); 1656 1657 if (dev->domain_data.phyirq > 0) 1658 generic_handle_irq_safe(dev->domain_data.phyirq); 1659 } else { 1660 netdev_warn(dev->net, 1661 "unexpected interrupt: 0x%08x\n", intdata); 1662 } 1663 } 1664 1665 static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev) 1666 { 1667 return MAX_EEPROM_SIZE; 1668 } 1669 1670 static int lan78xx_ethtool_get_eeprom(struct net_device *netdev, 1671 struct ethtool_eeprom *ee, u8 *data) 1672 { 1673 struct lan78xx_net *dev = netdev_priv(netdev); 1674 int ret; 1675 1676 ret = usb_autopm_get_interface(dev->intf); 1677 if (ret) 1678 return ret; 1679 1680 ee->magic = LAN78XX_EEPROM_MAGIC; 1681 1682 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data); 1683 1684 usb_autopm_put_interface(dev->intf); 1685 1686 return ret; 1687 } 1688 1689 static int lan78xx_ethtool_set_eeprom(struct net_device *netdev, 1690 struct ethtool_eeprom *ee, u8 *data) 1691 { 1692 struct lan78xx_net *dev = netdev_priv(netdev); 1693 int ret; 1694 1695 ret = usb_autopm_get_interface(dev->intf); 1696 if (ret) 1697 return ret; 1698 1699 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure 1700 * to load data from EEPROM 1701 */ 1702 if (ee->magic == LAN78XX_EEPROM_MAGIC) 1703 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data); 1704 else if ((ee->magic == LAN78XX_OTP_MAGIC) && 1705 (ee->offset == 0) && 1706 (ee->len == 512) && 1707 (data[0] == OTP_INDICATOR_1)) 1708 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data); 1709 1710 usb_autopm_put_interface(dev->intf); 1711 1712 return ret; 1713 } 1714 1715 static void lan78xx_get_strings(struct net_device *netdev, u32 stringset, 1716 u8 *data) 1717 { 1718 if (stringset == ETH_SS_STATS) 1719 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings)); 1720 else if (stringset == ETH_SS_TEST) 1721 net_selftest_get_strings(data); 1722 } 1723 1724 static int lan78xx_get_sset_count(struct net_device *netdev, int sset) 1725 { 1726 if (sset == ETH_SS_STATS) 1727 return ARRAY_SIZE(lan78xx_gstrings); 1728 else if (sset == ETH_SS_TEST) 1729 return net_selftest_get_count(); 1730 else 1731 return -EOPNOTSUPP; 1732 } 1733 1734 static void lan78xx_get_stats(struct net_device *netdev, 1735 struct ethtool_stats *stats, u64 *data) 1736 { 1737 struct lan78xx_net *dev = netdev_priv(netdev); 1738 1739 lan78xx_update_stats(dev); 1740 1741 mutex_lock(&dev->stats.access_lock); 1742 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat)); 1743 mutex_unlock(&dev->stats.access_lock); 1744 } 1745 1746 static void lan78xx_get_wol(struct net_device *netdev, 1747 struct ethtool_wolinfo *wol) 1748 { 1749 struct lan78xx_net *dev = netdev_priv(netdev); 1750 int ret; 1751 u32 buf; 1752 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1753 1754 if (usb_autopm_get_interface(dev->intf) < 0) 1755 return; 1756 1757 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 1758 if (unlikely(ret < 0)) { 1759 netdev_warn(dev->net, "failed to get WoL %pe", ERR_PTR(ret)); 1760 wol->supported = 0; 1761 wol->wolopts = 0; 1762 } else { 1763 if (buf & USB_CFG_RMT_WKP_) { 1764 wol->supported = WAKE_ALL; 1765 wol->wolopts = pdata->wol; 1766 } else { 1767 wol->supported = 0; 1768 wol->wolopts = 0; 1769 } 1770 } 1771 1772 usb_autopm_put_interface(dev->intf); 1773 } 1774 1775 static int lan78xx_set_wol(struct net_device *netdev, 1776 struct ethtool_wolinfo *wol) 1777 { 1778 struct lan78xx_net *dev = netdev_priv(netdev); 1779 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1780 int ret; 1781 1782 if (wol->wolopts & ~WAKE_ALL) 1783 return -EINVAL; 1784 1785 ret = usb_autopm_get_interface(dev->intf); 1786 if (ret < 0) 1787 return ret; 1788 1789 pdata->wol = wol->wolopts; 1790 1791 ret = device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts); 1792 if (ret < 0) 1793 goto exit_pm_put; 1794 1795 ret = phy_ethtool_set_wol(netdev->phydev, wol); 1796 1797 exit_pm_put: 1798 usb_autopm_put_interface(dev->intf); 1799 1800 return ret; 1801 } 1802 1803 static int lan78xx_get_eee(struct net_device *net, struct ethtool_keee *edata) 1804 { 1805 struct lan78xx_net *dev = netdev_priv(net); 1806 1807 return phylink_ethtool_get_eee(dev->phylink, edata); 1808 } 1809 1810 static int lan78xx_set_eee(struct net_device *net, struct ethtool_keee *edata) 1811 { 1812 struct lan78xx_net *dev = netdev_priv(net); 1813 1814 return phylink_ethtool_set_eee(dev->phylink, edata); 1815 } 1816 1817 static void lan78xx_get_drvinfo(struct net_device *net, 1818 struct ethtool_drvinfo *info) 1819 { 1820 struct lan78xx_net *dev = netdev_priv(net); 1821 1822 strscpy(info->driver, DRIVER_NAME, sizeof(info->driver)); 1823 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info)); 1824 } 1825 1826 static u32 lan78xx_get_msglevel(struct net_device *net) 1827 { 1828 struct lan78xx_net *dev = netdev_priv(net); 1829 1830 return dev->msg_enable; 1831 } 1832 1833 static void lan78xx_set_msglevel(struct net_device *net, u32 level) 1834 { 1835 struct lan78xx_net *dev = netdev_priv(net); 1836 1837 dev->msg_enable = level; 1838 } 1839 1840 static int lan78xx_get_link_ksettings(struct net_device *net, 1841 struct ethtool_link_ksettings *cmd) 1842 { 1843 struct lan78xx_net *dev = netdev_priv(net); 1844 1845 return phylink_ethtool_ksettings_get(dev->phylink, cmd); 1846 } 1847 1848 static int lan78xx_set_link_ksettings(struct net_device *net, 1849 const struct ethtool_link_ksettings *cmd) 1850 { 1851 struct lan78xx_net *dev = netdev_priv(net); 1852 1853 return phylink_ethtool_ksettings_set(dev->phylink, cmd); 1854 } 1855 1856 static void lan78xx_get_pause(struct net_device *net, 1857 struct ethtool_pauseparam *pause) 1858 { 1859 struct lan78xx_net *dev = netdev_priv(net); 1860 1861 phylink_ethtool_get_pauseparam(dev->phylink, pause); 1862 } 1863 1864 static int lan78xx_set_pause(struct net_device *net, 1865 struct ethtool_pauseparam *pause) 1866 { 1867 struct lan78xx_net *dev = netdev_priv(net); 1868 1869 return phylink_ethtool_set_pauseparam(dev->phylink, pause); 1870 } 1871 1872 static int lan78xx_get_regs_len(struct net_device *netdev) 1873 { 1874 return sizeof(lan78xx_regs); 1875 } 1876 1877 static void 1878 lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1879 void *buf) 1880 { 1881 struct lan78xx_net *dev = netdev_priv(netdev); 1882 unsigned int data_count = 0; 1883 u32 *data = buf; 1884 int i, ret; 1885 1886 /* Read Device/MAC registers */ 1887 for (i = 0; i < ARRAY_SIZE(lan78xx_regs); i++) { 1888 ret = lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]); 1889 if (ret < 0) { 1890 netdev_warn(dev->net, 1891 "failed to read register 0x%08x\n", 1892 lan78xx_regs[i]); 1893 goto clean_data; 1894 } 1895 1896 data_count++; 1897 } 1898 1899 return; 1900 1901 clean_data: 1902 memset(data, 0, data_count * sizeof(u32)); 1903 } 1904 1905 static const struct ethtool_ops lan78xx_ethtool_ops = { 1906 .get_link = ethtool_op_get_link, 1907 .nway_reset = phy_ethtool_nway_reset, 1908 .get_drvinfo = lan78xx_get_drvinfo, 1909 .get_msglevel = lan78xx_get_msglevel, 1910 .set_msglevel = lan78xx_set_msglevel, 1911 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len, 1912 .get_eeprom = lan78xx_ethtool_get_eeprom, 1913 .set_eeprom = lan78xx_ethtool_set_eeprom, 1914 .get_ethtool_stats = lan78xx_get_stats, 1915 .get_sset_count = lan78xx_get_sset_count, 1916 .self_test = net_selftest, 1917 .get_strings = lan78xx_get_strings, 1918 .get_wol = lan78xx_get_wol, 1919 .set_wol = lan78xx_set_wol, 1920 .get_ts_info = ethtool_op_get_ts_info, 1921 .get_eee = lan78xx_get_eee, 1922 .set_eee = lan78xx_set_eee, 1923 .get_pauseparam = lan78xx_get_pause, 1924 .set_pauseparam = lan78xx_set_pause, 1925 .get_link_ksettings = lan78xx_get_link_ksettings, 1926 .set_link_ksettings = lan78xx_set_link_ksettings, 1927 .get_regs_len = lan78xx_get_regs_len, 1928 .get_regs = lan78xx_get_regs, 1929 }; 1930 1931 static int lan78xx_init_mac_address(struct lan78xx_net *dev) 1932 { 1933 u32 addr_lo, addr_hi; 1934 u8 addr[6]; 1935 int ret; 1936 1937 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo); 1938 if (ret < 0) 1939 return ret; 1940 1941 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi); 1942 if (ret < 0) 1943 return ret; 1944 1945 addr[0] = addr_lo & 0xFF; 1946 addr[1] = (addr_lo >> 8) & 0xFF; 1947 addr[2] = (addr_lo >> 16) & 0xFF; 1948 addr[3] = (addr_lo >> 24) & 0xFF; 1949 addr[4] = addr_hi & 0xFF; 1950 addr[5] = (addr_hi >> 8) & 0xFF; 1951 1952 if (!is_valid_ether_addr(addr)) { 1953 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) { 1954 /* valid address present in Device Tree */ 1955 netif_dbg(dev, ifup, dev->net, 1956 "MAC address read from Device Tree"); 1957 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, 1958 ETH_ALEN, addr) == 0) || 1959 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, 1960 ETH_ALEN, addr) == 0)) && 1961 is_valid_ether_addr(addr)) { 1962 /* eeprom values are valid so use them */ 1963 netif_dbg(dev, ifup, dev->net, 1964 "MAC address read from EEPROM"); 1965 } else { 1966 /* generate random MAC */ 1967 eth_random_addr(addr); 1968 netif_dbg(dev, ifup, dev->net, 1969 "MAC address set to random addr"); 1970 } 1971 1972 addr_lo = addr[0] | (addr[1] << 8) | 1973 (addr[2] << 16) | (addr[3] << 24); 1974 addr_hi = addr[4] | (addr[5] << 8); 1975 1976 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 1977 if (ret < 0) 1978 return ret; 1979 1980 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 1981 if (ret < 0) 1982 return ret; 1983 } 1984 1985 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 1986 if (ret < 0) 1987 return ret; 1988 1989 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 1990 if (ret < 0) 1991 return ret; 1992 1993 eth_hw_addr_set(dev->net, addr); 1994 1995 return 0; 1996 } 1997 1998 /* MDIO read and write wrappers for phylib */ 1999 static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx) 2000 { 2001 struct lan78xx_net *dev = bus->priv; 2002 u32 val, addr; 2003 int ret; 2004 2005 ret = usb_autopm_get_interface(dev->intf); 2006 if (ret < 0) 2007 return ret; 2008 2009 mutex_lock(&dev->mdiobus_mutex); 2010 2011 /* confirm MII not busy */ 2012 ret = lan78xx_mdiobus_wait_not_busy(dev); 2013 if (ret < 0) 2014 goto done; 2015 2016 /* set the address, index & direction (read from PHY) */ 2017 addr = mii_access(phy_id, idx, MII_READ); 2018 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2019 if (ret < 0) 2020 goto done; 2021 2022 ret = lan78xx_mdiobus_wait_not_busy(dev); 2023 if (ret < 0) 2024 goto done; 2025 2026 ret = lan78xx_read_reg(dev, MII_DATA, &val); 2027 if (ret < 0) 2028 goto done; 2029 2030 ret = (int)(val & 0xFFFF); 2031 2032 done: 2033 mutex_unlock(&dev->mdiobus_mutex); 2034 usb_autopm_put_interface(dev->intf); 2035 2036 return ret; 2037 } 2038 2039 static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx, 2040 u16 regval) 2041 { 2042 struct lan78xx_net *dev = bus->priv; 2043 u32 val, addr; 2044 int ret; 2045 2046 ret = usb_autopm_get_interface(dev->intf); 2047 if (ret < 0) 2048 return ret; 2049 2050 mutex_lock(&dev->mdiobus_mutex); 2051 2052 /* confirm MII not busy */ 2053 ret = lan78xx_mdiobus_wait_not_busy(dev); 2054 if (ret < 0) 2055 goto done; 2056 2057 val = (u32)regval; 2058 ret = lan78xx_write_reg(dev, MII_DATA, val); 2059 if (ret < 0) 2060 goto done; 2061 2062 /* set the address, index & direction (write to PHY) */ 2063 addr = mii_access(phy_id, idx, MII_WRITE); 2064 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2065 if (ret < 0) 2066 goto done; 2067 2068 ret = lan78xx_mdiobus_wait_not_busy(dev); 2069 if (ret < 0) 2070 goto done; 2071 2072 done: 2073 mutex_unlock(&dev->mdiobus_mutex); 2074 usb_autopm_put_interface(dev->intf); 2075 return ret; 2076 } 2077 2078 static int lan78xx_mdio_init(struct lan78xx_net *dev) 2079 { 2080 struct device_node *node; 2081 int ret; 2082 2083 dev->mdiobus = mdiobus_alloc(); 2084 if (!dev->mdiobus) { 2085 netdev_err(dev->net, "can't allocate MDIO bus\n"); 2086 return -ENOMEM; 2087 } 2088 2089 dev->mdiobus->priv = (void *)dev; 2090 dev->mdiobus->read = lan78xx_mdiobus_read; 2091 dev->mdiobus->write = lan78xx_mdiobus_write; 2092 dev->mdiobus->name = "lan78xx-mdiobus"; 2093 dev->mdiobus->parent = &dev->udev->dev; 2094 2095 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d", 2096 dev->udev->bus->busnum, dev->udev->devnum); 2097 2098 switch (dev->chipid) { 2099 case ID_REV_CHIP_ID_7800_: 2100 case ID_REV_CHIP_ID_7850_: 2101 /* set to internal PHY id */ 2102 dev->mdiobus->phy_mask = ~(1 << 1); 2103 break; 2104 case ID_REV_CHIP_ID_7801_: 2105 break; 2106 } 2107 2108 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio"); 2109 ret = of_mdiobus_register(dev->mdiobus, node); 2110 of_node_put(node); 2111 if (ret) { 2112 netdev_err(dev->net, "can't register MDIO bus\n"); 2113 goto exit1; 2114 } 2115 2116 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id); 2117 return 0; 2118 exit1: 2119 mdiobus_free(dev->mdiobus); 2120 return ret; 2121 } 2122 2123 static void lan78xx_remove_mdio(struct lan78xx_net *dev) 2124 { 2125 mdiobus_unregister(dev->mdiobus); 2126 mdiobus_free(dev->mdiobus); 2127 } 2128 2129 static int irq_map(struct irq_domain *d, unsigned int irq, 2130 irq_hw_number_t hwirq) 2131 { 2132 struct irq_domain_data *data = d->host_data; 2133 2134 irq_set_chip_data(irq, data); 2135 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler); 2136 irq_set_noprobe(irq); 2137 2138 return 0; 2139 } 2140 2141 static void irq_unmap(struct irq_domain *d, unsigned int irq) 2142 { 2143 irq_set_chip_and_handler(irq, NULL, NULL); 2144 irq_set_chip_data(irq, NULL); 2145 } 2146 2147 static const struct irq_domain_ops chip_domain_ops = { 2148 .map = irq_map, 2149 .unmap = irq_unmap, 2150 }; 2151 2152 static void lan78xx_irq_mask(struct irq_data *irqd) 2153 { 2154 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2155 2156 data->irqenable &= ~BIT(irqd_to_hwirq(irqd)); 2157 } 2158 2159 static void lan78xx_irq_unmask(struct irq_data *irqd) 2160 { 2161 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2162 2163 data->irqenable |= BIT(irqd_to_hwirq(irqd)); 2164 } 2165 2166 static void lan78xx_irq_bus_lock(struct irq_data *irqd) 2167 { 2168 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2169 2170 mutex_lock(&data->irq_lock); 2171 } 2172 2173 static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd) 2174 { 2175 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2176 struct lan78xx_net *dev = 2177 container_of(data, struct lan78xx_net, domain_data); 2178 u32 buf; 2179 int ret; 2180 2181 /* call register access here because irq_bus_lock & irq_bus_sync_unlock 2182 * are only two callbacks executed in non-atomic contex. 2183 */ 2184 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2185 if (ret < 0) 2186 goto irq_bus_sync_unlock; 2187 2188 if (buf != data->irqenable) 2189 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable); 2190 2191 irq_bus_sync_unlock: 2192 if (ret < 0) 2193 netdev_err(dev->net, "Failed to sync IRQ enable register: %pe\n", 2194 ERR_PTR(ret)); 2195 2196 mutex_unlock(&data->irq_lock); 2197 } 2198 2199 static struct irq_chip lan78xx_irqchip = { 2200 .name = "lan78xx-irqs", 2201 .irq_mask = lan78xx_irq_mask, 2202 .irq_unmask = lan78xx_irq_unmask, 2203 .irq_bus_lock = lan78xx_irq_bus_lock, 2204 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock, 2205 }; 2206 2207 static int lan78xx_setup_irq_domain(struct lan78xx_net *dev) 2208 { 2209 struct irq_domain *irqdomain; 2210 unsigned int irqmap = 0; 2211 u32 buf; 2212 int ret = 0; 2213 2214 mutex_init(&dev->domain_data.irq_lock); 2215 2216 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2217 if (ret < 0) 2218 return ret; 2219 2220 dev->domain_data.irqenable = buf; 2221 2222 dev->domain_data.irqchip = &lan78xx_irqchip; 2223 dev->domain_data.irq_handler = handle_simple_irq; 2224 2225 irqdomain = irq_domain_create_simple(dev_fwnode(dev->udev->dev.parent), MAX_INT_EP, 0, 2226 &chip_domain_ops, &dev->domain_data); 2227 if (irqdomain) { 2228 /* create mapping for PHY interrupt */ 2229 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY); 2230 if (!irqmap) { 2231 irq_domain_remove(irqdomain); 2232 2233 irqdomain = NULL; 2234 ret = -EINVAL; 2235 } 2236 } else { 2237 ret = -EINVAL; 2238 } 2239 2240 dev->domain_data.irqdomain = irqdomain; 2241 dev->domain_data.phyirq = irqmap; 2242 2243 return ret; 2244 } 2245 2246 static void lan78xx_remove_irq_domain(struct lan78xx_net *dev) 2247 { 2248 if (dev->domain_data.phyirq > 0) { 2249 irq_dispose_mapping(dev->domain_data.phyirq); 2250 2251 if (dev->domain_data.irqdomain) 2252 irq_domain_remove(dev->domain_data.irqdomain); 2253 } 2254 dev->domain_data.phyirq = 0; 2255 dev->domain_data.irqdomain = NULL; 2256 } 2257 2258 static void lan78xx_mac_config(struct phylink_config *config, unsigned int mode, 2259 const struct phylink_link_state *state) 2260 { 2261 struct net_device *net = to_net_dev(config->dev); 2262 struct lan78xx_net *dev = netdev_priv(net); 2263 u32 mac_cr = 0; 2264 int ret; 2265 2266 /* Check if the mode is supported */ 2267 if (mode != MLO_AN_FIXED && mode != MLO_AN_PHY) { 2268 netdev_err(net, "Unsupported negotiation mode: %u\n", mode); 2269 return; 2270 } 2271 2272 switch (state->interface) { 2273 case PHY_INTERFACE_MODE_GMII: 2274 mac_cr |= MAC_CR_GMII_EN_; 2275 break; 2276 case PHY_INTERFACE_MODE_RGMII: 2277 case PHY_INTERFACE_MODE_RGMII_ID: 2278 case PHY_INTERFACE_MODE_RGMII_TXID: 2279 case PHY_INTERFACE_MODE_RGMII_RXID: 2280 break; 2281 default: 2282 netdev_warn(net, "Unsupported interface mode: %d\n", 2283 state->interface); 2284 return; 2285 } 2286 2287 ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_GMII_EN_, mac_cr); 2288 if (ret < 0) 2289 netdev_err(net, "Failed to config MAC with error %pe\n", 2290 ERR_PTR(ret)); 2291 } 2292 2293 static void lan78xx_mac_link_down(struct phylink_config *config, 2294 unsigned int mode, phy_interface_t interface) 2295 { 2296 struct net_device *net = to_net_dev(config->dev); 2297 struct lan78xx_net *dev = netdev_priv(net); 2298 int ret; 2299 2300 netif_stop_queue(net); 2301 2302 /* MAC reset will not de-assert TXEN/RXEN, we need to stop them 2303 * manually before reset. TX and RX should be disabled before running 2304 * link_up sequence. 2305 */ 2306 ret = lan78xx_stop_tx_path(dev); 2307 if (ret < 0) 2308 goto link_down_fail; 2309 2310 ret = lan78xx_stop_rx_path(dev); 2311 if (ret < 0) 2312 goto link_down_fail; 2313 2314 /* MAC reset seems to not affect MAC configuration, no idea if it is 2315 * really needed, but it was done in previous driver version. So, leave 2316 * it here. 2317 */ 2318 ret = lan78xx_mac_reset(dev); 2319 if (ret < 0) 2320 goto link_down_fail; 2321 2322 return; 2323 2324 link_down_fail: 2325 netdev_err(dev->net, "Failed to set MAC down with error %pe\n", 2326 ERR_PTR(ret)); 2327 } 2328 2329 /** 2330 * lan78xx_configure_usb - Configure USB link power settings 2331 * @dev: pointer to the LAN78xx device structure 2332 * @speed: negotiated Ethernet link speed (in Mbps) 2333 * 2334 * This function configures U1/U2 link power management for SuperSpeed 2335 * USB devices based on the current Ethernet link speed. It uses the 2336 * USB_CFG1 register to enable or disable U1 and U2 low-power states. 2337 * 2338 * Note: Only LAN7800 and LAN7801 support SuperSpeed (USB 3.x). 2339 * LAN7850 is a High-Speed-only (USB 2.0) device and is skipped. 2340 * 2341 * Return: 0 on success or a negative error code on failure. 2342 */ 2343 static int lan78xx_configure_usb(struct lan78xx_net *dev, int speed) 2344 { 2345 u32 mask, val; 2346 int ret; 2347 2348 /* Only configure USB settings for SuperSpeed devices */ 2349 if (dev->udev->speed != USB_SPEED_SUPER) 2350 return 0; 2351 2352 /* LAN7850 does not support USB 3.x */ 2353 if (dev->chipid == ID_REV_CHIP_ID_7850_) { 2354 netdev_warn_once(dev->net, "Unexpected SuperSpeed for LAN7850 (USB 2.0 only)\n"); 2355 return 0; 2356 } 2357 2358 switch (speed) { 2359 case SPEED_1000: 2360 /* Disable U2, enable U1 */ 2361 ret = lan78xx_update_reg(dev, USB_CFG1, 2362 USB_CFG1_DEV_U2_INIT_EN_, 0); 2363 if (ret < 0) 2364 return ret; 2365 2366 return lan78xx_update_reg(dev, USB_CFG1, 2367 USB_CFG1_DEV_U1_INIT_EN_, 2368 USB_CFG1_DEV_U1_INIT_EN_); 2369 2370 case SPEED_100: 2371 case SPEED_10: 2372 /* Enable both U1 and U2 */ 2373 mask = USB_CFG1_DEV_U1_INIT_EN_ | USB_CFG1_DEV_U2_INIT_EN_; 2374 val = mask; 2375 return lan78xx_update_reg(dev, USB_CFG1, mask, val); 2376 2377 default: 2378 netdev_warn(dev->net, "Unsupported link speed: %d\n", speed); 2379 return -EINVAL; 2380 } 2381 } 2382 2383 /** 2384 * lan78xx_configure_flowcontrol - Set MAC and FIFO flow control configuration 2385 * @dev: pointer to the LAN78xx device structure 2386 * @tx_pause: enable transmission of pause frames 2387 * @rx_pause: enable reception of pause frames 2388 * 2389 * This function configures the LAN78xx flow control settings by writing 2390 * to the FLOW and FCT_FLOW registers. The pause time is set to the 2391 * maximum allowed value (65535 quanta). FIFO thresholds are selected 2392 * based on USB speed. 2393 * 2394 * The Pause Time field is measured in units of 512-bit times (quanta): 2395 * - At 1 Gbps: 1 quanta = 512 ns → max ~33.6 ms pause 2396 * - At 100 Mbps: 1 quanta = 5.12 µs → max ~335 ms pause 2397 * - At 10 Mbps: 1 quanta = 51.2 µs → max ~3.3 s pause 2398 * 2399 * Flow control thresholds (FCT_FLOW) are used to trigger pause/resume: 2400 * - RXUSED is the number of bytes used in the RX FIFO 2401 * - Flow is turned ON when RXUSED ≥ FLOW_ON threshold 2402 * - Flow is turned OFF when RXUSED ≤ FLOW_OFF threshold 2403 * - Both thresholds are encoded in units of 512 bytes (rounded up) 2404 * 2405 * Thresholds differ by USB speed because available USB bandwidth 2406 * affects how fast packets can be drained from the RX FIFO: 2407 * - USB 3.x (SuperSpeed): 2408 * FLOW_ON = 9216 bytes → 18 units 2409 * FLOW_OFF = 4096 bytes → 8 units 2410 * - USB 2.0 (High-Speed): 2411 * FLOW_ON = 8704 bytes → 17 units 2412 * FLOW_OFF = 1024 bytes → 2 units 2413 * 2414 * Note: The FCT_FLOW register must be configured before enabling TX pause 2415 * (i.e., before setting FLOW_CR_TX_FCEN_), as required by the hardware. 2416 * 2417 * Return: 0 on success or a negative error code on failure. 2418 */ 2419 static int lan78xx_configure_flowcontrol(struct lan78xx_net *dev, 2420 bool tx_pause, bool rx_pause) 2421 { 2422 /* Use maximum pause time: 65535 quanta (512-bit times) */ 2423 const u32 pause_time_quanta = 65535; 2424 u32 fct_flow = 0; 2425 u32 flow = 0; 2426 int ret; 2427 2428 /* Prepare MAC flow control bits */ 2429 if (tx_pause) 2430 flow |= FLOW_CR_TX_FCEN_ | pause_time_quanta; 2431 2432 if (rx_pause) 2433 flow |= FLOW_CR_RX_FCEN_; 2434 2435 /* Select RX FIFO thresholds based on USB speed 2436 * 2437 * FCT_FLOW layout: 2438 * bits [6:0] FLOW_ON threshold (RXUSED ≥ ON → assert pause) 2439 * bits [14:8] FLOW_OFF threshold (RXUSED ≤ OFF → deassert pause) 2440 * thresholds are expressed in units of 512 bytes 2441 */ 2442 switch (dev->udev->speed) { 2443 case USB_SPEED_SUPER: 2444 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS); 2445 break; 2446 case USB_SPEED_HIGH: 2447 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS); 2448 break; 2449 default: 2450 netdev_warn(dev->net, "Unsupported USB speed: %d\n", 2451 dev->udev->speed); 2452 return -EINVAL; 2453 } 2454 2455 /* Step 1: Write FIFO thresholds before enabling pause frames */ 2456 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow); 2457 if (ret < 0) 2458 return ret; 2459 2460 /* Step 2: Enable MAC pause functionality */ 2461 return lan78xx_write_reg(dev, FLOW, flow); 2462 } 2463 2464 static void lan78xx_mac_link_up(struct phylink_config *config, 2465 struct phy_device *phy, 2466 unsigned int mode, phy_interface_t interface, 2467 int speed, int duplex, 2468 bool tx_pause, bool rx_pause) 2469 { 2470 struct net_device *net = to_net_dev(config->dev); 2471 struct lan78xx_net *dev = netdev_priv(net); 2472 u32 mac_cr = 0; 2473 int ret; 2474 2475 switch (speed) { 2476 case SPEED_1000: 2477 mac_cr |= MAC_CR_SPEED_1000_; 2478 break; 2479 case SPEED_100: 2480 mac_cr |= MAC_CR_SPEED_100_; 2481 break; 2482 case SPEED_10: 2483 mac_cr |= MAC_CR_SPEED_10_; 2484 break; 2485 default: 2486 netdev_err(dev->net, "Unsupported speed %d\n", speed); 2487 return; 2488 } 2489 2490 if (duplex == DUPLEX_FULL) 2491 mac_cr |= MAC_CR_FULL_DUPLEX_; 2492 2493 /* make sure TXEN and RXEN are disabled before reconfiguring MAC */ 2494 ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_SPEED_MASK_ | 2495 MAC_CR_FULL_DUPLEX_ | MAC_CR_EEE_EN_, mac_cr); 2496 if (ret < 0) 2497 goto link_up_fail; 2498 2499 ret = lan78xx_configure_flowcontrol(dev, tx_pause, rx_pause); 2500 if (ret < 0) 2501 goto link_up_fail; 2502 2503 ret = lan78xx_configure_usb(dev, speed); 2504 if (ret < 0) 2505 goto link_up_fail; 2506 2507 lan78xx_rx_urb_submit_all(dev); 2508 2509 ret = lan78xx_flush_rx_fifo(dev); 2510 if (ret < 0) 2511 goto link_up_fail; 2512 2513 ret = lan78xx_flush_tx_fifo(dev); 2514 if (ret < 0) 2515 goto link_up_fail; 2516 2517 ret = lan78xx_start_tx_path(dev); 2518 if (ret < 0) 2519 goto link_up_fail; 2520 2521 ret = lan78xx_start_rx_path(dev); 2522 if (ret < 0) 2523 goto link_up_fail; 2524 2525 /* The RFE clears the VLAN/DA hash filter (VHF) on a link down/up 2526 * cycle, so reprogram both tables from their shadow copies. 2527 */ 2528 ret = lan78xx_write_vlan_table(dev); 2529 if (ret < 0) 2530 goto link_up_fail; 2531 2532 ret = lan78xx_write_mchash_table(dev); 2533 if (ret < 0) 2534 goto link_up_fail; 2535 2536 netif_start_queue(net); 2537 2538 return; 2539 2540 link_up_fail: 2541 netdev_err(dev->net, "Failed to set MAC up with error %pe\n", 2542 ERR_PTR(ret)); 2543 } 2544 2545 /** 2546 * lan78xx_mac_eee_enable - Enable or disable MAC-side EEE support 2547 * @dev: LAN78xx device 2548 * @enable: true to enable EEE, false to disable 2549 * 2550 * This function sets or clears the MAC_CR_EEE_EN_ bit to control Energy 2551 * Efficient Ethernet (EEE) operation. According to current understanding 2552 * of the LAN7800 documentation, this bit can be modified while TX and RX 2553 * are enabled. No explicit requirement was found to disable data paths 2554 * before changing this bit. 2555 * 2556 * Return: 0 on success or a negative error code 2557 */ 2558 static int lan78xx_mac_eee_enable(struct lan78xx_net *dev, bool enable) 2559 { 2560 u32 mac_cr = 0; 2561 2562 if (enable) 2563 mac_cr |= MAC_CR_EEE_EN_; 2564 2565 return lan78xx_update_reg(dev, MAC_CR, MAC_CR_EEE_EN_, mac_cr); 2566 } 2567 2568 static void lan78xx_mac_disable_tx_lpi(struct phylink_config *config) 2569 { 2570 struct net_device *net = to_net_dev(config->dev); 2571 struct lan78xx_net *dev = netdev_priv(net); 2572 2573 lan78xx_mac_eee_enable(dev, false); 2574 } 2575 2576 static int lan78xx_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, 2577 bool tx_clk_stop) 2578 { 2579 struct net_device *net = to_net_dev(config->dev); 2580 struct lan78xx_net *dev = netdev_priv(net); 2581 int ret; 2582 2583 /* Software should only change this field when Energy Efficient 2584 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing 2585 * EEEEN during probe, and phylink itself guarantees that 2586 * mac_disable_tx_lpi() will have been previously called. 2587 */ 2588 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, timer); 2589 if (ret < 0) 2590 return ret; 2591 2592 return lan78xx_mac_eee_enable(dev, true); 2593 } 2594 2595 static const struct phylink_mac_ops lan78xx_phylink_mac_ops = { 2596 .mac_config = lan78xx_mac_config, 2597 .mac_link_down = lan78xx_mac_link_down, 2598 .mac_link_up = lan78xx_mac_link_up, 2599 .mac_disable_tx_lpi = lan78xx_mac_disable_tx_lpi, 2600 .mac_enable_tx_lpi = lan78xx_mac_enable_tx_lpi, 2601 }; 2602 2603 /** 2604 * lan78xx_set_fixed_link() - Set fixed link configuration for LAN7801 2605 * @dev: LAN78xx device 2606 * 2607 * Use fixed link configuration with 1 Gbps full duplex. This is used in special 2608 * cases like EVB-KSZ9897-1, where LAN7801 acts as a USB-to-Ethernet interface 2609 * to a switch without a visible PHY. 2610 * 2611 * Return: pointer to the registered fixed PHY, or ERR_PTR() on error. 2612 */ 2613 static int lan78xx_set_fixed_link(struct lan78xx_net *dev) 2614 { 2615 static const struct phylink_link_state state = { 2616 .speed = SPEED_1000, 2617 .duplex = DUPLEX_FULL, 2618 }; 2619 2620 netdev_info(dev->net, 2621 "No PHY found on LAN7801 – using fixed link instead (e.g. EVB-KSZ9897-1)\n"); 2622 2623 return phylink_set_fixed_link(dev->phylink, &state); 2624 } 2625 2626 /** 2627 * lan78xx_get_phy() - Probe or register PHY device and set interface mode 2628 * @dev: LAN78xx device structure 2629 * 2630 * This function attempts to find a PHY on the MDIO bus. If no PHY is found 2631 * and the chip is LAN7801, it registers a fixed PHY as fallback. It also 2632 * sets dev->interface based on chip ID and detected PHY type. 2633 * 2634 * Return: a valid PHY device pointer, or ERR_PTR() on failure. 2635 */ 2636 static struct phy_device *lan78xx_get_phy(struct lan78xx_net *dev) 2637 { 2638 struct phy_device *phydev; 2639 2640 /* Attempt to locate a PHY on the MDIO bus */ 2641 phydev = phy_find_first(dev->mdiobus); 2642 2643 switch (dev->chipid) { 2644 case ID_REV_CHIP_ID_7801_: 2645 if (phydev) { 2646 /* External RGMII PHY detected */ 2647 dev->interface = PHY_INTERFACE_MODE_RGMII_ID; 2648 phydev->is_internal = false; 2649 2650 if (!phydev->drv) 2651 netdev_warn(dev->net, 2652 "PHY driver not found – assuming RGMII delays are on PCB or strapped for the PHY\n"); 2653 2654 return phydev; 2655 } 2656 2657 dev->interface = PHY_INTERFACE_MODE_RGMII; 2658 /* No PHY found – fallback to fixed PHY (e.g. KSZ switch board) */ 2659 return NULL; 2660 2661 case ID_REV_CHIP_ID_7800_: 2662 case ID_REV_CHIP_ID_7850_: 2663 if (!phydev) 2664 return ERR_PTR(-ENODEV); 2665 2666 /* These use internal GMII-connected PHY */ 2667 dev->interface = PHY_INTERFACE_MODE_GMII; 2668 phydev->is_internal = true; 2669 return phydev; 2670 2671 default: 2672 netdev_err(dev->net, "Unknown CHIP ID: 0x%08x\n", dev->chipid); 2673 return ERR_PTR(-ENODEV); 2674 } 2675 } 2676 2677 /** 2678 * lan78xx_mac_prepare_for_phy() - Preconfigure MAC-side interface settings 2679 * @dev: LAN78xx device 2680 * 2681 * Configure MAC-side registers according to dev->interface, which should be 2682 * set by lan78xx_get_phy(). 2683 * 2684 * - For PHY_INTERFACE_MODE_RGMII: 2685 * Enable MAC-side TXC delay. This mode seems to be used in a special setup 2686 * without a real PHY, likely on EVB-KSZ9897-1. In that design, LAN7801 is 2687 * connected to the KSZ9897 switch, and the link timing is expected to be 2688 * hardwired (e.g. via strapping or board layout). No devicetree support is 2689 * assumed here. 2690 * 2691 * - For PHY_INTERFACE_MODE_RGMII_ID: 2692 * Disable MAC-side delay and rely on the PHY driver to provide delay. 2693 * 2694 * - For GMII, no MAC-specific config is needed. 2695 * 2696 * Return: 0 on success or a negative error code. 2697 */ 2698 static int lan78xx_mac_prepare_for_phy(struct lan78xx_net *dev) 2699 { 2700 int ret; 2701 2702 switch (dev->interface) { 2703 case PHY_INTERFACE_MODE_RGMII: 2704 /* Enable MAC-side TX clock delay */ 2705 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 2706 MAC_RGMII_ID_TXC_DELAY_EN_); 2707 if (ret < 0) 2708 return ret; 2709 2710 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2711 if (ret < 0) 2712 return ret; 2713 2714 ret = lan78xx_update_reg(dev, HW_CFG, 2715 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_, 2716 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_); 2717 if (ret < 0) 2718 return ret; 2719 2720 break; 2721 2722 case PHY_INTERFACE_MODE_RGMII_ID: 2723 /* Disable MAC-side TXC delay, PHY provides it */ 2724 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 0); 2725 if (ret < 0) 2726 return ret; 2727 2728 break; 2729 2730 case PHY_INTERFACE_MODE_GMII: 2731 /* No MAC-specific configuration required */ 2732 break; 2733 2734 default: 2735 netdev_warn(dev->net, "Unsupported interface mode: %d\n", 2736 dev->interface); 2737 break; 2738 } 2739 2740 return 0; 2741 } 2742 2743 /** 2744 * lan78xx_configure_leds_from_dt() - Configure LED enables based on DT 2745 * @dev: LAN78xx device 2746 * @phydev: PHY device (must be valid) 2747 * 2748 * Reads "microchip,led-modes" property from the PHY's DT node and enables 2749 * the corresponding number of LEDs by writing to HW_CFG. 2750 * 2751 * This helper preserves the original logic, enabling up to 4 LEDs. 2752 * If the property is not present, this function does nothing. 2753 * 2754 * Return: 0 on success or a negative error code. 2755 */ 2756 static int lan78xx_configure_leds_from_dt(struct lan78xx_net *dev, 2757 struct phy_device *phydev) 2758 { 2759 struct device_node *np = phydev->mdio.dev.of_node; 2760 u32 reg; 2761 int len, ret; 2762 2763 if (!np) 2764 return 0; 2765 2766 len = of_property_count_elems_of_size(np, "microchip,led-modes", 2767 sizeof(u32)); 2768 if (len < 0) 2769 return 0; 2770 2771 ret = lan78xx_read_reg(dev, HW_CFG, ®); 2772 if (ret < 0) 2773 return ret; 2774 2775 reg &= ~(HW_CFG_LED0_EN_ | HW_CFG_LED1_EN_ | 2776 HW_CFG_LED2_EN_ | HW_CFG_LED3_EN_); 2777 2778 reg |= (len > 0) * HW_CFG_LED0_EN_ | 2779 (len > 1) * HW_CFG_LED1_EN_ | 2780 (len > 2) * HW_CFG_LED2_EN_ | 2781 (len > 3) * HW_CFG_LED3_EN_; 2782 2783 return lan78xx_write_reg(dev, HW_CFG, reg); 2784 } 2785 2786 static int lan78xx_phylink_setup(struct lan78xx_net *dev) 2787 { 2788 struct phylink_config *pc = &dev->phylink_config; 2789 struct phylink *phylink; 2790 2791 pc->dev = &dev->net->dev; 2792 pc->type = PHYLINK_NETDEV; 2793 pc->mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10 | 2794 MAC_100 | MAC_1000FD; 2795 pc->mac_managed_pm = true; 2796 pc->lpi_capabilities = MAC_100FD | MAC_1000FD; 2797 /* 2798 * Default TX LPI (Low Power Idle) request delay count is set to 50us. 2799 * 2800 * Source: LAN7800 Documentation, DS00001992H, Section 15.1.57, Page 204. 2801 * 2802 * Reasoning: 2803 * According to the application note in the LAN7800 documentation, a 2804 * zero delay may negatively impact the TX data path’s ability to 2805 * support Gigabit operation. A value of 50us is recommended as a 2806 * reasonable default when the part operates at Gigabit speeds, 2807 * balancing stability and power efficiency in EEE mode. This delay can 2808 * be increased based on performance testing, as EEE is designed for 2809 * scenarios with mostly idle links and occasional bursts of full 2810 * bandwidth transmission. The goal is to ensure reliable Gigabit 2811 * performance without overly aggressive power optimization during 2812 * inactive periods. 2813 */ 2814 pc->lpi_timer_default = 50; 2815 pc->eee_enabled_default = true; 2816 2817 if (dev->chipid == ID_REV_CHIP_ID_7801_) 2818 phy_interface_set_rgmii(pc->supported_interfaces); 2819 else 2820 __set_bit(PHY_INTERFACE_MODE_GMII, pc->supported_interfaces); 2821 2822 memcpy(dev->phylink_config.lpi_interfaces, 2823 dev->phylink_config.supported_interfaces, 2824 sizeof(dev->phylink_config.lpi_interfaces)); 2825 2826 phylink = phylink_create(pc, dev->net->dev.fwnode, 2827 dev->interface, &lan78xx_phylink_mac_ops); 2828 if (IS_ERR(phylink)) 2829 return PTR_ERR(phylink); 2830 2831 dev->phylink = phylink; 2832 2833 return 0; 2834 } 2835 2836 static void lan78xx_phy_uninit(struct lan78xx_net *dev) 2837 { 2838 if (dev->phylink) { 2839 phylink_disconnect_phy(dev->phylink); 2840 phylink_destroy(dev->phylink); 2841 dev->phylink = NULL; 2842 } 2843 } 2844 2845 static int lan78xx_phy_init(struct lan78xx_net *dev) 2846 { 2847 struct phy_device *phydev; 2848 int ret; 2849 2850 phydev = lan78xx_get_phy(dev); 2851 /* phydev can be NULL if no PHY is found and the chip is LAN7801, 2852 * which will use a fixed link later. 2853 * If an error occurs, return the error code immediately. 2854 */ 2855 if (IS_ERR(phydev)) 2856 return PTR_ERR(phydev); 2857 2858 ret = lan78xx_phylink_setup(dev); 2859 if (ret < 0) 2860 return ret; 2861 2862 ret = lan78xx_mac_prepare_for_phy(dev); 2863 if (ret < 0) 2864 goto phylink_uninit; 2865 2866 /* If no PHY is found, set up a fixed link. It is very specific to 2867 * the LAN7801 and is used in special cases like EVB-KSZ9897-1 where 2868 * LAN7801 acts as a USB-to-Ethernet interface to a switch without 2869 * a visible PHY. 2870 */ 2871 if (!phydev) { 2872 ret = lan78xx_set_fixed_link(dev); 2873 if (ret < 0) 2874 goto phylink_uninit; 2875 2876 /* No PHY found, so set up a fixed link and return early. 2877 * No need to configure PHY IRQ or attach to phylink. 2878 */ 2879 return 0; 2880 } 2881 2882 /* if phyirq is not set, use polling mode in phylib */ 2883 if (dev->domain_data.phyirq > 0) 2884 phydev->irq = dev->domain_data.phyirq; 2885 else 2886 phydev->irq = PHY_POLL; 2887 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq); 2888 2889 ret = phylink_connect_phy(dev->phylink, phydev); 2890 if (ret) { 2891 netdev_err(dev->net, "can't attach PHY to %s, error %pe\n", 2892 dev->mdiobus->id, ERR_PTR(ret)); 2893 goto phylink_uninit; 2894 } 2895 2896 ret = lan78xx_configure_leds_from_dt(dev, phydev); 2897 if (ret < 0) 2898 goto phylink_uninit; 2899 2900 return 0; 2901 2902 phylink_uninit: 2903 lan78xx_phy_uninit(dev); 2904 2905 return ret; 2906 } 2907 2908 static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size) 2909 { 2910 bool rxenabled; 2911 u32 buf; 2912 int ret; 2913 2914 ret = lan78xx_read_reg(dev, MAC_RX, &buf); 2915 if (ret < 0) 2916 return ret; 2917 2918 rxenabled = ((buf & MAC_RX_RXEN_) != 0); 2919 2920 if (rxenabled) { 2921 buf &= ~MAC_RX_RXEN_; 2922 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2923 if (ret < 0) 2924 return ret; 2925 } 2926 2927 /* add 4 to size for FCS */ 2928 buf &= ~MAC_RX_MAX_SIZE_MASK_; 2929 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 2930 2931 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2932 if (ret < 0) 2933 return ret; 2934 2935 if (rxenabled) { 2936 buf |= MAC_RX_RXEN_; 2937 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2938 if (ret < 0) 2939 return ret; 2940 } 2941 2942 return 0; 2943 } 2944 2945 static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q) 2946 { 2947 struct sk_buff *skb; 2948 unsigned long flags; 2949 int count = 0; 2950 2951 spin_lock_irqsave(&q->lock, flags); 2952 while (!skb_queue_empty(q)) { 2953 struct skb_data *entry; 2954 struct urb *urb; 2955 int ret; 2956 2957 skb_queue_walk(q, skb) { 2958 entry = (struct skb_data *)skb->cb; 2959 if (entry->state != unlink_start) 2960 goto found; 2961 } 2962 break; 2963 found: 2964 entry->state = unlink_start; 2965 urb = entry->urb; 2966 2967 /* Get reference count of the URB to avoid it to be 2968 * freed during usb_unlink_urb, which may trigger 2969 * use-after-free problem inside usb_unlink_urb since 2970 * usb_unlink_urb is always racing with .complete 2971 * handler(include defer_bh). 2972 */ 2973 usb_get_urb(urb); 2974 spin_unlock_irqrestore(&q->lock, flags); 2975 /* during some PM-driven resume scenarios, 2976 * these (async) unlinks complete immediately 2977 */ 2978 ret = usb_unlink_urb(urb); 2979 if (ret != -EINPROGRESS && ret != 0) 2980 netdev_dbg(dev->net, "unlink urb err, %d\n", ret); 2981 else 2982 count++; 2983 usb_put_urb(urb); 2984 spin_lock_irqsave(&q->lock, flags); 2985 } 2986 spin_unlock_irqrestore(&q->lock, flags); 2987 return count; 2988 } 2989 2990 static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu) 2991 { 2992 struct lan78xx_net *dev = netdev_priv(netdev); 2993 int max_frame_len = RX_MAX_FRAME_LEN(new_mtu); 2994 int ret; 2995 2996 /* no second zero-length packet read wanted after mtu-sized packets */ 2997 if ((max_frame_len % dev->maxpacket) == 0) 2998 return -EDOM; 2999 3000 ret = usb_autopm_get_interface(dev->intf); 3001 if (ret < 0) 3002 return ret; 3003 3004 ret = lan78xx_set_rx_max_frame_length(dev, max_frame_len); 3005 if (ret < 0) 3006 netdev_err(dev->net, "MTU changed to %d from %d failed with %pe\n", 3007 new_mtu, netdev->mtu, ERR_PTR(ret)); 3008 else 3009 WRITE_ONCE(netdev->mtu, new_mtu); 3010 3011 usb_autopm_put_interface(dev->intf); 3012 3013 return ret; 3014 } 3015 3016 static int lan78xx_set_mac_addr(struct net_device *netdev, void *p) 3017 { 3018 struct lan78xx_net *dev = netdev_priv(netdev); 3019 struct sockaddr *addr = p; 3020 u32 addr_lo, addr_hi; 3021 int ret; 3022 3023 if (netif_running(netdev)) 3024 return -EBUSY; 3025 3026 if (!is_valid_ether_addr(addr->sa_data)) 3027 return -EADDRNOTAVAIL; 3028 3029 eth_hw_addr_set(netdev, addr->sa_data); 3030 3031 addr_lo = netdev->dev_addr[0] | 3032 netdev->dev_addr[1] << 8 | 3033 netdev->dev_addr[2] << 16 | 3034 netdev->dev_addr[3] << 24; 3035 addr_hi = netdev->dev_addr[4] | 3036 netdev->dev_addr[5] << 8; 3037 3038 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 3039 if (ret < 0) 3040 return ret; 3041 3042 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 3043 if (ret < 0) 3044 return ret; 3045 3046 /* Added to support MAC address changes */ 3047 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 3048 if (ret < 0) 3049 return ret; 3050 3051 return lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 3052 } 3053 3054 /* Enable or disable Rx checksum offload engine */ 3055 static int lan78xx_set_features(struct net_device *netdev, 3056 netdev_features_t features) 3057 { 3058 struct lan78xx_net *dev = netdev_priv(netdev); 3059 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3060 unsigned long flags; 3061 3062 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 3063 3064 if (features & NETIF_F_RXCSUM) { 3065 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_; 3066 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_; 3067 } else { 3068 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_); 3069 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_); 3070 } 3071 3072 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3073 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_; 3074 else 3075 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_; 3076 3077 if (features & NETIF_F_HW_VLAN_CTAG_FILTER) 3078 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_; 3079 else 3080 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_; 3081 3082 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 3083 3084 return lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 3085 } 3086 3087 static int lan78xx_write_vlan_table(struct lan78xx_net *dev) 3088 { 3089 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3090 3091 return lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0, 3092 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table); 3093 } 3094 3095 static void lan78xx_deferred_vlan_write(struct work_struct *param) 3096 { 3097 struct lan78xx_priv *pdata = 3098 container_of(param, struct lan78xx_priv, set_vlan); 3099 3100 lan78xx_write_vlan_table(pdata->dev); 3101 } 3102 3103 static int lan78xx_vlan_rx_add_vid(struct net_device *netdev, 3104 __be16 proto, u16 vid) 3105 { 3106 struct lan78xx_net *dev = netdev_priv(netdev); 3107 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3108 u16 vid_bit_index; 3109 u16 vid_dword_index; 3110 3111 vid_dword_index = (vid >> 5) & 0x7F; 3112 vid_bit_index = vid & 0x1F; 3113 3114 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index); 3115 3116 /* defer register writes to a sleepable context */ 3117 schedule_work(&pdata->set_vlan); 3118 3119 return 0; 3120 } 3121 3122 static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev, 3123 __be16 proto, u16 vid) 3124 { 3125 struct lan78xx_net *dev = netdev_priv(netdev); 3126 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3127 u16 vid_bit_index; 3128 u16 vid_dword_index; 3129 3130 vid_dword_index = (vid >> 5) & 0x7F; 3131 vid_bit_index = vid & 0x1F; 3132 3133 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index); 3134 3135 /* defer register writes to a sleepable context */ 3136 schedule_work(&pdata->set_vlan); 3137 3138 return 0; 3139 } 3140 3141 static int lan78xx_init_ltm(struct lan78xx_net *dev) 3142 { 3143 u32 regs[6] = { 0 }; 3144 int ret; 3145 u32 buf; 3146 3147 /* LAN7850 is USB 2.0 and does not support LTM */ 3148 if (dev->chipid == ID_REV_CHIP_ID_7850_) 3149 return 0; 3150 3151 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 3152 if (ret < 0) 3153 goto init_ltm_failed; 3154 3155 if (buf & USB_CFG1_LTM_ENABLE_) { 3156 u8 temp[2]; 3157 /* Get values from EEPROM first */ 3158 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) { 3159 if (temp[0] == 24) { 3160 ret = lan78xx_read_raw_eeprom(dev, 3161 temp[1] * 2, 3162 24, 3163 (u8 *)regs); 3164 if (ret < 0) 3165 return ret; 3166 } 3167 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) { 3168 if (temp[0] == 24) { 3169 ret = lan78xx_read_raw_otp(dev, 3170 temp[1] * 2, 3171 24, 3172 (u8 *)regs); 3173 if (ret < 0) 3174 return ret; 3175 } 3176 } 3177 } 3178 3179 ret = lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]); 3180 if (ret < 0) 3181 goto init_ltm_failed; 3182 3183 ret = lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]); 3184 if (ret < 0) 3185 goto init_ltm_failed; 3186 3187 ret = lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]); 3188 if (ret < 0) 3189 goto init_ltm_failed; 3190 3191 ret = lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]); 3192 if (ret < 0) 3193 goto init_ltm_failed; 3194 3195 ret = lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]); 3196 if (ret < 0) 3197 goto init_ltm_failed; 3198 3199 ret = lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]); 3200 if (ret < 0) 3201 goto init_ltm_failed; 3202 3203 return 0; 3204 3205 init_ltm_failed: 3206 netdev_err(dev->net, "Failed to init LTM with error %pe\n", ERR_PTR(ret)); 3207 return ret; 3208 } 3209 3210 static int lan78xx_urb_config_init(struct lan78xx_net *dev) 3211 { 3212 int result = 0; 3213 3214 switch (dev->udev->speed) { 3215 case USB_SPEED_SUPER: 3216 dev->rx_urb_size = RX_SS_URB_SIZE; 3217 dev->tx_urb_size = TX_SS_URB_SIZE; 3218 dev->n_rx_urbs = RX_SS_URB_NUM; 3219 dev->n_tx_urbs = TX_SS_URB_NUM; 3220 dev->bulk_in_delay = SS_BULK_IN_DELAY; 3221 dev->burst_cap = SS_BURST_CAP_SIZE / SS_USB_PKT_SIZE; 3222 break; 3223 case USB_SPEED_HIGH: 3224 dev->rx_urb_size = RX_HS_URB_SIZE; 3225 dev->tx_urb_size = TX_HS_URB_SIZE; 3226 dev->n_rx_urbs = RX_HS_URB_NUM; 3227 dev->n_tx_urbs = TX_HS_URB_NUM; 3228 dev->bulk_in_delay = HS_BULK_IN_DELAY; 3229 dev->burst_cap = HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 3230 break; 3231 case USB_SPEED_FULL: 3232 dev->rx_urb_size = RX_FS_URB_SIZE; 3233 dev->tx_urb_size = TX_FS_URB_SIZE; 3234 dev->n_rx_urbs = RX_FS_URB_NUM; 3235 dev->n_tx_urbs = TX_FS_URB_NUM; 3236 dev->bulk_in_delay = FS_BULK_IN_DELAY; 3237 dev->burst_cap = FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 3238 break; 3239 default: 3240 netdev_warn(dev->net, "USB bus speed not supported\n"); 3241 result = -EIO; 3242 break; 3243 } 3244 3245 return result; 3246 } 3247 3248 static int lan78xx_reset(struct lan78xx_net *dev) 3249 { 3250 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3251 unsigned long timeout; 3252 int ret; 3253 u32 buf; 3254 3255 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3256 if (ret < 0) 3257 return ret; 3258 3259 buf |= HW_CFG_LRST_; 3260 3261 ret = lan78xx_write_reg(dev, HW_CFG, buf); 3262 if (ret < 0) 3263 return ret; 3264 3265 timeout = jiffies + HZ; 3266 do { 3267 mdelay(1); 3268 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3269 if (ret < 0) 3270 return ret; 3271 3272 if (time_after(jiffies, timeout)) { 3273 netdev_warn(dev->net, 3274 "timeout on completion of LiteReset"); 3275 ret = -ETIMEDOUT; 3276 return ret; 3277 } 3278 } while (buf & HW_CFG_LRST_); 3279 3280 /* save DEVID for later usage */ 3281 ret = lan78xx_read_reg(dev, ID_REV, &buf); 3282 if (ret < 0) 3283 return ret; 3284 3285 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16; 3286 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_; 3287 3288 ret = lan78xx_init_mac_address(dev); 3289 if (ret < 0) 3290 return ret; 3291 3292 /* Respond to the IN token with a NAK */ 3293 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 3294 if (ret < 0) 3295 return ret; 3296 3297 buf |= USB_CFG_BIR_; 3298 3299 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 3300 if (ret < 0) 3301 return ret; 3302 3303 /* Init LTM */ 3304 ret = lan78xx_init_ltm(dev); 3305 if (ret < 0) 3306 return ret; 3307 3308 ret = lan78xx_write_reg(dev, BURST_CAP, dev->burst_cap); 3309 if (ret < 0) 3310 return ret; 3311 3312 ret = lan78xx_write_reg(dev, BULK_IN_DLY, dev->bulk_in_delay); 3313 if (ret < 0) 3314 return ret; 3315 3316 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3317 if (ret < 0) 3318 return ret; 3319 3320 buf |= HW_CFG_MEF_; 3321 buf |= HW_CFG_CLK125_EN_; 3322 buf |= HW_CFG_REFCLK25_EN_; 3323 3324 ret = lan78xx_write_reg(dev, HW_CFG, buf); 3325 if (ret < 0) 3326 return ret; 3327 3328 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 3329 if (ret < 0) 3330 return ret; 3331 3332 buf |= USB_CFG_BCE_; 3333 3334 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 3335 if (ret < 0) 3336 return ret; 3337 3338 /* set FIFO sizes */ 3339 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 3340 3341 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf); 3342 if (ret < 0) 3343 return ret; 3344 3345 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 3346 3347 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf); 3348 if (ret < 0) 3349 return ret; 3350 3351 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 3352 if (ret < 0) 3353 return ret; 3354 3355 ret = lan78xx_write_reg(dev, FLOW, 0); 3356 if (ret < 0) 3357 return ret; 3358 3359 ret = lan78xx_write_reg(dev, FCT_FLOW, 0); 3360 if (ret < 0) 3361 return ret; 3362 3363 /* Don't need rfe_ctl_lock during initialisation */ 3364 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 3365 if (ret < 0) 3366 return ret; 3367 3368 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_; 3369 3370 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 3371 if (ret < 0) 3372 return ret; 3373 3374 /* Enable or disable checksum offload engines */ 3375 ret = lan78xx_set_features(dev->net, dev->net->features); 3376 if (ret < 0) 3377 return ret; 3378 3379 lan78xx_set_multicast(dev->net); 3380 3381 /* reset PHY */ 3382 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3383 if (ret < 0) 3384 return ret; 3385 3386 buf |= PMT_CTL_PHY_RST_; 3387 3388 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 3389 if (ret < 0) 3390 return ret; 3391 3392 timeout = jiffies + HZ; 3393 do { 3394 mdelay(1); 3395 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3396 if (ret < 0) 3397 return ret; 3398 3399 if (time_after(jiffies, timeout)) { 3400 netdev_warn(dev->net, "timeout waiting for PHY Reset"); 3401 ret = -ETIMEDOUT; 3402 return ret; 3403 } 3404 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_)); 3405 3406 ret = lan78xx_read_reg(dev, MAC_CR, &buf); 3407 if (ret < 0) 3408 return ret; 3409 3410 buf &= ~(MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_ | MAC_CR_EEE_EN_); 3411 3412 /* LAN7801 only has RGMII mode */ 3413 if (dev->chipid == ID_REV_CHIP_ID_7801_) 3414 buf &= ~MAC_CR_GMII_EN_; 3415 3416 ret = lan78xx_write_reg(dev, MAC_CR, buf); 3417 if (ret < 0) 3418 return ret; 3419 3420 ret = lan78xx_set_rx_max_frame_length(dev, 3421 RX_MAX_FRAME_LEN(dev->net->mtu)); 3422 3423 return ret; 3424 } 3425 3426 static void lan78xx_init_stats(struct lan78xx_net *dev) 3427 { 3428 u32 *p; 3429 int i; 3430 3431 /* initialize for stats update 3432 * some counters are 20bits and some are 32bits 3433 */ 3434 p = (u32 *)&dev->stats.rollover_max; 3435 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++) 3436 p[i] = 0xFFFFF; 3437 3438 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF; 3439 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF; 3440 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF; 3441 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF; 3442 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF; 3443 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF; 3444 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF; 3445 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF; 3446 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF; 3447 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF; 3448 3449 set_bit(EVENT_STAT_UPDATE, &dev->flags); 3450 } 3451 3452 static int lan78xx_open(struct net_device *net) 3453 { 3454 struct lan78xx_net *dev = netdev_priv(net); 3455 int ret; 3456 3457 netif_dbg(dev, ifup, dev->net, "open device"); 3458 3459 ret = usb_autopm_get_interface(dev->intf); 3460 if (ret < 0) 3461 return ret; 3462 3463 mutex_lock(&dev->dev_mutex); 3464 3465 lan78xx_init_stats(dev); 3466 3467 napi_enable(&dev->napi); 3468 3469 set_bit(EVENT_DEV_OPEN, &dev->flags); 3470 3471 /* for Link Check */ 3472 if (dev->urb_intr) { 3473 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 3474 if (ret < 0) { 3475 netif_err(dev, ifup, dev->net, 3476 "intr submit %d\n", ret); 3477 goto done; 3478 } 3479 } 3480 3481 phylink_start(dev->phylink); 3482 3483 done: 3484 mutex_unlock(&dev->dev_mutex); 3485 3486 if (ret < 0) 3487 usb_autopm_put_interface(dev->intf); 3488 3489 return ret; 3490 } 3491 3492 static void lan78xx_terminate_urbs(struct lan78xx_net *dev) 3493 { 3494 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup); 3495 DECLARE_WAITQUEUE(wait, current); 3496 int temp; 3497 3498 /* ensure there are no more active urbs */ 3499 add_wait_queue(&unlink_wakeup, &wait); 3500 set_current_state(TASK_UNINTERRUPTIBLE); 3501 dev->wait = &unlink_wakeup; 3502 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq); 3503 3504 /* maybe wait for deletions to finish. */ 3505 while (!skb_queue_empty(&dev->rxq) || 3506 !skb_queue_empty(&dev->txq)) { 3507 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS)); 3508 set_current_state(TASK_UNINTERRUPTIBLE); 3509 netif_dbg(dev, ifdown, dev->net, 3510 "waited for %d urb completions", temp); 3511 } 3512 set_current_state(TASK_RUNNING); 3513 dev->wait = NULL; 3514 remove_wait_queue(&unlink_wakeup, &wait); 3515 3516 /* empty Rx done, Rx overflow and Tx pend queues 3517 */ 3518 while (!skb_queue_empty(&dev->rxq_done)) { 3519 struct sk_buff *skb = skb_dequeue(&dev->rxq_done); 3520 3521 lan78xx_release_rx_buf(dev, skb); 3522 } 3523 3524 skb_queue_purge(&dev->rxq_overflow); 3525 skb_queue_purge(&dev->txq_pend); 3526 } 3527 3528 static int lan78xx_stop(struct net_device *net) 3529 { 3530 struct lan78xx_net *dev = netdev_priv(net); 3531 3532 netif_dbg(dev, ifup, dev->net, "stop device"); 3533 3534 mutex_lock(&dev->dev_mutex); 3535 3536 if (timer_pending(&dev->stat_monitor)) 3537 timer_delete_sync(&dev->stat_monitor); 3538 3539 clear_bit(EVENT_DEV_OPEN, &dev->flags); 3540 napi_disable(&dev->napi); 3541 3542 lan78xx_terminate_urbs(dev); 3543 3544 netif_info(dev, ifdown, dev->net, 3545 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n", 3546 net->stats.rx_packets, net->stats.tx_packets, 3547 net->stats.rx_errors, net->stats.tx_errors); 3548 3549 phylink_stop(dev->phylink); 3550 3551 usb_kill_urb(dev->urb_intr); 3552 3553 /* deferred work (task, timer, softirq) must also stop. 3554 * can't flush_scheduled_work() until we drop rtnl (later), 3555 * else workers could deadlock; so make workers a NOP. 3556 */ 3557 clear_bit(EVENT_TX_HALT, &dev->flags); 3558 clear_bit(EVENT_RX_HALT, &dev->flags); 3559 clear_bit(EVENT_PHY_INT_ACK, &dev->flags); 3560 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 3561 3562 cancel_delayed_work_sync(&dev->wq); 3563 3564 usb_autopm_put_interface(dev->intf); 3565 3566 mutex_unlock(&dev->dev_mutex); 3567 3568 return 0; 3569 } 3570 3571 static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb, 3572 struct sk_buff_head *list, enum skb_state state) 3573 { 3574 unsigned long flags; 3575 enum skb_state old_state; 3576 struct skb_data *entry = (struct skb_data *)skb->cb; 3577 3578 spin_lock_irqsave(&list->lock, flags); 3579 old_state = entry->state; 3580 entry->state = state; 3581 3582 __skb_unlink(skb, list); 3583 spin_unlock(&list->lock); 3584 spin_lock(&dev->rxq_done.lock); 3585 3586 __skb_queue_tail(&dev->rxq_done, skb); 3587 if (skb_queue_len(&dev->rxq_done) == 1) 3588 napi_schedule(&dev->napi); 3589 3590 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 3591 3592 return old_state; 3593 } 3594 3595 static void tx_complete(struct urb *urb) 3596 { 3597 struct sk_buff *skb = (struct sk_buff *)urb->context; 3598 struct skb_data *entry = (struct skb_data *)skb->cb; 3599 struct lan78xx_net *dev = entry->dev; 3600 3601 if (urb->status == 0) { 3602 dev->net->stats.tx_packets += entry->num_of_packet; 3603 dev->net->stats.tx_bytes += entry->length; 3604 } else { 3605 dev->net->stats.tx_errors += entry->num_of_packet; 3606 3607 switch (urb->status) { 3608 case -EPIPE: 3609 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 3610 break; 3611 3612 /* software-driven interface shutdown */ 3613 case -ECONNRESET: 3614 case -ESHUTDOWN: 3615 netif_dbg(dev, tx_err, dev->net, 3616 "tx err interface gone %d\n", 3617 entry->urb->status); 3618 break; 3619 3620 case -EPROTO: 3621 case -ETIME: 3622 case -EILSEQ: 3623 netif_stop_queue(dev->net); 3624 netif_dbg(dev, tx_err, dev->net, 3625 "tx err queue stopped %d\n", 3626 entry->urb->status); 3627 break; 3628 default: 3629 netif_dbg(dev, tx_err, dev->net, 3630 "unknown tx err %d\n", 3631 entry->urb->status); 3632 break; 3633 } 3634 } 3635 3636 usb_autopm_put_interface_async(dev->intf); 3637 3638 skb_unlink(skb, &dev->txq); 3639 3640 lan78xx_release_tx_buf(dev, skb); 3641 3642 /* Re-schedule NAPI if Tx data pending but no URBs in progress. 3643 */ 3644 if (skb_queue_empty(&dev->txq) && 3645 !skb_queue_empty(&dev->txq_pend)) 3646 napi_schedule(&dev->napi); 3647 } 3648 3649 static void lan78xx_queue_skb(struct sk_buff_head *list, 3650 struct sk_buff *newsk, enum skb_state state) 3651 { 3652 struct skb_data *entry = (struct skb_data *)newsk->cb; 3653 3654 __skb_queue_tail(list, newsk); 3655 entry->state = state; 3656 } 3657 3658 static unsigned int lan78xx_tx_urb_space(struct lan78xx_net *dev) 3659 { 3660 return skb_queue_len(&dev->txq_free) * dev->tx_urb_size; 3661 } 3662 3663 static unsigned int lan78xx_tx_pend_data_len(struct lan78xx_net *dev) 3664 { 3665 return dev->tx_pend_data_len; 3666 } 3667 3668 static void lan78xx_tx_pend_skb_add(struct lan78xx_net *dev, 3669 struct sk_buff *skb, 3670 unsigned int *tx_pend_data_len) 3671 { 3672 unsigned long flags; 3673 3674 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3675 3676 __skb_queue_tail(&dev->txq_pend, skb); 3677 3678 dev->tx_pend_data_len += skb->len; 3679 *tx_pend_data_len = dev->tx_pend_data_len; 3680 3681 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3682 } 3683 3684 static void lan78xx_tx_pend_skb_head_add(struct lan78xx_net *dev, 3685 struct sk_buff *skb, 3686 unsigned int *tx_pend_data_len) 3687 { 3688 unsigned long flags; 3689 3690 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3691 3692 __skb_queue_head(&dev->txq_pend, skb); 3693 3694 dev->tx_pend_data_len += skb->len; 3695 *tx_pend_data_len = dev->tx_pend_data_len; 3696 3697 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3698 } 3699 3700 static void lan78xx_tx_pend_skb_get(struct lan78xx_net *dev, 3701 struct sk_buff **skb, 3702 unsigned int *tx_pend_data_len) 3703 { 3704 unsigned long flags; 3705 3706 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3707 3708 *skb = __skb_dequeue(&dev->txq_pend); 3709 if (*skb) 3710 dev->tx_pend_data_len -= (*skb)->len; 3711 *tx_pend_data_len = dev->tx_pend_data_len; 3712 3713 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3714 } 3715 3716 static netdev_tx_t 3717 lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net) 3718 { 3719 struct lan78xx_net *dev = netdev_priv(net); 3720 unsigned int tx_pend_data_len; 3721 3722 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) 3723 schedule_delayed_work(&dev->wq, 0); 3724 3725 skb_tx_timestamp(skb); 3726 3727 lan78xx_tx_pend_skb_add(dev, skb, &tx_pend_data_len); 3728 3729 /* Set up a Tx URB if none is in progress */ 3730 3731 if (skb_queue_empty(&dev->txq)) 3732 napi_schedule(&dev->napi); 3733 3734 /* Stop stack Tx queue if we have enough data to fill 3735 * all the free Tx URBs. 3736 */ 3737 if (tx_pend_data_len > lan78xx_tx_urb_space(dev)) { 3738 netif_stop_queue(net); 3739 3740 netif_dbg(dev, hw, dev->net, "tx data len: %u, urb space %u", 3741 tx_pend_data_len, lan78xx_tx_urb_space(dev)); 3742 3743 /* Kick off transmission of pending data */ 3744 3745 if (!skb_queue_empty(&dev->txq_free)) 3746 napi_schedule(&dev->napi); 3747 } 3748 3749 return NETDEV_TX_OK; 3750 } 3751 3752 static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf) 3753 { 3754 struct lan78xx_priv *pdata = NULL; 3755 int ret; 3756 int i; 3757 3758 dev->data[0] = (unsigned long) kzalloc_obj(*pdata); 3759 3760 pdata = (struct lan78xx_priv *)(dev->data[0]); 3761 if (!pdata) { 3762 netdev_warn(dev->net, "Unable to allocate lan78xx_priv"); 3763 return -ENOMEM; 3764 } 3765 3766 pdata->dev = dev; 3767 3768 spin_lock_init(&pdata->rfe_ctl_lock); 3769 mutex_init(&pdata->dataport_mutex); 3770 3771 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write); 3772 3773 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++) 3774 pdata->vlan_table[i] = 0; 3775 3776 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write); 3777 3778 dev->net->features = 0; 3779 3780 if (DEFAULT_TX_CSUM_ENABLE) 3781 dev->net->features |= NETIF_F_HW_CSUM; 3782 3783 if (DEFAULT_RX_CSUM_ENABLE) 3784 dev->net->features |= NETIF_F_RXCSUM; 3785 3786 if (DEFAULT_TSO_CSUM_ENABLE) 3787 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG; 3788 3789 if (DEFAULT_VLAN_RX_OFFLOAD) 3790 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX; 3791 3792 if (DEFAULT_VLAN_FILTER_ENABLE) 3793 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3794 3795 dev->net->hw_features = dev->net->features; 3796 3797 ret = lan78xx_setup_irq_domain(dev); 3798 if (ret < 0) { 3799 netdev_warn(dev->net, 3800 "lan78xx_setup_irq_domain() failed : %d", ret); 3801 goto out1; 3802 } 3803 3804 /* Init all registers */ 3805 ret = lan78xx_reset(dev); 3806 if (ret) { 3807 netdev_warn(dev->net, "Registers INIT FAILED...."); 3808 goto out2; 3809 } 3810 3811 ret = lan78xx_mdio_init(dev); 3812 if (ret) { 3813 netdev_warn(dev->net, "MDIO INIT FAILED....."); 3814 goto out2; 3815 } 3816 3817 dev->net->flags |= IFF_MULTICAST; 3818 3819 pdata->wol = WAKE_MAGIC; 3820 3821 return ret; 3822 3823 out2: 3824 lan78xx_remove_irq_domain(dev); 3825 3826 out1: 3827 netdev_warn(dev->net, "Bind routine FAILED"); 3828 cancel_work_sync(&pdata->set_multicast); 3829 cancel_work_sync(&pdata->set_vlan); 3830 kfree(pdata); 3831 return ret; 3832 } 3833 3834 static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf) 3835 { 3836 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3837 3838 lan78xx_remove_irq_domain(dev); 3839 3840 lan78xx_remove_mdio(dev); 3841 3842 if (pdata) { 3843 cancel_work_sync(&pdata->set_multicast); 3844 cancel_work_sync(&pdata->set_vlan); 3845 netif_dbg(dev, ifdown, dev->net, "free pdata"); 3846 kfree(pdata); 3847 pdata = NULL; 3848 dev->data[0] = 0; 3849 } 3850 } 3851 3852 static void lan78xx_rx_csum_offload(struct lan78xx_net *dev, 3853 struct sk_buff *skb, 3854 u32 rx_cmd_a, u32 rx_cmd_b) 3855 { 3856 /* HW Checksum offload appears to be flawed if used when not stripping 3857 * VLAN headers. Drop back to S/W checksums under these conditions. 3858 */ 3859 if (!(dev->net->features & NETIF_F_RXCSUM) || 3860 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) || 3861 unlikely(rx_cmd_a & RX_CMD_A_CSE_MASK_) || 3862 ((rx_cmd_a & RX_CMD_A_FVTG_) && 3863 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) { 3864 skb->ip_summed = CHECKSUM_NONE; 3865 } else { 3866 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_)); 3867 skb->ip_summed = CHECKSUM_COMPLETE; 3868 } 3869 } 3870 3871 static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev, 3872 struct sk_buff *skb, 3873 u32 rx_cmd_a, u32 rx_cmd_b) 3874 { 3875 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) && 3876 (rx_cmd_a & RX_CMD_A_FVTG_)) 3877 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 3878 (rx_cmd_b & 0xffff)); 3879 } 3880 3881 static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb) 3882 { 3883 dev->net->stats.rx_packets++; 3884 dev->net->stats.rx_bytes += skb->len; 3885 3886 skb->protocol = eth_type_trans(skb, dev->net); 3887 3888 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n", 3889 skb->len + sizeof(struct ethhdr), skb->protocol); 3890 memset(skb->cb, 0, sizeof(struct skb_data)); 3891 3892 if (skb_defer_rx_timestamp(skb)) 3893 return; 3894 3895 napi_gro_receive(&dev->napi, skb); 3896 } 3897 3898 static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb, 3899 int budget, int *work_done) 3900 { 3901 if (skb->len < RX_SKB_MIN_LEN) 3902 return 0; 3903 3904 /* Extract frames from the URB buffer and pass each one to 3905 * the stack in a new NAPI SKB. 3906 */ 3907 while (skb->len > 0) { 3908 u32 rx_cmd_a, rx_cmd_b, align_count, size; 3909 u16 rx_cmd_c; 3910 unsigned char *packet; 3911 3912 rx_cmd_a = get_unaligned_le32(skb->data); 3913 skb_pull(skb, sizeof(rx_cmd_a)); 3914 3915 rx_cmd_b = get_unaligned_le32(skb->data); 3916 skb_pull(skb, sizeof(rx_cmd_b)); 3917 3918 rx_cmd_c = get_unaligned_le16(skb->data); 3919 skb_pull(skb, sizeof(rx_cmd_c)); 3920 3921 packet = skb->data; 3922 3923 /* get the packet length */ 3924 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 3925 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; 3926 3927 if (unlikely(size > skb->len)) { 3928 netif_dbg(dev, rx_err, dev->net, 3929 "size err rx_cmd_a=0x%08x\n", 3930 rx_cmd_a); 3931 return 0; 3932 } 3933 3934 if (unlikely(rx_cmd_a & RX_CMD_A_RED_) && 3935 (rx_cmd_a & RX_CMD_A_RX_HARD_ERRS_MASK_)) { 3936 netif_dbg(dev, rx_err, dev->net, 3937 "Error rx_cmd_a=0x%08x", rx_cmd_a); 3938 } else { 3939 u32 frame_len; 3940 struct sk_buff *skb2; 3941 3942 if (unlikely(size < ETH_FCS_LEN)) { 3943 netif_dbg(dev, rx_err, dev->net, 3944 "size err rx_cmd_a=0x%08x\n", 3945 rx_cmd_a); 3946 return 0; 3947 } 3948 3949 frame_len = size - ETH_FCS_LEN; 3950 3951 skb2 = napi_alloc_skb(&dev->napi, frame_len); 3952 if (!skb2) 3953 return 0; 3954 3955 memcpy(skb2->data, packet, frame_len); 3956 3957 skb_put(skb2, frame_len); 3958 3959 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3960 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3961 3962 /* Processing of the URB buffer must complete once 3963 * it has started. If the NAPI work budget is exhausted 3964 * while frames remain they are added to the overflow 3965 * queue for delivery in the next NAPI polling cycle. 3966 */ 3967 if (*work_done < budget) { 3968 lan78xx_skb_return(dev, skb2); 3969 ++(*work_done); 3970 } else { 3971 skb_queue_tail(&dev->rxq_overflow, skb2); 3972 } 3973 } 3974 3975 skb_pull(skb, size); 3976 3977 /* skip padding bytes before the next frame starts */ 3978 if (skb->len) 3979 skb_pull(skb, align_count); 3980 } 3981 3982 return 1; 3983 } 3984 3985 static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb, 3986 int budget, int *work_done) 3987 { 3988 if (!lan78xx_rx(dev, skb, budget, work_done)) { 3989 netif_dbg(dev, rx_err, dev->net, "drop\n"); 3990 dev->net->stats.rx_errors++; 3991 } 3992 } 3993 3994 static void rx_complete(struct urb *urb) 3995 { 3996 struct sk_buff *skb = (struct sk_buff *)urb->context; 3997 struct skb_data *entry = (struct skb_data *)skb->cb; 3998 struct lan78xx_net *dev = entry->dev; 3999 int urb_status = urb->status; 4000 enum skb_state state; 4001 4002 netif_dbg(dev, rx_status, dev->net, 4003 "rx done: status %d", urb->status); 4004 4005 skb_put(skb, urb->actual_length); 4006 state = rx_done; 4007 4008 if (urb != entry->urb) 4009 netif_warn(dev, rx_err, dev->net, "URB pointer mismatch"); 4010 4011 switch (urb_status) { 4012 case 0: 4013 if (skb->len < RX_SKB_MIN_LEN) { 4014 state = rx_cleanup; 4015 dev->net->stats.rx_errors++; 4016 dev->net->stats.rx_length_errors++; 4017 netif_dbg(dev, rx_err, dev->net, 4018 "rx length %d\n", skb->len); 4019 } 4020 usb_mark_last_busy(dev->udev); 4021 break; 4022 case -EPIPE: 4023 dev->net->stats.rx_errors++; 4024 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 4025 fallthrough; 4026 case -ECONNRESET: /* async unlink */ 4027 case -ESHUTDOWN: /* hardware gone */ 4028 netif_dbg(dev, ifdown, dev->net, 4029 "rx shutdown, code %d\n", urb_status); 4030 state = rx_cleanup; 4031 break; 4032 case -EPROTO: 4033 case -ETIME: 4034 case -EILSEQ: 4035 dev->net->stats.rx_errors++; 4036 state = rx_cleanup; 4037 break; 4038 4039 /* data overrun ... flush fifo? */ 4040 case -EOVERFLOW: 4041 dev->net->stats.rx_over_errors++; 4042 fallthrough; 4043 4044 default: 4045 state = rx_cleanup; 4046 dev->net->stats.rx_errors++; 4047 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status); 4048 break; 4049 } 4050 4051 state = defer_bh(dev, skb, &dev->rxq, state); 4052 } 4053 4054 static int rx_submit(struct lan78xx_net *dev, struct sk_buff *skb, gfp_t flags) 4055 { 4056 struct skb_data *entry = (struct skb_data *)skb->cb; 4057 size_t size = dev->rx_urb_size; 4058 struct urb *urb = entry->urb; 4059 unsigned long lockflags; 4060 int ret = 0; 4061 4062 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in, 4063 skb->data, size, rx_complete, skb); 4064 4065 spin_lock_irqsave(&dev->rxq.lock, lockflags); 4066 4067 if (netif_device_present(dev->net) && 4068 netif_running(dev->net) && 4069 !test_bit(EVENT_RX_HALT, &dev->flags) && 4070 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4071 ret = usb_submit_urb(urb, flags); 4072 switch (ret) { 4073 case 0: 4074 lan78xx_queue_skb(&dev->rxq, skb, rx_start); 4075 break; 4076 case -EPIPE: 4077 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 4078 break; 4079 case -ENODEV: 4080 case -ENOENT: 4081 netif_dbg(dev, ifdown, dev->net, "device gone\n"); 4082 netif_device_detach(dev->net); 4083 break; 4084 case -EHOSTUNREACH: 4085 ret = -ENOLINK; 4086 napi_schedule(&dev->napi); 4087 break; 4088 default: 4089 netif_dbg(dev, rx_err, dev->net, 4090 "rx submit, %d\n", ret); 4091 napi_schedule(&dev->napi); 4092 break; 4093 } 4094 } else { 4095 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n"); 4096 ret = -ENOLINK; 4097 } 4098 spin_unlock_irqrestore(&dev->rxq.lock, lockflags); 4099 4100 if (ret) 4101 lan78xx_release_rx_buf(dev, skb); 4102 4103 return ret; 4104 } 4105 4106 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev) 4107 { 4108 struct sk_buff *rx_buf; 4109 4110 /* Ensure the maximum number of Rx URBs is submitted 4111 */ 4112 while ((rx_buf = lan78xx_get_rx_buf(dev)) != NULL) { 4113 if (rx_submit(dev, rx_buf, GFP_ATOMIC) != 0) 4114 break; 4115 } 4116 } 4117 4118 static void lan78xx_rx_urb_resubmit(struct lan78xx_net *dev, 4119 struct sk_buff *rx_buf) 4120 { 4121 /* reset SKB data pointers */ 4122 4123 rx_buf->data = rx_buf->head; 4124 skb_reset_tail_pointer(rx_buf); 4125 rx_buf->len = 0; 4126 rx_buf->data_len = 0; 4127 4128 rx_submit(dev, rx_buf, GFP_ATOMIC); 4129 } 4130 4131 static void lan78xx_fill_tx_cmd_words(struct sk_buff *skb, u8 *buffer) 4132 { 4133 u32 tx_cmd_a; 4134 u32 tx_cmd_b; 4135 4136 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_; 4137 4138 if (skb->ip_summed == CHECKSUM_PARTIAL) 4139 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_; 4140 4141 tx_cmd_b = 0; 4142 if (skb_is_gso(skb)) { 4143 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_); 4144 4145 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_; 4146 4147 tx_cmd_a |= TX_CMD_A_LSO_; 4148 } 4149 4150 if (skb_vlan_tag_present(skb)) { 4151 tx_cmd_a |= TX_CMD_A_IVTG_; 4152 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_; 4153 } 4154 4155 put_unaligned_le32(tx_cmd_a, buffer); 4156 put_unaligned_le32(tx_cmd_b, buffer + 4); 4157 } 4158 4159 static struct skb_data *lan78xx_tx_buf_fill(struct lan78xx_net *dev, 4160 struct sk_buff *tx_buf) 4161 { 4162 struct skb_data *entry = (struct skb_data *)tx_buf->cb; 4163 int remain = dev->tx_urb_size; 4164 u8 *tx_data = tx_buf->data; 4165 u32 urb_len = 0; 4166 4167 entry->num_of_packet = 0; 4168 entry->length = 0; 4169 4170 /* Work through the pending SKBs and copy the data of each SKB into 4171 * the URB buffer if there room for all the SKB data. 4172 * 4173 * There must be at least DST+SRC+TYPE in the SKB (with padding enabled) 4174 */ 4175 while (remain >= TX_SKB_MIN_LEN) { 4176 unsigned int pending_bytes; 4177 unsigned int align_bytes; 4178 struct sk_buff *skb; 4179 unsigned int len; 4180 4181 lan78xx_tx_pend_skb_get(dev, &skb, &pending_bytes); 4182 4183 if (!skb) 4184 break; 4185 4186 align_bytes = (TX_ALIGNMENT - (urb_len % TX_ALIGNMENT)) % 4187 TX_ALIGNMENT; 4188 len = align_bytes + TX_CMD_LEN + skb->len; 4189 if (len > remain) { 4190 lan78xx_tx_pend_skb_head_add(dev, skb, &pending_bytes); 4191 break; 4192 } 4193 4194 tx_data += align_bytes; 4195 4196 lan78xx_fill_tx_cmd_words(skb, tx_data); 4197 tx_data += TX_CMD_LEN; 4198 4199 len = skb->len; 4200 if (skb_copy_bits(skb, 0, tx_data, len) < 0) { 4201 struct net_device_stats *stats = &dev->net->stats; 4202 4203 stats->tx_dropped++; 4204 dev_kfree_skb_any(skb); 4205 tx_data -= TX_CMD_LEN; 4206 continue; 4207 } 4208 4209 tx_data += len; 4210 entry->length += max_t(unsigned int, len, ETH_ZLEN); 4211 entry->num_of_packet += skb_shinfo(skb)->gso_segs ?: 1; 4212 4213 dev_kfree_skb_any(skb); 4214 4215 urb_len = (u32)(tx_data - (u8 *)tx_buf->data); 4216 4217 remain = dev->tx_urb_size - urb_len; 4218 } 4219 4220 skb_put(tx_buf, urb_len); 4221 4222 return entry; 4223 } 4224 4225 static void lan78xx_tx_bh(struct lan78xx_net *dev) 4226 { 4227 int ret; 4228 4229 /* Start the stack Tx queue if it was stopped 4230 */ 4231 netif_tx_lock(dev->net); 4232 if (netif_queue_stopped(dev->net)) { 4233 if (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev)) 4234 netif_wake_queue(dev->net); 4235 } 4236 netif_tx_unlock(dev->net); 4237 4238 /* Go through the Tx pending queue and set up URBs to transfer 4239 * the data to the device. Stop if no more pending data or URBs, 4240 * or if an error occurs when a URB is submitted. 4241 */ 4242 do { 4243 struct skb_data *entry; 4244 struct sk_buff *tx_buf; 4245 unsigned long flags; 4246 4247 if (skb_queue_empty(&dev->txq_pend)) 4248 break; 4249 4250 tx_buf = lan78xx_get_tx_buf(dev); 4251 if (!tx_buf) 4252 break; 4253 4254 entry = lan78xx_tx_buf_fill(dev, tx_buf); 4255 4256 spin_lock_irqsave(&dev->txq.lock, flags); 4257 ret = usb_autopm_get_interface_async(dev->intf); 4258 if (ret < 0) { 4259 spin_unlock_irqrestore(&dev->txq.lock, flags); 4260 goto out; 4261 } 4262 4263 usb_fill_bulk_urb(entry->urb, dev->udev, dev->pipe_out, 4264 tx_buf->data, tx_buf->len, tx_complete, 4265 tx_buf); 4266 4267 if (tx_buf->len % dev->maxpacket == 0) { 4268 /* send USB_ZERO_PACKET */ 4269 entry->urb->transfer_flags |= URB_ZERO_PACKET; 4270 } 4271 4272 #ifdef CONFIG_PM 4273 /* if device is asleep stop outgoing packet processing */ 4274 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4275 usb_anchor_urb(entry->urb, &dev->deferred); 4276 netif_stop_queue(dev->net); 4277 spin_unlock_irqrestore(&dev->txq.lock, flags); 4278 netdev_dbg(dev->net, 4279 "Delaying transmission for resumption\n"); 4280 return; 4281 } 4282 #endif 4283 ret = usb_submit_urb(entry->urb, GFP_ATOMIC); 4284 switch (ret) { 4285 case 0: 4286 netif_trans_update(dev->net); 4287 lan78xx_queue_skb(&dev->txq, tx_buf, tx_start); 4288 break; 4289 case -EPIPE: 4290 netif_stop_queue(dev->net); 4291 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 4292 usb_autopm_put_interface_async(dev->intf); 4293 break; 4294 case -ENODEV: 4295 case -ENOENT: 4296 netif_dbg(dev, tx_err, dev->net, 4297 "tx submit urb err %d (disconnected?)", ret); 4298 netif_device_detach(dev->net); 4299 break; 4300 default: 4301 usb_autopm_put_interface_async(dev->intf); 4302 netif_dbg(dev, tx_err, dev->net, 4303 "tx submit urb err %d\n", ret); 4304 break; 4305 } 4306 4307 spin_unlock_irqrestore(&dev->txq.lock, flags); 4308 4309 if (ret) { 4310 netdev_warn(dev->net, "failed to tx urb %d\n", ret); 4311 out: 4312 dev->net->stats.tx_dropped += entry->num_of_packet; 4313 lan78xx_release_tx_buf(dev, tx_buf); 4314 } 4315 } while (ret == 0); 4316 } 4317 4318 static int lan78xx_bh(struct lan78xx_net *dev, int budget) 4319 { 4320 struct sk_buff_head done; 4321 struct sk_buff *rx_buf; 4322 struct skb_data *entry; 4323 unsigned long flags; 4324 int work_done = 0; 4325 4326 /* Pass frames received in the last NAPI cycle before 4327 * working on newly completed URBs. 4328 */ 4329 while (!skb_queue_empty(&dev->rxq_overflow)) { 4330 lan78xx_skb_return(dev, skb_dequeue(&dev->rxq_overflow)); 4331 ++work_done; 4332 } 4333 4334 /* Take a snapshot of the done queue and move items to a 4335 * temporary queue. Rx URB completions will continue to add 4336 * to the done queue. 4337 */ 4338 __skb_queue_head_init(&done); 4339 4340 spin_lock_irqsave(&dev->rxq_done.lock, flags); 4341 skb_queue_splice_init(&dev->rxq_done, &done); 4342 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 4343 4344 /* Extract receive frames from completed URBs and 4345 * pass them to the stack. Re-submit each completed URB. 4346 */ 4347 while ((work_done < budget) && 4348 (rx_buf = __skb_dequeue(&done))) { 4349 entry = (struct skb_data *)(rx_buf->cb); 4350 switch (entry->state) { 4351 case rx_done: 4352 rx_process(dev, rx_buf, budget, &work_done); 4353 break; 4354 case rx_cleanup: 4355 break; 4356 default: 4357 netdev_dbg(dev->net, "rx buf state %d\n", 4358 entry->state); 4359 break; 4360 } 4361 4362 lan78xx_rx_urb_resubmit(dev, rx_buf); 4363 } 4364 4365 /* If budget was consumed before processing all the URBs put them 4366 * back on the front of the done queue. They will be first to be 4367 * processed in the next NAPI cycle. 4368 */ 4369 spin_lock_irqsave(&dev->rxq_done.lock, flags); 4370 skb_queue_splice(&done, &dev->rxq_done); 4371 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 4372 4373 if (netif_device_present(dev->net) && netif_running(dev->net)) { 4374 /* reset update timer delta */ 4375 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) { 4376 dev->delta = 1; 4377 mod_timer(&dev->stat_monitor, 4378 jiffies + STAT_UPDATE_TIMER); 4379 } 4380 4381 /* Submit all free Rx URBs */ 4382 4383 if (!test_bit(EVENT_RX_HALT, &dev->flags)) 4384 lan78xx_rx_urb_submit_all(dev); 4385 4386 /* Submit new Tx URBs */ 4387 4388 lan78xx_tx_bh(dev); 4389 } 4390 4391 return work_done; 4392 } 4393 4394 static int lan78xx_poll(struct napi_struct *napi, int budget) 4395 { 4396 struct lan78xx_net *dev = container_of(napi, struct lan78xx_net, napi); 4397 int result = budget; 4398 int work_done; 4399 4400 /* Don't do any work if the device is suspended */ 4401 4402 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4403 napi_complete_done(napi, 0); 4404 return 0; 4405 } 4406 4407 /* Process completed URBs and submit new URBs */ 4408 4409 work_done = lan78xx_bh(dev, budget); 4410 4411 if (work_done < budget) { 4412 napi_complete_done(napi, work_done); 4413 4414 /* Start a new polling cycle if data was received or 4415 * data is waiting to be transmitted. 4416 */ 4417 if (!skb_queue_empty(&dev->rxq_done)) { 4418 napi_schedule(napi); 4419 } else if (netif_carrier_ok(dev->net)) { 4420 if (skb_queue_empty(&dev->txq) && 4421 !skb_queue_empty(&dev->txq_pend)) { 4422 napi_schedule(napi); 4423 } else { 4424 netif_tx_lock(dev->net); 4425 if (netif_queue_stopped(dev->net)) { 4426 netif_wake_queue(dev->net); 4427 napi_schedule(napi); 4428 } 4429 netif_tx_unlock(dev->net); 4430 } 4431 } 4432 result = work_done; 4433 } 4434 4435 return result; 4436 } 4437 4438 static void lan78xx_delayedwork(struct work_struct *work) 4439 { 4440 int status; 4441 struct lan78xx_net *dev; 4442 4443 dev = container_of(work, struct lan78xx_net, wq.work); 4444 4445 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 4446 return; 4447 4448 if (usb_autopm_get_interface(dev->intf) < 0) 4449 return; 4450 4451 if (test_bit(EVENT_TX_HALT, &dev->flags)) { 4452 unlink_urbs(dev, &dev->txq); 4453 4454 status = usb_clear_halt(dev->udev, dev->pipe_out); 4455 if (status < 0 && 4456 status != -EPIPE && 4457 status != -ESHUTDOWN) { 4458 if (netif_msg_tx_err(dev)) 4459 netdev_err(dev->net, 4460 "can't clear tx halt, status %d\n", 4461 status); 4462 } else { 4463 clear_bit(EVENT_TX_HALT, &dev->flags); 4464 if (status != -ESHUTDOWN) 4465 netif_wake_queue(dev->net); 4466 } 4467 } 4468 4469 if (test_bit(EVENT_RX_HALT, &dev->flags)) { 4470 unlink_urbs(dev, &dev->rxq); 4471 status = usb_clear_halt(dev->udev, dev->pipe_in); 4472 if (status < 0 && 4473 status != -EPIPE && 4474 status != -ESHUTDOWN) { 4475 if (netif_msg_rx_err(dev)) 4476 netdev_err(dev->net, 4477 "can't clear rx halt, status %d\n", 4478 status); 4479 } else { 4480 clear_bit(EVENT_RX_HALT, &dev->flags); 4481 napi_schedule(&dev->napi); 4482 } 4483 } 4484 4485 if (test_bit(EVENT_PHY_INT_ACK, &dev->flags)) { 4486 int ret = 0; 4487 4488 clear_bit(EVENT_PHY_INT_ACK, &dev->flags); 4489 ret = lan78xx_phy_int_ack(dev); 4490 if (ret) 4491 netdev_info(dev->net, "PHY INT ack failed (%pe)\n", 4492 ERR_PTR(ret)); 4493 } 4494 4495 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) { 4496 lan78xx_update_stats(dev); 4497 4498 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 4499 4500 mod_timer(&dev->stat_monitor, 4501 jiffies + (STAT_UPDATE_TIMER * dev->delta)); 4502 4503 dev->delta = min((dev->delta * 2), 50); 4504 } 4505 4506 usb_autopm_put_interface(dev->intf); 4507 } 4508 4509 static void intr_complete(struct urb *urb) 4510 { 4511 struct lan78xx_net *dev = urb->context; 4512 int status = urb->status; 4513 4514 switch (status) { 4515 /* success */ 4516 case 0: 4517 lan78xx_status(dev, urb); 4518 break; 4519 4520 /* software-driven interface shutdown */ 4521 case -ENOENT: /* urb killed */ 4522 case -ENODEV: /* hardware gone */ 4523 case -ESHUTDOWN: /* hardware gone */ 4524 netif_dbg(dev, ifdown, dev->net, 4525 "intr shutdown, code %d\n", status); 4526 return; 4527 4528 /* NOTE: not throttling like RX/TX, since this endpoint 4529 * already polls infrequently 4530 */ 4531 default: 4532 netdev_dbg(dev->net, "intr status %d\n", status); 4533 break; 4534 } 4535 4536 if (!netif_device_present(dev->net) || 4537 !netif_running(dev->net)) { 4538 netdev_warn(dev->net, "not submitting new status URB"); 4539 return; 4540 } 4541 4542 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length); 4543 status = usb_submit_urb(urb, GFP_ATOMIC); 4544 4545 switch (status) { 4546 case 0: 4547 break; 4548 case -ENODEV: 4549 case -ENOENT: 4550 netif_dbg(dev, timer, dev->net, 4551 "intr resubmit %d (disconnect?)", status); 4552 netif_device_detach(dev->net); 4553 break; 4554 default: 4555 netif_err(dev, timer, dev->net, 4556 "intr resubmit --> %d\n", status); 4557 break; 4558 } 4559 } 4560 4561 static void lan78xx_disconnect(struct usb_interface *intf) 4562 { 4563 struct lan78xx_net *dev; 4564 struct net_device *net; 4565 4566 dev = usb_get_intfdata(intf); 4567 usb_set_intfdata(intf, NULL); 4568 if (!dev) 4569 return; 4570 4571 net = dev->net; 4572 4573 rtnl_lock(); 4574 phylink_stop(dev->phylink); 4575 phylink_disconnect_phy(dev->phylink); 4576 rtnl_unlock(); 4577 4578 unregister_netdev(net); 4579 4580 timer_shutdown_sync(&dev->stat_monitor); 4581 set_bit(EVENT_DEV_DISCONNECT, &dev->flags); 4582 cancel_delayed_work_sync(&dev->wq); 4583 4584 phylink_destroy(dev->phylink); 4585 4586 usb_scuttle_anchored_urbs(&dev->deferred); 4587 4588 lan78xx_unbind(dev, intf); 4589 4590 lan78xx_free_tx_resources(dev); 4591 lan78xx_free_rx_resources(dev); 4592 4593 usb_kill_urb(dev->urb_intr); 4594 usb_free_urb(dev->urb_intr); 4595 4596 free_netdev(net); 4597 } 4598 4599 static void lan78xx_tx_timeout(struct net_device *net, unsigned int txqueue) 4600 { 4601 struct lan78xx_net *dev = netdev_priv(net); 4602 4603 unlink_urbs(dev, &dev->txq); 4604 napi_schedule(&dev->napi); 4605 } 4606 4607 static netdev_features_t lan78xx_features_check(struct sk_buff *skb, 4608 struct net_device *netdev, 4609 netdev_features_t features) 4610 { 4611 struct lan78xx_net *dev = netdev_priv(netdev); 4612 4613 if (skb->len > LAN78XX_TSO_SIZE(dev)) 4614 features &= ~NETIF_F_GSO_MASK; 4615 4616 features = vlan_features_check(skb, features); 4617 features = vxlan_features_check(skb, features); 4618 4619 return features; 4620 } 4621 4622 static const struct net_device_ops lan78xx_netdev_ops = { 4623 .ndo_open = lan78xx_open, 4624 .ndo_stop = lan78xx_stop, 4625 .ndo_start_xmit = lan78xx_start_xmit, 4626 .ndo_tx_timeout = lan78xx_tx_timeout, 4627 .ndo_change_mtu = lan78xx_change_mtu, 4628 .ndo_set_mac_address = lan78xx_set_mac_addr, 4629 .ndo_validate_addr = eth_validate_addr, 4630 .ndo_eth_ioctl = phy_do_ioctl_running, 4631 .ndo_set_rx_mode = lan78xx_set_multicast, 4632 .ndo_set_features = lan78xx_set_features, 4633 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid, 4634 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid, 4635 .ndo_features_check = lan78xx_features_check, 4636 }; 4637 4638 static void lan78xx_stat_monitor(struct timer_list *t) 4639 { 4640 struct lan78xx_net *dev = timer_container_of(dev, t, stat_monitor); 4641 4642 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE); 4643 } 4644 4645 static int lan78xx_probe(struct usb_interface *intf, 4646 const struct usb_device_id *id) 4647 { 4648 struct usb_host_endpoint *ep_blkin, *ep_blkout, *ep_intr; 4649 struct lan78xx_net *dev; 4650 struct net_device *netdev; 4651 struct usb_device *udev; 4652 int ret; 4653 unsigned int maxp; 4654 unsigned int period; 4655 u8 *buf = NULL; 4656 4657 udev = interface_to_usbdev(intf); 4658 4659 netdev = alloc_etherdev(sizeof(struct lan78xx_net)); 4660 if (!netdev) { 4661 dev_err(&intf->dev, "Error: OOM\n"); 4662 return -ENOMEM; 4663 } 4664 4665 SET_NETDEV_DEV(netdev, &intf->dev); 4666 4667 dev = netdev_priv(netdev); 4668 dev->udev = udev; 4669 dev->intf = intf; 4670 dev->net = netdev; 4671 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV 4672 | NETIF_MSG_PROBE | NETIF_MSG_LINK); 4673 4674 skb_queue_head_init(&dev->rxq); 4675 skb_queue_head_init(&dev->txq); 4676 skb_queue_head_init(&dev->rxq_done); 4677 skb_queue_head_init(&dev->txq_pend); 4678 skb_queue_head_init(&dev->rxq_overflow); 4679 mutex_init(&dev->mdiobus_mutex); 4680 mutex_init(&dev->dev_mutex); 4681 4682 ret = lan78xx_urb_config_init(dev); 4683 if (ret < 0) 4684 goto out2; 4685 4686 ret = lan78xx_alloc_tx_resources(dev); 4687 if (ret < 0) 4688 goto out2; 4689 4690 ret = lan78xx_alloc_rx_resources(dev); 4691 if (ret < 0) 4692 goto out3; 4693 4694 /* MTU range: 68 - 9000 */ 4695 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE; 4696 4697 netif_set_tso_max_size(netdev, LAN78XX_TSO_SIZE(dev)); 4698 4699 netif_napi_add(netdev, &dev->napi, lan78xx_poll); 4700 4701 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork); 4702 init_usb_anchor(&dev->deferred); 4703 4704 netdev->netdev_ops = &lan78xx_netdev_ops; 4705 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES; 4706 netdev->ethtool_ops = &lan78xx_ethtool_ops; 4707 4708 dev->delta = 1; 4709 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0); 4710 4711 mutex_init(&dev->stats.access_lock); 4712 4713 if (intf->cur_altsetting->desc.bNumEndpoints < 3) { 4714 ret = -ENODEV; 4715 goto out4; 4716 } 4717 4718 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE); 4719 ep_blkin = usb_pipe_endpoint(udev, dev->pipe_in); 4720 if (!ep_blkin || !usb_endpoint_is_bulk_in(&ep_blkin->desc)) { 4721 ret = -ENODEV; 4722 goto out4; 4723 } 4724 4725 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE); 4726 ep_blkout = usb_pipe_endpoint(udev, dev->pipe_out); 4727 if (!ep_blkout || !usb_endpoint_is_bulk_out(&ep_blkout->desc)) { 4728 ret = -ENODEV; 4729 goto out4; 4730 } 4731 4732 ep_intr = &intf->cur_altsetting->endpoint[2]; 4733 if (!usb_endpoint_is_int_in(&ep_intr->desc)) { 4734 ret = -ENODEV; 4735 goto out4; 4736 } 4737 4738 dev->pipe_intr = usb_rcvintpipe(dev->udev, 4739 usb_endpoint_num(&ep_intr->desc)); 4740 4741 ret = lan78xx_bind(dev, intf); 4742 if (ret < 0) 4743 goto out4; 4744 4745 period = ep_intr->desc.bInterval; 4746 maxp = usb_maxpacket(dev->udev, dev->pipe_intr); 4747 4748 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL); 4749 if (!dev->urb_intr) { 4750 ret = -ENOMEM; 4751 goto out5; 4752 } 4753 4754 buf = kmalloc(maxp, GFP_KERNEL); 4755 if (!buf) { 4756 ret = -ENOMEM; 4757 goto free_urbs; 4758 } 4759 4760 usb_fill_int_urb(dev->urb_intr, dev->udev, 4761 dev->pipe_intr, buf, maxp, 4762 intr_complete, dev, period); 4763 dev->urb_intr->transfer_flags |= URB_FREE_BUFFER; 4764 4765 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out); 4766 4767 /* Reject broken descriptors. */ 4768 if (dev->maxpacket == 0) { 4769 ret = -ENODEV; 4770 goto free_urbs; 4771 } 4772 4773 /* driver requires remote-wakeup capability during autosuspend. */ 4774 intf->needs_remote_wakeup = 1; 4775 4776 ret = lan78xx_phy_init(dev); 4777 if (ret < 0) 4778 goto free_urbs; 4779 4780 ret = register_netdev(netdev); 4781 if (ret != 0) { 4782 netif_err(dev, probe, netdev, "couldn't register the device\n"); 4783 goto phy_uninit; 4784 } 4785 4786 usb_set_intfdata(intf, dev); 4787 4788 ret = device_set_wakeup_enable(&udev->dev, true); 4789 4790 /* Default delay of 2sec has more overhead than advantage. 4791 * Set to 10sec as default. 4792 */ 4793 pm_runtime_set_autosuspend_delay(&udev->dev, 4794 DEFAULT_AUTOSUSPEND_DELAY); 4795 4796 return 0; 4797 4798 phy_uninit: 4799 lan78xx_phy_uninit(dev); 4800 free_urbs: 4801 usb_free_urb(dev->urb_intr); 4802 out5: 4803 lan78xx_unbind(dev, intf); 4804 out4: 4805 netif_napi_del(&dev->napi); 4806 lan78xx_free_rx_resources(dev); 4807 out3: 4808 lan78xx_free_tx_resources(dev); 4809 out2: 4810 free_netdev(netdev); 4811 4812 return ret; 4813 } 4814 4815 static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len) 4816 { 4817 const u16 crc16poly = 0x8005; 4818 int i; 4819 u16 bit, crc, msb; 4820 u8 data; 4821 4822 crc = 0xFFFF; 4823 for (i = 0; i < len; i++) { 4824 data = *buf++; 4825 for (bit = 0; bit < 8; bit++) { 4826 msb = crc >> 15; 4827 crc <<= 1; 4828 4829 if (msb ^ (u16)(data & 1)) { 4830 crc ^= crc16poly; 4831 crc |= (u16)0x0001U; 4832 } 4833 data >>= 1; 4834 } 4835 } 4836 4837 return crc; 4838 } 4839 4840 static int lan78xx_set_auto_suspend(struct lan78xx_net *dev) 4841 { 4842 u32 buf; 4843 int ret; 4844 4845 ret = lan78xx_stop_tx_path(dev); 4846 if (ret < 0) 4847 return ret; 4848 4849 ret = lan78xx_stop_rx_path(dev); 4850 if (ret < 0) 4851 return ret; 4852 4853 /* auto suspend (selective suspend) */ 4854 4855 ret = lan78xx_write_reg(dev, WUCSR, 0); 4856 if (ret < 0) 4857 return ret; 4858 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4859 if (ret < 0) 4860 return ret; 4861 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4862 if (ret < 0) 4863 return ret; 4864 4865 /* set goodframe wakeup */ 4866 4867 ret = lan78xx_read_reg(dev, WUCSR, &buf); 4868 if (ret < 0) 4869 return ret; 4870 4871 buf |= WUCSR_RFE_WAKE_EN_; 4872 buf |= WUCSR_STORE_WAKE_; 4873 4874 ret = lan78xx_write_reg(dev, WUCSR, buf); 4875 if (ret < 0) 4876 return ret; 4877 4878 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4879 if (ret < 0) 4880 return ret; 4881 4882 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 4883 buf |= PMT_CTL_RES_CLR_WKP_STS_; 4884 buf |= PMT_CTL_PHY_WAKE_EN_; 4885 buf |= PMT_CTL_WOL_EN_; 4886 buf &= ~PMT_CTL_SUS_MODE_MASK_; 4887 buf |= PMT_CTL_SUS_MODE_3_; 4888 4889 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4890 if (ret < 0) 4891 return ret; 4892 4893 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4894 if (ret < 0) 4895 return ret; 4896 4897 buf |= PMT_CTL_WUPS_MASK_; 4898 4899 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4900 if (ret < 0) 4901 return ret; 4902 4903 ret = lan78xx_start_rx_path(dev); 4904 4905 return ret; 4906 } 4907 4908 static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol) 4909 { 4910 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 4911 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 4912 const u8 arp_type[2] = { 0x08, 0x06 }; 4913 u32 temp_pmt_ctl; 4914 int mask_index; 4915 u32 temp_wucsr; 4916 u32 buf; 4917 u16 crc; 4918 int ret; 4919 4920 ret = lan78xx_stop_tx_path(dev); 4921 if (ret < 0) 4922 return ret; 4923 ret = lan78xx_stop_rx_path(dev); 4924 if (ret < 0) 4925 return ret; 4926 4927 ret = lan78xx_write_reg(dev, WUCSR, 0); 4928 if (ret < 0) 4929 return ret; 4930 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4931 if (ret < 0) 4932 return ret; 4933 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4934 if (ret < 0) 4935 return ret; 4936 4937 temp_wucsr = 0; 4938 4939 temp_pmt_ctl = 0; 4940 4941 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl); 4942 if (ret < 0) 4943 return ret; 4944 4945 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_; 4946 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_; 4947 4948 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++) { 4949 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0); 4950 if (ret < 0) 4951 return ret; 4952 } 4953 4954 mask_index = 0; 4955 if (wol & WAKE_PHY) { 4956 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_; 4957 4958 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4959 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4960 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4961 } 4962 if (wol & WAKE_MAGIC) { 4963 temp_wucsr |= WUCSR_MPEN_; 4964 4965 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4966 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4967 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_; 4968 } 4969 if (wol & WAKE_BCAST) { 4970 temp_wucsr |= WUCSR_BCST_EN_; 4971 4972 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4973 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4974 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4975 } 4976 if (wol & WAKE_MCAST) { 4977 temp_wucsr |= WUCSR_WAKE_EN_; 4978 4979 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */ 4980 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3); 4981 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 4982 WUF_CFGX_EN_ | 4983 WUF_CFGX_TYPE_MCAST_ | 4984 (0 << WUF_CFGX_OFFSET_SHIFT_) | 4985 (crc & WUF_CFGX_CRC16_MASK_)); 4986 if (ret < 0) 4987 return ret; 4988 4989 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7); 4990 if (ret < 0) 4991 return ret; 4992 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 4993 if (ret < 0) 4994 return ret; 4995 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 4996 if (ret < 0) 4997 return ret; 4998 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 4999 if (ret < 0) 5000 return ret; 5001 5002 mask_index++; 5003 5004 /* for IPv6 Multicast */ 5005 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2); 5006 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 5007 WUF_CFGX_EN_ | 5008 WUF_CFGX_TYPE_MCAST_ | 5009 (0 << WUF_CFGX_OFFSET_SHIFT_) | 5010 (crc & WUF_CFGX_CRC16_MASK_)); 5011 if (ret < 0) 5012 return ret; 5013 5014 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3); 5015 if (ret < 0) 5016 return ret; 5017 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5018 if (ret < 0) 5019 return ret; 5020 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5021 if (ret < 0) 5022 return ret; 5023 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5024 if (ret < 0) 5025 return ret; 5026 5027 mask_index++; 5028 5029 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5030 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5031 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5032 } 5033 if (wol & WAKE_UCAST) { 5034 temp_wucsr |= WUCSR_PFDA_EN_; 5035 5036 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5037 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5038 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5039 } 5040 if (wol & WAKE_ARP) { 5041 temp_wucsr |= WUCSR_WAKE_EN_; 5042 5043 /* set WUF_CFG & WUF_MASK 5044 * for packettype (offset 12,13) = ARP (0x0806) 5045 */ 5046 crc = lan78xx_wakeframe_crc16(arp_type, 2); 5047 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 5048 WUF_CFGX_EN_ | 5049 WUF_CFGX_TYPE_ALL_ | 5050 (0 << WUF_CFGX_OFFSET_SHIFT_) | 5051 (crc & WUF_CFGX_CRC16_MASK_)); 5052 if (ret < 0) 5053 return ret; 5054 5055 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000); 5056 if (ret < 0) 5057 return ret; 5058 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5059 if (ret < 0) 5060 return ret; 5061 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5062 if (ret < 0) 5063 return ret; 5064 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5065 if (ret < 0) 5066 return ret; 5067 5068 mask_index++; 5069 5070 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5071 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5072 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5073 } 5074 5075 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr); 5076 if (ret < 0) 5077 return ret; 5078 5079 /* when multiple WOL bits are set */ 5080 if (hweight_long((unsigned long)wol) > 1) { 5081 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5082 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5083 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5084 } 5085 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl); 5086 if (ret < 0) 5087 return ret; 5088 5089 /* clear WUPS */ 5090 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5091 if (ret < 0) 5092 return ret; 5093 5094 buf |= PMT_CTL_WUPS_MASK_; 5095 5096 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5097 if (ret < 0) 5098 return ret; 5099 5100 ret = lan78xx_start_rx_path(dev); 5101 5102 return ret; 5103 } 5104 5105 static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message) 5106 { 5107 struct lan78xx_net *dev = usb_get_intfdata(intf); 5108 bool dev_open; 5109 int ret; 5110 5111 mutex_lock(&dev->dev_mutex); 5112 5113 netif_dbg(dev, ifdown, dev->net, 5114 "suspending: pm event %#x", message.event); 5115 5116 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 5117 5118 if (dev_open) { 5119 spin_lock_irq(&dev->txq.lock); 5120 /* don't autosuspend while transmitting */ 5121 if ((skb_queue_len(&dev->txq) || 5122 skb_queue_len(&dev->txq_pend)) && 5123 PMSG_IS_AUTO(message)) { 5124 spin_unlock_irq(&dev->txq.lock); 5125 ret = -EBUSY; 5126 goto out; 5127 } else { 5128 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 5129 spin_unlock_irq(&dev->txq.lock); 5130 } 5131 5132 rtnl_lock(); 5133 phylink_suspend(dev->phylink, false); 5134 rtnl_unlock(); 5135 5136 /* stop RX */ 5137 ret = lan78xx_stop_rx_path(dev); 5138 if (ret < 0) 5139 goto out; 5140 5141 ret = lan78xx_flush_rx_fifo(dev); 5142 if (ret < 0) 5143 goto out; 5144 5145 /* stop Tx */ 5146 ret = lan78xx_stop_tx_path(dev); 5147 if (ret < 0) 5148 goto out; 5149 5150 /* empty out the Rx and Tx queues */ 5151 netif_device_detach(dev->net); 5152 lan78xx_terminate_urbs(dev); 5153 usb_kill_urb(dev->urb_intr); 5154 5155 /* reattach */ 5156 netif_device_attach(dev->net); 5157 5158 timer_delete(&dev->stat_monitor); 5159 5160 if (PMSG_IS_AUTO(message)) { 5161 ret = lan78xx_set_auto_suspend(dev); 5162 if (ret < 0) 5163 goto out; 5164 } else { 5165 struct lan78xx_priv *pdata; 5166 5167 pdata = (struct lan78xx_priv *)(dev->data[0]); 5168 netif_carrier_off(dev->net); 5169 ret = lan78xx_set_suspend(dev, pdata->wol); 5170 if (ret < 0) 5171 goto out; 5172 } 5173 } else { 5174 /* Interface is down; don't allow WOL and PHY 5175 * events to wake up the host 5176 */ 5177 u32 buf; 5178 5179 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 5180 5181 ret = lan78xx_write_reg(dev, WUCSR, 0); 5182 if (ret < 0) 5183 goto out; 5184 ret = lan78xx_write_reg(dev, WUCSR2, 0); 5185 if (ret < 0) 5186 goto out; 5187 5188 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5189 if (ret < 0) 5190 goto out; 5191 5192 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 5193 buf |= PMT_CTL_RES_CLR_WKP_STS_; 5194 buf &= ~PMT_CTL_SUS_MODE_MASK_; 5195 buf |= PMT_CTL_SUS_MODE_3_; 5196 5197 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5198 if (ret < 0) 5199 goto out; 5200 5201 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5202 if (ret < 0) 5203 goto out; 5204 5205 buf |= PMT_CTL_WUPS_MASK_; 5206 5207 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5208 if (ret < 0) 5209 goto out; 5210 } 5211 5212 ret = 0; 5213 out: 5214 mutex_unlock(&dev->dev_mutex); 5215 5216 return ret; 5217 } 5218 5219 static bool lan78xx_submit_deferred_urbs(struct lan78xx_net *dev) 5220 { 5221 bool pipe_halted = false; 5222 struct urb *urb; 5223 5224 while ((urb = usb_get_from_anchor(&dev->deferred))) { 5225 struct sk_buff *skb = urb->context; 5226 int ret; 5227 5228 if (!netif_device_present(dev->net) || 5229 !netif_carrier_ok(dev->net) || 5230 pipe_halted) { 5231 lan78xx_release_tx_buf(dev, skb); 5232 continue; 5233 } 5234 5235 ret = usb_submit_urb(urb, GFP_ATOMIC); 5236 5237 if (ret == 0) { 5238 netif_trans_update(dev->net); 5239 lan78xx_queue_skb(&dev->txq, skb, tx_start); 5240 } else { 5241 if (ret == -EPIPE) { 5242 netif_stop_queue(dev->net); 5243 pipe_halted = true; 5244 } else if (ret == -ENODEV) { 5245 netif_device_detach(dev->net); 5246 } 5247 5248 lan78xx_release_tx_buf(dev, skb); 5249 } 5250 } 5251 5252 return pipe_halted; 5253 } 5254 5255 static int lan78xx_resume(struct usb_interface *intf) 5256 { 5257 struct lan78xx_net *dev = usb_get_intfdata(intf); 5258 bool dev_open; 5259 int ret; 5260 5261 mutex_lock(&dev->dev_mutex); 5262 5263 netif_dbg(dev, ifup, dev->net, "resuming device"); 5264 5265 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 5266 5267 if (dev_open) { 5268 bool pipe_halted = false; 5269 5270 ret = lan78xx_flush_tx_fifo(dev); 5271 if (ret < 0) 5272 goto out; 5273 5274 if (dev->urb_intr) { 5275 int ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 5276 5277 if (ret < 0) { 5278 if (ret == -ENODEV) 5279 netif_device_detach(dev->net); 5280 netdev_warn(dev->net, "Failed to submit intr URB"); 5281 } 5282 } 5283 5284 spin_lock_irq(&dev->txq.lock); 5285 5286 if (netif_device_present(dev->net)) { 5287 pipe_halted = lan78xx_submit_deferred_urbs(dev); 5288 5289 if (pipe_halted) 5290 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 5291 } 5292 5293 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 5294 5295 spin_unlock_irq(&dev->txq.lock); 5296 5297 if (!pipe_halted && 5298 netif_device_present(dev->net) && 5299 (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev))) 5300 netif_start_queue(dev->net); 5301 5302 ret = lan78xx_start_tx_path(dev); 5303 if (ret < 0) 5304 goto out; 5305 5306 napi_schedule(&dev->napi); 5307 5308 if (!timer_pending(&dev->stat_monitor)) { 5309 dev->delta = 1; 5310 mod_timer(&dev->stat_monitor, 5311 jiffies + STAT_UPDATE_TIMER); 5312 } 5313 5314 } else { 5315 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 5316 } 5317 5318 ret = lan78xx_write_reg(dev, WUCSR2, 0); 5319 if (ret < 0) 5320 goto out; 5321 ret = lan78xx_write_reg(dev, WUCSR, 0); 5322 if (ret < 0) 5323 goto out; 5324 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 5325 if (ret < 0) 5326 goto out; 5327 5328 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ | 5329 WUCSR2_ARP_RCD_ | 5330 WUCSR2_IPV6_TCPSYN_RCD_ | 5331 WUCSR2_IPV4_TCPSYN_RCD_); 5332 if (ret < 0) 5333 goto out; 5334 5335 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ | 5336 WUCSR_EEE_RX_WAKE_ | 5337 WUCSR_PFDA_FR_ | 5338 WUCSR_RFE_WAKE_FR_ | 5339 WUCSR_WUFR_ | 5340 WUCSR_MPR_ | 5341 WUCSR_BCST_FR_); 5342 if (ret < 0) 5343 goto out; 5344 5345 ret = 0; 5346 out: 5347 mutex_unlock(&dev->dev_mutex); 5348 5349 return ret; 5350 } 5351 5352 static int lan78xx_reset_resume(struct usb_interface *intf) 5353 { 5354 struct lan78xx_net *dev = usb_get_intfdata(intf); 5355 int ret; 5356 5357 netif_dbg(dev, ifup, dev->net, "(reset) resuming device"); 5358 5359 ret = lan78xx_reset(dev); 5360 if (ret < 0) 5361 return ret; 5362 5363 ret = lan78xx_resume(intf); 5364 if (ret < 0) 5365 return ret; 5366 5367 rtnl_lock(); 5368 phylink_resume(dev->phylink); 5369 rtnl_unlock(); 5370 5371 return 0; 5372 } 5373 5374 static const struct usb_device_id products[] = { 5375 { 5376 /* LAN7800 USB Gigabit Ethernet Device */ 5377 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID), 5378 }, 5379 { 5380 /* LAN7850 USB Gigabit Ethernet Device */ 5381 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID), 5382 }, 5383 { 5384 /* LAN7801 USB Gigabit Ethernet Device */ 5385 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID), 5386 }, 5387 { 5388 /* ATM2-AF USB Gigabit Ethernet Device */ 5389 USB_DEVICE(AT29M2AF_USB_VENDOR_ID, AT29M2AF_USB_PRODUCT_ID), 5390 }, 5391 {}, 5392 }; 5393 MODULE_DEVICE_TABLE(usb, products); 5394 5395 static struct usb_driver lan78xx_driver = { 5396 .name = DRIVER_NAME, 5397 .id_table = products, 5398 .probe = lan78xx_probe, 5399 .disconnect = lan78xx_disconnect, 5400 .suspend = lan78xx_suspend, 5401 .resume = lan78xx_resume, 5402 .reset_resume = lan78xx_reset_resume, 5403 .supports_autosuspend = 1, 5404 .disable_hub_initiated_lpm = 1, 5405 }; 5406 5407 module_usb_driver(lan78xx_driver); 5408 5409 MODULE_AUTHOR(DRIVER_AUTHOR); 5410 MODULE_DESCRIPTION(DRIVER_DESC); 5411 MODULE_LICENSE("GPL"); 5412