1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 TDA10023 - DVB-C decoder
4 (as used in Philips CU1216-3 NIM and the Reelbox DVB-C tuner card)
5
6 Copyright (C) 2005 Georg Acher, BayCom GmbH (acher at baycom dot de)
7 Copyright (c) 2006 Hartmut Birr (e9hack at gmail dot com)
8
9 Remotely based on tda10021.c
10 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
11 Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
12 Support for TDA10021
13
14 */
15
16 #include <linux/delay.h>
17 #include <linux/errno.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/string.h>
22 #include <linux/slab.h>
23
24 #include <asm/div64.h>
25
26 #include <media/dvb_frontend.h>
27 #include "tda1002x.h"
28
29 #define REG0_INIT_VAL 0x23
30
31 struct tda10023_state {
32 struct i2c_adapter* i2c;
33 /* configuration settings */
34 const struct tda10023_config *config;
35 struct dvb_frontend frontend;
36
37 u8 pwm;
38 u8 reg0;
39
40 /* clock settings */
41 u32 xtal;
42 u8 pll_m;
43 u8 pll_p;
44 u8 pll_n;
45 u32 sysclk;
46 };
47
48 #define dprintk(x...)
49
50 static int verbose;
51
tda10023_readreg(struct tda10023_state * state,u8 reg)52 static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
53 {
54 u8 b0 [] = { reg };
55 u8 b1 [] = { 0 };
56 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
57 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
58 int ret;
59
60 ret = i2c_transfer (state->i2c, msg, 2);
61 if (ret != 2) {
62 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
63 printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error (reg == 0x%02x, ret == %i)\n",
64 num, __func__, reg, ret);
65 }
66 return b1[0];
67 }
68
tda10023_writereg(struct tda10023_state * state,u8 reg,u8 data)69 static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
70 {
71 u8 buf[] = { reg, data };
72 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
73 int ret;
74
75 ret = i2c_transfer (state->i2c, &msg, 1);
76 if (ret != 1) {
77 int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
78 printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
79 num, __func__, reg, data, ret);
80 }
81 return (ret != 1) ? -EREMOTEIO : 0;
82 }
83
84
tda10023_writebit(struct tda10023_state * state,u8 reg,u8 mask,u8 data)85 static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
86 {
87 if (mask==0xff)
88 return tda10023_writereg(state, reg, data);
89 else {
90 u8 val;
91 val=tda10023_readreg(state,reg);
92 val&=~mask;
93 val|=(data&mask);
94 return tda10023_writereg(state, reg, val);
95 }
96 }
97
tda10023_writetab(struct tda10023_state * state,u8 * tab)98 static void tda10023_writetab(struct tda10023_state* state, u8* tab)
99 {
100 u8 r,m,v;
101 while (1) {
102 r=*tab++;
103 m=*tab++;
104 v=*tab++;
105 if (r==0xff) {
106 if (m==0xff)
107 break;
108 else
109 msleep(m);
110 }
111 else
112 tda10023_writebit(state,r,m,v);
113 }
114 }
115
116 //get access to tuner
lock_tuner(struct tda10023_state * state)117 static int lock_tuner(struct tda10023_state* state)
118 {
119 u8 buf[2] = { 0x0f, 0xc0 };
120 struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
121
122 if(i2c_transfer(state->i2c, &msg, 1) != 1)
123 {
124 printk("tda10023: lock tuner fails\n");
125 return -EREMOTEIO;
126 }
127 return 0;
128 }
129
130 //release access from tuner
unlock_tuner(struct tda10023_state * state)131 static int unlock_tuner(struct tda10023_state* state)
132 {
133 u8 buf[2] = { 0x0f, 0x40 };
134 struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
135
136 if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
137 {
138 printk("tda10023: unlock tuner fails\n");
139 return -EREMOTEIO;
140 }
141 return 0;
142 }
143
tda10023_setup_reg0(struct tda10023_state * state,u8 reg0)144 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
145 {
146 reg0 |= state->reg0 & 0x63;
147
148 tda10023_writereg (state, 0x00, reg0 & 0xfe);
149 tda10023_writereg (state, 0x00, reg0 | 0x01);
150
151 state->reg0 = reg0;
152 return 0;
153 }
154
tda10023_set_symbolrate(struct tda10023_state * state,u32 sr)155 static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
156 {
157 s32 BDR;
158 s32 BDRI;
159 s16 SFIL=0;
160 u16 NDEC = 0;
161
162 /* avoid floating point operations multiplying syscloc and divider
163 by 10 */
164 u32 sysclk_x_10 = state->sysclk * 10;
165
166 if (sr < (u32)(sysclk_x_10/984)) {
167 NDEC=3;
168 SFIL=1;
169 } else if (sr < (u32)(sysclk_x_10/640)) {
170 NDEC=3;
171 SFIL=0;
172 } else if (sr < (u32)(sysclk_x_10/492)) {
173 NDEC=2;
174 SFIL=1;
175 } else if (sr < (u32)(sysclk_x_10/320)) {
176 NDEC=2;
177 SFIL=0;
178 } else if (sr < (u32)(sysclk_x_10/246)) {
179 NDEC=1;
180 SFIL=1;
181 } else if (sr < (u32)(sysclk_x_10/160)) {
182 NDEC=1;
183 SFIL=0;
184 } else if (sr < (u32)(sysclk_x_10/123)) {
185 NDEC=0;
186 SFIL=1;
187 }
188
189 BDRI = (state->sysclk)*16;
190 BDRI>>=NDEC;
191 BDRI +=sr/2;
192 BDRI /=sr;
193
194 if (BDRI>255)
195 BDRI=255;
196
197 {
198 u64 BDRX;
199
200 BDRX=1<<(24+NDEC);
201 BDRX*=sr;
202 do_div(BDRX, state->sysclk); /* BDRX/=SYSCLK; */
203
204 BDR=(s32)BDRX;
205 }
206 dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",
207 sr, BDR, BDRI, NDEC);
208 tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
209 tda10023_writereg (state, 0x0a, BDR&255);
210 tda10023_writereg (state, 0x0b, (BDR>>8)&255);
211 tda10023_writereg (state, 0x0c, (BDR>>16)&31);
212 tda10023_writereg (state, 0x0d, BDRI);
213 tda10023_writereg (state, 0x3d, (SFIL<<7));
214 return 0;
215 }
216
tda10023_init(struct dvb_frontend * fe)217 static int tda10023_init (struct dvb_frontend *fe)
218 {
219 struct tda10023_state* state = fe->demodulator_priv;
220 u8 tda10023_inittab[] = {
221 /* reg mask val */
222 /* 000 */ 0x2a, 0xff, 0x02, /* PLL3, Bypass, Power Down */
223 /* 003 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
224 /* 006 */ 0x2a, 0xff, 0x03, /* PLL3, Bypass, Power Down */
225 /* 009 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
226 /* PLL1 */
227 /* 012 */ 0x28, 0xff, (state->pll_m-1),
228 /* PLL2 */
229 /* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1),
230 /* GPR FSAMPLING=1 */
231 /* 018 */ 0x00, 0xff, REG0_INIT_VAL,
232 /* 021 */ 0x2a, 0xff, 0x08, /* PLL3 PSACLK=1 */
233 /* 024 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
234 /* 027 */ 0x1f, 0xff, 0x00, /* RESET */
235 /* 030 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
236 /* 033 */ 0xe6, 0x0c, 0x04, /* RSCFG_IND */
237 /* 036 */ 0x10, 0xc0, 0x80, /* DECDVBCFG1 PBER=1 */
238
239 /* 039 */ 0x0e, 0xff, 0x82, /* GAIN1 */
240 /* 042 */ 0x03, 0x08, 0x08, /* CLKCONF DYN=1 */
241 /* 045 */ 0x2e, 0xbf, 0x30, /* AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1
242 PPWMTUN=0 PPWMIF=0 */
243 /* 048 */ 0x01, 0xff, 0x30, /* AGCREF */
244 /* 051 */ 0x1e, 0x84, 0x84, /* CONTROL SACLK_ON=1 */
245 /* 054 */ 0x1b, 0xff, 0xc8, /* ADC TWOS=1 */
246 /* 057 */ 0x3b, 0xff, 0xff, /* IFMAX */
247 /* 060 */ 0x3c, 0xff, 0x00, /* IFMIN */
248 /* 063 */ 0x34, 0xff, 0x00, /* PWMREF */
249 /* 066 */ 0x35, 0xff, 0xff, /* TUNMAX */
250 /* 069 */ 0x36, 0xff, 0x00, /* TUNMIN */
251 /* 072 */ 0x06, 0xff, 0x7f, /* EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */
252 /* 075 */ 0x1c, 0x30, 0x30, /* EQCONF2 STEPALGO=SGNALGO=1 */
253 /* 078 */ 0x37, 0xff, 0xf6, /* DELTAF_LSB */
254 /* 081 */ 0x38, 0xff, 0xff, /* DELTAF_MSB */
255 /* 084 */ 0x02, 0xff, 0x93, /* AGCCONF1 IFS=1 KAGCIF=2 KAGCTUN=3 */
256 /* 087 */ 0x2d, 0xff, 0xf6, /* SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */
257 /* 090 */ 0x04, 0x10, 0x00, /* SWRAMP=1 */
258 /* 093 */ 0x12, 0xff, TDA10023_OUTPUT_MODE_PARALLEL_B, /*
259 INTP1 POCLKP=1 FEL=1 MFS=0 */
260 /* 096 */ 0x2b, 0x01, 0xa1, /* INTS1 */
261 /* 099 */ 0x20, 0xff, 0x04, /* INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */
262 /* 102 */ 0x2c, 0xff, 0x0d, /* INTP/S TRIP=0 TRIS=0 */
263 /* 105 */ 0xc4, 0xff, 0x00,
264 /* 108 */ 0xc3, 0x30, 0x00,
265 /* 111 */ 0xb5, 0xff, 0x19, /* ERAGC_THD */
266 /* 114 */ 0x00, 0x03, 0x01, /* GPR, CLBS soft reset */
267 /* 117 */ 0x00, 0x03, 0x03, /* GPR, CLBS soft reset */
268 /* 120 */ 0xff, 0x64, 0x00, /* Sleep 100ms */
269 /* 123 */ 0xff, 0xff, 0xff
270 };
271 dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num);
272
273 /* override default values if set in config */
274 if (state->config->deltaf) {
275 tda10023_inittab[80] = (state->config->deltaf & 0xff);
276 tda10023_inittab[83] = (state->config->deltaf >> 8);
277 }
278
279 if (state->config->output_mode)
280 tda10023_inittab[95] = state->config->output_mode;
281
282 tda10023_writetab(state, tda10023_inittab);
283
284 return 0;
285 }
286
287 struct qam_params {
288 u8 qam, lockthr, mseth, aref, agcrefnyq, eragnyq_thd;
289 };
290
tda10023_set_parameters(struct dvb_frontend * fe)291 static int tda10023_set_parameters(struct dvb_frontend *fe)
292 {
293 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
294 u32 delsys = c->delivery_system;
295 unsigned qam = c->modulation;
296 bool is_annex_c;
297 struct tda10023_state* state = fe->demodulator_priv;
298 static const struct qam_params qam_params[] = {
299 /* Modulation QAM LOCKTHR MSETH AREF AGCREFNYQ ERAGCNYQ_THD */
300 [QPSK] = { (5<<2), 0x78, 0x8c, 0x96, 0x78, 0x4c },
301 [QAM_16] = { (0<<2), 0x87, 0xa2, 0x91, 0x8c, 0x57 },
302 [QAM_32] = { (1<<2), 0x64, 0x74, 0x96, 0x8c, 0x57 },
303 [QAM_64] = { (2<<2), 0x46, 0x43, 0x6a, 0x6a, 0x44 },
304 [QAM_128] = { (3<<2), 0x36, 0x34, 0x7e, 0x78, 0x4c },
305 [QAM_256] = { (4<<2), 0x26, 0x23, 0x6c, 0x5c, 0x3c },
306 };
307
308 switch (delsys) {
309 case SYS_DVBC_ANNEX_A:
310 is_annex_c = false;
311 break;
312 case SYS_DVBC_ANNEX_C:
313 is_annex_c = true;
314 break;
315 default:
316 return -EINVAL;
317 }
318
319 /*
320 * gcc optimizes the code below the same way as it would code:
321 * "if (qam > 5) return -EINVAL;"
322 * Yet, the code is clearer, as it shows what QAM standards are
323 * supported by the driver, and avoids the usage of magic numbers on
324 * it.
325 */
326 switch (qam) {
327 case QPSK:
328 case QAM_16:
329 case QAM_32:
330 case QAM_64:
331 case QAM_128:
332 case QAM_256:
333 break;
334 default:
335 return -EINVAL;
336 }
337
338 if (fe->ops.tuner_ops.set_params) {
339 fe->ops.tuner_ops.set_params(fe);
340 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
341 }
342
343 tda10023_set_symbolrate(state, c->symbol_rate);
344 tda10023_writereg(state, 0x05, qam_params[qam].lockthr);
345 tda10023_writereg(state, 0x08, qam_params[qam].mseth);
346 tda10023_writereg(state, 0x09, qam_params[qam].aref);
347 tda10023_writereg(state, 0xb4, qam_params[qam].agcrefnyq);
348 tda10023_writereg(state, 0xb6, qam_params[qam].eragnyq_thd);
349 #if 0
350 tda10023_writereg(state, 0x04, (c->inversion ? 0x12 : 0x32));
351 tda10023_writebit(state, 0x04, 0x60, (c->inversion ? 0 : 0x20));
352 #endif
353 tda10023_writebit(state, 0x04, 0x40, 0x40);
354
355 if (is_annex_c)
356 tda10023_writebit(state, 0x3d, 0xfc, 0x03);
357 else
358 tda10023_writebit(state, 0x3d, 0xfc, 0x02);
359
360 tda10023_setup_reg0(state, qam_params[qam].qam);
361
362 return 0;
363 }
364
tda10023_read_status(struct dvb_frontend * fe,enum fe_status * status)365 static int tda10023_read_status(struct dvb_frontend *fe,
366 enum fe_status *status)
367 {
368 struct tda10023_state* state = fe->demodulator_priv;
369 int sync;
370
371 *status = 0;
372
373 //0x11[1] == CARLOCK -> Carrier locked
374 //0x11[2] == FSYNC -> Frame synchronisation
375 //0x11[3] == FEL -> Front End locked
376 //0x11[6] == NODVB -> DVB Mode Information
377 sync = tda10023_readreg (state, 0x11);
378
379 if (sync & 2)
380 *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
381
382 if (sync & 4)
383 *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
384
385 if (sync & 8)
386 *status |= FE_HAS_LOCK;
387
388 return 0;
389 }
390
tda10023_read_ber(struct dvb_frontend * fe,u32 * ber)391 static int tda10023_read_ber(struct dvb_frontend* fe, u32* ber)
392 {
393 struct tda10023_state* state = fe->demodulator_priv;
394 u8 a,b,c;
395 a=tda10023_readreg(state, 0x14);
396 b=tda10023_readreg(state, 0x15);
397 c=tda10023_readreg(state, 0x16)&0xf;
398 tda10023_writebit (state, 0x10, 0xc0, 0x00);
399
400 *ber = a | (b<<8)| (c<<16);
401 return 0;
402 }
403
tda10023_read_signal_strength(struct dvb_frontend * fe,u16 * strength)404 static int tda10023_read_signal_strength(struct dvb_frontend* fe, u16* strength)
405 {
406 struct tda10023_state* state = fe->demodulator_priv;
407 u8 ifgain=tda10023_readreg(state, 0x2f);
408
409 u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
410 // Max raw value is about 0xb0 -> Normalize to >0xf0 after 0x90
411 if (gain>0x90)
412 gain=gain+2*(gain-0x90);
413 if (gain>255)
414 gain=255;
415
416 *strength = (gain<<8)|gain;
417 return 0;
418 }
419
tda10023_read_snr(struct dvb_frontend * fe,u16 * snr)420 static int tda10023_read_snr(struct dvb_frontend* fe, u16* snr)
421 {
422 struct tda10023_state* state = fe->demodulator_priv;
423
424 u8 quality = ~tda10023_readreg(state, 0x18);
425 *snr = (quality << 8) | quality;
426 return 0;
427 }
428
tda10023_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)429 static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
430 {
431 struct tda10023_state* state = fe->demodulator_priv;
432 u8 a,b,c,d;
433 a= tda10023_readreg (state, 0x74);
434 b= tda10023_readreg (state, 0x75);
435 c= tda10023_readreg (state, 0x76);
436 d= tda10023_readreg (state, 0x77);
437 *ucblocks = a | (b<<8)|(c<<16)|(d<<24);
438
439 tda10023_writebit (state, 0x10, 0x20,0x00);
440 tda10023_writebit (state, 0x10, 0x20,0x20);
441 tda10023_writebit (state, 0x13, 0x01, 0x00);
442
443 return 0;
444 }
445
tda10023_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * p)446 static int tda10023_get_frontend(struct dvb_frontend *fe,
447 struct dtv_frontend_properties *p)
448 {
449 struct tda10023_state* state = fe->demodulator_priv;
450 int sync,inv;
451 s8 afc = 0;
452
453 sync = tda10023_readreg(state, 0x11);
454 afc = tda10023_readreg(state, 0x19);
455 inv = tda10023_readreg(state, 0x04);
456
457 if (verbose) {
458 /* AFC only valid when carrier has been recovered */
459 printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
460 "DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
461 state->frontend.dvb->num, afc,
462 -((s32)p->symbol_rate * afc) >> 10);
463 }
464
465 p->inversion = (inv&0x20?0:1);
466 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
467
468 p->fec_inner = FEC_NONE;
469 p->frequency = ((p->frequency + 31250) / 62500) * 62500;
470
471 if (sync & 2)
472 p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
473
474 return 0;
475 }
476
tda10023_sleep(struct dvb_frontend * fe)477 static int tda10023_sleep(struct dvb_frontend* fe)
478 {
479 struct tda10023_state* state = fe->demodulator_priv;
480
481 tda10023_writereg (state, 0x1b, 0x02); /* pdown ADC */
482 tda10023_writereg (state, 0x00, 0x80); /* standby */
483
484 return 0;
485 }
486
tda10023_i2c_gate_ctrl(struct dvb_frontend * fe,int enable)487 static int tda10023_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
488 {
489 struct tda10023_state* state = fe->demodulator_priv;
490
491 if (enable) {
492 lock_tuner(state);
493 } else {
494 unlock_tuner(state);
495 }
496 return 0;
497 }
498
tda10023_release(struct dvb_frontend * fe)499 static void tda10023_release(struct dvb_frontend* fe)
500 {
501 struct tda10023_state* state = fe->demodulator_priv;
502 kfree(state);
503 }
504
505 static const struct dvb_frontend_ops tda10023_ops;
506
tda10023_attach(const struct tda10023_config * config,struct i2c_adapter * i2c,u8 pwm)507 struct dvb_frontend *tda10023_attach(const struct tda10023_config *config,
508 struct i2c_adapter *i2c,
509 u8 pwm)
510 {
511 struct tda10023_state* state = NULL;
512
513 /* allocate memory for the internal state */
514 state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
515 if (state == NULL) goto error;
516
517 /* setup the state */
518 state->config = config;
519 state->i2c = i2c;
520
521 /* wakeup if in standby */
522 tda10023_writereg (state, 0x00, 0x33);
523 /* check if the demod is there */
524 if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
525
526 /* create dvb_frontend */
527 memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
528 state->pwm = pwm;
529 state->reg0 = REG0_INIT_VAL;
530 if (state->config->xtal) {
531 state->xtal = state->config->xtal;
532 state->pll_m = state->config->pll_m;
533 state->pll_p = state->config->pll_p;
534 state->pll_n = state->config->pll_n;
535 } else {
536 /* set default values if not defined in config */
537 state->xtal = 28920000;
538 state->pll_m = 8;
539 state->pll_p = 4;
540 state->pll_n = 1;
541 }
542
543 /* calc sysclk */
544 state->sysclk = (state->xtal * state->pll_m / \
545 (state->pll_n * state->pll_p));
546
547 state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
548 state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;
549
550 dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n",
551 __func__, state->xtal, state->pll_m, state->pll_p,
552 state->pll_n);
553
554 state->frontend.demodulator_priv = state;
555 return &state->frontend;
556
557 error:
558 kfree(state);
559 return NULL;
560 }
561
562 static const struct dvb_frontend_ops tda10023_ops = {
563 .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
564 .info = {
565 .name = "Philips TDA10023 DVB-C",
566 .frequency_min_hz = 47 * MHz,
567 .frequency_max_hz = 862 * MHz,
568 .frequency_stepsize_hz = 62500,
569 .symbol_rate_min = 0, /* set in tda10023_attach */
570 .symbol_rate_max = 0, /* set in tda10023_attach */
571 .caps = 0x400 | //FE_CAN_QAM_4
572 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
573 FE_CAN_QAM_128 | FE_CAN_QAM_256 |
574 FE_CAN_FEC_AUTO
575 },
576
577 .release = tda10023_release,
578
579 .init = tda10023_init,
580 .sleep = tda10023_sleep,
581 .i2c_gate_ctrl = tda10023_i2c_gate_ctrl,
582
583 .set_frontend = tda10023_set_parameters,
584 .get_frontend = tda10023_get_frontend,
585 .read_status = tda10023_read_status,
586 .read_ber = tda10023_read_ber,
587 .read_signal_strength = tda10023_read_signal_strength,
588 .read_snr = tda10023_read_snr,
589 .read_ucblocks = tda10023_read_ucblocks,
590 };
591
592
593 MODULE_DESCRIPTION("Philips TDA10023 DVB-C demodulator driver");
594 MODULE_AUTHOR("Georg Acher, Hartmut Birr");
595 MODULE_LICENSE("GPL");
596
597 EXPORT_SYMBOL_GPL(tda10023_attach);
598