1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // ALSA SoC Texas Instruments TAS2783 Audio Smart Amplifier 4 // 5 // Copyright (C) 2025 Texas Instruments Incorporated 6 // https://www.ti.com 7 // 8 // The TAS2783 driver implements a flexible and configurable 9 // algo coefficient setting for single TAS2783 chips. 10 // 11 // Author: Niranjan H Y <niranjanhy@ti.com> 12 // Author: Baojun Xu <baojun.xu@ti.com> 13 // Author: Kevin Lu <kevin-lu@ti.com> 14 15 #include <linux/cleanup.h> 16 #include <linux/unaligned.h> 17 #include <linux/crc32.h> 18 #include <linux/efi.h> 19 #include <linux/err.h> 20 #include <linux/firmware.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <sound/pcm_params.h> 24 #include <linux/pm.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/regmap.h> 27 #include <linux/wait.h> 28 #include <linux/soundwire/sdw.h> 29 #include <linux/soundwire/sdw_registers.h> 30 #include <linux/soundwire/sdw_type.h> 31 #if IS_ENABLED(CONFIG_PCI) 32 #include <linux/pci.h> 33 #endif 34 #include <sound/sdw.h> 35 #include <sound/soc.h> 36 #include <sound/tlv.h> 37 #include <sound/tas2781-tlv.h> 38 #include <sound/sdca_function.h> 39 #include <sound/sdca_regmap.h> 40 41 #include "tas2783.h" 42 43 #define TIMEOUT_FW_DL_MS (3000) 44 #define FW_DL_OFFSET 84 /* binary file information */ 45 #define FW_FL_HDR 20 /* minimum number of bytes in one chunk */ 46 #define TAS2783_PROBE_TIMEOUT 5000 47 #define TAS2783_CALI_GUID EFI_GUID(0x1f52d2a1, 0xbb3a, 0x457d, 0xbc, \ 48 0x09, 0x43, 0xa3, 0xf4, 0x31, 0x0a, 0x92) 49 50 static const u32 tas2783_cali_reg[] = { 51 TAS2783_CAL_R0, 52 TAS2783_CAL_INVR0, 53 TAS2783_CAL_R0LOW, 54 TAS2783_CAL_POWER, 55 TAS2783_CAL_TLIM, 56 }; 57 58 struct tas_fw_hdr { 59 u32 size; 60 u32 version_offset; 61 u32 plt_id; 62 u32 ppc3_ver; 63 u32 timestamp; 64 u8 ddc_name[64]; 65 }; 66 67 struct tas_fw_file { 68 u32 vendor_id; 69 u32 file_id; 70 u32 version; 71 u32 length; 72 u32 dest_addr; 73 u8 *fw_data; 74 }; 75 76 struct calibration_data { 77 u32 is_valid; 78 unsigned long read_sz; 79 u8 data[TAS2783_CALIB_DATA_SZ]; 80 }; 81 82 struct tas2783_prv { 83 struct snd_soc_component *component; 84 struct calibration_data cali_data; 85 struct sdw_slave *sdw_peripheral; 86 struct sdca_function_data *sa_func_data; 87 enum sdw_slave_status status; 88 /* calibration */ 89 struct mutex calib_lock; 90 /* pde and firmware download */ 91 struct mutex pde_lock; 92 struct regmap *regmap; 93 struct device *dev; 94 struct class *class; 95 struct attribute_group *cal_attr_groups; 96 struct tm tm; 97 u8 rca_binaryname[64]; 98 u8 dev_name[32]; 99 bool hw_init; 100 /* wq for firmware download */ 101 wait_queue_head_t fw_wait; 102 bool fw_dl_task_done; 103 bool fw_dl_success; 104 /* use fallback fw name */ 105 bool fw_use_fallback; 106 }; 107 108 static const struct reg_default tas2783_reg_default[] = { 109 {TAS2783_AMP_LEVEL, 0x28}, 110 {TASDEV_REG_SDW(0, 0, 0x04), 0x21}, 111 {TASDEV_REG_SDW(0, 0, 0x05), 0x41}, 112 {TASDEV_REG_SDW(0, 0, 0x06), 0x00}, 113 {TASDEV_REG_SDW(0, 0, 0x07), 0x20}, 114 {TASDEV_REG_SDW(0, 0, 0x08), 0x09}, 115 {TASDEV_REG_SDW(0, 0, 0x09), 0x02}, 116 {TASDEV_REG_SDW(0, 0, 0x0a), 0x0a}, 117 {TASDEV_REG_SDW(0, 0, 0x0c), 0x10}, 118 {TASDEV_REG_SDW(0, 0, 0x0d), 0x13}, 119 {TASDEV_REG_SDW(0, 0, 0x0e), 0xc2}, 120 {TASDEV_REG_SDW(0, 0, 0x0f), 0x40}, 121 {TASDEV_REG_SDW(0, 0, 0x10), 0x04}, 122 {TASDEV_REG_SDW(0, 0, 0x13), 0x13}, 123 {TASDEV_REG_SDW(0, 0, 0x14), 0x12}, 124 {TASDEV_REG_SDW(0, 0, 0x15), 0x00}, 125 {TASDEV_REG_SDW(0, 0, 0x16), 0x12}, 126 {TASDEV_REG_SDW(0, 0, 0x17), 0x80}, 127 {TAS2783_DVC_LVL, 0x00}, 128 {TASDEV_REG_SDW(0, 0, 0x1b), 0x61}, 129 {TASDEV_REG_SDW(0, 0, 0x1c), 0x36}, 130 {TASDEV_REG_SDW(0, 0, 0x1d), 0x00}, 131 {TASDEV_REG_SDW(0, 0, 0x1f), 0x01}, 132 {TASDEV_REG_SDW(0, 0, 0x20), 0x2e}, 133 {TASDEV_REG_SDW(0, 0, 0x21), 0x00}, 134 {TASDEV_REG_SDW(0, 0, 0x34), 0x06}, 135 {TASDEV_REG_SDW(0, 0, 0x35), 0xbd}, 136 {TASDEV_REG_SDW(0, 0, 0x36), 0xad}, 137 {TASDEV_REG_SDW(0, 0, 0x37), 0xa8}, 138 {TASDEV_REG_SDW(0, 0, 0x38), 0x00}, 139 {TASDEV_REG_SDW(0, 0, 0x3b), 0xfc}, 140 {TASDEV_REG_SDW(0, 0, 0x3d), 0xdd}, 141 {TASDEV_REG_SDW(0, 0, 0x40), 0xf6}, 142 {TASDEV_REG_SDW(0, 0, 0x41), 0x14}, 143 {TASDEV_REG_SDW(0, 0, 0x5c), 0x19}, 144 {TASDEV_REG_SDW(0, 0, 0x5d), 0x80}, 145 {TASDEV_REG_SDW(0, 0, 0x60), 0x21}, 146 {TASDEV_REG_SDW(0, 0, 0x63), 0x48}, 147 {TASDEV_REG_SDW(0, 0, 0x65), 0x08}, 148 {TASDEV_REG_SDW(0, 0, 0x66), 0xb2}, 149 {TASDEV_REG_SDW(0, 0, 0x67), 0x00}, 150 {TASDEV_REG_SDW(0, 0, 0x6a), 0x12}, 151 {TASDEV_REG_SDW(0, 0, 0x6b), 0xfb}, 152 {TASDEV_REG_SDW(0, 0, 0x6c), 0x00}, 153 {TASDEV_REG_SDW(0, 0, 0x6d), 0x00}, 154 {TASDEV_REG_SDW(0, 0, 0x6e), 0x1a}, 155 {TASDEV_REG_SDW(0, 0, 0x6f), 0x00}, 156 {TASDEV_REG_SDW(0, 0, 0x70), 0x96}, 157 {TASDEV_REG_SDW(0, 0, 0x71), 0x02}, 158 {TASDEV_REG_SDW(0, 0, 0x73), 0x08}, 159 {TASDEV_REG_SDW(0, 0, 0x75), 0xe0}, 160 {TASDEV_REG_SDW(0, 0, 0x7a), 0x60}, 161 {TASDEV_REG_SDW(0, 1, 0x02), 0x00}, 162 {TASDEV_REG_SDW(0, 1, 0x17), 0xc0}, 163 {TASDEV_REG_SDW(0, 1, 0x19), 0x60}, 164 {TASDEV_REG_SDW(0, 1, 0x35), 0x75}, 165 {TASDEV_REG_SDW(0, 1, 0x3d), 0x00}, 166 {TASDEV_REG_SDW(0, 1, 0x3e), 0x00}, 167 {TASDEV_REG_SDW(0, 1, 0x3f), 0x00}, 168 {TASDEV_REG_SDW(0, 1, 0x40), 0x00}, 169 {TASDEV_REG_SDW(0, 1, 0x41), 0x00}, 170 {TASDEV_REG_SDW(0, 1, 0x42), 0x00}, 171 {TASDEV_REG_SDW(0, 1, 0x43), 0x00}, 172 {TASDEV_REG_SDW(0, 1, 0x44), 0x00}, 173 {TASDEV_REG_SDW(0, 1, 0x45), 0x00}, 174 {TASDEV_REG_SDW(0, 1, 0x47), 0xab}, 175 {TASDEV_REG_SDW(0, 0xfd, 0x0d), 0x0d}, 176 {TASDEV_REG_SDW(0, 0xfd, 0x39), 0x00}, 177 {TASDEV_REG_SDW(0, 0xfd, 0x3e), 0x00}, 178 {TASDEV_REG_SDW(0, 0xfd, 0x45), 0x00}, 179 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x01, 1), 0x1}, 180 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1), 0x9c00}, 181 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0), 0x1}, 182 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1), 0x1}, 183 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1), 0x0}, 184 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0), 0x1}, 185 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1), 0x1}, 186 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1), 0x0}, 187 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0), 0x1}, 188 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0), 0x0}, 189 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0), 0x0}, 190 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0), 0x0}, 191 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0), 0x0}, 192 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0), 0x0}, 193 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0), 0x0}, 194 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0), 0x0}, 195 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0), 0x0}, 196 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0), 0x0}, 197 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0), 0x3}, 198 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0), 0x0}, 199 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0), 0x0}, 200 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0), 0x0}, 201 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0), 0x0}, 202 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0), 0x0}, 203 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0), 0x0}, 204 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0), 0x0}, 205 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0), 0x0}, 206 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0), 0x0}, 207 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0), 0x0}, 208 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0), 0x0}, 209 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0), 0x0}, 210 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0), 0x0}, 211 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0), 0x0}, 212 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0), 0x0}, 213 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0), 0x0}, 214 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0), 0x0}, 215 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0), 0x0}, 216 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0), 0x0}, 217 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0), 0x0}, 218 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1), 0x0}, 219 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2), 0x0}, 220 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3), 0x0}, 221 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4), 0x0}, 222 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5), 0x0}, 223 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6), 0x0}, 224 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7), 0x0}, 225 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0), 0x0}, 226 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0), 0x0}, 227 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0), 0x0}, 228 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0), 0x1}, 229 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1), 0x1}, 230 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2), 0x1}, 231 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0), 0x0}, 232 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1), 0x0}, 233 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2), 0x0}, 234 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0), 0x0}, 235 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0), 0x0}, 236 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0), 0x0}, 237 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0), 0x1}, 238 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0), 0x0}, 239 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0), 0x0}, 240 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0), 0x0}, 241 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0), 0x1}, 242 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0), 0x0}, 243 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0), 0x0}, 244 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0), 0x0}, 245 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0), 0x1}, 246 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0), 0x0}, 247 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0), 0x0}, 248 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0), 0x0}, 249 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0), 0x0}, 250 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0), 0x0}, 251 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0), 0x0}, 252 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0), 0x0}, 253 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0), 0x0}, 254 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0), 0x0}, 255 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0), 0x3}, 256 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23, 0x10, 0), 0x0}, 257 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0), 0x1}, 258 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0), 0x0}, 259 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0), 0x0}, 260 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0), 0x0}, 261 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0), 0x0}, 262 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0), 0x0}, 263 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0), 0x0}, 264 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0), 0x0}, 265 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0), 0x0}, 266 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0), 0x0}, 267 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0), 0x0}, 268 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0), 0x0}, 269 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0), 0x0}, 270 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0), 0x0}, 271 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0), 0x0}, 272 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0), 0x0}, 273 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0), 0x0}, 274 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0), 0x0}, 275 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0), 0x0}, 276 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0), 0x0}, 277 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0), 0x0}, 278 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0), 0x0}, 279 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0), 0x0}, 280 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0), 0x0}, 281 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0), 0x0}, 282 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1), 0x0}, 283 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2), 0x0}, 284 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3), 0x0}, 285 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4), 0x0}, 286 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5), 0x0}, 287 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6), 0x0}, 288 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7), 0x0}, 289 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0), 0x0}, 290 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0), 0x0}, 291 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0), 0x0}, 292 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0), 0x0}, 293 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0), 0x0}, 294 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0), 0x0}, 295 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0), 0x0}, 296 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0), 0x0}, 297 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8), 0x0}, 298 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9), 0x0}, 299 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa), 0x0}, 300 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb), 0x0}, 301 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc), 0x0}, 302 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd), 0x0}, 303 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe), 0x0}, 304 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf), 0x0}, 305 }; 306 307 static const struct reg_sequence tas2783_init_seq[] = { 308 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0x00), 0x01), 309 REG_SEQ0(0x00800418, 0x00), 310 REG_SEQ0(0x00800419, 0x00), 311 REG_SEQ0(0x0080041a, 0x00), 312 REG_SEQ0(0x0080041b, 0x00), 313 REG_SEQ0(0x00800428, 0x40), 314 REG_SEQ0(0x00800429, 0x00), 315 REG_SEQ0(0x0080042a, 0x00), 316 REG_SEQ0(0x0080042b, 0x00), 317 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x1, 0x00), 0x00), 318 REG_SEQ0(0x00800004, 0x21), 319 REG_SEQ0(0x00800005, 0x41), 320 REG_SEQ0(0x00800006, 0x00), 321 REG_SEQ0(0x00800007, 0x20), 322 REG_SEQ0(0x00800015, 0x00), 323 REG_SEQ0(0x00800036, 0xad), 324 REG_SEQ0(0x00800037, 0xa8), 325 REG_SEQ0(0x0080006b, 0x7b), 326 REG_SEQ0(0x0080006c, 0x00), 327 REG_SEQ0(0x0080006d, 0x00), 328 REG_SEQ0(0x0080006e, 0x1a), 329 REG_SEQ0(0x0080006f, 0x00), 330 REG_SEQ0(0x00800071, 0x02), 331 REG_SEQ0(0x008000be, 0x00), 332 REG_SEQ0(0x008000bf, 0x00), 333 REG_SEQ0(0x008000c0, 0x00), 334 REG_SEQ0(0x008000c1, 0x00), 335 REG_SEQ0(0x008000c2, 0x00), 336 REG_SEQ0(0x008000c3, 0x00), 337 REG_SEQ0(0x008000c4, 0x00), 338 }; 339 340 static int tas2783_sdca_mbq_size(struct device *dev, u32 reg) 341 { 342 switch (reg) { 343 case 0x000 ... 0x080: /* Data port 0. */ 344 case 0x100 ... 0x140: /* Data port 1. */ 345 case 0x200 ... 0x240: /* Data port 2. */ 346 case 0x300 ... 0x340: /* Data port 3. */ 347 case 0x400 ... 0x440: /* Data port 4. */ 348 case 0x500 ... 0x540: /* Data port 5. */ 349 case 0x800000 ... 0x803fff: /* Page 0 ~ 127. */ 350 case 0x807e80 ... 0x807eff: /* Page 253. */ 351 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23, 352 TAS2783_SDCA_CTL_UDMPU_CLUSTER, 0): 353 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, TAS2783_SDCA_CTL_FU_MUTE, 354 TAS2783_DEVICE_CHANNEL_LEFT): 355 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0): 356 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0): 357 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0): 358 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0): 359 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0): 360 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0): 361 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0): 362 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0): 363 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0): 364 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0): 365 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0): 366 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0): 367 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0): 368 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0): 369 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0): 370 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0): 371 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0): 372 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0): 373 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0): 374 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0): 375 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0): 376 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0): 377 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0): 378 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0): 379 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0): 380 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0): 381 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1): 382 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2): 383 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3): 384 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4): 385 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5): 386 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6): 387 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7): 388 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8): 389 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9): 390 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa): 391 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb): 392 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc): 393 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd): 394 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe): 395 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf): 396 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0): 397 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0): 398 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0): 399 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0): 400 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x02, 0): 401 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x10, 0): 402 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0): 403 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0): 404 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0): 405 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0): 406 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0): 407 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0): 408 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0): 409 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0): 410 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0): 411 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0): 412 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0): 413 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1): 414 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2): 415 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0): 416 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1): 417 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0): 418 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0): 419 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0): 420 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0): 421 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0): 422 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0): 423 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0): 424 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1): 425 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0): 426 return 1; 427 428 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0): 429 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0): 430 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0): 431 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0): 432 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0): 433 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0): 434 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0): 435 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0): 436 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0): 437 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0): 438 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0): 439 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1): 440 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2): 441 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3): 442 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4): 443 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5): 444 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6): 445 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7): 446 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1): 447 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1): 448 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1): 449 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2): 450 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0): 451 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 0): 452 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1): 453 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0): 454 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0): 455 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0): 456 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0): 457 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0): 458 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0): 459 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0): 460 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0): 461 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0): 462 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0): 463 return 2; 464 465 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0): 466 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0): 467 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0): 468 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0): 469 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0): 470 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0): 471 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0): 472 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0): 473 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0): 474 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0): 475 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0): 476 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0): 477 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0): 478 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0): 479 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0): 480 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0): 481 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0): 482 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0): 483 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0): 484 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0): 485 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0): 486 return 4; 487 488 default: 489 return 0; 490 } 491 } 492 493 static bool tas2783_readable_register(struct device *dev, unsigned int reg) 494 { 495 return tas2783_sdca_mbq_size(dev, reg) > 0; 496 } 497 498 static bool tas2783_writeable_register(struct device *dev, unsigned int reg) 499 { 500 /* 501 * The Latency Control of every Entity, together with the Power Domain 502 * actual state and the protection status, is read-only. They are 503 * listed in tas2783_reg_default[] with a placeholder value, so without 504 * this a regcache_sync() would try to write them back and the 505 * peripheral would reject the transaction, aborting the sync. 506 */ 507 switch (reg) { 508 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_FU21, 0x10, 0): 509 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_FU23, 0x10, 0): 510 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_FU26, 0x10, 0): 511 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_XU22, 0x06, 0): 512 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_XU22, 0x07, 0): 513 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_XU22, 0x08, 0): 514 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_CS24, 0x02, 0): 515 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_CS21, 0x02, 0): 516 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_CS25, 0x02, 0): 517 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_CS26, 0x02, 0): 518 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_CS28, 0x02, 0): 519 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_PDE23, 0x10, 0): 520 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_UDMPU23, 0x06, 0): 521 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_SAPU29, 0x05, 0): 522 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_SAPU29, 0x11, 0): 523 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_PPU21, 0x06, 0): 524 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_PPU26, 0x06, 0): 525 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_IT21, 0x08, 0): 526 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_IT29, 0x08, 0): 527 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_IT26, 0x08, 0): 528 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_IT28, 0x08, 0): 529 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_OT24, 0x08, 0): 530 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_OT23, 0x08, 0): 531 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_OT25, 0x08, 0): 532 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_OT28, 0x08, 0): 533 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_MU26, 0x06, 0): 534 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_OT127, 0x08, 0): 535 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_FU127, 0x10, 0): 536 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_CS127, 0x02, 0): 537 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_MFPU21, 0x08, 0): 538 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_MFPU21, 0x04, 0): 539 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_MFPU26, 0x08, 0): 540 case SDW_SDCA_CTL(FUNC_NUM_SMART_AMP, TAS2783_SDCA_ENT_MFPU26, 0x04, 0): 541 return false; 542 543 default: 544 return tas2783_sdca_mbq_size(dev, reg) > 0; 545 } 546 } 547 548 static bool tas2783_volatile_register(struct device *dev, u32 reg) 549 { 550 switch (reg) { 551 case 0x000 ... 0x080: /* Data port 0. */ 552 case 0x100 ... 0x140: /* Data port 1. */ 553 case 0x200 ... 0x240: /* Data port 2. */ 554 case 0x300 ... 0x340: /* Data port 3. */ 555 case 0x400 ... 0x440: /* Data port 4. */ 556 case 0x500 ... 0x540: /* Data port 5. */ 557 case 0x800001: 558 return true; 559 560 default: 561 return false; 562 } 563 } 564 565 static const struct regmap_config tas_regmap = { 566 .reg_bits = 32, 567 .val_bits = 8, 568 .readable_reg = tas2783_readable_register, 569 .writeable_reg = tas2783_writeable_register, 570 .volatile_reg = tas2783_volatile_register, 571 .reg_defaults = tas2783_reg_default, 572 .num_reg_defaults = ARRAY_SIZE(tas2783_reg_default), 573 .max_register = 0x41008000 + TASDEV_REG_SDW(0xa1, 0x60, 0x7f), 574 .cache_type = REGCACHE_MAPLE, 575 .use_single_read = true, 576 .use_single_write = true, 577 }; 578 579 static const struct regmap_sdw_mbq_cfg tas2783_mbq_cfg = { 580 .mbq_size = tas2783_sdca_mbq_size, 581 }; 582 583 static s32 tas2783_digital_getvol(struct snd_kcontrol *kcontrol, 584 struct snd_ctl_elem_value *ucontrol) 585 { 586 return snd_soc_get_volsw(kcontrol, ucontrol); 587 } 588 589 static s32 tas2783_digital_putvol(struct snd_kcontrol *kcontrol, 590 struct snd_ctl_elem_value *ucontrol) 591 { 592 return snd_soc_put_volsw(kcontrol, ucontrol); 593 } 594 595 static s32 tas2783_amp_getvol(struct snd_kcontrol *kcontrol, 596 struct snd_ctl_elem_value *ucontrol) 597 { 598 return snd_soc_get_volsw(kcontrol, ucontrol); 599 } 600 601 static s32 tas2783_amp_putvol(struct snd_kcontrol *kcontrol, 602 struct snd_ctl_elem_value *ucontrol) 603 { 604 return snd_soc_put_volsw(kcontrol, ucontrol); 605 } 606 607 static const struct snd_kcontrol_new tas2783_snd_controls[] = { 608 SOC_SINGLE_RANGE_EXT_TLV("Amp Volume", TAS2783_AMP_LEVEL, 609 1, 0, 20, 0, tas2783_amp_getvol, 610 tas2783_amp_putvol, tas2781_amp_tlv), 611 SOC_SINGLE_RANGE_EXT_TLV("Speaker Volume", TAS2783_DVC_LVL, 612 0, 0, 200, 1, tas2783_digital_getvol, 613 tas2783_digital_putvol, tas2781_dvc_tlv), 614 }; 615 616 static s32 tas2783_validate_calibdata(struct tas2783_prv *tas_dev, 617 u8 *data, u32 size) 618 { 619 u32 ts, spk_count, size_calculated; 620 u32 crc_calculated, crc_read, i; 621 u32 *tmp_val; 622 struct tm tm; 623 624 i = 0; 625 tmp_val = (u32 *)data; 626 if (tmp_val[i++] != 2783) { 627 dev_err(tas_dev->dev, "cal data magic number mismatch"); 628 return -EINVAL; 629 } 630 631 spk_count = tmp_val[i++]; 632 if (spk_count > TAS2783_CALIB_MAX_SPK_COUNT) { 633 dev_err(tas_dev->dev, "cal data spk_count too large"); 634 return -EINVAL; 635 } 636 637 ts = tmp_val[i++]; 638 time64_to_tm(ts, 0, &tm); 639 dev_dbg(tas_dev->dev, "cal data timestamp: %ld-%d-%d %d:%d:%d", 640 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, 641 tm.tm_hour, tm.tm_min, tm.tm_sec); 642 643 size_calculated = 644 (spk_count * TAS2783_CALIB_PARAMS * sizeof(u32)) + 645 TAS2783_CALIB_HDR_SZ + TAS2783_CALIB_CRC_SZ; 646 if (size_calculated > TAS2783_CALIB_DATA_SZ) { 647 dev_err(tas_dev->dev, "cali data sz too large"); 648 return -EINVAL; 649 } else if (size < size_calculated) { 650 dev_err(tas_dev->dev, "cali data size mismatch calc=%u vs %d\n", 651 size, size_calculated); 652 return -EINVAL; 653 } 654 655 crc_calculated = crc32(~0, data, 656 size_calculated - TAS2783_CALIB_CRC_SZ) ^ ~0; 657 crc_read = tmp_val[(size_calculated - TAS2783_CALIB_CRC_SZ) / sizeof(u32)]; 658 if (crc_calculated != crc_read) { 659 dev_err(tas_dev->dev, 660 "calib data integrity check fail, 0x%08x vs 0x%08x\n", 661 crc_calculated, crc_read); 662 return -EINVAL; 663 } 664 665 return 0; 666 } 667 668 static void tas2783_set_calib_params_to_device(struct tas2783_prv *tas_dev, u32 *cali_data) 669 { 670 u32 dev_count, offset, i, device_num; 671 u32 reg_value; 672 u8 buf[4]; 673 674 dev_count = cali_data[1]; 675 offset = 3; 676 677 for (device_num = 0; device_num < dev_count; device_num++) { 678 if (cali_data[offset] != tas_dev->sdw_peripheral->id.unique_id) { 679 offset += TAS2783_CALIB_PARAMS; 680 continue; 681 } 682 offset++; 683 684 for (i = 0; i < ARRAY_SIZE(tas2783_cali_reg); i++) { 685 reg_value = cali_data[offset + i]; 686 buf[0] = reg_value >> 24; 687 buf[1] = reg_value >> 16; 688 buf[2] = reg_value >> 8; 689 buf[3] = reg_value & 0xff; 690 regmap_bulk_write(tas_dev->regmap, tas2783_cali_reg[i], 691 buf, sizeof(u32)); 692 } 693 break; 694 } 695 696 if (device_num == dev_count) 697 dev_err(tas_dev->dev, 698 "unique id not found in the calib data\n"); 699 else 700 dev_dbg(tas_dev->dev, "calib data update done\n"); 701 } 702 703 static s32 tas2783_update_calibdata(struct tas2783_prv *tas_dev) 704 { 705 efi_guid_t efi_guid = TAS2783_CALI_GUID; 706 u32 attr, i, *tmp_val; 707 unsigned long size; 708 s32 ret; 709 efi_status_t status; 710 static efi_char16_t efi_names[][32] = { 711 L"SmartAmpCalibrationData", L"CALI_DATA"}; 712 713 tmp_val = (u32 *)tas_dev->cali_data.data; 714 attr = 0; 715 716 /* 717 * In some cases, the calibration is performed in Windows, 718 * and data was saved in UEFI. Linux can access it. 719 */ 720 for (i = 0; i < ARRAY_SIZE(efi_names); i++) { 721 size = 0; 722 status = efi.get_variable(efi_names[i], &efi_guid, &attr, 723 &size, NULL); 724 if (size > TAS2783_CALIB_DATA_SZ) { 725 dev_err(tas_dev->dev, "cali data too large\n"); 726 break; 727 } 728 729 tas_dev->cali_data.read_sz = size; 730 if (status == EFI_BUFFER_TOO_SMALL) { 731 status = efi.get_variable(efi_names[i], &efi_guid, &attr, 732 &tas_dev->cali_data.read_sz, 733 tas_dev->cali_data.data); 734 dev_dbg(tas_dev->dev, "cali get %lu bytes result:%ld\n", 735 tas_dev->cali_data.read_sz, status); 736 } 737 if (status == EFI_SUCCESS) 738 break; 739 } 740 741 if (status != EFI_SUCCESS) { 742 /* Failed got calibration data from EFI. */ 743 dev_dbg(tas_dev->dev, "No calibration data in UEFI."); 744 return 0; 745 } 746 747 scoped_guard(mutex, &tas_dev->calib_lock) { 748 ret = tas2783_validate_calibdata(tas_dev, tas_dev->cali_data.data, 749 tas_dev->cali_data.read_sz); 750 if (!ret) 751 tas2783_set_calib_params_to_device(tas_dev, tmp_val); 752 } 753 754 return ret; 755 } 756 757 static s32 tas_fw_read_hdr(const u8 *data, struct tas_fw_hdr *hdr) 758 { 759 hdr->size = get_unaligned_le32(data); 760 hdr->version_offset = get_unaligned_le32(&data[4]); 761 hdr->plt_id = get_unaligned_le32(&data[8]); 762 hdr->ppc3_ver = get_unaligned_le32(&data[12]); 763 memcpy(hdr->ddc_name, &data[16], 64); 764 hdr->timestamp = get_unaligned_le32(&data[80]); 765 766 return 84; 767 } 768 769 static s32 tas_fw_get_next_file(const u8 *data, struct tas_fw_file *file) 770 { 771 file->vendor_id = get_unaligned_le32(&data[0]); 772 file->file_id = get_unaligned_le32(&data[4]); 773 file->version = get_unaligned_le32(&data[8]); 774 file->length = get_unaligned_le32(&data[12]); 775 file->dest_addr = get_unaligned_le32(&data[16]); 776 file->fw_data = (u8 *)&data[20]; 777 778 return file->length + sizeof(u32) * 5; 779 } 780 781 static void tas2783_fw_ready(const struct firmware *fmw, void *context) 782 { 783 struct tas2783_prv *tas_dev = 784 (struct tas2783_prv *)context; 785 const u8 *buf = NULL; 786 s32 img_sz, ret = 0, cur_file = 0; 787 s32 offset = 0; 788 789 struct tas_fw_hdr *hdr __free(kfree) = kzalloc_obj(*hdr); 790 struct tas_fw_file *file __free(kfree) = kzalloc_obj(*file); 791 if (!file || !hdr) { 792 ret = -ENOMEM; 793 goto out; 794 } 795 796 /* firmware binary not found*/ 797 if (!fmw || !fmw->data) { 798 if (!tas_dev->fw_use_fallback) { 799 tas_dev->fw_use_fallback = true; 800 dev_info(tas_dev->dev, 801 "Failed to read preferred fw binary: %s, attempting fallback binary load\n", 802 tas_dev->rca_binaryname); 803 } else { 804 dev_err(tas_dev->dev, 805 "Failed to read fallback fw binary %s\n", 806 tas_dev->rca_binaryname); 807 } 808 809 ret = -EINVAL; 810 goto out; 811 } 812 813 img_sz = fmw->size; 814 buf = fmw->data; 815 offset += tas_fw_read_hdr(buf, hdr); 816 if (hdr->size != img_sz) { 817 ret = -EINVAL; 818 dev_err(tas_dev->dev, "firmware size mismatch with header"); 819 goto out; 820 } 821 822 if (img_sz < FW_DL_OFFSET) { 823 ret = -EINVAL; 824 dev_err(tas_dev->dev, "unexpected size, size is too small"); 825 goto out; 826 } 827 828 mutex_lock(&tas_dev->pde_lock); 829 while (offset < (img_sz - FW_FL_HDR)) { 830 offset += tas_fw_get_next_file(&buf[offset], file); 831 dev_dbg(tas_dev->dev, 832 "v=%d, fid=%d, ver=%d, len=%d, daddr=0x%x, fw=%p", 833 file->vendor_id, file->file_id, 834 file->version, file->length, 835 file->dest_addr, file->fw_data); 836 837 ret = sdw_nwrite_no_pm(tas_dev->sdw_peripheral, 838 file->dest_addr, 839 file->length, 840 file->fw_data); 841 if (ret < 0) { 842 dev_err(tas_dev->dev, 843 "FW download failed: %d", ret); 844 break; 845 } 846 cur_file++; 847 } 848 mutex_unlock(&tas_dev->pde_lock); 849 850 if (cur_file == 0) { 851 dev_err(tas_dev->dev, "fw with no files"); 852 ret = -EINVAL; 853 } else { 854 tas2783_update_calibdata(tas_dev); 855 } 856 857 out: 858 if (!ret) 859 tas_dev->fw_dl_success = true; 860 tas_dev->fw_dl_task_done = true; 861 wake_up(&tas_dev->fw_wait); 862 if (fmw) 863 release_firmware(fmw); 864 } 865 866 static inline s32 tas_clear_latch(struct tas2783_prv *priv) 867 { 868 return regmap_update_bits(priv->regmap, 869 TASDEV_REG_SDW(0, 0, 0x5c), 870 0x04, 0x04); 871 } 872 873 static s32 tas_fu21_event(struct snd_soc_dapm_widget *w, 874 struct snd_kcontrol *k, s32 event) 875 { 876 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 877 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(component); 878 s32 mute; 879 880 switch (event) { 881 case SND_SOC_DAPM_POST_PMU: 882 mute = 0; 883 break; 884 885 case SND_SOC_DAPM_PRE_PMD: 886 mute = 1; 887 break; 888 } 889 890 return sdw_write_no_pm(tas_dev->sdw_peripheral, 891 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 892 TAS2783_SDCA_CTL_FU_MUTE, 1), mute); 893 } 894 895 static s32 tas_fu23_event(struct snd_soc_dapm_widget *w, 896 struct snd_kcontrol *k, s32 event) 897 { 898 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 899 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(component); 900 s32 mute; 901 902 switch (event) { 903 case SND_SOC_DAPM_POST_PMU: 904 mute = 0; 905 break; 906 907 case SND_SOC_DAPM_PRE_PMD: 908 mute = 1; 909 break; 910 } 911 912 return sdw_write_no_pm(tas_dev->sdw_peripheral, 913 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 914 TAS2783_SDCA_CTL_FU_MUTE, 1), mute); 915 } 916 917 static const struct snd_soc_dapm_widget tas_dapm_widgets[] = { 918 SND_SOC_DAPM_AIF_IN("ASI", "ASI Playback", 0, SND_SOC_NOPM, 0, 0), 919 SND_SOC_DAPM_AIF_OUT("ASI OUT", "ASI Capture", 0, SND_SOC_NOPM, 920 0, 0), 921 SND_SOC_DAPM_DAC_E("FU21", NULL, SND_SOC_NOPM, 0, 0, tas_fu21_event, 922 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 923 SND_SOC_DAPM_DAC_E("FU23", NULL, SND_SOC_NOPM, 0, 0, tas_fu23_event, 924 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 925 SND_SOC_DAPM_OUTPUT("SPK"), 926 SND_SOC_DAPM_INPUT("DMIC"), 927 }; 928 929 static const struct snd_soc_dapm_route tas_audio_map[] = { 930 {"FU21", NULL, "ASI"}, 931 {"SPK", NULL, "FU21"}, 932 {"FU23", NULL, "ASI"}, 933 {"SPK", NULL, "FU23"}, 934 {"ASI OUT", NULL, "DMIC"}, 935 }; 936 937 static s32 tas_set_sdw_stream(struct snd_soc_dai *dai, 938 void *sdw_stream, s32 direction) 939 { 940 if (!sdw_stream) 941 return 0; 942 943 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 944 945 return 0; 946 } 947 948 static void tas_sdw_shutdown(struct snd_pcm_substream *substream, 949 struct snd_soc_dai *dai) 950 { 951 snd_soc_dai_set_dma_data(dai, substream, NULL); 952 } 953 954 static s32 tas_sdw_hw_params(struct snd_pcm_substream *substream, 955 struct snd_pcm_hw_params *params, 956 struct snd_soc_dai *dai) 957 { 958 struct snd_soc_component *component = dai->component; 959 struct tas2783_prv *tas_dev = 960 snd_soc_component_get_drvdata(component); 961 struct sdw_stream_config stream_config = {0}; 962 struct sdw_port_config port_config = {0}; 963 struct sdw_stream_runtime *sdw_stream; 964 struct sdw_slave *sdw_peripheral = tas_dev->sdw_peripheral; 965 s32 ret, retry = 3; 966 967 if (!tas_dev->fw_dl_success) { 968 dev_err(tas_dev->dev, "error playback without fw download"); 969 return -EINVAL; 970 } 971 972 sdw_stream = snd_soc_dai_get_dma_data(dai, substream); 973 if (!sdw_stream) 974 return -EINVAL; 975 976 ret = tas_clear_latch(tas_dev); 977 if (ret) 978 dev_err(tas_dev->dev, 979 "clear latch failed, err=%d", ret); 980 981 scoped_guard(mutex, &tas_dev->pde_lock) { 982 /* 983 * Sometimes, there is error returned during power on. 984 * So added retry logic to ensure power on so that 985 * port prepare succeeds 986 */ 987 do { 988 ret = regmap_write(tas_dev->regmap, 989 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 990 TAS2783_SDCA_CTL_REQ_POW_STATE, 0), 991 TAS2783_SDCA_POW_STATE_ON); 992 if (!ret) 993 break; 994 usleep_range(2000, 2200); 995 } while (retry--); 996 } 997 998 if (ret) 999 return ret; 1000 1001 /* SoundWire specific configuration */ 1002 snd_sdw_params_to_config(substream, params, 1003 &stream_config, &port_config); 1004 /* port 1 for playback */ 1005 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 1006 port_config.num = 1; 1007 else 1008 port_config.num = 2; 1009 1010 ret = sdw_stream_add_slave(sdw_peripheral, 1011 &stream_config, &port_config, 1, sdw_stream); 1012 if (ret) 1013 dev_err(dai->dev, "Unable to configure port\n"); 1014 1015 return ret; 1016 } 1017 1018 static s32 tas_sdw_pcm_hw_free(struct snd_pcm_substream *substream, 1019 struct snd_soc_dai *dai) 1020 { 1021 struct snd_soc_component *component = dai->component; 1022 struct tas2783_prv *tas_dev = 1023 snd_soc_component_get_drvdata(component); 1024 struct sdw_stream_runtime *sdw_stream = 1025 snd_soc_dai_get_dma_data(dai, substream); 1026 1027 sdw_stream_remove_slave(tas_dev->sdw_peripheral, sdw_stream); 1028 1029 guard(mutex)(&tas_dev->pde_lock); 1030 return regmap_write(tas_dev->regmap, 1031 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 1032 TAS2783_SDCA_CTL_REQ_POW_STATE, 0), 1033 TAS2783_SDCA_POW_STATE_OFF); 1034 } 1035 1036 static const struct snd_soc_dai_ops tas_dai_ops = { 1037 .hw_params = tas_sdw_hw_params, 1038 .hw_free = tas_sdw_pcm_hw_free, 1039 .set_stream = tas_set_sdw_stream, 1040 .shutdown = tas_sdw_shutdown, 1041 }; 1042 1043 static struct snd_soc_dai_driver tas_dai_driver[] = { 1044 { 1045 .name = "tas2783-codec", 1046 .id = 0, 1047 .playback = { 1048 .stream_name = "Playback", 1049 .channels_min = 1, 1050 .channels_max = 4, 1051 .rates = TAS2783_DEVICE_RATES, 1052 .formats = TAS2783_DEVICE_FORMATS, 1053 }, 1054 .capture = { 1055 .stream_name = "Capture", 1056 .channels_min = 1, 1057 .channels_max = 4, 1058 .rates = TAS2783_DEVICE_RATES, 1059 .formats = TAS2783_DEVICE_FORMATS, 1060 }, 1061 .ops = &tas_dai_ops, 1062 .symmetric_rate = 1, 1063 }, 1064 }; 1065 1066 static s32 tas_component_probe(struct snd_soc_component *component) 1067 { 1068 struct tas2783_prv *tas_dev = 1069 snd_soc_component_get_drvdata(component); 1070 1071 tas_dev->component = component; 1072 1073 return 0; 1074 } 1075 1076 static void tas_component_remove(struct snd_soc_component *codec) 1077 { 1078 struct tas2783_prv *tas_dev = 1079 snd_soc_component_get_drvdata(codec); 1080 tas_dev->component = NULL; 1081 } 1082 1083 static const struct snd_soc_component_driver soc_codec_driver_tasdevice = { 1084 .probe = tas_component_probe, 1085 .remove = tas_component_remove, 1086 .controls = tas2783_snd_controls, 1087 .num_controls = ARRAY_SIZE(tas2783_snd_controls), 1088 .dapm_widgets = tas_dapm_widgets, 1089 .num_dapm_widgets = ARRAY_SIZE(tas_dapm_widgets), 1090 .dapm_routes = tas_audio_map, 1091 .num_dapm_routes = ARRAY_SIZE(tas_audio_map), 1092 .idle_bias_on = 1, 1093 .endianness = 1, 1094 }; 1095 1096 static s32 tas_init(struct tas2783_prv *tas_dev) 1097 { 1098 s32 ret; 1099 1100 dev_set_drvdata(tas_dev->dev, tas_dev); 1101 ret = devm_snd_soc_register_component(tas_dev->dev, 1102 &soc_codec_driver_tasdevice, 1103 tas_dai_driver, 1104 ARRAY_SIZE(tas_dai_driver)); 1105 if (ret) { 1106 dev_err(tas_dev->dev, "%s: codec register error:%d.\n", 1107 __func__, ret); 1108 return ret; 1109 } 1110 1111 /* set autosuspend parameters */ 1112 pm_runtime_set_autosuspend_delay(tas_dev->dev, 3000); 1113 pm_runtime_use_autosuspend(tas_dev->dev); 1114 /* make sure the device does not suspend immediately */ 1115 pm_runtime_mark_last_busy(tas_dev->dev); 1116 pm_runtime_enable(tas_dev->dev); 1117 1118 return ret; 1119 } 1120 1121 static s32 tas2783_sdca_dev_suspend(struct device *dev) 1122 { 1123 struct tas2783_prv *tas_dev = dev_get_drvdata(dev); 1124 1125 if (!tas_dev->hw_init) 1126 return 0; 1127 1128 regcache_cache_only(tas_dev->regmap, true); 1129 return 0; 1130 } 1131 1132 static s32 tas2783_sdca_dev_system_suspend(struct device *dev) 1133 { 1134 return tas2783_sdca_dev_suspend(dev); 1135 } 1136 1137 static s32 tas2783_sdca_dev_resume(struct device *dev) 1138 { 1139 struct sdw_slave *slave = dev_to_sdw_dev(dev); 1140 struct tas2783_prv *tas_dev = dev_get_drvdata(dev); 1141 int ret; 1142 1143 ret = sdw_slave_wait_for_init(slave, TAS2783_PROBE_TIMEOUT); 1144 if (ret) { 1145 sdw_show_ping_status(slave->bus, true); 1146 return ret; 1147 } 1148 1149 regcache_cache_only(tas_dev->regmap, false); 1150 ret = regcache_sync(tas_dev->regmap); 1151 if (ret) { 1152 regcache_cache_only(tas_dev->regmap, true); 1153 regcache_mark_dirty(tas_dev->regmap); 1154 return ret; 1155 } 1156 1157 return 0; 1158 } 1159 1160 static const struct dev_pm_ops tas2783_sdca_pm = { 1161 SYSTEM_SLEEP_PM_OPS(tas2783_sdca_dev_system_suspend, tas2783_sdca_dev_resume) 1162 RUNTIME_PM_OPS(tas2783_sdca_dev_suspend, tas2783_sdca_dev_resume, NULL) 1163 }; 1164 1165 static void tas_generate_fw_name(struct sdw_slave *slave, char *name, size_t size) 1166 { 1167 struct sdw_bus *bus = slave->bus; 1168 u8 unique_id = slave->id.unique_id; 1169 bool pci_found = false; 1170 #if IS_ENABLED(CONFIG_PCI) 1171 struct device *dev = &slave->dev; 1172 struct tas2783_prv *tas_dev = dev_get_drvdata(&slave->dev); 1173 struct pci_dev *pci = NULL; 1174 const char *fw_uid_prefix = tas_dev->fw_use_fallback ? "" : "0x"; 1175 1176 for (; dev; dev = dev->parent) { 1177 if (dev->bus == &pci_bus_type) { 1178 pci = to_pci_dev(dev); 1179 scnprintf(name, size, "%04X-%1X-%s%1X.bin", 1180 pci->subsystem_device, bus->link_id, 1181 fw_uid_prefix, unique_id); 1182 pci_found = true; 1183 break; 1184 } 1185 } 1186 #endif 1187 1188 if (!pci_found) 1189 scnprintf(name, size, "tas2783-%1X-%1X.bin", 1190 bus->link_id, unique_id); 1191 } 1192 1193 static s32 tas_fw_load(struct tas2783_prv *tas_dev, struct sdw_slave *slave) 1194 { 1195 s32 ret; 1196 u8 unique_id = tas_dev->sdw_peripheral->id.unique_id; 1197 1198 tas_generate_fw_name(slave, tas_dev->rca_binaryname, 1199 sizeof(tas_dev->rca_binaryname)); 1200 1201 tas_dev->fw_dl_task_done = false; 1202 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, 1203 tas_dev->rca_binaryname, tas_dev->dev, 1204 GFP_KERNEL, tas_dev, tas2783_fw_ready); 1205 if (ret) { 1206 dev_err(tas_dev->dev, 1207 "firmware request failed for uid=%d, ret=%d\n", 1208 unique_id, ret); 1209 return ret; 1210 } 1211 1212 ret = wait_event_timeout(tas_dev->fw_wait, tas_dev->fw_dl_task_done, 1213 msecs_to_jiffies(TIMEOUT_FW_DL_MS)); 1214 if (!ret) { 1215 dev_err(tas_dev->dev, "fw request, wait_event timeout\n"); 1216 return -EAGAIN; 1217 } 1218 1219 return 0; 1220 } 1221 1222 static s32 tas_io_init(struct device *dev, struct sdw_slave *slave) 1223 { 1224 struct tas2783_prv *tas_dev = dev_get_drvdata(dev); 1225 s32 ret; 1226 1227 if (tas_dev->hw_init) 1228 return 0; 1229 1230 tas_dev->fw_dl_success = false; 1231 1232 ret = regmap_write(tas_dev->regmap, TAS2783_SW_RESET, 0x1); 1233 if (ret) { 1234 dev_err(dev, "sw reset failed, err=%d", ret); 1235 return ret; 1236 } 1237 usleep_range(2000, 2200); 1238 1239 tas_dev->fw_use_fallback = false; 1240 ret = tas_fw_load(tas_dev, slave); 1241 if (!ret && tas_dev->fw_use_fallback) 1242 ret = tas_fw_load(tas_dev, slave); 1243 1244 if (!ret) { 1245 if (tas_dev->sa_func_data) 1246 ret = sdca_regmap_write_init(dev, tas_dev->regmap, 1247 tas_dev->sa_func_data); 1248 else 1249 ret = regmap_multi_reg_write(tas_dev->regmap, tas2783_init_seq, 1250 ARRAY_SIZE(tas2783_init_seq)); 1251 1252 if (ret) 1253 dev_err(tas_dev->dev, 1254 "init writes failed, err=%d", ret); 1255 else 1256 tas_dev->hw_init = true; 1257 } 1258 1259 return ret; 1260 } 1261 1262 static s32 tas_update_status(struct sdw_slave *slave, 1263 enum sdw_slave_status status) 1264 { 1265 struct tas2783_prv *tas_dev = dev_get_drvdata(&slave->dev); 1266 struct device *dev = &slave->dev; 1267 1268 dev_dbg(dev, "Peripheral status = %s", 1269 status == SDW_SLAVE_UNATTACHED ? "unattached" : 1270 status == SDW_SLAVE_ATTACHED ? "attached" : "alert"); 1271 1272 tas_dev->status = status; 1273 if (status == SDW_SLAVE_UNATTACHED) 1274 tas_dev->hw_init = false; 1275 1276 /* Perform initialization only if slave status 1277 * is present and hw_init flag is false 1278 */ 1279 if (tas_dev->hw_init || tas_dev->status != SDW_SLAVE_ATTACHED) 1280 return 0; 1281 1282 regcache_cache_only(tas_dev->regmap, false); 1283 1284 /* 1285 * The device is attaching uninitialized: either this is the first 1286 * attach, or it lost power (and with it all register and DSP state) 1287 * while the controller was power-gated during system suspend. The 1288 * cache still holds the pre-suspend values, and tas_io_init() below 1289 * resets the device via TAS2783_SW_RESET anyway, so syncing it back 1290 * is both useless and harmful: later read-modify-write updates would 1291 * compare against stale data and skip the hardware write. 1292 * 1293 * Drop the cache instead, so that subsequent accesses see the real 1294 * hardware state. Syncing after the reset is not an option either: 1295 * the cache accepts registers for which tas2783_sdca_mbq_size() 1296 * returns 0, and writing those back fails with -EINVAL. 1297 */ 1298 regcache_drop_region(tas_dev->regmap, 0, UINT_MAX); 1299 1300 /* perform I/O transfers required for Slave initialization */ 1301 return tas_io_init(&slave->dev, slave); 1302 } 1303 1304 /* 1305 * TAS2783 requires explicit port prepare during playback stream 1306 * setup even when simple_ch_prep_sm is enabled. Without this, 1307 * the port fails to enter the prepared state resulting in no audio output. 1308 */ 1309 static int tas_port_prep(struct sdw_slave *slave, struct sdw_prepare_ch *prep_ch, 1310 enum sdw_port_prep_ops pre_ops) 1311 { 1312 struct device *dev = &slave->dev; 1313 struct tas2783_prv *tas_dev = dev_get_drvdata(dev); 1314 struct sdw_dpn_prop *dpn_prop; 1315 u32 addr; 1316 int ret; 1317 1318 dpn_prop = slave->prop.sink_dpn_prop; 1319 if (!dpn_prop || !dpn_prop->simple_ch_prep_sm) 1320 return 0; 1321 1322 addr = SDW_DPN_PREPARECTRL(prep_ch->num); 1323 switch (pre_ops) { 1324 case SDW_OPS_PORT_PRE_PREP: 1325 /* 1326 * The Function has to be powered before the port can complete 1327 * channel preparation. hw_params() does that when a stream is 1328 * set up, but a stream that is only re-prepared - as it is 1329 * after the peripheral lost power in S0i3 - does not go 1330 * through hw_params() again, and the peripheral is back at its 1331 * PS3 reset default. Power it up here, where it is needed. 1332 */ 1333 scoped_guard(mutex, &tas_dev->pde_lock) 1334 ret = regmap_write(tas_dev->regmap, 1335 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 1336 TAS2783_SDCA_CTL_REQ_POW_STATE, 0), 1337 TAS2783_SDCA_POW_STATE_ON); 1338 if (ret) { 1339 dev_err(dev, "power up failed for port %d, err=%d\n", 1340 prep_ch->num, ret); 1341 return ret; 1342 } 1343 1344 ret = sdw_write_no_pm(slave, addr, prep_ch->ch_mask); 1345 if (ret) 1346 dev_err(dev, "prep failed for port %d, err=%d\n", 1347 prep_ch->num, ret); 1348 return ret; 1349 1350 case SDW_OPS_PORT_PRE_DEPREP: 1351 ret = sdw_write_no_pm(slave, addr, 0x00); 1352 if (ret) 1353 dev_err(dev, "de-prep failed for port %d, err=%d\n", 1354 prep_ch->num, ret); 1355 return ret; 1356 1357 case SDW_OPS_PORT_POST_PREP: 1358 case SDW_OPS_PORT_POST_DEPREP: 1359 /* No POST handling required for TAS2783 */ 1360 return 0; 1361 } 1362 1363 return 0; 1364 } 1365 1366 static const struct sdw_slave_ops tas_sdw_ops = { 1367 .update_status = tas_update_status, 1368 .port_prep = tas_port_prep, 1369 }; 1370 1371 static void tas_remove(struct tas2783_prv *tas_dev) 1372 { 1373 snd_soc_unregister_component(tas_dev->dev); 1374 } 1375 1376 static s32 tas_sdw_probe(struct sdw_slave *peripheral, 1377 const struct sdw_device_id *id) 1378 { 1379 struct regmap *regmap; 1380 struct device *dev = &peripheral->dev; 1381 struct tas2783_prv *tas_dev; 1382 struct sdca_function_data *function_data = NULL; 1383 int ret, i; 1384 1385 ret = sdw_slave_read_prop(peripheral); 1386 if (ret) 1387 return dev_err_probe(dev, ret, 1388 "slave property read failed"); 1389 1390 tas_dev = devm_kzalloc(dev, sizeof(*tas_dev), GFP_KERNEL); 1391 if (!tas_dev) 1392 return dev_err_probe(dev, -ENOMEM, 1393 "Failed devm_kzalloc"); 1394 1395 i = -1; 1396 /* check if we have any SDCA function data available */ 1397 if (peripheral->sdca_data.num_functions > 0) { 1398 dev_dbg(dev, "SDCA functions found: %d", peripheral->sdca_data.num_functions); 1399 1400 /* Look for Smart Amp function type */ 1401 for (i = 0; i < peripheral->sdca_data.num_functions; i++) { 1402 if (peripheral->sdca_data.function[i].type == 1403 SDCA_FUNCTION_TYPE_SMART_AMP) { 1404 dev_info(dev, "Found Smart Amp function at index %d", i); 1405 break; 1406 } 1407 } 1408 } 1409 1410 if (i >= 0 && i < peripheral->sdca_data.num_functions) { 1411 /* Allocate memory for function data */ 1412 function_data = devm_kzalloc(dev, sizeof(*function_data), 1413 GFP_KERNEL); 1414 if (!function_data) 1415 return dev_err_probe(dev, -ENOMEM, 1416 "failed to parse sdca functions"); 1417 1418 function_data->desc = &peripheral->sdca_data.function[i]; 1419 1420 /* Parse the function */ 1421 ret = sdca_parse_function(dev, function_data); 1422 if (!ret) 1423 tas_dev->sa_func_data = function_data; 1424 else 1425 dev_warn(dev, "smartamp function parse failed:err%d, using defaults", ret); 1426 } 1427 1428 tas_dev->dev = dev; 1429 tas_dev->sdw_peripheral = peripheral; 1430 tas_dev->hw_init = false; 1431 mutex_init(&tas_dev->calib_lock); 1432 mutex_init(&tas_dev->pde_lock); 1433 1434 init_waitqueue_head(&tas_dev->fw_wait); 1435 dev_set_drvdata(dev, tas_dev); 1436 regmap = devm_regmap_init_sdw_mbq_cfg(&peripheral->dev, 1437 peripheral, 1438 &tas_regmap, 1439 &tas2783_mbq_cfg); 1440 if (IS_ERR(regmap)) 1441 return dev_err_probe(dev, PTR_ERR(regmap), 1442 "Failed devm_regmap_init_sdw."); 1443 1444 /* keep in cache until the device is fully initialized */ 1445 regcache_cache_only(regmap, true); 1446 tas_dev->regmap = regmap; 1447 return tas_init(tas_dev); 1448 } 1449 1450 static void tas_sdw_remove(struct sdw_slave *peripheral) 1451 { 1452 struct tas2783_prv *tas_dev = dev_get_drvdata(&peripheral->dev); 1453 1454 pm_runtime_disable(tas_dev->dev); 1455 tas_remove(tas_dev); 1456 mutex_destroy(&tas_dev->calib_lock); 1457 mutex_destroy(&tas_dev->pde_lock); 1458 dev_set_drvdata(&peripheral->dev, NULL); 1459 } 1460 1461 static const struct sdw_device_id tas_sdw_id[] = { 1462 /* chipid for the TAS2783 is 0x0000 */ 1463 SDW_SLAVE_ENTRY(0x0102, 0x0000, 0), 1464 {}, 1465 }; 1466 MODULE_DEVICE_TABLE(sdw, tas_sdw_id); 1467 1468 static struct sdw_driver tas_sdw_driver = { 1469 .driver = { 1470 .name = "slave-tas2783", 1471 .pm = pm_ptr(&tas2783_sdca_pm), 1472 }, 1473 .probe = tas_sdw_probe, 1474 .remove = tas_sdw_remove, 1475 .ops = &tas_sdw_ops, 1476 .id_table = tas_sdw_id, 1477 }; 1478 module_sdw_driver(tas_sdw_driver); 1479 1480 MODULE_IMPORT_NS("SND_SOC_SDCA"); 1481 MODULE_AUTHOR("Texas Instruments Inc."); 1482 MODULE_DESCRIPTION("ASoC TAS2783 SoundWire Driver"); 1483 MODULE_LICENSE("GPL"); 1484