1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2020-2021 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/sched/task.h> 26 #include <linux/dynamic_debug.h> 27 #include <drm/ttm/ttm_tt.h> 28 #include <drm/drm_exec.h> 29 30 #include "amdgpu_sync.h" 31 #include "amdgpu_object.h" 32 #include "amdgpu_vm.h" 33 #include "amdgpu_hmm.h" 34 #include "amdgpu.h" 35 #include "amdgpu_xgmi.h" 36 #include "amdgpu_reset.h" 37 #include "kfd_priv.h" 38 #include "kfd_svm.h" 39 #include "kfd_migrate.h" 40 #include "kfd_smi_events.h" 41 42 #ifdef dev_fmt 43 #undef dev_fmt 44 #endif 45 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__ 46 47 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1 48 49 /* Long enough to ensure no retry fault comes after svm range is restored and 50 * page table is updated. 51 */ 52 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC) 53 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG) 54 #define dynamic_svm_range_dump(svms) \ 55 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms) 56 #else 57 #define dynamic_svm_range_dump(svms) \ 58 do { if (0) svm_range_debug_dump(svms); } while (0) 59 #endif 60 61 /* Giant svm range split into smaller ranges based on this, it is decided using 62 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to 63 * power of 2MB. 64 */ 65 static uint64_t max_svm_range_pages; 66 67 struct criu_svm_metadata { 68 struct list_head list; 69 struct kfd_criu_svm_range_priv_data data; 70 }; 71 72 static void svm_range_evict_svm_bo_worker(struct work_struct *work); 73 static bool 74 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 75 const struct mmu_notifier_range *range, 76 unsigned long cur_seq); 77 static int 78 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 79 uint64_t *bo_s, uint64_t *bo_l); 80 static const struct mmu_interval_notifier_ops svm_range_mn_ops = { 81 .invalidate = svm_range_cpu_invalidate_pagetables, 82 }; 83 84 /** 85 * svm_range_unlink - unlink svm_range from lists and interval tree 86 * @prange: svm range structure to be removed 87 * 88 * Remove the svm_range from the svms and svm_bo lists and the svms 89 * interval tree. 90 * 91 * Context: The caller must hold svms->lock 92 */ 93 static void svm_range_unlink(struct svm_range *prange) 94 { 95 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 96 prange, prange->start, prange->last); 97 98 if (prange->svm_bo) { 99 spin_lock(&prange->svm_bo->list_lock); 100 list_del(&prange->svm_bo_list); 101 spin_unlock(&prange->svm_bo->list_lock); 102 } 103 104 list_del(&prange->list); 105 if (prange->it_node.start != 0 && prange->it_node.last != 0) 106 interval_tree_remove(&prange->it_node, &prange->svms->objects); 107 } 108 109 static void 110 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange) 111 { 112 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 113 prange, prange->start, prange->last); 114 115 mmu_interval_notifier_insert_locked(&prange->notifier, mm, 116 prange->start << PAGE_SHIFT, 117 prange->npages << PAGE_SHIFT, 118 &svm_range_mn_ops); 119 } 120 121 /** 122 * svm_range_add_to_svms - add svm range to svms 123 * @prange: svm range structure to be added 124 * 125 * Add the svm range to svms interval tree and link list 126 * 127 * Context: The caller must hold svms->lock 128 */ 129 static void svm_range_add_to_svms(struct svm_range *prange) 130 { 131 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, 132 prange, prange->start, prange->last); 133 134 list_move_tail(&prange->list, &prange->svms->list); 135 prange->it_node.start = prange->start; 136 prange->it_node.last = prange->last; 137 interval_tree_insert(&prange->it_node, &prange->svms->objects); 138 } 139 140 static void svm_range_remove_notifier(struct svm_range *prange) 141 { 142 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", 143 prange->svms, prange, 144 prange->notifier.interval_tree.start >> PAGE_SHIFT, 145 prange->notifier.interval_tree.last >> PAGE_SHIFT); 146 147 if (prange->notifier.interval_tree.start != 0 && 148 prange->notifier.interval_tree.last != 0) 149 mmu_interval_notifier_remove(&prange->notifier); 150 } 151 152 static bool 153 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr) 154 { 155 return dma_addr && !dma_mapping_error(dev, dma_addr) && 156 !(dma_addr & SVM_RANGE_VRAM_DOMAIN); 157 } 158 159 static int 160 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange, 161 unsigned long offset, unsigned long npages, 162 unsigned long *hmm_pfns, uint32_t gpuidx) 163 { 164 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 165 dma_addr_t *addr = prange->dma_addr[gpuidx]; 166 struct device *dev = adev->dev; 167 struct page *page; 168 int i, r; 169 170 if (!addr) { 171 addr = kvzalloc_objs(*addr, prange->npages); 172 if (!addr) 173 return -ENOMEM; 174 prange->dma_addr[gpuidx] = addr; 175 } 176 177 addr += offset; 178 for (i = 0; i < npages; i++) { 179 if (svm_is_valid_dma_mapping_addr(dev, addr[i])) 180 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir); 181 182 page = hmm_pfn_to_page(hmm_pfns[i]); 183 if (is_zone_device_page(page)) { 184 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev; 185 186 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) + 187 bo_adev->vm_manager.vram_base_offset - 188 bo_adev->kfd.pgmap.range.start; 189 addr[i] |= SVM_RANGE_VRAM_DOMAIN; 190 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]); 191 continue; 192 } 193 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir); 194 r = dma_mapping_error(dev, addr[i]); 195 if (r) { 196 dev_err(dev, "failed %d dma_map_page\n", r); 197 return r; 198 } 199 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n", 200 addr[i] >> PAGE_SHIFT, page_to_pfn(page)); 201 } 202 203 return 0; 204 } 205 206 static int 207 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap, 208 unsigned long offset, unsigned long npages, 209 unsigned long *hmm_pfns) 210 { 211 struct kfd_process *p; 212 uint32_t gpuidx; 213 int r; 214 215 p = container_of(prange->svms, struct kfd_process, svms); 216 217 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 218 struct kfd_process_device *pdd; 219 220 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 221 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 222 if (!pdd) { 223 pr_debug("failed to find device idx %d\n", gpuidx); 224 return -EINVAL; 225 } 226 227 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages, 228 hmm_pfns, gpuidx); 229 if (r) 230 break; 231 } 232 233 return r; 234 } 235 236 void svm_range_dma_unmap_dev(struct device *dev, dma_addr_t *dma_addr, 237 unsigned long offset, unsigned long npages) 238 { 239 enum dma_data_direction dir = DMA_BIDIRECTIONAL; 240 int i; 241 242 if (!dma_addr) 243 return; 244 245 for (i = offset; i < offset + npages; i++) { 246 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i])) 247 continue; 248 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT); 249 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir); 250 dma_addr[i] = 0; 251 } 252 } 253 254 void svm_range_dma_unmap(struct svm_range *prange) 255 { 256 struct kfd_process_device *pdd; 257 dma_addr_t *dma_addr; 258 struct device *dev; 259 struct kfd_process *p; 260 uint32_t gpuidx; 261 262 p = container_of(prange->svms, struct kfd_process, svms); 263 264 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 265 dma_addr = prange->dma_addr[gpuidx]; 266 if (!dma_addr) 267 continue; 268 269 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 270 if (!pdd) { 271 pr_debug("failed to find device idx %d\n", gpuidx); 272 continue; 273 } 274 dev = &pdd->dev->adev->pdev->dev; 275 276 svm_range_dma_unmap_dev(dev, dma_addr, 0, prange->npages); 277 } 278 } 279 280 static void svm_range_free(struct svm_range *prange, bool do_unmap) 281 { 282 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT; 283 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms); 284 uint32_t gpuidx; 285 286 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange, 287 prange->start, prange->last); 288 289 svm_range_vram_node_free(prange); 290 if (do_unmap) 291 svm_range_dma_unmap(prange); 292 293 if (do_unmap && !p->xnack_enabled) { 294 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size); 295 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 296 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 297 } 298 299 /* free dma_addr array for each gpu */ 300 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) { 301 if (prange->dma_addr[gpuidx]) { 302 kvfree(prange->dma_addr[gpuidx]); 303 prange->dma_addr[gpuidx] = NULL; 304 } 305 } 306 307 mutex_destroy(&prange->lock); 308 mutex_destroy(&prange->migrate_mutex); 309 kfree(prange); 310 } 311 312 static void 313 svm_range_set_default_attributes(struct svm_range_list *svms, int32_t *location, 314 int32_t *prefetch_loc, uint8_t *granularity, 315 uint32_t *flags) 316 { 317 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 318 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 319 *granularity = svms->default_granularity; 320 *flags = 321 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT; 322 } 323 324 static struct 325 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start, 326 uint64_t last, bool update_mem_usage) 327 { 328 uint64_t size = last - start + 1; 329 struct svm_range *prange; 330 struct kfd_process *p; 331 332 prange = kzalloc_obj(*prange); 333 if (!prange) 334 return NULL; 335 336 p = container_of(svms, struct kfd_process, svms); 337 if (!p->xnack_enabled && update_mem_usage && 338 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT, 339 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) { 340 pr_info("SVM mapping failed, exceeds resident system memory limit\n"); 341 kfree(prange); 342 return NULL; 343 } 344 prange->npages = size; 345 prange->svms = svms; 346 prange->start = start; 347 prange->last = last; 348 INIT_LIST_HEAD(&prange->list); 349 INIT_LIST_HEAD(&prange->update_list); 350 INIT_LIST_HEAD(&prange->svm_bo_list); 351 INIT_LIST_HEAD(&prange->deferred_list); 352 INIT_LIST_HEAD(&prange->child_list); 353 atomic_set(&prange->invalid, 0); 354 prange->validate_timestamp = 0; 355 prange->vram_pages = 0; 356 mutex_init(&prange->migrate_mutex); 357 mutex_init(&prange->lock); 358 359 if (p->xnack_enabled) 360 bitmap_copy(prange->bitmap_access, svms->bitmap_supported, 361 MAX_GPU_INSTANCE); 362 363 svm_range_set_default_attributes(svms, &prange->preferred_loc, 364 &prange->prefetch_loc, 365 &prange->granularity, &prange->flags); 366 367 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last); 368 369 return prange; 370 } 371 372 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo) 373 { 374 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref)) 375 return false; 376 377 return true; 378 } 379 380 static void svm_range_bo_release(struct kref *kref) 381 { 382 struct svm_range_bo *svm_bo; 383 384 svm_bo = container_of(kref, struct svm_range_bo, kref); 385 pr_debug("svm_bo 0x%p\n", svm_bo); 386 387 spin_lock(&svm_bo->list_lock); 388 while (!list_empty(&svm_bo->range_list)) { 389 struct svm_range *prange = 390 list_first_entry(&svm_bo->range_list, 391 struct svm_range, svm_bo_list); 392 /* list_del_init tells a concurrent svm_range_vram_node_new when 393 * it's safe to reuse the svm_bo pointer and svm_bo_list head. 394 */ 395 list_del_init(&prange->svm_bo_list); 396 spin_unlock(&svm_bo->list_lock); 397 398 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 399 prange->start, prange->last); 400 mutex_lock(&prange->lock); 401 prange->svm_bo = NULL; 402 /* prange should not hold vram page now */ 403 WARN_ONCE(prange->actual_loc, "prange should not hold vram page"); 404 mutex_unlock(&prange->lock); 405 406 spin_lock(&svm_bo->list_lock); 407 } 408 spin_unlock(&svm_bo->list_lock); 409 410 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 411 struct kfd_process_device *pdd; 412 struct kfd_process *p; 413 struct mm_struct *mm; 414 415 mm = svm_bo->eviction_fence->mm; 416 /* 417 * The forked child process takes svm_bo device pages ref, svm_bo could be 418 * released after parent process is gone. 419 */ 420 p = kfd_lookup_process_by_mm(mm); 421 if (p) { 422 pdd = kfd_get_process_device_data(svm_bo->node, p); 423 if (pdd) 424 atomic64_sub(amdgpu_bo_size(svm_bo->bo), &pdd->vram_usage); 425 kfd_unref_process(p); 426 } 427 mmput(mm); 428 } 429 430 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) 431 /* We're not in the eviction worker. Signal the fence. */ 432 dma_fence_signal(&svm_bo->eviction_fence->base); 433 dma_fence_put(&svm_bo->eviction_fence->base); 434 amdgpu_bo_unref(&svm_bo->bo); 435 kfree(svm_bo); 436 } 437 438 static void svm_range_bo_wq_release(struct work_struct *work) 439 { 440 struct svm_range_bo *svm_bo; 441 442 svm_bo = container_of(work, struct svm_range_bo, release_work); 443 svm_range_bo_release(&svm_bo->kref); 444 } 445 446 static void svm_range_bo_release_async(struct kref *kref) 447 { 448 struct svm_range_bo *svm_bo; 449 450 svm_bo = container_of(kref, struct svm_range_bo, kref); 451 pr_debug("svm_bo 0x%p\n", svm_bo); 452 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release); 453 schedule_work(&svm_bo->release_work); 454 } 455 456 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo) 457 { 458 kref_put(&svm_bo->kref, svm_range_bo_release_async); 459 } 460 461 static void svm_range_bo_unref(struct svm_range_bo *svm_bo) 462 { 463 if (svm_bo) 464 kref_put(&svm_bo->kref, svm_range_bo_release); 465 } 466 467 static bool 468 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange) 469 { 470 mutex_lock(&prange->lock); 471 if (!prange->svm_bo) { 472 mutex_unlock(&prange->lock); 473 return false; 474 } 475 if (prange->ttm_res) { 476 /* We still have a reference, all is well */ 477 mutex_unlock(&prange->lock); 478 return true; 479 } 480 if (svm_bo_ref_unless_zero(prange->svm_bo)) { 481 /* 482 * Migrate from GPU to GPU, remove range from source svm_bo->node 483 * range list, and return false to allocate svm_bo from destination 484 * node. 485 */ 486 if (prange->svm_bo->node != node) { 487 mutex_unlock(&prange->lock); 488 489 spin_lock(&prange->svm_bo->list_lock); 490 list_del_init(&prange->svm_bo_list); 491 spin_unlock(&prange->svm_bo->list_lock); 492 493 svm_range_bo_unref(prange->svm_bo); 494 return false; 495 } 496 if (READ_ONCE(prange->svm_bo->evicting)) { 497 struct dma_fence *f; 498 struct svm_range_bo *svm_bo; 499 /* The BO is getting evicted, 500 * we need to get a new one 501 */ 502 mutex_unlock(&prange->lock); 503 svm_bo = prange->svm_bo; 504 f = dma_fence_get(&svm_bo->eviction_fence->base); 505 svm_range_bo_unref(prange->svm_bo); 506 /* wait for the fence to avoid long spin-loop 507 * at list_empty_careful 508 */ 509 dma_fence_wait(f, false); 510 dma_fence_put(f); 511 } else { 512 /* The BO was still around and we got 513 * a new reference to it 514 */ 515 mutex_unlock(&prange->lock); 516 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n", 517 prange->svms, prange->start, prange->last); 518 519 prange->ttm_res = prange->svm_bo->bo->tbo.resource; 520 return true; 521 } 522 523 } else { 524 mutex_unlock(&prange->lock); 525 } 526 527 /* We need a new svm_bo. Spin-loop to wait for concurrent 528 * svm_range_bo_release to finish removing this range from 529 * its range list and set prange->svm_bo to null. After this, 530 * it is safe to reuse the svm_bo pointer and svm_bo_list head. 531 */ 532 while (!list_empty_careful(&prange->svm_bo_list) || prange->svm_bo) 533 cond_resched(); 534 535 return false; 536 } 537 538 static struct svm_range_bo *svm_range_bo_new(void) 539 { 540 struct svm_range_bo *svm_bo; 541 542 svm_bo = kzalloc_obj(*svm_bo); 543 if (!svm_bo) 544 return NULL; 545 546 kref_init(&svm_bo->kref); 547 INIT_LIST_HEAD(&svm_bo->range_list); 548 spin_lock_init(&svm_bo->list_lock); 549 550 return svm_bo; 551 } 552 553 int 554 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange, 555 bool clear) 556 { 557 struct kfd_process_device *pdd; 558 struct amdgpu_bo_param bp; 559 struct svm_range_bo *svm_bo; 560 struct amdgpu_bo_user *ubo; 561 struct amdgpu_bo *bo; 562 struct kfd_process *p; 563 struct mm_struct *mm; 564 int r; 565 566 p = container_of(prange->svms, struct kfd_process, svms); 567 pr_debug("process pid: %d svms 0x%p [0x%lx 0x%lx]\n", 568 p->lead_thread->pid, prange->svms, 569 prange->start, prange->last); 570 571 if (svm_range_validate_svm_bo(node, prange)) 572 return 0; 573 574 svm_bo = svm_range_bo_new(); 575 if (!svm_bo) { 576 pr_debug("failed to alloc svm bo\n"); 577 return -ENOMEM; 578 } 579 mm = get_task_mm(p->lead_thread); 580 if (!mm) { 581 pr_debug("failed to get mm\n"); 582 kfree(svm_bo); 583 return -ESRCH; 584 } 585 svm_bo->node = node; 586 svm_bo->eviction_fence = 587 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1), 588 mm, 589 svm_bo, p->context_id); 590 mmput(mm); 591 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker); 592 svm_bo->evicting = 0; 593 memset(&bp, 0, sizeof(bp)); 594 bp.size = prange->npages * PAGE_SIZE; 595 bp.byte_align = PAGE_SIZE; 596 bp.domain = AMDGPU_GEM_DOMAIN_VRAM; 597 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS; 598 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0; 599 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE; 600 bp.type = ttm_bo_type_device; 601 bp.resv = NULL; 602 if (node->xcp) 603 bp.xcp_id_plus1 = node->xcp->id + 1; 604 605 r = amdgpu_bo_create_user(node->adev, &bp, &ubo); 606 if (r) { 607 pr_debug("failed %d to create bo\n", r); 608 goto create_bo_failed; 609 } 610 bo = &ubo->bo; 611 612 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n", 613 bo->tbo.resource->start << PAGE_SHIFT, bp.size, 614 bp.xcp_id_plus1 - 1); 615 616 r = amdgpu_bo_reserve(bo, true); 617 if (r) { 618 pr_debug("failed %d to reserve bo\n", r); 619 goto reserve_bo_failed; 620 } 621 622 if (clear) { 623 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false); 624 if (r) { 625 pr_debug("failed %d to sync bo\n", r); 626 amdgpu_bo_unreserve(bo); 627 goto reserve_bo_failed; 628 } 629 } 630 631 r = dma_resv_reserve_fences(bo->tbo.base.resv, TTM_NUM_MOVE_FENCES); 632 if (r) { 633 amdgpu_bo_unreserve(bo); 634 goto reserve_bo_failed; 635 } 636 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true); 637 638 amdgpu_bo_unreserve(bo); 639 640 svm_bo->bo = bo; 641 prange->svm_bo = svm_bo; 642 prange->ttm_res = bo->tbo.resource; 643 prange->offset = 0; 644 645 spin_lock(&svm_bo->list_lock); 646 list_add(&prange->svm_bo_list, &svm_bo->range_list); 647 spin_unlock(&svm_bo->list_lock); 648 649 pdd = svm_range_get_pdd_by_node(prange, node); 650 if (pdd) 651 atomic64_add(amdgpu_bo_size(bo), &pdd->vram_usage); 652 653 return 0; 654 655 reserve_bo_failed: 656 amdgpu_bo_unref(&bo); 657 create_bo_failed: 658 dma_fence_put(&svm_bo->eviction_fence->base); 659 kfree(svm_bo); 660 prange->ttm_res = NULL; 661 662 return r; 663 } 664 665 void svm_range_vram_node_free(struct svm_range *prange) 666 { 667 /* serialize prange->svm_bo unref */ 668 mutex_lock(&prange->lock); 669 /* prange->svm_bo has not been unref */ 670 if (prange->ttm_res) { 671 prange->ttm_res = NULL; 672 mutex_unlock(&prange->lock); 673 svm_range_bo_unref(prange->svm_bo); 674 } else 675 mutex_unlock(&prange->lock); 676 } 677 678 struct kfd_node * 679 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id) 680 { 681 struct kfd_process *p; 682 struct kfd_process_device *pdd; 683 684 p = container_of(prange->svms, struct kfd_process, svms); 685 pdd = kfd_process_device_data_by_id(p, gpu_id); 686 if (!pdd) { 687 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id); 688 return NULL; 689 } 690 691 return pdd->dev; 692 } 693 694 struct kfd_process_device * 695 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node) 696 { 697 struct kfd_process *p; 698 699 p = container_of(prange->svms, struct kfd_process, svms); 700 701 return kfd_get_process_device_data(node, p); 702 } 703 704 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo) 705 { 706 struct ttm_operation_ctx ctx = { false, false }; 707 708 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM); 709 710 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); 711 } 712 713 static int 714 svm_range_check_attr(struct kfd_process *p, 715 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 716 { 717 uint32_t i; 718 719 for (i = 0; i < nattr; i++) { 720 uint32_t val = attrs[i].value; 721 int gpuidx = MAX_GPU_INSTANCE; 722 723 switch (attrs[i].type) { 724 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 725 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM && 726 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED) 727 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 728 break; 729 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 730 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM) 731 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 732 break; 733 case KFD_IOCTL_SVM_ATTR_ACCESS: 734 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 735 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 736 gpuidx = kfd_process_gpuidx_from_gpuid(p, val); 737 break; 738 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 739 break; 740 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 741 break; 742 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 743 break; 744 default: 745 pr_debug("unknown attr type 0x%x\n", attrs[i].type); 746 return -EINVAL; 747 } 748 749 if (gpuidx < 0) { 750 pr_debug("no GPU 0x%x found\n", val); 751 return -EINVAL; 752 } else if (gpuidx < MAX_GPU_INSTANCE && 753 !test_bit(gpuidx, p->svms.bitmap_supported)) { 754 pr_debug("GPU 0x%x not supported\n", val); 755 return -EINVAL; 756 } 757 } 758 759 return 0; 760 } 761 762 static void 763 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange, 764 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 765 bool *update_mapping) 766 { 767 uint32_t i; 768 int gpuidx; 769 770 for (i = 0; i < nattr; i++) { 771 switch (attrs[i].type) { 772 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 773 prange->preferred_loc = attrs[i].value; 774 break; 775 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 776 prange->prefetch_loc = attrs[i].value; 777 break; 778 case KFD_IOCTL_SVM_ATTR_ACCESS: 779 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 780 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 781 if (!p->xnack_enabled) 782 *update_mapping = true; 783 784 gpuidx = kfd_process_gpuidx_from_gpuid(p, 785 attrs[i].value); 786 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 787 bitmap_clear(prange->bitmap_access, gpuidx, 1); 788 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 789 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 790 bitmap_set(prange->bitmap_access, gpuidx, 1); 791 bitmap_clear(prange->bitmap_aip, gpuidx, 1); 792 } else { 793 bitmap_clear(prange->bitmap_access, gpuidx, 1); 794 bitmap_set(prange->bitmap_aip, gpuidx, 1); 795 } 796 break; 797 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 798 *update_mapping = true; 799 prange->flags |= attrs[i].value; 800 break; 801 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 802 *update_mapping = true; 803 prange->flags &= ~attrs[i].value; 804 break; 805 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 806 prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F); 807 break; 808 default: 809 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 810 } 811 } 812 } 813 814 static bool 815 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange, 816 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs) 817 { 818 uint32_t i; 819 int gpuidx; 820 821 for (i = 0; i < nattr; i++) { 822 switch (attrs[i].type) { 823 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 824 if (prange->preferred_loc != attrs[i].value) 825 return false; 826 break; 827 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 828 /* Prefetch should always trigger a migration even 829 * if the value of the attribute didn't change. 830 */ 831 return false; 832 case KFD_IOCTL_SVM_ATTR_ACCESS: 833 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 834 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 835 gpuidx = kfd_process_gpuidx_from_gpuid(p, 836 attrs[i].value); 837 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) { 838 if (test_bit(gpuidx, prange->bitmap_access) || 839 test_bit(gpuidx, prange->bitmap_aip)) 840 return false; 841 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) { 842 if (!test_bit(gpuidx, prange->bitmap_access)) 843 return false; 844 } else { 845 if (!test_bit(gpuidx, prange->bitmap_aip)) 846 return false; 847 } 848 break; 849 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 850 if ((prange->flags & attrs[i].value) != attrs[i].value) 851 return false; 852 break; 853 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 854 if ((prange->flags & attrs[i].value) != 0) 855 return false; 856 break; 857 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 858 if (prange->granularity != attrs[i].value) 859 return false; 860 break; 861 default: 862 WARN_ONCE(1, "svm_range_check_attrs wasn't called?"); 863 } 864 } 865 866 return true; 867 } 868 869 /** 870 * svm_range_debug_dump - print all range information from svms 871 * @svms: svm range list header 872 * 873 * debug output svm range start, end, prefetch location from svms 874 * interval tree and link list 875 * 876 * Context: The caller must hold svms->lock 877 */ 878 static void svm_range_debug_dump(struct svm_range_list *svms) 879 { 880 struct interval_tree_node *node; 881 struct svm_range *prange; 882 883 pr_debug("dump svms 0x%p list\n", svms); 884 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 885 886 list_for_each_entry(prange, &svms->list, list) { 887 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 888 prange, prange->start, prange->npages, 889 prange->start + prange->npages - 1, 890 prange->actual_loc); 891 } 892 893 pr_debug("dump svms 0x%p interval tree\n", svms); 894 pr_debug("range\tstart\tpage\tend\t\tlocation\n"); 895 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL); 896 while (node) { 897 prange = container_of(node, struct svm_range, it_node); 898 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n", 899 prange, prange->start, prange->npages, 900 prange->start + prange->npages - 1, 901 prange->actual_loc); 902 node = interval_tree_iter_next(node, 0, ~0ULL); 903 } 904 } 905 906 static void * 907 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements, 908 uint64_t offset, uint64_t *vram_pages) 909 { 910 unsigned char *src = (unsigned char *)psrc + offset; 911 unsigned char *dst; 912 uint64_t i; 913 914 dst = kvmalloc_array(num_elements, size, GFP_KERNEL); 915 if (!dst) 916 return NULL; 917 918 if (!vram_pages) { 919 memcpy(dst, src, num_elements * size); 920 return (void *)dst; 921 } 922 923 *vram_pages = 0; 924 for (i = 0; i < num_elements; i++) { 925 dma_addr_t *temp; 926 temp = (dma_addr_t *)dst + i; 927 *temp = *((dma_addr_t *)src + i); 928 if (*temp&SVM_RANGE_VRAM_DOMAIN) 929 (*vram_pages)++; 930 } 931 932 return (void *)dst; 933 } 934 935 static int 936 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src) 937 { 938 int i; 939 940 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 941 if (!src->dma_addr[i]) 942 continue; 943 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i], 944 sizeof(*src->dma_addr[i]), src->npages, 0, NULL); 945 if (!dst->dma_addr[i]) 946 return -ENOMEM; 947 } 948 949 return 0; 950 } 951 952 static int 953 svm_range_split_array(void *ppnew, void *ppold, size_t size, 954 uint64_t old_start, uint64_t old_n, 955 uint64_t new_start, uint64_t new_n, uint64_t *new_vram_pages) 956 { 957 unsigned char *new, *old, *pold; 958 uint64_t d; 959 960 if (!ppold) 961 return 0; 962 pold = *(unsigned char **)ppold; 963 if (!pold) 964 return 0; 965 966 d = (new_start - old_start) * size; 967 /* get dma addr array for new range and calculte its vram page number */ 968 new = svm_range_copy_array(pold, size, new_n, d, new_vram_pages); 969 if (!new) 970 return -ENOMEM; 971 d = (new_start == old_start) ? new_n * size : 0; 972 old = svm_range_copy_array(pold, size, old_n, d, NULL); 973 if (!old) { 974 kvfree(new); 975 return -ENOMEM; 976 } 977 kvfree(pold); 978 *(void **)ppold = old; 979 *(void **)ppnew = new; 980 981 return 0; 982 } 983 984 static int 985 svm_range_split_pages(struct svm_range *new, struct svm_range *old, 986 uint64_t start, uint64_t last) 987 { 988 uint64_t npages = last - start + 1; 989 int i, r; 990 991 for (i = 0; i < MAX_GPU_INSTANCE; i++) { 992 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i], 993 sizeof(*old->dma_addr[i]), old->start, 994 npages, new->start, new->npages, 995 old->actual_loc ? &new->vram_pages : NULL); 996 if (r) 997 return r; 998 } 999 if (old->actual_loc) 1000 old->vram_pages -= new->vram_pages; 1001 1002 return 0; 1003 } 1004 1005 static int 1006 svm_range_split_nodes(struct svm_range *new, struct svm_range *old, 1007 uint64_t start, uint64_t last) 1008 { 1009 uint64_t npages = last - start + 1; 1010 1011 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n", 1012 new->svms, new, new->start, start, last); 1013 1014 if (new->start == old->start) { 1015 new->offset = old->offset; 1016 old->offset += new->npages; 1017 } else { 1018 new->offset = old->offset + npages; 1019 } 1020 1021 new->svm_bo = svm_range_bo_ref(old->svm_bo); 1022 new->ttm_res = old->ttm_res; 1023 1024 spin_lock(&new->svm_bo->list_lock); 1025 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 1026 spin_unlock(&new->svm_bo->list_lock); 1027 1028 return 0; 1029 } 1030 1031 /** 1032 * svm_range_split_adjust - split range and adjust 1033 * 1034 * @new: new range 1035 * @old: the old range 1036 * @start: the old range adjust to start address in pages 1037 * @last: the old range adjust to last address in pages 1038 * 1039 * Copy system memory dma_addr or vram ttm_res in old range to new 1040 * range from new_start up to size new->npages, the remaining old range is from 1041 * start to last 1042 * 1043 * Return: 1044 * 0 - OK, -ENOMEM - out of memory 1045 */ 1046 static int 1047 svm_range_split_adjust(struct svm_range *new, struct svm_range *old, 1048 uint64_t start, uint64_t last) 1049 { 1050 int r; 1051 1052 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n", 1053 new->svms, new->start, old->start, old->last, start, last); 1054 1055 if (new->start < old->start || 1056 new->last > old->last) { 1057 WARN_ONCE(1, "invalid new range start or last\n"); 1058 return -EINVAL; 1059 } 1060 1061 r = svm_range_split_pages(new, old, start, last); 1062 if (r) 1063 return r; 1064 1065 if (old->actual_loc && old->ttm_res) { 1066 r = svm_range_split_nodes(new, old, start, last); 1067 if (r) 1068 return r; 1069 } 1070 1071 old->npages = last - start + 1; 1072 old->start = start; 1073 old->last = last; 1074 new->flags = old->flags; 1075 new->preferred_loc = old->preferred_loc; 1076 new->prefetch_loc = old->prefetch_loc; 1077 new->actual_loc = old->actual_loc; 1078 new->granularity = old->granularity; 1079 new->mapped_to_gpu = old->mapped_to_gpu; 1080 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 1081 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 1082 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 1083 1084 return 0; 1085 } 1086 1087 /** 1088 * svm_range_split - split a range in 2 ranges 1089 * 1090 * @prange: the svm range to split 1091 * @start: the remaining range start address in pages 1092 * @last: the remaining range last address in pages 1093 * @new: the result new range generated 1094 * 1095 * Two cases only: 1096 * case 1: if start == prange->start 1097 * prange ==> prange[start, last] 1098 * new range [last + 1, prange->last] 1099 * 1100 * case 2: if last == prange->last 1101 * prange ==> prange[start, last] 1102 * new range [prange->start, start - 1] 1103 * 1104 * Return: 1105 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last 1106 */ 1107 static int 1108 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last, 1109 struct svm_range **new) 1110 { 1111 uint64_t old_start = prange->start; 1112 uint64_t old_last = prange->last; 1113 struct svm_range_list *svms; 1114 int r = 0; 1115 1116 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms, 1117 old_start, old_last, start, last); 1118 1119 if (old_start != start && old_last != last) 1120 return -EINVAL; 1121 if (start < old_start || last > old_last) 1122 return -EINVAL; 1123 1124 svms = prange->svms; 1125 if (old_start == start) 1126 *new = svm_range_new(svms, last + 1, old_last, false); 1127 else 1128 *new = svm_range_new(svms, old_start, start - 1, false); 1129 if (!*new) 1130 return -ENOMEM; 1131 1132 r = svm_range_split_adjust(*new, prange, start, last); 1133 if (r) { 1134 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", 1135 r, old_start, old_last, start, last); 1136 svm_range_free(*new, false); 1137 *new = NULL; 1138 } 1139 1140 return r; 1141 } 1142 1143 static int 1144 svm_range_split_tail(struct svm_range *prange, uint64_t new_last, 1145 struct list_head *insert_list, struct list_head *remap_list) 1146 { 1147 unsigned long last_align_down = ALIGN_DOWN(prange->last, 512); 1148 unsigned long start_align = ALIGN(prange->start, 512); 1149 bool huge_page_mapping = last_align_down > start_align; 1150 struct svm_range *tail = NULL; 1151 int r; 1152 1153 r = svm_range_split(prange, prange->start, new_last, &tail); 1154 1155 if (r) 1156 return r; 1157 1158 list_add(&tail->list, insert_list); 1159 1160 if (huge_page_mapping && tail->start > start_align && 1161 tail->start < last_align_down && (!IS_ALIGNED(tail->start, 512))) 1162 list_add(&tail->update_list, remap_list); 1163 1164 return 0; 1165 } 1166 1167 static int 1168 svm_range_split_head(struct svm_range *prange, uint64_t new_start, 1169 struct list_head *insert_list, struct list_head *remap_list) 1170 { 1171 unsigned long last_align_down = ALIGN_DOWN(prange->last, 512); 1172 unsigned long start_align = ALIGN(prange->start, 512); 1173 bool huge_page_mapping = last_align_down > start_align; 1174 struct svm_range *head = NULL; 1175 int r; 1176 1177 r = svm_range_split(prange, new_start, prange->last, &head); 1178 1179 if (r) 1180 return r; 1181 1182 list_add(&head->list, insert_list); 1183 1184 if (huge_page_mapping && head->last + 1 > start_align && 1185 head->last + 1 < last_align_down && (!IS_ALIGNED(head->last, 512))) 1186 list_add(&head->update_list, remap_list); 1187 1188 return 0; 1189 } 1190 1191 static void 1192 svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op) 1193 { 1194 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n", 1195 pchild, pchild->start, pchild->last, prange, op); 1196 1197 pchild->work_item.mm = NULL; 1198 pchild->work_item.op = op; 1199 list_add_tail(&pchild->child_list, &prange->child_list); 1200 } 1201 1202 static bool 1203 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b) 1204 { 1205 return (node_a->adev == node_b->adev || 1206 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev)); 1207 } 1208 1209 static uint64_t 1210 svm_range_get_pte_flags(struct kfd_node *node, struct amdgpu_vm *vm, 1211 struct svm_range *prange, int domain) 1212 { 1213 struct kfd_node *bo_node; 1214 uint32_t flags = prange->flags; 1215 uint32_t mapping_flags = 0; 1216 uint32_t gc_ip_version = KFD_GC_VERSION(node); 1217 uint64_t pte_flags; 1218 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN); 1219 bool coherent = flags & (KFD_IOCTL_SVM_FLAG_COHERENT | KFD_IOCTL_SVM_FLAG_EXT_COHERENT); 1220 bool ext_coherent = flags & KFD_IOCTL_SVM_FLAG_EXT_COHERENT; 1221 unsigned int mtype_local, mtype_remote; 1222 bool is_aid_a1, is_local; 1223 1224 if (domain == SVM_RANGE_VRAM_DOMAIN) 1225 bo_node = prange->svm_bo->node; 1226 1227 switch (gc_ip_version) { 1228 case IP_VERSION(9, 4, 1): 1229 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1230 if (bo_node == node) { 1231 mapping_flags |= coherent ? 1232 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1233 } else { 1234 mapping_flags |= coherent ? 1235 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1236 if (svm_nodes_in_same_hive(node, bo_node)) 1237 snoop = true; 1238 } 1239 } else { 1240 mapping_flags |= coherent ? 1241 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1242 } 1243 break; 1244 case IP_VERSION(9, 4, 2): 1245 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1246 if (bo_node == node) { 1247 mapping_flags |= coherent ? 1248 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1249 if (node->adev->gmc.xgmi.connected_to_cpu) 1250 snoop = true; 1251 } else { 1252 mapping_flags |= coherent ? 1253 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1254 if (svm_nodes_in_same_hive(node, bo_node)) 1255 snoop = true; 1256 } 1257 } else { 1258 mapping_flags |= coherent ? 1259 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1260 } 1261 break; 1262 case IP_VERSION(9, 4, 3): 1263 case IP_VERSION(9, 4, 4): 1264 case IP_VERSION(9, 5, 0): 1265 if (ext_coherent) 1266 mtype_local = AMDGPU_VM_MTYPE_CC; 1267 else 1268 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1269 amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW; 1270 snoop = true; 1271 if (domain == SVM_RANGE_VRAM_DOMAIN) { 1272 /* local HBM region close to partition */ 1273 if (bo_node->adev == node->adev && 1274 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id)) 1275 mapping_flags |= mtype_local; 1276 /* local HBM region far from partition or remote XGMI GPU 1277 * with regular system scope coherence 1278 */ 1279 else if (svm_nodes_in_same_hive(bo_node, node) && !ext_coherent) 1280 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1281 /* PCIe P2P on GPUs pre-9.5.0 */ 1282 else if (gc_ip_version < IP_VERSION(9, 5, 0) && 1283 !svm_nodes_in_same_hive(bo_node, node)) 1284 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1285 /* Other remote memory */ 1286 else 1287 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1288 /* system memory accessed by the APU */ 1289 } else if (node->adev->flags & AMD_IS_APU) { 1290 /* On NUMA systems, locality is determined per-page 1291 * in amdgpu_gmc_override_vm_pte_flags 1292 */ 1293 if (num_possible_nodes() <= 1) 1294 mapping_flags |= mtype_local; 1295 else 1296 mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1297 /* system memory accessed by the dGPU */ 1298 } else { 1299 if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent) 1300 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1301 else 1302 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1303 } 1304 break; 1305 case IP_VERSION(12, 0, 0): 1306 case IP_VERSION(12, 0, 1): 1307 mapping_flags |= AMDGPU_VM_MTYPE_NC; 1308 break; 1309 case IP_VERSION(12, 1, 0): 1310 is_aid_a1 = (node->adev->rev_id & 0x10); 1311 is_local = (domain == SVM_RANGE_VRAM_DOMAIN) && 1312 (bo_node->adev == node->adev); 1313 1314 mtype_local = amdgpu_mtype_local == 0 ? AMDGPU_VM_MTYPE_RW : 1315 amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC : 1316 is_aid_a1 ? AMDGPU_VM_MTYPE_RW : AMDGPU_VM_MTYPE_NC; 1317 mtype_remote = is_aid_a1 ? AMDGPU_VM_MTYPE_NC : AMDGPU_VM_MTYPE_UC; 1318 snoop = true; 1319 1320 if (is_local) /* local HBM */ { 1321 mapping_flags |= mtype_local; 1322 } else if (ext_coherent) { 1323 mapping_flags |= AMDGPU_VM_MTYPE_UC; 1324 } else { 1325 /* system memory or remote VRAM */ 1326 mapping_flags |= mtype_remote; 1327 } 1328 break; 1329 default: 1330 mapping_flags |= coherent ? 1331 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC; 1332 } 1333 1334 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC) 1335 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE; 1336 1337 pte_flags = AMDGPU_PTE_VALID; 1338 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM; 1339 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0; 1340 if (gc_ip_version >= IP_VERSION(12, 0, 0)) 1341 pte_flags |= AMDGPU_PTE_IS_PTE; 1342 1343 amdgpu_gmc_get_vm_pte(node->adev, vm, NULL, mapping_flags, &pte_flags); 1344 pte_flags |= AMDGPU_PTE_READABLE; 1345 if (!(flags & KFD_IOCTL_SVM_FLAG_GPU_RO)) 1346 pte_flags |= AMDGPU_PTE_WRITEABLE; 1347 1348 if ((gc_ip_version == IP_VERSION(12, 1, 0)) && 1349 node->adev->have_atomics_support) 1350 pte_flags |= AMDGPU_PTE_BUS_ATOMICS; 1351 1352 return pte_flags; 1353 } 1354 1355 static int 1356 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, 1357 uint64_t start, uint64_t last, 1358 struct dma_fence **fence) 1359 { 1360 uint64_t init_pte_value = adev->gmc.init_pte_flags; 1361 uint64_t gpu_start, gpu_end; 1362 1363 /* Convert CPU page range to GPU page range */ 1364 gpu_start = start * AMDGPU_GPU_PAGES_IN_CPU_PAGE; 1365 gpu_end = (last + 1) * AMDGPU_GPU_PAGES_IN_CPU_PAGE - 1; 1366 1367 pr_debug("CPU[0x%llx 0x%llx] -> GPU[0x%llx 0x%llx]\n", start, last, 1368 gpu_start, gpu_end); 1369 return amdgpu_vm_update_range(adev, vm, false, true, true, false, NULL, gpu_start, 1370 gpu_end, init_pte_value, 0, 0, NULL, NULL, 1371 fence); 1372 } 1373 1374 static int 1375 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, 1376 unsigned long last, uint32_t trigger) 1377 { 1378 struct kfd_process_device *pdd; 1379 struct dma_fence *fence = NULL; 1380 struct kfd_process *p; 1381 uint32_t gpuidx; 1382 int r = 0; 1383 1384 if (!prange->mapped_to_gpu) { 1385 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n", 1386 prange, prange->start, prange->last); 1387 return 0; 1388 } 1389 1390 if (prange->start == start && prange->last == last) { 1391 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange); 1392 prange->mapped_to_gpu = false; 1393 } 1394 1395 p = container_of(prange->svms, struct kfd_process, svms); 1396 1397 for_each_or_bit(gpuidx, prange->bitmap_access, prange->bitmap_aip, MAX_GPU_INSTANCE) { 1398 pr_debug("unmap from gpu idx 0x%x\n", gpuidx); 1399 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1400 if (!pdd) { 1401 pr_debug("failed to find device idx %d\n", gpuidx); 1402 return -EINVAL; 1403 } 1404 1405 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid, 1406 start, last, trigger); 1407 1408 r = svm_range_unmap_from_gpu(pdd->dev->adev, 1409 drm_priv_to_vm(pdd->drm_priv), 1410 start, last, &fence); 1411 if (r) 1412 break; 1413 1414 if (fence) { 1415 r = dma_fence_wait(fence, false); 1416 dma_fence_put(fence); 1417 fence = NULL; 1418 if (r) 1419 break; 1420 } 1421 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); 1422 } 1423 1424 return r; 1425 } 1426 1427 static int 1428 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, 1429 unsigned long offset, unsigned long npages, bool readonly, 1430 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, 1431 struct dma_fence **fence, bool flush_tlb) 1432 { 1433 struct amdgpu_device *adev = pdd->dev->adev; 1434 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); 1435 uint64_t pte_flags; 1436 unsigned long last_start; 1437 int last_domain; 1438 int r = 0; 1439 int64_t i, j; 1440 1441 last_start = prange->start + offset; 1442 1443 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms, 1444 last_start, last_start + npages - 1, readonly); 1445 1446 for (i = offset; i < offset + npages; i++) { 1447 uint64_t gpu_start; 1448 uint64_t gpu_end; 1449 1450 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN; 1451 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN; 1452 1453 /* Collect all pages in the same address range and memory domain 1454 * that can be mapped with a single call to update mapping. 1455 */ 1456 if (i < offset + npages - 1 && 1457 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN)) 1458 continue; 1459 1460 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n", 1461 last_start, prange->start + i, last_domain ? "GPU" : "CPU"); 1462 1463 pte_flags = svm_range_get_pte_flags(pdd->dev, vm, prange, last_domain); 1464 if (readonly) 1465 pte_flags &= ~AMDGPU_PTE_WRITEABLE; 1466 1467 1468 /* For dGPU mode, we use same vm_manager to allocate VRAM for 1469 * different memory partition based on fpfn/lpfn, we should use 1470 * same vm_manager.vram_base_offset regardless memory partition. 1471 */ 1472 gpu_start = last_start * AMDGPU_GPU_PAGES_IN_CPU_PAGE; 1473 gpu_end = (prange->start + i + 1) * AMDGPU_GPU_PAGES_IN_CPU_PAGE - 1; 1474 1475 pr_debug("svms 0x%p map CPU[0x%lx 0x%llx] GPU[0x%llx 0x%llx] vram %d PTE 0x%llx\n", 1476 prange->svms, last_start, prange->start + i, 1477 gpu_start, gpu_end, 1478 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0, 1479 pte_flags); 1480 1481 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, true, 1482 NULL, gpu_start, gpu_end, 1483 pte_flags, 1484 (last_start - prange->start) << PAGE_SHIFT, 1485 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0, 1486 NULL, dma_addr, &vm->last_update); 1487 1488 for (j = last_start - prange->start; j <= i; j++) 1489 dma_addr[j] |= last_domain; 1490 1491 if (r) { 1492 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start); 1493 goto out; 1494 } 1495 last_start = prange->start + i + 1; 1496 } 1497 1498 r = amdgpu_vm_update_pdes(adev, vm, false); 1499 if (r) { 1500 pr_debug("failed %d to update directories 0x%lx\n", r, 1501 prange->start); 1502 goto out; 1503 } 1504 1505 if (fence) 1506 *fence = dma_fence_get(vm->last_update); 1507 1508 out: 1509 return r; 1510 } 1511 1512 static int 1513 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, 1514 unsigned long npages, bool readonly, 1515 unsigned long *bitmap, bool wait, bool flush_tlb) 1516 { 1517 struct kfd_process_device *pdd; 1518 struct amdgpu_device *bo_adev = NULL; 1519 struct kfd_process *p; 1520 struct dma_fence *fence = NULL; 1521 uint32_t gpuidx; 1522 int r = 0; 1523 1524 if (prange->svm_bo && prange->ttm_res) 1525 bo_adev = prange->svm_bo->node->adev; 1526 1527 p = container_of(prange->svms, struct kfd_process, svms); 1528 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 1529 pr_debug("mapping to gpu idx 0x%x\n", gpuidx); 1530 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1531 if (!pdd) { 1532 pr_debug("failed to find device idx %d\n", gpuidx); 1533 return -EINVAL; 1534 } 1535 1536 pdd = kfd_bind_process_to_device(pdd->dev, p); 1537 if (IS_ERR(pdd)) 1538 return -EINVAL; 1539 1540 if (bo_adev && pdd->dev->adev != bo_adev && 1541 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) { 1542 pr_debug("cannot map to device idx %d\n", gpuidx); 1543 continue; 1544 } 1545 1546 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly, 1547 prange->dma_addr[gpuidx], 1548 bo_adev, wait ? &fence : NULL, 1549 flush_tlb); 1550 if (r) 1551 break; 1552 1553 if (fence) { 1554 r = dma_fence_wait(fence, false); 1555 dma_fence_put(fence); 1556 fence = NULL; 1557 if (r) { 1558 pr_debug("failed %d to dma fence wait\n", r); 1559 break; 1560 } 1561 } 1562 1563 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); 1564 } 1565 1566 return r; 1567 } 1568 1569 struct svm_validate_context { 1570 struct kfd_process *process; 1571 struct svm_range *prange; 1572 bool intr; 1573 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 1574 struct drm_exec exec; 1575 }; 1576 1577 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr) 1578 { 1579 struct kfd_process_device *pdd; 1580 struct amdgpu_vm *vm; 1581 uint32_t gpuidx; 1582 int r; 1583 1584 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0, 0); 1585 drm_exec_until_all_locked(&ctx->exec) { 1586 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1587 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1588 if (!pdd) { 1589 pr_debug("failed to find device idx %d\n", gpuidx); 1590 r = -EINVAL; 1591 goto unreserve_out; 1592 } 1593 vm = drm_priv_to_vm(pdd->drm_priv); 1594 1595 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2); 1596 drm_exec_retry_on_contention(&ctx->exec); 1597 if (unlikely(r)) { 1598 pr_debug("failed %d to reserve bo\n", r); 1599 goto unreserve_out; 1600 } 1601 } 1602 } 1603 1604 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) { 1605 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx); 1606 if (!pdd) { 1607 pr_debug("failed to find device idx %d\n", gpuidx); 1608 r = -EINVAL; 1609 goto unreserve_out; 1610 } 1611 1612 r = amdgpu_vm_validate(pdd->dev->adev, 1613 drm_priv_to_vm(pdd->drm_priv), NULL, 1614 svm_range_bo_validate, NULL); 1615 if (r) { 1616 pr_debug("failed %d validate pt bos\n", r); 1617 goto unreserve_out; 1618 } 1619 } 1620 1621 return 0; 1622 1623 unreserve_out: 1624 drm_exec_fini(&ctx->exec); 1625 return r; 1626 } 1627 1628 static void svm_range_unreserve_bos(struct svm_validate_context *ctx) 1629 { 1630 drm_exec_fini(&ctx->exec); 1631 } 1632 1633 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx) 1634 { 1635 struct kfd_process_device *pdd; 1636 1637 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 1638 if (!pdd) 1639 return NULL; 1640 1641 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev); 1642 } 1643 1644 /* 1645 * Validation+GPU mapping with concurrent invalidation (MMU notifiers) 1646 * 1647 * To prevent concurrent destruction or change of range attributes, the 1648 * svm_read_lock must be held. The caller must not hold the svm_write_lock 1649 * because that would block concurrent evictions and lead to deadlocks. To 1650 * serialize concurrent migrations or validations of the same range, the 1651 * prange->migrate_mutex must be held. 1652 * 1653 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its 1654 * eviction fence. 1655 * 1656 * The following sequence ensures race-free validation and GPU mapping: 1657 * 1658 * 1. Reserve page table (and SVM BO if range is in VRAM) 1659 * 2. hmm_range_fault to get page addresses (if system memory) 1660 * 3. DMA-map pages (if system memory) 1661 * 4-a. Take notifier lock 1662 * 4-b. Check that pages still valid (mmu_interval_read_retry) 1663 * 4-c. Check that the range was not split or otherwise invalidated 1664 * 4-d. Update GPU page table 1665 * 4.e. Release notifier lock 1666 * 5. Release page table (and SVM BO) reservation 1667 */ 1668 static int svm_range_validate_and_map(struct mm_struct *mm, 1669 unsigned long map_start, unsigned long map_last, 1670 struct svm_range *prange, int32_t gpuidx, 1671 bool intr, bool wait, bool flush_tlb) 1672 { 1673 struct svm_validate_context *ctx; 1674 unsigned long start, end, addr; 1675 struct kfd_process *p; 1676 void *owner; 1677 int32_t idx; 1678 int r = 0; 1679 1680 ctx = kzalloc_obj(struct svm_validate_context); 1681 if (!ctx) 1682 return -ENOMEM; 1683 ctx->process = container_of(prange->svms, struct kfd_process, svms); 1684 ctx->prange = prange; 1685 ctx->intr = intr; 1686 1687 if (gpuidx < MAX_GPU_INSTANCE) { 1688 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE); 1689 bitmap_set(ctx->bitmap, gpuidx, 1); 1690 } else if (ctx->process->xnack_enabled) { 1691 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 1692 1693 /* If prefetch range to GPU, or GPU retry fault migrate range to 1694 * GPU, which has ACCESS attribute to the range, create mapping 1695 * on that GPU. 1696 */ 1697 if (prange->actual_loc) { 1698 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process, 1699 prange->actual_loc); 1700 if (gpuidx < 0) { 1701 WARN_ONCE(1, "failed get device by id 0x%x\n", 1702 prange->actual_loc); 1703 r = -EINVAL; 1704 goto free_ctx; 1705 } 1706 if (test_bit(gpuidx, prange->bitmap_access)) 1707 bitmap_set(ctx->bitmap, gpuidx, 1); 1708 } 1709 1710 /* 1711 * If prange is already mapped or with always mapped flag, 1712 * update mapping on GPUs with ACCESS attribute 1713 */ 1714 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1715 if (prange->mapped_to_gpu || 1716 prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED) 1717 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE); 1718 } 1719 } else { 1720 bitmap_or(ctx->bitmap, prange->bitmap_access, 1721 prange->bitmap_aip, MAX_GPU_INSTANCE); 1722 } 1723 1724 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) { 1725 r = 0; 1726 goto free_ctx; 1727 } 1728 1729 if (prange->actual_loc && !prange->ttm_res) { 1730 /* This should never happen. actual_loc gets set by 1731 * svm_migrate_ram_to_vram after allocating a BO. 1732 */ 1733 WARN_ONCE(1, "VRAM BO missing during validation\n"); 1734 r = -EINVAL; 1735 goto free_ctx; 1736 } 1737 1738 r = svm_range_reserve_bos(ctx, intr); 1739 if (r) 1740 goto free_ctx; 1741 1742 p = container_of(prange->svms, struct kfd_process, svms); 1743 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap, 1744 MAX_GPU_INSTANCE)); 1745 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) { 1746 if (kfd_svm_page_owner(p, idx) != owner) { 1747 owner = NULL; 1748 break; 1749 } 1750 } 1751 1752 start = map_start << PAGE_SHIFT; 1753 end = (map_last + 1) << PAGE_SHIFT; 1754 for (addr = start; !r && addr < end; ) { 1755 struct amdgpu_hmm_range *range = NULL; 1756 unsigned long map_start_vma; 1757 unsigned long map_last_vma; 1758 struct vm_area_struct *vma; 1759 unsigned long next = 0; 1760 unsigned long offset; 1761 unsigned long npages; 1762 bool readonly; 1763 1764 vma = vma_lookup(mm, addr); 1765 if (vma) { 1766 readonly = !(vma->vm_flags & VM_WRITE); 1767 1768 next = min(vma->vm_end, end); 1769 npages = (next - addr) >> PAGE_SHIFT; 1770 /* HMM requires at least READ permissions. If provided with PROT_NONE, 1771 * unmap the memory. If it's not already mapped, this is a no-op 1772 * If PROT_WRITE is provided without READ, warn first then unmap 1773 */ 1774 if (!(vma->vm_flags & VM_READ)) { 1775 unsigned long e, s; 1776 1777 svm_range_lock(prange); 1778 if (vma->vm_flags & VM_WRITE) 1779 pr_debug("VM_WRITE without VM_READ is not supported"); 1780 s = max(start, prange->start); 1781 e = min(end, prange->last); 1782 if (e >= s) 1783 r = svm_range_unmap_from_gpus(prange, s, e, 1784 KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU); 1785 svm_range_unlock(prange); 1786 /* If unmap returns non-zero, we'll bail on the next for loop 1787 * iteration, so just leave r and continue 1788 */ 1789 addr = next; 1790 continue; 1791 } 1792 1793 WRITE_ONCE(p->svms.faulting_task, current); 1794 range = amdgpu_hmm_range_alloc(NULL); 1795 if (likely(range)) 1796 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages, 1797 readonly, owner, range); 1798 else 1799 r = -ENOMEM; 1800 WRITE_ONCE(p->svms.faulting_task, NULL); 1801 if (r) 1802 pr_debug("failed %d to get svm range pages\n", r); 1803 } else { 1804 r = -EFAULT; 1805 } 1806 1807 if (!r) { 1808 offset = (addr >> PAGE_SHIFT) - prange->start; 1809 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages, 1810 range->hmm_range.hmm_pfns); 1811 if (r) 1812 pr_debug("failed %d to dma map range\n", r); 1813 } 1814 1815 svm_range_lock(prange); 1816 1817 /* Free backing memory of hmm_range if it was initialized 1818 * Override return value to TRY AGAIN only if prior returns 1819 * were successful 1820 */ 1821 if (range && !amdgpu_hmm_range_valid(range) && !r) { 1822 pr_debug("hmm update the range, need validate again\n"); 1823 r = -EAGAIN; 1824 } 1825 1826 /* Free the hmm range */ 1827 amdgpu_hmm_range_free(range); 1828 1829 if (!r && !list_empty(&prange->child_list)) { 1830 pr_debug("range split by unmap in parallel, validate again\n"); 1831 r = -EAGAIN; 1832 } 1833 1834 if (!r) { 1835 map_start_vma = max(map_start, prange->start + offset); 1836 map_last_vma = min(map_last, prange->start + offset + npages - 1); 1837 if (map_start_vma <= map_last_vma) { 1838 offset = map_start_vma - prange->start; 1839 npages = map_last_vma - map_start_vma + 1; 1840 r = svm_range_map_to_gpus(prange, offset, npages, readonly, 1841 ctx->bitmap, wait, flush_tlb); 1842 } 1843 } 1844 1845 if (!r && next == end) 1846 prange->mapped_to_gpu = true; 1847 1848 svm_range_unlock(prange); 1849 1850 addr = next; 1851 } 1852 1853 svm_range_unreserve_bos(ctx); 1854 if (!r) 1855 prange->validate_timestamp = ktime_get_boottime(); 1856 1857 free_ctx: 1858 kfree(ctx); 1859 1860 return r; 1861 } 1862 1863 /** 1864 * svm_range_list_lock_and_flush_work - flush pending deferred work 1865 * 1866 * @svms: the svm range list 1867 * @mm: the mm structure 1868 * 1869 * Context: Returns with mmap write lock held, pending deferred work flushed 1870 * 1871 */ 1872 void 1873 svm_range_list_lock_and_flush_work(struct svm_range_list *svms, 1874 struct mm_struct *mm) 1875 { 1876 retry_flush_work: 1877 flush_work(&svms->deferred_list_work); 1878 mmap_write_lock(mm); 1879 1880 if (list_empty(&svms->deferred_range_list)) 1881 return; 1882 mmap_write_unlock(mm); 1883 pr_debug("retry flush\n"); 1884 goto retry_flush_work; 1885 } 1886 1887 static void svm_range_restore_work(struct work_struct *work) 1888 { 1889 struct delayed_work *dwork = to_delayed_work(work); 1890 struct amdkfd_process_info *process_info; 1891 struct svm_range_list *svms; 1892 struct svm_range *prange; 1893 struct kfd_process *p; 1894 struct mm_struct *mm; 1895 int evicted_ranges; 1896 int invalid; 1897 int r; 1898 1899 svms = container_of(dwork, struct svm_range_list, restore_work); 1900 evicted_ranges = atomic_read(&svms->evicted_ranges); 1901 if (!evicted_ranges) 1902 return; 1903 1904 pr_debug("restore svm ranges\n"); 1905 1906 p = container_of(svms, struct kfd_process, svms); 1907 process_info = p->kgd_process_info; 1908 1909 /* Keep mm reference when svm_range_validate_and_map ranges */ 1910 mm = get_task_mm(p->lead_thread); 1911 if (!mm) { 1912 pr_debug("svms 0x%p process mm gone\n", svms); 1913 return; 1914 } 1915 1916 mutex_lock(&process_info->lock); 1917 svm_range_list_lock_and_flush_work(svms, mm); 1918 mutex_lock(&svms->lock); 1919 1920 evicted_ranges = atomic_read(&svms->evicted_ranges); 1921 1922 list_for_each_entry(prange, &svms->list, list) { 1923 invalid = atomic_read(&prange->invalid); 1924 if (!invalid) 1925 continue; 1926 1927 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n", 1928 prange->svms, prange, prange->start, prange->last, 1929 invalid); 1930 1931 /* 1932 * If range is migrating, wait for migration is done. 1933 */ 1934 mutex_lock(&prange->migrate_mutex); 1935 1936 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 1937 MAX_GPU_INSTANCE, false, true, false); 1938 if (r) 1939 pr_debug("failed %d to map 0x%lx to gpus\n", r, 1940 prange->start); 1941 1942 mutex_unlock(&prange->migrate_mutex); 1943 if (r) 1944 goto out_reschedule; 1945 1946 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid) 1947 goto out_reschedule; 1948 } 1949 1950 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) != 1951 evicted_ranges) 1952 goto out_reschedule; 1953 1954 evicted_ranges = 0; 1955 1956 r = kgd2kfd_resume_mm(mm); 1957 if (r) { 1958 /* No recovery from this failure. Probably the CP is 1959 * hanging. No point trying again. 1960 */ 1961 pr_debug("failed %d to resume KFD\n", r); 1962 } 1963 1964 pr_debug("restore svm ranges successfully\n"); 1965 1966 out_reschedule: 1967 mutex_unlock(&svms->lock); 1968 mmap_write_unlock(mm); 1969 mutex_unlock(&process_info->lock); 1970 1971 /* If validation failed, reschedule another attempt */ 1972 if (evicted_ranges) { 1973 pr_debug("reschedule to restore svm range\n"); 1974 queue_delayed_work(system_freezable_wq, &svms->restore_work, 1975 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 1976 1977 kfd_smi_event_queue_restore_rescheduled(mm); 1978 } 1979 mmput(mm); 1980 } 1981 1982 /** 1983 * svm_range_evict - evict svm range 1984 * @prange: svm range structure 1985 * @mm: current process mm_struct 1986 * @start: starting process queue number 1987 * @last: last process queue number 1988 * @event: mmu notifier event when range is evicted or migrated 1989 * 1990 * Stop all queues of the process to ensure GPU doesn't access the memory, then 1991 * return to let CPU evict the buffer and proceed CPU pagetable update. 1992 * 1993 * Don't need use lock to sync cpu pagetable invalidation with GPU execution. 1994 * If invalidation happens while restore work is running, restore work will 1995 * restart to ensure to get the latest CPU pages mapping to GPU, then start 1996 * the queues. 1997 */ 1998 static int 1999 svm_range_evict(struct svm_range *prange, struct mm_struct *mm, 2000 unsigned long start, unsigned long last, 2001 enum mmu_notifier_event event) 2002 { 2003 struct svm_range_list *svms = prange->svms; 2004 struct svm_range *pchild; 2005 struct kfd_process *p; 2006 int r = 0; 2007 2008 p = container_of(svms, struct kfd_process, svms); 2009 2010 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2011 svms, prange->start, prange->last, start, last); 2012 2013 if (!p->xnack_enabled || 2014 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) { 2015 int evicted_ranges; 2016 bool mapped = prange->mapped_to_gpu; 2017 2018 list_for_each_entry(pchild, &prange->child_list, child_list) { 2019 if (!pchild->mapped_to_gpu) 2020 continue; 2021 mapped = true; 2022 mutex_lock_nested(&pchild->lock, 1); 2023 if (pchild->start <= last && pchild->last >= start) { 2024 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n", 2025 pchild->start, pchild->last); 2026 atomic_inc(&pchild->invalid); 2027 } 2028 mutex_unlock(&pchild->lock); 2029 } 2030 2031 if (!mapped) 2032 return r; 2033 2034 if (prange->start <= last && prange->last >= start) 2035 atomic_inc(&prange->invalid); 2036 2037 evicted_ranges = atomic_inc_return(&svms->evicted_ranges); 2038 if (evicted_ranges != 1) 2039 return r; 2040 2041 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n", 2042 prange->svms, prange->start, prange->last); 2043 2044 /* First eviction, stop the queues */ 2045 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2046 if (r) 2047 pr_debug("failed to quiesce KFD\n"); 2048 2049 pr_debug("schedule to restore svm %p ranges\n", svms); 2050 queue_delayed_work(system_freezable_wq, &svms->restore_work, 2051 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS)); 2052 } else { 2053 unsigned long s, l; 2054 uint32_t trigger; 2055 2056 if (event == MMU_NOTIFY_MIGRATE) 2057 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE; 2058 else 2059 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY; 2060 2061 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n", 2062 prange->svms, start, last); 2063 list_for_each_entry(pchild, &prange->child_list, child_list) { 2064 mutex_lock_nested(&pchild->lock, 1); 2065 s = max(start, pchild->start); 2066 l = min(last, pchild->last); 2067 if (l >= s) 2068 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2069 mutex_unlock(&pchild->lock); 2070 } 2071 s = max(start, prange->start); 2072 l = min(last, prange->last); 2073 if (l >= s) 2074 svm_range_unmap_from_gpus(prange, s, l, trigger); 2075 } 2076 2077 return r; 2078 } 2079 2080 static struct svm_range *svm_range_clone(struct svm_range *old) 2081 { 2082 struct svm_range *new; 2083 2084 new = svm_range_new(old->svms, old->start, old->last, false); 2085 if (!new) 2086 return NULL; 2087 if (svm_range_copy_dma_addrs(new, old)) { 2088 svm_range_free(new, false); 2089 return NULL; 2090 } 2091 if (old->svm_bo) { 2092 new->ttm_res = old->ttm_res; 2093 new->offset = old->offset; 2094 new->svm_bo = svm_range_bo_ref(old->svm_bo); 2095 spin_lock(&new->svm_bo->list_lock); 2096 list_add(&new->svm_bo_list, &new->svm_bo->range_list); 2097 spin_unlock(&new->svm_bo->list_lock); 2098 } 2099 new->flags = old->flags; 2100 new->preferred_loc = old->preferred_loc; 2101 new->prefetch_loc = old->prefetch_loc; 2102 new->actual_loc = old->actual_loc; 2103 new->granularity = old->granularity; 2104 new->mapped_to_gpu = old->mapped_to_gpu; 2105 new->vram_pages = old->vram_pages; 2106 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE); 2107 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE); 2108 atomic_set(&new->queue_refcount, atomic_read(&old->queue_refcount)); 2109 2110 return new; 2111 } 2112 2113 void svm_range_set_max_pages(struct amdgpu_device *adev) 2114 { 2115 uint64_t max_pages; 2116 uint64_t pages, _pages; 2117 uint64_t min_pages = 0; 2118 int i, id; 2119 2120 for (i = 0; i < adev->kfd.dev->num_nodes; i++) { 2121 if (adev->kfd.dev->nodes[i]->xcp) 2122 id = adev->kfd.dev->nodes[i]->xcp->id; 2123 else 2124 id = -1; 2125 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17; 2126 pages = clamp(pages, 1ULL << 9, 1ULL << 18); 2127 pages = rounddown_pow_of_two(pages); 2128 min_pages = min_not_zero(min_pages, pages); 2129 } 2130 2131 do { 2132 max_pages = READ_ONCE(max_svm_range_pages); 2133 _pages = min_not_zero(max_pages, min_pages); 2134 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages); 2135 } 2136 2137 static int 2138 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last, 2139 uint64_t max_pages, struct list_head *insert_list, 2140 struct list_head *update_list) 2141 { 2142 struct svm_range *prange; 2143 uint64_t l; 2144 2145 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n", 2146 max_pages, start, last); 2147 2148 while (last >= start) { 2149 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1); 2150 2151 prange = svm_range_new(svms, start, l, true); 2152 if (!prange) 2153 return -ENOMEM; 2154 list_add(&prange->list, insert_list); 2155 list_add(&prange->update_list, update_list); 2156 2157 start = l + 1; 2158 } 2159 return 0; 2160 } 2161 2162 /** 2163 * svm_range_add - add svm range and handle overlap 2164 * @p: the range add to this process svms 2165 * @start: page size aligned 2166 * @size: page size aligned 2167 * @nattr: number of attributes 2168 * @attrs: array of attributes 2169 * @update_list: output, the ranges need validate and update GPU mapping 2170 * @insert_list: output, the ranges need insert to svms 2171 * @remove_list: output, the ranges are replaced and need remove from svms 2172 * @remap_list: output, remap unaligned svm ranges 2173 * 2174 * Check if the virtual address range has overlap with any existing ranges, 2175 * split partly overlapping ranges and add new ranges in the gaps. All changes 2176 * should be applied to the range_list and interval tree transactionally. If 2177 * any range split or allocation fails, the entire update fails. Therefore any 2178 * existing overlapping svm_ranges are cloned and the original svm_ranges left 2179 * unchanged. 2180 * 2181 * If the transaction succeeds, the caller can update and insert clones and 2182 * new ranges, then free the originals. 2183 * 2184 * Otherwise the caller can free the clones and new ranges, while the old 2185 * svm_ranges remain unchanged. 2186 * 2187 * Context: Process context, caller must hold svms->lock 2188 * 2189 * Return: 2190 * 0 - OK, otherwise error code 2191 */ 2192 static int 2193 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size, 2194 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs, 2195 struct list_head *update_list, struct list_head *insert_list, 2196 struct list_head *remove_list, struct list_head *remap_list) 2197 { 2198 unsigned long last = start + size - 1UL; 2199 struct svm_range_list *svms = &p->svms; 2200 struct interval_tree_node *node; 2201 struct svm_range *prange; 2202 struct svm_range *tmp; 2203 struct list_head new_list; 2204 int r = 0; 2205 2206 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last); 2207 2208 INIT_LIST_HEAD(update_list); 2209 INIT_LIST_HEAD(insert_list); 2210 INIT_LIST_HEAD(remove_list); 2211 INIT_LIST_HEAD(&new_list); 2212 INIT_LIST_HEAD(remap_list); 2213 2214 node = interval_tree_iter_first(&svms->objects, start, last); 2215 while (node) { 2216 struct interval_tree_node *next; 2217 unsigned long next_start; 2218 2219 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start, 2220 node->last); 2221 2222 prange = container_of(node, struct svm_range, it_node); 2223 next = interval_tree_iter_next(node, start, last); 2224 next_start = min(node->last, last) + 1; 2225 2226 if (svm_range_is_same_attrs(p, prange, nattr, attrs) && 2227 prange->mapped_to_gpu) { 2228 /* nothing to do */ 2229 } else if (node->start < start || node->last > last) { 2230 /* node intersects the update range and its attributes 2231 * will change. Clone and split it, apply updates only 2232 * to the overlapping part 2233 */ 2234 struct svm_range *old = prange; 2235 2236 prange = svm_range_clone(old); 2237 if (!prange) { 2238 r = -ENOMEM; 2239 goto out; 2240 } 2241 2242 list_add(&old->update_list, remove_list); 2243 list_add(&prange->list, insert_list); 2244 list_add(&prange->update_list, update_list); 2245 2246 if (node->start < start) { 2247 pr_debug("change old range start\n"); 2248 r = svm_range_split_head(prange, start, 2249 insert_list, remap_list); 2250 if (r) 2251 goto out; 2252 } 2253 if (node->last > last) { 2254 pr_debug("change old range last\n"); 2255 r = svm_range_split_tail(prange, last, 2256 insert_list, remap_list); 2257 if (r) 2258 goto out; 2259 } 2260 } else { 2261 /* The node is contained within start..last, 2262 * just update it 2263 */ 2264 list_add(&prange->update_list, update_list); 2265 } 2266 2267 /* insert a new node if needed */ 2268 if (node->start > start) { 2269 r = svm_range_split_new(svms, start, node->start - 1, 2270 READ_ONCE(max_svm_range_pages), 2271 &new_list, update_list); 2272 if (r) 2273 goto out; 2274 } 2275 2276 node = next; 2277 start = next_start; 2278 } 2279 2280 /* add a final range at the end if needed */ 2281 if (start <= last) 2282 r = svm_range_split_new(svms, start, last, 2283 READ_ONCE(max_svm_range_pages), 2284 &new_list, update_list); 2285 2286 out: 2287 if (r) { 2288 list_for_each_entry_safe(prange, tmp, insert_list, list) 2289 svm_range_free(prange, false); 2290 list_for_each_entry_safe(prange, tmp, &new_list, list) 2291 svm_range_free(prange, true); 2292 } else { 2293 list_splice(&new_list, insert_list); 2294 } 2295 2296 return r; 2297 } 2298 2299 static void 2300 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm, 2301 struct svm_range *prange) 2302 { 2303 unsigned long start; 2304 unsigned long last; 2305 2306 start = prange->notifier.interval_tree.start >> PAGE_SHIFT; 2307 last = prange->notifier.interval_tree.last >> PAGE_SHIFT; 2308 2309 if (prange->start == start && prange->last == last) 2310 return; 2311 2312 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", 2313 prange->svms, prange, start, last, prange->start, 2314 prange->last); 2315 2316 if (start != 0 && last != 0) { 2317 interval_tree_remove(&prange->it_node, &prange->svms->objects); 2318 svm_range_remove_notifier(prange); 2319 } 2320 prange->it_node.start = prange->start; 2321 prange->it_node.last = prange->last; 2322 2323 interval_tree_insert(&prange->it_node, &prange->svms->objects); 2324 svm_range_add_notifier_locked(mm, prange); 2325 } 2326 2327 static void 2328 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange, 2329 struct mm_struct *mm) 2330 { 2331 switch (prange->work_item.op) { 2332 case SVM_OP_NULL: 2333 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2334 svms, prange, prange->start, prange->last); 2335 break; 2336 case SVM_OP_UNMAP_RANGE: 2337 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2338 svms, prange, prange->start, prange->last); 2339 svm_range_unlink(prange); 2340 svm_range_remove_notifier(prange); 2341 svm_range_free(prange, true); 2342 break; 2343 case SVM_OP_UPDATE_RANGE_NOTIFIER: 2344 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2345 svms, prange, prange->start, prange->last); 2346 svm_range_update_notifier_and_interval_tree(mm, prange); 2347 break; 2348 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP: 2349 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", 2350 svms, prange, prange->start, prange->last); 2351 svm_range_update_notifier_and_interval_tree(mm, prange); 2352 /* TODO: implement deferred validation and mapping */ 2353 break; 2354 case SVM_OP_ADD_RANGE: 2355 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange, 2356 prange->start, prange->last); 2357 svm_range_add_to_svms(prange); 2358 svm_range_add_notifier_locked(mm, prange); 2359 break; 2360 case SVM_OP_ADD_RANGE_AND_MAP: 2361 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, 2362 prange, prange->start, prange->last); 2363 svm_range_add_to_svms(prange); 2364 svm_range_add_notifier_locked(mm, prange); 2365 /* TODO: implement deferred validation and mapping */ 2366 break; 2367 default: 2368 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange, 2369 prange->work_item.op); 2370 } 2371 } 2372 2373 static void svm_range_drain_retry_fault(struct svm_range_list *svms) 2374 { 2375 struct kfd_process_device *pdd; 2376 struct kfd_process *p; 2377 uint32_t i; 2378 2379 p = container_of(svms, struct kfd_process, svms); 2380 2381 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2382 pdd = p->pdds[i]; 2383 if (!pdd) 2384 continue; 2385 2386 pr_debug("drain retry fault gpu %d svms %p\n", i, svms); 2387 2388 if (!down_read_trylock(&pdd->dev->adev->reset_domain->sem)) 2389 continue; 2390 2391 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2392 pdd->dev->adev->irq.retry_cam_enabled ? 2393 &pdd->dev->adev->irq.ih : 2394 &pdd->dev->adev->irq.ih1); 2395 2396 if (pdd->dev->adev->irq.retry_cam_enabled) 2397 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev, 2398 &pdd->dev->adev->irq.ih_soft); 2399 2400 up_read(&pdd->dev->adev->reset_domain->sem); 2401 2402 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms); 2403 } 2404 } 2405 2406 static void svm_range_deferred_list_work(struct work_struct *work) 2407 { 2408 struct svm_range_list *svms; 2409 struct svm_range *prange; 2410 struct mm_struct *mm; 2411 2412 svms = container_of(work, struct svm_range_list, deferred_list_work); 2413 pr_debug("enter svms 0x%p\n", svms); 2414 2415 spin_lock(&svms->deferred_list_lock); 2416 while (!list_empty(&svms->deferred_range_list)) { 2417 prange = list_first_entry(&svms->deferred_range_list, 2418 struct svm_range, deferred_list); 2419 spin_unlock(&svms->deferred_list_lock); 2420 2421 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange, 2422 prange->start, prange->last, prange->work_item.op); 2423 2424 mm = prange->work_item.mm; 2425 2426 mmap_write_lock(mm); 2427 2428 /* Remove from deferred_list must be inside mmap write lock, for 2429 * two race cases: 2430 * 1. unmap_from_cpu may change work_item.op and add the range 2431 * to deferred_list again, cause use after free bug. 2432 * 2. svm_range_list_lock_and_flush_work may hold mmap write 2433 * lock and continue because deferred_list is empty, but 2434 * deferred_list work is actually waiting for mmap lock. 2435 */ 2436 spin_lock(&svms->deferred_list_lock); 2437 list_del_init(&prange->deferred_list); 2438 spin_unlock(&svms->deferred_list_lock); 2439 2440 mutex_lock(&svms->lock); 2441 mutex_lock(&prange->migrate_mutex); 2442 while (!list_empty(&prange->child_list)) { 2443 struct svm_range *pchild; 2444 2445 pchild = list_first_entry(&prange->child_list, 2446 struct svm_range, child_list); 2447 pr_debug("child prange 0x%p op %d\n", pchild, 2448 pchild->work_item.op); 2449 list_del_init(&pchild->child_list); 2450 svm_range_handle_list_op(svms, pchild, mm); 2451 } 2452 mutex_unlock(&prange->migrate_mutex); 2453 2454 svm_range_handle_list_op(svms, prange, mm); 2455 mutex_unlock(&svms->lock); 2456 mmap_write_unlock(mm); 2457 2458 /* Pairs with mmget in svm_range_add_list_work. If dropping the 2459 * last mm refcount, schedule release work to avoid circular locking 2460 */ 2461 mmput_async(mm); 2462 2463 spin_lock(&svms->deferred_list_lock); 2464 } 2465 spin_unlock(&svms->deferred_list_lock); 2466 pr_debug("exit svms 0x%p\n", svms); 2467 } 2468 2469 void 2470 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange, 2471 struct mm_struct *mm, enum svm_work_list_ops op) 2472 { 2473 spin_lock(&svms->deferred_list_lock); 2474 /* if prange is on the deferred list */ 2475 if (!list_empty(&prange->deferred_list)) { 2476 pr_debug("update exist prange 0x%p work op %d\n", prange, op); 2477 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n"); 2478 if (op != SVM_OP_NULL && 2479 prange->work_item.op != SVM_OP_UNMAP_RANGE) 2480 prange->work_item.op = op; 2481 } else { 2482 /* Pairs with mmput in deferred_list_work. 2483 * If process is exiting and mm is gone, don't update mmu notifier. 2484 */ 2485 if (mmget_not_zero(mm)) { 2486 prange->work_item.mm = mm; 2487 prange->work_item.op = op; 2488 list_add_tail(&prange->deferred_list, 2489 &prange->svms->deferred_range_list); 2490 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n", 2491 prange, prange->start, prange->last, op); 2492 } 2493 } 2494 spin_unlock(&svms->deferred_list_lock); 2495 } 2496 2497 void schedule_deferred_list_work(struct svm_range_list *svms) 2498 { 2499 spin_lock(&svms->deferred_list_lock); 2500 if (!list_empty(&svms->deferred_range_list)) 2501 schedule_work(&svms->deferred_list_work); 2502 spin_unlock(&svms->deferred_list_lock); 2503 } 2504 2505 static void 2506 svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start, 2507 unsigned long last) 2508 { 2509 struct svm_range *head; 2510 struct svm_range *tail; 2511 2512 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2513 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange, 2514 prange->start, prange->last); 2515 return; 2516 } 2517 if (start > prange->last || last < prange->start) 2518 return; 2519 2520 head = tail = prange; 2521 if (start > prange->start) 2522 svm_range_split(prange, prange->start, start - 1, &tail); 2523 if (last < tail->last) 2524 svm_range_split(tail, last + 1, tail->last, &head); 2525 2526 if (head != prange && tail != prange) { 2527 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2528 svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE); 2529 } else if (tail != prange) { 2530 svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE); 2531 } else if (head != prange) { 2532 svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE); 2533 } else if (parent != prange) { 2534 prange->work_item.op = SVM_OP_UNMAP_RANGE; 2535 } 2536 } 2537 2538 static void 2539 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange, 2540 unsigned long start, unsigned long last) 2541 { 2542 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU; 2543 struct svm_range_list *svms; 2544 struct svm_range *pchild; 2545 struct kfd_process *p; 2546 unsigned long s, l; 2547 bool unmap_parent; 2548 uint32_t i; 2549 2550 if (atomic_read(&prange->queue_refcount)) { 2551 int r; 2552 2553 pr_warn("Freeing queue vital buffer 0x%lx, queue evicted\n", 2554 prange->start << PAGE_SHIFT); 2555 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM); 2556 if (r) 2557 pr_debug("failed %d to quiesce KFD queues\n", r); 2558 } 2559 2560 p = kfd_lookup_process_by_mm(mm); 2561 if (!p) 2562 return; 2563 svms = &p->svms; 2564 2565 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms, 2566 prange, prange->start, prange->last, start, last); 2567 2568 /* calculate time stamps that are used to decide which page faults need be 2569 * dropped or handled before unmap pages from gpu vm 2570 */ 2571 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) { 2572 struct kfd_process_device *pdd; 2573 struct amdgpu_device *adev; 2574 struct amdgpu_ih_ring *ih; 2575 uint32_t checkpoint_wptr; 2576 2577 pdd = p->pdds[i]; 2578 if (!pdd) 2579 continue; 2580 2581 adev = pdd->dev->adev; 2582 2583 /* Check and drain ih1 ring if cam not available */ 2584 if (!adev->irq.retry_cam_enabled && adev->irq.ih1.ring_size) { 2585 ih = &adev->irq.ih1; 2586 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2587 if (ih->rptr != checkpoint_wptr) { 2588 svms->checkpoint_ts[i] = 2589 amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2590 continue; 2591 } 2592 } 2593 2594 /* check if dev->irq.ih_soft is not empty */ 2595 ih = &adev->irq.ih_soft; 2596 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); 2597 if (ih->rptr != checkpoint_wptr) 2598 svms->checkpoint_ts[i] = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); 2599 } 2600 2601 unmap_parent = start <= prange->start && last >= prange->last; 2602 2603 list_for_each_entry(pchild, &prange->child_list, child_list) { 2604 mutex_lock_nested(&pchild->lock, 1); 2605 s = max(start, pchild->start); 2606 l = min(last, pchild->last); 2607 if (l >= s) 2608 svm_range_unmap_from_gpus(pchild, s, l, trigger); 2609 svm_range_unmap_split(prange, pchild, start, last); 2610 mutex_unlock(&pchild->lock); 2611 } 2612 s = max(start, prange->start); 2613 l = min(last, prange->last); 2614 if (l >= s) 2615 svm_range_unmap_from_gpus(prange, s, l, trigger); 2616 svm_range_unmap_split(prange, prange, start, last); 2617 2618 if (unmap_parent) 2619 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE); 2620 else 2621 svm_range_add_list_work(svms, prange, mm, 2622 SVM_OP_UPDATE_RANGE_NOTIFIER); 2623 schedule_deferred_list_work(svms); 2624 2625 kfd_unref_process(p); 2626 } 2627 2628 /** 2629 * svm_range_cpu_invalidate_pagetables - interval notifier callback 2630 * @mni: mmu_interval_notifier struct 2631 * @range: mmu_notifier_range struct 2632 * @cur_seq: value to pass to mmu_interval_set_seq() 2633 * 2634 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it 2635 * is from migration, or CPU page invalidation callback. 2636 * 2637 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed 2638 * work thread, and split prange if only part of prange is unmapped. 2639 * 2640 * For invalidation event, if GPU retry fault is not enabled, evict the queues, 2641 * then schedule svm_range_restore_work to update GPU mapping and resume queues. 2642 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will 2643 * update GPU mapping to recover. 2644 * 2645 * Context: mmap lock, notifier_invalidate_start lock are held 2646 * for invalidate event, prange lock is held if this is from migration 2647 */ 2648 static bool 2649 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni, 2650 const struct mmu_notifier_range *range, 2651 unsigned long cur_seq) 2652 { 2653 struct svm_range *prange; 2654 unsigned long start; 2655 unsigned long last; 2656 2657 if (range->event == MMU_NOTIFY_RELEASE) 2658 return true; 2659 2660 start = mni->interval_tree.start; 2661 last = mni->interval_tree.last; 2662 start = max(start, range->start) >> PAGE_SHIFT; 2663 last = min(last, range->end - 1) >> PAGE_SHIFT; 2664 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n", 2665 start, last, range->start >> PAGE_SHIFT, 2666 (range->end - 1) >> PAGE_SHIFT, 2667 mni->interval_tree.start >> PAGE_SHIFT, 2668 mni->interval_tree.last >> PAGE_SHIFT, range->event); 2669 2670 prange = container_of(mni, struct svm_range, notifier); 2671 2672 svm_range_lock(prange); 2673 mmu_interval_set_seq(mni, cur_seq); 2674 2675 switch (range->event) { 2676 case MMU_NOTIFY_UNMAP: 2677 svm_range_unmap_from_cpu(mni->mm, prange, start, last); 2678 break; 2679 default: 2680 svm_range_evict(prange, mni->mm, start, last, range->event); 2681 break; 2682 } 2683 2684 svm_range_unlock(prange); 2685 2686 return true; 2687 } 2688 2689 /** 2690 * svm_range_from_addr - find svm range from fault address 2691 * @svms: svm range list header 2692 * @addr: address to search range interval tree, in pages 2693 * @parent: parent range if range is on child list 2694 * 2695 * Context: The caller must hold svms->lock 2696 * 2697 * Return: the svm_range found or NULL 2698 */ 2699 struct svm_range * 2700 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr, 2701 struct svm_range **parent) 2702 { 2703 struct interval_tree_node *node; 2704 struct svm_range *prange; 2705 struct svm_range *pchild; 2706 2707 node = interval_tree_iter_first(&svms->objects, addr, addr); 2708 if (!node) 2709 return NULL; 2710 2711 prange = container_of(node, struct svm_range, it_node); 2712 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n", 2713 addr, prange->start, prange->last, node->start, node->last); 2714 2715 if (addr >= prange->start && addr <= prange->last) { 2716 if (parent) 2717 *parent = prange; 2718 return prange; 2719 } 2720 list_for_each_entry(pchild, &prange->child_list, child_list) 2721 if (addr >= pchild->start && addr <= pchild->last) { 2722 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n", 2723 addr, pchild->start, pchild->last); 2724 if (parent) 2725 *parent = prange; 2726 return pchild; 2727 } 2728 2729 return NULL; 2730 } 2731 2732 /* svm_range_best_restore_location - decide the best fault restore location 2733 * @prange: svm range structure 2734 * @adev: the GPU on which vm fault happened 2735 * 2736 * This is only called when xnack is on, to decide the best location to restore 2737 * the range mapping after GPU vm fault. Caller uses the best location to do 2738 * migration if actual loc is not best location, then update GPU page table 2739 * mapping to the best location. 2740 * 2741 * If the preferred loc is accessible by faulting GPU, use preferred loc. 2742 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu 2743 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then 2744 * if range actual loc is cpu, best_loc is cpu 2745 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is 2746 * range actual loc. 2747 * Otherwise, GPU no access, best_loc is -1. 2748 * 2749 * Return: 2750 * -1 means vm fault GPU no access 2751 * 0 for CPU or GPU id 2752 */ 2753 static int32_t 2754 svm_range_best_restore_location(struct svm_range *prange, 2755 struct kfd_node *node, 2756 int32_t *gpuidx) 2757 { 2758 struct kfd_node *bo_node, *preferred_node; 2759 struct kfd_process *p; 2760 uint32_t gpuid; 2761 int r; 2762 2763 p = container_of(prange->svms, struct kfd_process, svms); 2764 2765 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx); 2766 if (r < 0) { 2767 pr_debug("failed to get gpuid from kgd\n"); 2768 return -1; 2769 } 2770 2771 if (node->adev->apu_prefer_gtt) 2772 return 0; 2773 2774 if (prange->preferred_loc == gpuid || 2775 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) { 2776 return prange->preferred_loc; 2777 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 2778 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc); 2779 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node)) 2780 return prange->preferred_loc; 2781 /* fall through */ 2782 } 2783 2784 if (test_bit(*gpuidx, prange->bitmap_access)) 2785 return gpuid; 2786 2787 if (test_bit(*gpuidx, prange->bitmap_aip)) { 2788 if (!prange->actual_loc) 2789 return 0; 2790 2791 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc); 2792 if (bo_node && svm_nodes_in_same_hive(node, bo_node)) 2793 return prange->actual_loc; 2794 else 2795 return 0; 2796 } 2797 2798 return -1; 2799 } 2800 2801 static int 2802 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr, 2803 unsigned long *start, unsigned long *last, 2804 bool *is_heap_stack) 2805 { 2806 struct vm_area_struct *vma; 2807 struct interval_tree_node *node; 2808 struct rb_node *rb_node; 2809 unsigned long start_limit, end_limit; 2810 2811 vma = vma_lookup(p->mm, addr << PAGE_SHIFT); 2812 if (!vma) { 2813 pr_debug("VMA does not exist in address [0x%llx]\n", addr); 2814 return -EFAULT; 2815 } 2816 2817 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma); 2818 2819 start_limit = max(vma->vm_start >> PAGE_SHIFT, 2820 (unsigned long)ALIGN_DOWN(addr, 1UL << p->svms.default_granularity)); 2821 end_limit = min(vma->vm_end >> PAGE_SHIFT, 2822 (unsigned long)ALIGN(addr + 1, 1UL << p->svms.default_granularity)); 2823 2824 /* First range that starts after the fault address */ 2825 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX); 2826 if (node) { 2827 end_limit = min(end_limit, node->start); 2828 /* Last range that ends before the fault address */ 2829 rb_node = rb_prev(&node->rb); 2830 } else { 2831 /* Last range must end before addr because 2832 * there was no range after addr 2833 */ 2834 rb_node = rb_last(&p->svms.objects.rb_root); 2835 } 2836 if (rb_node) { 2837 node = container_of(rb_node, struct interval_tree_node, rb); 2838 if (node->last >= addr) { 2839 WARN(1, "Overlap with prev node and page fault addr\n"); 2840 return -EFAULT; 2841 } 2842 start_limit = max(start_limit, node->last + 1); 2843 } 2844 2845 *start = start_limit; 2846 *last = end_limit - 1; 2847 2848 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n", 2849 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT, 2850 *start, *last, *is_heap_stack); 2851 2852 return 0; 2853 } 2854 2855 static int 2856 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last, 2857 uint64_t *bo_s, uint64_t *bo_l) 2858 { 2859 struct amdgpu_bo_va_mapping *mapping; 2860 struct interval_tree_node *node; 2861 struct amdgpu_bo *bo = NULL; 2862 unsigned long userptr; 2863 uint32_t i; 2864 int r; 2865 2866 for (i = 0; i < p->n_pdds; i++) { 2867 struct amdgpu_vm *vm; 2868 2869 if (!p->pdds[i]->drm_priv) 2870 continue; 2871 2872 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 2873 r = amdgpu_bo_reserve(vm->root.bo, false); 2874 if (r) 2875 return r; 2876 2877 /* Check userptr by searching entire vm->va interval tree */ 2878 node = interval_tree_iter_first(&vm->va, 0, ~0ULL); 2879 while (node) { 2880 mapping = container_of((struct rb_node *)node, 2881 struct amdgpu_bo_va_mapping, rb); 2882 bo = mapping->bo_va->base.bo; 2883 2884 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, 2885 start << PAGE_SHIFT, 2886 last << PAGE_SHIFT, 2887 &userptr)) { 2888 node = interval_tree_iter_next(node, 0, ~0ULL); 2889 continue; 2890 } 2891 2892 pr_debug("[0x%llx 0x%llx] already userptr mapped\n", 2893 start, last); 2894 if (bo_s && bo_l) { 2895 *bo_s = userptr >> PAGE_SHIFT; 2896 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1; 2897 } 2898 amdgpu_bo_unreserve(vm->root.bo); 2899 return -EADDRINUSE; 2900 } 2901 amdgpu_bo_unreserve(vm->root.bo); 2902 } 2903 return 0; 2904 } 2905 2906 static struct 2907 svm_range *svm_range_create_unregistered_range(struct kfd_node *node, 2908 struct kfd_process *p, 2909 struct mm_struct *mm, 2910 int64_t addr) 2911 { 2912 struct svm_range *prange = NULL; 2913 unsigned long start, last; 2914 uint32_t gpuid, gpuidx; 2915 bool is_heap_stack; 2916 uint64_t bo_s = 0; 2917 uint64_t bo_l = 0; 2918 int r; 2919 2920 if (svm_range_get_range_boundaries(p, addr, &start, &last, 2921 &is_heap_stack)) 2922 return NULL; 2923 2924 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l); 2925 if (r != -EADDRINUSE) 2926 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l); 2927 2928 if (r == -EADDRINUSE) { 2929 if (addr >= bo_s && addr <= bo_l) 2930 return NULL; 2931 2932 /* Create one page svm range if 2MB range overlapping */ 2933 start = addr; 2934 last = addr; 2935 } 2936 2937 prange = svm_range_new(&p->svms, start, last, true); 2938 if (!prange) { 2939 pr_debug("Failed to create prange in address [0x%llx]\n", addr); 2940 return NULL; 2941 } 2942 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 2943 pr_debug("failed to get gpuid from kgd\n"); 2944 svm_range_free(prange, true); 2945 return NULL; 2946 } 2947 2948 if (is_heap_stack) 2949 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM; 2950 2951 svm_range_add_to_svms(prange); 2952 svm_range_add_notifier_locked(mm, prange); 2953 2954 return prange; 2955 } 2956 2957 /* svm_range_skip_recover - decide if prange can be recovered 2958 * @prange: svm range structure 2959 * 2960 * GPU vm retry fault handle skip recover the range for cases: 2961 * 1. prange is on deferred list to be removed after unmap, it is stale fault, 2962 * deferred list work will drain the stale fault before free the prange. 2963 * 2. prange is on deferred list to add interval notifier after split, or 2964 * 3. prange is child range, it is split from parent prange, recover later 2965 * after interval notifier is added. 2966 * 2967 * Return: true to skip recover, false to recover 2968 */ 2969 static bool svm_range_skip_recover(struct svm_range *prange) 2970 { 2971 struct svm_range_list *svms = prange->svms; 2972 2973 spin_lock(&svms->deferred_list_lock); 2974 if (list_empty(&prange->deferred_list) && 2975 list_empty(&prange->child_list)) { 2976 spin_unlock(&svms->deferred_list_lock); 2977 return false; 2978 } 2979 spin_unlock(&svms->deferred_list_lock); 2980 2981 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) { 2982 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n", 2983 svms, prange, prange->start, prange->last); 2984 return true; 2985 } 2986 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP || 2987 prange->work_item.op == SVM_OP_ADD_RANGE) { 2988 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n", 2989 svms, prange, prange->start, prange->last); 2990 return true; 2991 } 2992 return false; 2993 } 2994 2995 static void 2996 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p, 2997 int32_t gpuidx) 2998 { 2999 struct kfd_process_device *pdd; 3000 3001 /* fault is on different page of same range 3002 * or fault is skipped to recover later 3003 * or fault is on invalid virtual address 3004 */ 3005 if (gpuidx == MAX_GPU_INSTANCE) { 3006 uint32_t gpuid; 3007 int r; 3008 3009 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx); 3010 if (r < 0) 3011 return; 3012 } 3013 3014 /* fault is recovered 3015 * or fault cannot recover because GPU no access on the range 3016 */ 3017 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3018 if (pdd) 3019 WRITE_ONCE(pdd->faults, pdd->faults + 1); 3020 } 3021 3022 static bool 3023 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault) 3024 { 3025 unsigned long requested = VM_READ; 3026 3027 if (write_fault) 3028 requested |= VM_WRITE; 3029 3030 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested, 3031 vma->vm_flags); 3032 return (vma->vm_flags & requested) == requested; 3033 } 3034 3035 int 3036 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid, 3037 uint32_t vmid, uint32_t node_id, 3038 uint64_t addr, uint64_t ts, bool write_fault) 3039 { 3040 unsigned long start, last, size; 3041 struct mm_struct *mm = NULL; 3042 struct svm_range_list *svms; 3043 struct svm_range *prange; 3044 struct kfd_process *p; 3045 ktime_t timestamp = ktime_get_boottime(); 3046 struct kfd_node *node; 3047 int32_t best_loc; 3048 int32_t gpuid, gpuidx = MAX_GPU_INSTANCE; 3049 bool write_locked = false; 3050 struct vm_area_struct *vma; 3051 bool migration = false; 3052 int r = 0; 3053 3054 if (!KFD_IS_SVM_API_SUPPORTED(adev)) { 3055 pr_debug("device does not support SVM\n"); 3056 return -EFAULT; 3057 } 3058 3059 p = kfd_lookup_process_by_pasid(pasid, NULL); 3060 if (!p) { 3061 pr_debug("kfd process not founded pasid 0x%x\n", pasid); 3062 return 0; 3063 } 3064 svms = &p->svms; 3065 3066 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr); 3067 3068 if (atomic_read(&svms->drain_pagefaults)) { 3069 pr_debug("page fault handling disabled, drop fault 0x%llx\n", addr); 3070 r = 0; 3071 goto out; 3072 } 3073 3074 node = kfd_node_by_irq_ids(adev, node_id, vmid); 3075 if (!node) { 3076 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id, 3077 vmid); 3078 r = -EFAULT; 3079 goto out; 3080 } 3081 3082 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) { 3083 pr_debug("failed to get gpuid/gpuidex for node_id: %d\n", node_id); 3084 r = -EFAULT; 3085 goto out; 3086 } 3087 3088 if (!p->xnack_enabled) { 3089 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid); 3090 r = -EFAULT; 3091 goto out; 3092 } 3093 3094 /* p->lead_thread is available as kfd_process_wq_release flush the work 3095 * before releasing task ref. 3096 */ 3097 mm = get_task_mm(p->lead_thread); 3098 if (!mm) { 3099 pr_debug("svms 0x%p failed to get mm\n", svms); 3100 r = 0; 3101 goto out; 3102 } 3103 3104 mmap_read_lock(mm); 3105 retry_write_locked: 3106 mutex_lock(&svms->lock); 3107 3108 /* check if this page fault time stamp is before svms->checkpoint_ts */ 3109 if (svms->checkpoint_ts[gpuidx] != 0) { 3110 if (amdgpu_ih_ts_after_or_equal(ts, svms->checkpoint_ts[gpuidx])) { 3111 pr_debug("draining retry fault, drop fault 0x%llx\n", addr); 3112 if (write_locked) 3113 mmap_write_downgrade(mm); 3114 r = -EAGAIN; 3115 goto out_unlock_svms; 3116 } else { 3117 /* ts is after svms->checkpoint_ts now, reset svms->checkpoint_ts 3118 * to zero to avoid following ts wrap around give wrong comparing 3119 */ 3120 svms->checkpoint_ts[gpuidx] = 0; 3121 } 3122 } 3123 3124 prange = svm_range_from_addr(svms, addr, NULL); 3125 if (!prange) { 3126 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n", 3127 svms, addr); 3128 if (!write_locked) { 3129 /* Need the write lock to create new range with MMU notifier. 3130 * Also flush pending deferred work to make sure the interval 3131 * tree is up to date before we add a new range 3132 */ 3133 mutex_unlock(&svms->lock); 3134 mmap_read_unlock(mm); 3135 mmap_write_lock(mm); 3136 write_locked = true; 3137 goto retry_write_locked; 3138 } 3139 prange = svm_range_create_unregistered_range(node, p, mm, addr); 3140 if (!prange) { 3141 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n", 3142 svms, addr); 3143 mmap_write_downgrade(mm); 3144 r = -EFAULT; 3145 goto out_unlock_svms; 3146 } 3147 } 3148 if (write_locked) 3149 mmap_write_downgrade(mm); 3150 3151 mutex_lock(&prange->migrate_mutex); 3152 3153 if (svm_range_skip_recover(prange)) { 3154 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3155 r = 0; 3156 goto out_unlock_range; 3157 } 3158 3159 /* skip duplicate vm fault on different pages of same range */ 3160 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp, 3161 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) { 3162 pr_debug("svms 0x%p [0x%lx %lx] already restored\n", 3163 svms, prange->start, prange->last); 3164 r = 0; 3165 goto out_unlock_range; 3166 } 3167 3168 /* __do_munmap removed VMA, return success as we are handling stale 3169 * retry fault. 3170 */ 3171 vma = vma_lookup(mm, addr << PAGE_SHIFT); 3172 if (!vma) { 3173 pr_debug("address 0x%llx VMA is removed\n", addr); 3174 r = 0; 3175 goto out_unlock_range; 3176 } 3177 3178 if (!svm_fault_allowed(vma, write_fault)) { 3179 pr_debug("fault addr 0x%llx no %s permission\n", addr, 3180 write_fault ? "write" : "read"); 3181 r = -EPERM; 3182 goto out_unlock_range; 3183 } 3184 3185 best_loc = svm_range_best_restore_location(prange, node, &gpuidx); 3186 if (best_loc == -1) { 3187 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n", 3188 svms, prange->start, prange->last); 3189 r = -EACCES; 3190 goto out_unlock_range; 3191 } 3192 3193 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n", 3194 svms, prange->start, prange->last, best_loc, 3195 prange->actual_loc); 3196 3197 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr, 3198 write_fault, timestamp); 3199 3200 /* Align migration range start and size to granularity size */ 3201 size = 1UL << prange->granularity; 3202 start = max_t(unsigned long, ALIGN_DOWN(addr, size), prange->start); 3203 last = min_t(unsigned long, ALIGN(addr + 1, size) - 1, prange->last); 3204 if (prange->actual_loc != 0 || best_loc != 0) { 3205 if (best_loc) { 3206 r = svm_migrate_to_vram(prange, best_loc, start, last, 3207 mm, KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU); 3208 if (r) { 3209 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n", 3210 r, addr); 3211 /* Fallback to system memory if migration to 3212 * VRAM failed 3213 */ 3214 if (prange->actual_loc && prange->actual_loc != best_loc) 3215 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3216 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3217 else 3218 r = 0; 3219 } 3220 } else { 3221 r = svm_migrate_vram_to_ram(prange, mm, start, last, 3222 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU, NULL); 3223 } 3224 if (r) { 3225 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n", 3226 r, svms, start, last); 3227 goto out_migrate_fail; 3228 } else { 3229 migration = true; 3230 } 3231 } 3232 3233 r = svm_range_validate_and_map(mm, start, last, prange, gpuidx, false, 3234 false, false); 3235 if (r) 3236 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n", 3237 r, svms, start, last); 3238 3239 out_migrate_fail: 3240 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr, 3241 migration); 3242 3243 out_unlock_range: 3244 mutex_unlock(&prange->migrate_mutex); 3245 out_unlock_svms: 3246 mutex_unlock(&svms->lock); 3247 mmap_read_unlock(mm); 3248 3249 if (r != -EAGAIN) 3250 svm_range_count_fault(node, p, gpuidx); 3251 3252 mmput(mm); 3253 out: 3254 kfd_unref_process(p); 3255 3256 if (r == -EAGAIN) { 3257 pr_debug("recover vm fault later\n"); 3258 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid); 3259 r = 0; 3260 } 3261 return r; 3262 } 3263 3264 int 3265 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled) 3266 { 3267 struct svm_range *prange, *pchild; 3268 uint64_t reserved_size = 0; 3269 uint64_t size; 3270 int r = 0; 3271 3272 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled); 3273 3274 mutex_lock(&p->svms.lock); 3275 3276 list_for_each_entry(prange, &p->svms.list, list) { 3277 svm_range_lock(prange); 3278 list_for_each_entry(pchild, &prange->child_list, child_list) { 3279 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT; 3280 if (xnack_enabled) { 3281 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3282 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3283 } else { 3284 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3285 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3286 if (r) 3287 goto out_unlock; 3288 reserved_size += size; 3289 } 3290 } 3291 3292 size = (prange->last - prange->start + 1) << PAGE_SHIFT; 3293 if (xnack_enabled) { 3294 amdgpu_amdkfd_unreserve_mem_limit(NULL, size, 3295 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3296 } else { 3297 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size, 3298 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3299 if (r) 3300 goto out_unlock; 3301 reserved_size += size; 3302 } 3303 out_unlock: 3304 svm_range_unlock(prange); 3305 if (r) 3306 break; 3307 } 3308 3309 if (r) 3310 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size, 3311 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0); 3312 else 3313 /* Change xnack mode must be inside svms lock, to avoid race with 3314 * svm_range_deferred_list_work unreserve memory in parallel. 3315 */ 3316 p->xnack_enabled = xnack_enabled; 3317 3318 mutex_unlock(&p->svms.lock); 3319 return r; 3320 } 3321 3322 void svm_range_list_fini(struct kfd_process *p) 3323 { 3324 struct svm_range *prange; 3325 struct svm_range *next; 3326 3327 pr_debug("process pid %d svms 0x%p\n", p->lead_thread->pid, 3328 &p->svms); 3329 3330 cancel_delayed_work_sync(&p->svms.restore_work); 3331 3332 /* Ensure list work is finished before process is destroyed */ 3333 flush_work(&p->svms.deferred_list_work); 3334 3335 /* 3336 * Ensure no retry fault comes in afterwards, as page fault handler will 3337 * not find kfd process and take mm lock to recover fault. 3338 * stop kfd page fault handing, then wait pending page faults got drained 3339 */ 3340 atomic_set(&p->svms.drain_pagefaults, 1); 3341 svm_range_drain_retry_fault(&p->svms); 3342 3343 list_for_each_entry_safe(prange, next, &p->svms.list, list) { 3344 svm_range_unlink(prange); 3345 svm_range_remove_notifier(prange); 3346 svm_range_free(prange, true); 3347 } 3348 3349 mutex_destroy(&p->svms.lock); 3350 3351 pr_debug("process pid %d svms 0x%p done\n", 3352 p->lead_thread->pid, &p->svms); 3353 } 3354 3355 int svm_range_list_init(struct kfd_process *p) 3356 { 3357 struct svm_range_list *svms = &p->svms; 3358 int i; 3359 3360 svms->objects = RB_ROOT_CACHED; 3361 mutex_init(&svms->lock); 3362 INIT_LIST_HEAD(&svms->list); 3363 atomic_set(&svms->evicted_ranges, 0); 3364 atomic_set(&svms->drain_pagefaults, 0); 3365 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work); 3366 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work); 3367 INIT_LIST_HEAD(&svms->deferred_range_list); 3368 INIT_LIST_HEAD(&svms->criu_svm_metadata_list); 3369 spin_lock_init(&svms->deferred_list_lock); 3370 3371 for (i = 0; i < p->n_pdds; i++) 3372 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev)) 3373 bitmap_set(svms->bitmap_supported, i, 1); 3374 3375 /* Value of default granularity cannot exceed 0x1B, the 3376 * number of pages supported by a 4-level paging table 3377 */ 3378 svms->default_granularity = min_t(u8, amdgpu_svm_default_granularity, 0x1B); 3379 pr_debug("Default SVM Granularity to use: %d\n", svms->default_granularity); 3380 3381 return 0; 3382 } 3383 3384 /** 3385 * svm_range_check_vm - check if virtual address range mapped already 3386 * @p: current kfd_process 3387 * @start: range start address, in pages 3388 * @last: range last address, in pages 3389 * @bo_s: mapping start address in pages if address range already mapped 3390 * @bo_l: mapping last address in pages if address range already mapped 3391 * 3392 * The purpose is to avoid virtual address ranges already allocated by 3393 * kfd_ioctl_alloc_memory_of_gpu ioctl. 3394 * It looks for each pdd in the kfd_process. 3395 * 3396 * Context: Process context 3397 * 3398 * Return 0 - OK, if the range is not mapped. 3399 * Otherwise error code: 3400 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu 3401 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by 3402 * a signal. Release all buffer reservations and return to user-space. 3403 */ 3404 static int 3405 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last, 3406 uint64_t *bo_s, uint64_t *bo_l) 3407 { 3408 struct amdgpu_bo_va_mapping *mapping; 3409 struct interval_tree_node *node; 3410 uint32_t i; 3411 int r; 3412 3413 for (i = 0; i < p->n_pdds; i++) { 3414 struct amdgpu_vm *vm; 3415 3416 if (!p->pdds[i]->drm_priv) 3417 continue; 3418 3419 vm = drm_priv_to_vm(p->pdds[i]->drm_priv); 3420 r = amdgpu_bo_reserve(vm->root.bo, false); 3421 if (r) 3422 return r; 3423 3424 node = interval_tree_iter_first(&vm->va, start, last); 3425 if (node) { 3426 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n", 3427 start, last); 3428 mapping = container_of((struct rb_node *)node, 3429 struct amdgpu_bo_va_mapping, rb); 3430 if (bo_s && bo_l) { 3431 *bo_s = mapping->start; 3432 *bo_l = mapping->last; 3433 } 3434 amdgpu_bo_unreserve(vm->root.bo); 3435 return -EADDRINUSE; 3436 } 3437 amdgpu_bo_unreserve(vm->root.bo); 3438 } 3439 3440 return 0; 3441 } 3442 3443 /** 3444 * svm_range_is_valid - check if virtual address range is valid 3445 * @p: current kfd_process 3446 * @start: range start address, in pages 3447 * @size: range size, in pages 3448 * 3449 * Valid virtual address range means it belongs to one or more VMAs 3450 * 3451 * Context: Process context 3452 * 3453 * Return: 3454 * 0 - OK, otherwise error code 3455 */ 3456 static int 3457 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size) 3458 { 3459 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP; 3460 struct vm_area_struct *vma; 3461 unsigned long end; 3462 unsigned long start_unchg = start; 3463 3464 start <<= PAGE_SHIFT; 3465 end = start + (size << PAGE_SHIFT); 3466 do { 3467 vma = vma_lookup(p->mm, start); 3468 if (!vma || (vma->vm_flags & device_vma)) 3469 return -EFAULT; 3470 start = min(end, vma->vm_end); 3471 } while (start < end); 3472 3473 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL, 3474 NULL); 3475 } 3476 3477 /** 3478 * svm_range_best_prefetch_location - decide the best prefetch location 3479 * @prange: svm range structure 3480 * 3481 * For xnack off: 3482 * If range map to single GPU, the best prefetch location is prefetch_loc, which 3483 * can be CPU or GPU. 3484 * 3485 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on 3486 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise 3487 * the best prefetch location is always CPU, because GPU can not have coherent 3488 * mapping VRAM of other GPUs even with large-BAR PCIe connection. 3489 * 3490 * For xnack on: 3491 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is 3492 * prefetch_loc, other GPU access will generate vm fault and trigger migration. 3493 * 3494 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same 3495 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best 3496 * prefetch location is always CPU. 3497 * 3498 * Context: Process context 3499 * 3500 * Return: 3501 * 0 for CPU or GPU id 3502 */ 3503 static uint32_t 3504 svm_range_best_prefetch_location(struct svm_range *prange) 3505 { 3506 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE); 3507 uint32_t best_loc = prange->prefetch_loc; 3508 struct kfd_process_device *pdd; 3509 struct kfd_node *bo_node; 3510 struct kfd_process *p; 3511 uint32_t gpuidx; 3512 3513 p = container_of(prange->svms, struct kfd_process, svms); 3514 3515 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) 3516 goto out; 3517 3518 bo_node = svm_range_get_node_by_id(prange, best_loc); 3519 if (!bo_node) { 3520 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc); 3521 best_loc = 0; 3522 goto out; 3523 } 3524 3525 if (bo_node->adev->apu_prefer_gtt) { 3526 best_loc = 0; 3527 goto out; 3528 } 3529 3530 if (p->xnack_enabled) 3531 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE); 3532 else 3533 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip, 3534 MAX_GPU_INSTANCE); 3535 3536 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) { 3537 pdd = kfd_process_device_from_gpuidx(p, gpuidx); 3538 if (!pdd) { 3539 pr_debug("failed to get device by idx 0x%x\n", gpuidx); 3540 continue; 3541 } 3542 3543 if (pdd->dev->adev == bo_node->adev) 3544 continue; 3545 3546 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) { 3547 best_loc = 0; 3548 break; 3549 } 3550 } 3551 3552 out: 3553 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n", 3554 p->xnack_enabled, &p->svms, prange->start, prange->last, 3555 best_loc); 3556 3557 return best_loc; 3558 } 3559 3560 /* svm_range_trigger_migration - start page migration if prefetch loc changed 3561 * @mm: current process mm_struct 3562 * @prange: svm range structure 3563 * @migrated: output, true if migration is triggered 3564 * 3565 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range 3566 * from ram to vram. 3567 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range 3568 * from vram to ram. 3569 * 3570 * If GPU vm fault retry is not enabled, migration interact with MMU notifier 3571 * and restore work: 3572 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict 3573 * stops all queues, schedule restore work 3574 * 2. svm_range_restore_work wait for migration is done by 3575 * a. svm_range_validate_vram takes prange->migrate_mutex 3576 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns 3577 * 3. restore work update mappings of GPU, resume all queues. 3578 * 3579 * Context: Process context 3580 * 3581 * Return: 3582 * 0 - OK, otherwise - error code of migration 3583 */ 3584 static int 3585 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange, 3586 bool *migrated) 3587 { 3588 uint32_t best_loc; 3589 int r = 0; 3590 3591 *migrated = false; 3592 best_loc = svm_range_best_prefetch_location(prange); 3593 3594 /* when best_loc is a gpu node and same as prange->actual_loc 3595 * we still need do migration as prange->actual_loc !=0 does 3596 * not mean all pages in prange are vram. hmm migrate will pick 3597 * up right pages during migration. 3598 */ 3599 if ((best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED) || 3600 (best_loc == 0 && prange->actual_loc == 0)) 3601 return 0; 3602 3603 if (!best_loc) { 3604 r = svm_migrate_vram_to_ram(prange, mm, prange->start, prange->last, 3605 KFD_MIGRATE_TRIGGER_PREFETCH, NULL); 3606 *migrated = !r; 3607 return r; 3608 } 3609 3610 r = svm_migrate_to_vram(prange, best_loc, prange->start, prange->last, 3611 mm, KFD_MIGRATE_TRIGGER_PREFETCH); 3612 *migrated = !r; 3613 3614 return 0; 3615 } 3616 3617 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence) 3618 { 3619 /* Dereferencing fence->svm_bo is safe here because the fence hasn't 3620 * signaled yet and we're under the protection of the fence->lock. 3621 * After the fence is signaled in svm_range_bo_release, we cannot get 3622 * here any more. 3623 * 3624 * Reference is dropped in svm_range_evict_svm_bo_worker. 3625 */ 3626 if (svm_bo_ref_unless_zero(fence->svm_bo)) { 3627 WRITE_ONCE(fence->svm_bo->evicting, 1); 3628 schedule_work(&fence->svm_bo->eviction_work); 3629 } 3630 3631 return 0; 3632 } 3633 3634 static void svm_range_evict_svm_bo_worker(struct work_struct *work) 3635 { 3636 struct svm_range_bo *svm_bo; 3637 struct mm_struct *mm; 3638 int r = 0; 3639 3640 svm_bo = container_of(work, struct svm_range_bo, eviction_work); 3641 3642 if (mmget_not_zero(svm_bo->eviction_fence->mm)) { 3643 mm = svm_bo->eviction_fence->mm; 3644 } else { 3645 svm_range_bo_unref(svm_bo); 3646 return; 3647 } 3648 3649 mmap_read_lock(mm); 3650 spin_lock(&svm_bo->list_lock); 3651 while (!list_empty(&svm_bo->range_list) && !r) { 3652 struct svm_range *prange = 3653 list_first_entry(&svm_bo->range_list, 3654 struct svm_range, svm_bo_list); 3655 int retries = 3; 3656 3657 list_del_init(&prange->svm_bo_list); 3658 spin_unlock(&svm_bo->list_lock); 3659 3660 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms, 3661 prange->start, prange->last); 3662 3663 mutex_lock(&prange->migrate_mutex); 3664 do { 3665 /* migrate all vram pages in this prange to sys ram 3666 * after that prange->actual_loc should be zero 3667 */ 3668 r = svm_migrate_vram_to_ram(prange, mm, 3669 prange->start, prange->last, 3670 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL); 3671 } while (!r && prange->actual_loc && --retries); 3672 3673 if (!r && prange->actual_loc) 3674 pr_info_once("Migration failed during eviction"); 3675 3676 if (!prange->actual_loc) { 3677 mutex_lock(&prange->lock); 3678 prange->svm_bo = NULL; 3679 mutex_unlock(&prange->lock); 3680 } 3681 mutex_unlock(&prange->migrate_mutex); 3682 3683 spin_lock(&svm_bo->list_lock); 3684 } 3685 spin_unlock(&svm_bo->list_lock); 3686 mmap_read_unlock(mm); 3687 mmput(mm); 3688 3689 dma_fence_signal(&svm_bo->eviction_fence->base); 3690 3691 /* This is the last reference to svm_bo, after svm_range_vram_node_free 3692 * has been called in svm_migrate_vram_to_ram 3693 */ 3694 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n"); 3695 svm_range_bo_unref(svm_bo); 3696 } 3697 3698 static int 3699 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm, 3700 uint64_t start, uint64_t size, uint32_t nattr, 3701 struct kfd_ioctl_svm_attribute *attrs) 3702 { 3703 struct amdkfd_process_info *process_info = p->kgd_process_info; 3704 struct list_head update_list; 3705 struct list_head insert_list; 3706 struct list_head remove_list; 3707 struct list_head remap_list; 3708 struct svm_range_list *svms; 3709 struct svm_range *prange; 3710 struct svm_range *next; 3711 bool update_mapping = false; 3712 bool flush_tlb; 3713 int r, ret = 0; 3714 3715 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n", 3716 p->lead_thread->pid, &p->svms, start, start + size - 1, size); 3717 3718 r = svm_range_check_attr(p, nattr, attrs); 3719 if (r) 3720 return r; 3721 3722 svms = &p->svms; 3723 3724 mutex_lock(&process_info->lock); 3725 3726 svm_range_list_lock_and_flush_work(svms, mm); 3727 3728 r = svm_range_is_valid(p, start, size); 3729 if (r) { 3730 pr_debug("invalid range r=%d\n", r); 3731 mmap_write_unlock(mm); 3732 goto out; 3733 } 3734 3735 mutex_lock(&svms->lock); 3736 3737 /* Add new range and split existing ranges as needed */ 3738 r = svm_range_add(p, start, size, nattr, attrs, &update_list, 3739 &insert_list, &remove_list, &remap_list); 3740 if (r) { 3741 mutex_unlock(&svms->lock); 3742 mmap_write_unlock(mm); 3743 goto out; 3744 } 3745 /* Apply changes as a transaction */ 3746 list_for_each_entry_safe(prange, next, &insert_list, list) { 3747 svm_range_add_to_svms(prange); 3748 svm_range_add_notifier_locked(mm, prange); 3749 } 3750 list_for_each_entry(prange, &update_list, update_list) { 3751 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping); 3752 /* TODO: unmap ranges from GPU that lost access */ 3753 } 3754 update_mapping |= !p->xnack_enabled && !list_empty(&remap_list); 3755 3756 list_for_each_entry_safe(prange, next, &remove_list, update_list) { 3757 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n", 3758 prange->svms, prange, prange->start, 3759 prange->last); 3760 svm_range_unlink(prange); 3761 svm_range_remove_notifier(prange); 3762 svm_range_free(prange, false); 3763 } 3764 3765 mmap_write_downgrade(mm); 3766 /* Trigger migrations and revalidate and map to GPUs as needed. If 3767 * this fails we may be left with partially completed actions. There 3768 * is no clean way of rolling back to the previous state in such a 3769 * case because the rollback wouldn't be guaranteed to work either. 3770 */ 3771 list_for_each_entry(prange, &update_list, update_list) { 3772 bool migrated; 3773 3774 mutex_lock(&prange->migrate_mutex); 3775 3776 r = svm_range_trigger_migration(mm, prange, &migrated); 3777 if (r) 3778 goto out_unlock_range; 3779 3780 if (migrated && (!p->xnack_enabled || 3781 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) && 3782 prange->mapped_to_gpu) { 3783 pr_debug("restore_work will update mappings of GPUs\n"); 3784 mutex_unlock(&prange->migrate_mutex); 3785 continue; 3786 } 3787 3788 if (!migrated && !update_mapping) { 3789 mutex_unlock(&prange->migrate_mutex); 3790 continue; 3791 } 3792 3793 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu; 3794 3795 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3796 MAX_GPU_INSTANCE, true, true, flush_tlb); 3797 if (r) 3798 pr_debug("failed %d to map svm range\n", r); 3799 3800 out_unlock_range: 3801 mutex_unlock(&prange->migrate_mutex); 3802 if (r) 3803 ret = r; 3804 } 3805 3806 list_for_each_entry(prange, &remap_list, update_list) { 3807 pr_debug("Remapping prange 0x%p [0x%lx 0x%lx]\n", 3808 prange, prange->start, prange->last); 3809 mutex_lock(&prange->migrate_mutex); 3810 r = svm_range_validate_and_map(mm, prange->start, prange->last, prange, 3811 MAX_GPU_INSTANCE, true, true, prange->mapped_to_gpu); 3812 if (r) 3813 pr_debug("failed %d on remap svm range\n", r); 3814 mutex_unlock(&prange->migrate_mutex); 3815 if (r) 3816 ret = r; 3817 } 3818 3819 dynamic_svm_range_dump(svms); 3820 3821 mutex_unlock(&svms->lock); 3822 mmap_read_unlock(mm); 3823 out: 3824 mutex_unlock(&process_info->lock); 3825 3826 pr_debug("process pid %d svms 0x%p [0x%llx 0x%llx] done, r=%d\n", 3827 p->lead_thread->pid, &p->svms, start, start + size - 1, r); 3828 3829 return ret ? ret : r; 3830 } 3831 3832 static int 3833 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm, 3834 uint64_t start, uint64_t size, uint32_t nattr, 3835 struct kfd_ioctl_svm_attribute *attrs) 3836 { 3837 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE); 3838 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE); 3839 bool get_preferred_loc = false; 3840 bool get_prefetch_loc = false; 3841 bool get_granularity = false; 3842 bool get_accessible = false; 3843 bool get_flags = false; 3844 uint64_t last = start + size - 1UL; 3845 uint8_t granularity = 0xff; 3846 struct interval_tree_node *node; 3847 struct svm_range_list *svms; 3848 struct svm_range *prange; 3849 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3850 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3851 uint32_t flags_and = 0xffffffff; 3852 uint32_t flags_or = 0; 3853 int gpuidx; 3854 uint32_t i; 3855 int r = 0; 3856 3857 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start, 3858 start + size - 1, nattr); 3859 3860 /* Flush pending deferred work to avoid racing with deferred actions from 3861 * previous memory map changes (e.g. munmap). Concurrent memory map changes 3862 * can still race with get_attr because we don't hold the mmap lock. But that 3863 * would be a race condition in the application anyway, and undefined 3864 * behaviour is acceptable in that case. 3865 */ 3866 flush_work(&p->svms.deferred_list_work); 3867 3868 mmap_read_lock(mm); 3869 r = svm_range_is_valid(p, start, size); 3870 mmap_read_unlock(mm); 3871 if (r) { 3872 pr_debug("invalid range r=%d\n", r); 3873 return r; 3874 } 3875 3876 for (i = 0; i < nattr; i++) { 3877 switch (attrs[i].type) { 3878 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3879 get_preferred_loc = true; 3880 break; 3881 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3882 get_prefetch_loc = true; 3883 break; 3884 case KFD_IOCTL_SVM_ATTR_ACCESS: 3885 get_accessible = true; 3886 break; 3887 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3888 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3889 get_flags = true; 3890 break; 3891 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 3892 get_granularity = true; 3893 break; 3894 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE: 3895 case KFD_IOCTL_SVM_ATTR_NO_ACCESS: 3896 fallthrough; 3897 default: 3898 pr_debug("get invalid attr type 0x%x\n", attrs[i].type); 3899 return -EINVAL; 3900 } 3901 } 3902 3903 svms = &p->svms; 3904 3905 mutex_lock(&svms->lock); 3906 3907 node = interval_tree_iter_first(&svms->objects, start, last); 3908 if (!node) { 3909 pr_debug("range attrs not found return default values\n"); 3910 svm_range_set_default_attributes(svms, &location, &prefetch_loc, 3911 &granularity, &flags_and); 3912 flags_or = flags_and; 3913 if (p->xnack_enabled) 3914 bitmap_copy(bitmap_access, svms->bitmap_supported, 3915 MAX_GPU_INSTANCE); 3916 else 3917 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE); 3918 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE); 3919 goto fill_values; 3920 } 3921 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE); 3922 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE); 3923 3924 while (node) { 3925 struct interval_tree_node *next; 3926 3927 prange = container_of(node, struct svm_range, it_node); 3928 next = interval_tree_iter_next(node, start, last); 3929 3930 if (get_preferred_loc) { 3931 if (prange->preferred_loc == 3932 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3933 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3934 location != prange->preferred_loc)) { 3935 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3936 get_preferred_loc = false; 3937 } else { 3938 location = prange->preferred_loc; 3939 } 3940 } 3941 if (get_prefetch_loc) { 3942 if (prange->prefetch_loc == 3943 KFD_IOCTL_SVM_LOCATION_UNDEFINED || 3944 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED && 3945 prefetch_loc != prange->prefetch_loc)) { 3946 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED; 3947 get_prefetch_loc = false; 3948 } else { 3949 prefetch_loc = prange->prefetch_loc; 3950 } 3951 } 3952 if (get_accessible) { 3953 bitmap_and(bitmap_access, bitmap_access, 3954 prange->bitmap_access, MAX_GPU_INSTANCE); 3955 bitmap_and(bitmap_aip, bitmap_aip, 3956 prange->bitmap_aip, MAX_GPU_INSTANCE); 3957 } 3958 if (get_flags) { 3959 flags_and &= prange->flags; 3960 flags_or |= prange->flags; 3961 } 3962 3963 if (get_granularity && prange->granularity < granularity) 3964 granularity = prange->granularity; 3965 3966 node = next; 3967 } 3968 fill_values: 3969 mutex_unlock(&svms->lock); 3970 3971 for (i = 0; i < nattr; i++) { 3972 switch (attrs[i].type) { 3973 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC: 3974 attrs[i].value = location; 3975 break; 3976 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 3977 attrs[i].value = prefetch_loc; 3978 break; 3979 case KFD_IOCTL_SVM_ATTR_ACCESS: 3980 gpuidx = kfd_process_gpuidx_from_gpuid(p, 3981 attrs[i].value); 3982 if (gpuidx < 0) { 3983 pr_debug("invalid gpuid %x\n", attrs[i].value); 3984 return -EINVAL; 3985 } 3986 if (test_bit(gpuidx, bitmap_access)) 3987 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS; 3988 else if (test_bit(gpuidx, bitmap_aip)) 3989 attrs[i].type = 3990 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE; 3991 else 3992 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS; 3993 break; 3994 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 3995 attrs[i].value = flags_and; 3996 break; 3997 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS: 3998 attrs[i].value = ~flags_or; 3999 break; 4000 case KFD_IOCTL_SVM_ATTR_GRANULARITY: 4001 attrs[i].value = (uint32_t)granularity; 4002 break; 4003 } 4004 } 4005 4006 return 0; 4007 } 4008 4009 int kfd_criu_resume_svm(struct kfd_process *p) 4010 { 4011 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL; 4012 int nattr_common = 4, nattr_accessibility = 1; 4013 struct criu_svm_metadata *criu_svm_md = NULL; 4014 struct svm_range_list *svms = &p->svms; 4015 struct criu_svm_metadata *next = NULL; 4016 uint32_t set_flags = 0xffffffff; 4017 int i, j, num_attrs, ret = 0; 4018 uint64_t set_attr_size; 4019 struct mm_struct *mm; 4020 4021 if (list_empty(&svms->criu_svm_metadata_list)) { 4022 pr_debug("No SVM data from CRIU restore stage 2\n"); 4023 return ret; 4024 } 4025 4026 mm = get_task_mm(p->lead_thread); 4027 if (!mm) { 4028 pr_err("failed to get mm for the target process\n"); 4029 return -ESRCH; 4030 } 4031 4032 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds); 4033 4034 i = j = 0; 4035 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) { 4036 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n", 4037 i, criu_svm_md->data.start_addr, criu_svm_md->data.size); 4038 4039 for (j = 0; j < num_attrs; j++) { 4040 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n", 4041 i, j, criu_svm_md->data.attrs[j].type, 4042 i, j, criu_svm_md->data.attrs[j].value); 4043 switch (criu_svm_md->data.attrs[j].type) { 4044 /* During Checkpoint operation, the query for 4045 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might 4046 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were 4047 * not used by the range which was checkpointed. Care 4048 * must be taken to not restore with an invalid value 4049 * otherwise the gpuidx value will be invalid and 4050 * set_attr would eventually fail so just replace those 4051 * with another dummy attribute such as 4052 * KFD_IOCTL_SVM_ATTR_SET_FLAGS. 4053 */ 4054 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC: 4055 if (criu_svm_md->data.attrs[j].value == 4056 KFD_IOCTL_SVM_LOCATION_UNDEFINED) { 4057 criu_svm_md->data.attrs[j].type = 4058 KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4059 criu_svm_md->data.attrs[j].value = 0; 4060 } 4061 break; 4062 case KFD_IOCTL_SVM_ATTR_SET_FLAGS: 4063 set_flags = criu_svm_md->data.attrs[j].value; 4064 break; 4065 default: 4066 break; 4067 } 4068 } 4069 4070 /* CLR_FLAGS is not available via get_attr during checkpoint but 4071 * it needs to be inserted before restoring the ranges so 4072 * allocate extra space for it before calling set_attr 4073 */ 4074 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4075 (num_attrs + 1); 4076 set_attr_new = krealloc(set_attr, set_attr_size, 4077 GFP_KERNEL); 4078 if (!set_attr_new) { 4079 ret = -ENOMEM; 4080 goto exit; 4081 } 4082 set_attr = set_attr_new; 4083 4084 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs * 4085 sizeof(struct kfd_ioctl_svm_attribute)); 4086 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS; 4087 set_attr[num_attrs].value = ~set_flags; 4088 4089 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr, 4090 criu_svm_md->data.size, num_attrs + 1, 4091 set_attr); 4092 if (ret) { 4093 pr_err("CRIU: failed to set range attributes\n"); 4094 goto exit; 4095 } 4096 4097 i++; 4098 } 4099 exit: 4100 kfree(set_attr); 4101 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) { 4102 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n", 4103 criu_svm_md->data.start_addr); 4104 kfree(criu_svm_md); 4105 } 4106 4107 mmput(mm); 4108 return ret; 4109 4110 } 4111 4112 int kfd_criu_restore_svm(struct kfd_process *p, 4113 uint8_t __user *user_priv_ptr, 4114 uint64_t *priv_data_offset, 4115 uint64_t max_priv_data_size) 4116 { 4117 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size; 4118 int nattr_common = 4, nattr_accessibility = 1; 4119 struct criu_svm_metadata *criu_svm_md = NULL; 4120 struct svm_range_list *svms = &p->svms; 4121 uint32_t num_devices; 4122 int ret = 0; 4123 4124 num_devices = p->n_pdds; 4125 /* Handle one SVM range object at a time, also the number of gpus are 4126 * assumed to be same on the restore node, checking must be done while 4127 * evaluating the topology earlier 4128 */ 4129 4130 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) * 4131 (nattr_common + nattr_accessibility * num_devices); 4132 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size; 4133 4134 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4135 svm_attrs_size; 4136 4137 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL); 4138 if (!criu_svm_md) { 4139 pr_err("failed to allocate memory to store svm metadata\n"); 4140 return -ENOMEM; 4141 } 4142 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) { 4143 ret = -EINVAL; 4144 goto exit; 4145 } 4146 4147 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset, 4148 svm_priv_data_size); 4149 if (ret) { 4150 ret = -EFAULT; 4151 goto exit; 4152 } 4153 *priv_data_offset += svm_priv_data_size; 4154 4155 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list); 4156 4157 return 0; 4158 4159 4160 exit: 4161 kfree(criu_svm_md); 4162 return ret; 4163 } 4164 4165 void svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges, 4166 uint64_t *svm_priv_data_size) 4167 { 4168 uint64_t total_size, accessibility_size, common_attr_size; 4169 int nattr_common = 4, nattr_accessibility = 1; 4170 int num_devices = p->n_pdds; 4171 struct svm_range_list *svms; 4172 struct svm_range *prange; 4173 uint32_t count = 0; 4174 4175 *svm_priv_data_size = 0; 4176 4177 svms = &p->svms; 4178 4179 mutex_lock(&svms->lock); 4180 list_for_each_entry(prange, &svms->list, list) { 4181 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n", 4182 prange, prange->start, prange->npages, 4183 prange->start + prange->npages - 1); 4184 count++; 4185 } 4186 mutex_unlock(&svms->lock); 4187 4188 *num_svm_ranges = count; 4189 /* Only the accessbility attributes need to be queried for all the gpus 4190 * individually, remaining ones are spanned across the entire process 4191 * regardless of the various gpu nodes. Of the remaining attributes, 4192 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved. 4193 * 4194 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC 4195 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC 4196 * KFD_IOCTL_SVM_ATTR_SET_FLAGS 4197 * KFD_IOCTL_SVM_ATTR_GRANULARITY 4198 * 4199 * ** ACCESSBILITY ATTRIBUTES ** 4200 * (Considered as one, type is altered during query, value is gpuid) 4201 * KFD_IOCTL_SVM_ATTR_ACCESS 4202 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE 4203 * KFD_IOCTL_SVM_ATTR_NO_ACCESS 4204 */ 4205 if (*num_svm_ranges > 0) { 4206 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4207 nattr_common; 4208 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) * 4209 nattr_accessibility * num_devices; 4210 4211 total_size = sizeof(struct kfd_criu_svm_range_priv_data) + 4212 common_attr_size + accessibility_size; 4213 4214 *svm_priv_data_size = *num_svm_ranges * total_size; 4215 } 4216 4217 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges, 4218 *svm_priv_data_size); 4219 } 4220 4221 int kfd_criu_checkpoint_svm(struct kfd_process *p, 4222 uint8_t __user *user_priv_data, 4223 uint64_t *priv_data_offset) 4224 { 4225 struct kfd_criu_svm_range_priv_data *svm_priv = NULL; 4226 struct kfd_ioctl_svm_attribute *query_attr = NULL; 4227 uint64_t svm_priv_data_size, query_attr_size = 0; 4228 int index, nattr_common = 4, ret = 0; 4229 struct svm_range_list *svms; 4230 int num_devices = p->n_pdds; 4231 struct svm_range *prange; 4232 struct mm_struct *mm; 4233 4234 svms = &p->svms; 4235 4236 mm = get_task_mm(p->lead_thread); 4237 if (!mm) { 4238 pr_err("failed to get mm for the target process\n"); 4239 return -ESRCH; 4240 } 4241 4242 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) * 4243 (nattr_common + num_devices); 4244 4245 query_attr = kzalloc(query_attr_size, GFP_KERNEL); 4246 if (!query_attr) { 4247 ret = -ENOMEM; 4248 goto exit; 4249 } 4250 4251 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC; 4252 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC; 4253 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS; 4254 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY; 4255 4256 for (index = 0; index < num_devices; index++) { 4257 struct kfd_process_device *pdd = p->pdds[index]; 4258 4259 query_attr[index + nattr_common].type = 4260 KFD_IOCTL_SVM_ATTR_ACCESS; 4261 query_attr[index + nattr_common].value = pdd->user_gpu_id; 4262 } 4263 4264 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size; 4265 4266 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL); 4267 if (!svm_priv) { 4268 ret = -ENOMEM; 4269 goto exit_query; 4270 } 4271 4272 index = 0; 4273 list_for_each_entry(prange, &svms->list, list) { 4274 4275 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE; 4276 svm_priv->start_addr = prange->start; 4277 svm_priv->size = prange->npages; 4278 memcpy(&svm_priv->attrs, query_attr, query_attr_size); 4279 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n", 4280 prange, prange->start, prange->npages, 4281 prange->start + prange->npages - 1, 4282 prange->npages * PAGE_SIZE); 4283 4284 ret = svm_range_get_attr(p, mm, svm_priv->start_addr, 4285 svm_priv->size, 4286 (nattr_common + num_devices), 4287 svm_priv->attrs); 4288 if (ret) { 4289 pr_err("CRIU: failed to obtain range attributes\n"); 4290 goto exit_priv; 4291 } 4292 4293 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv, 4294 svm_priv_data_size)) { 4295 pr_err("Failed to copy svm priv to user\n"); 4296 ret = -EFAULT; 4297 goto exit_priv; 4298 } 4299 4300 *priv_data_offset += svm_priv_data_size; 4301 4302 } 4303 4304 4305 exit_priv: 4306 kfree(svm_priv); 4307 exit_query: 4308 kfree(query_attr); 4309 exit: 4310 mmput(mm); 4311 return ret; 4312 } 4313 4314 int 4315 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start, 4316 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs) 4317 { 4318 struct mm_struct *mm = current->mm; 4319 int r; 4320 4321 start >>= PAGE_SHIFT; 4322 size >>= PAGE_SHIFT; 4323 4324 switch (op) { 4325 case KFD_IOCTL_SVM_OP_SET_ATTR: 4326 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs); 4327 break; 4328 case KFD_IOCTL_SVM_OP_GET_ATTR: 4329 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs); 4330 break; 4331 default: 4332 r = -EINVAL; 4333 break; 4334 } 4335 4336 return r; 4337 } 4338