1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include <linux/cleanup.h> 18 #include <linux/percpu.h> 19 #include <linux/refcount.h> 20 #include "core.h" 21 #include "debugfs.h" 22 #include "debug.h" 23 #include "mac.h" 24 #include "hw.h" 25 #include "peer.h" 26 #include "p2p.h" 27 #include "testmode.h" 28 29 struct ath12k_wmi_svc_ready_parse { 30 bool wmi_svc_bitmap_done; 31 }; 32 33 struct wmi_tlv_fw_stats_parse { 34 const struct wmi_stats_event *ev; 35 struct ath12k_fw_stats *stats; 36 const struct wmi_per_chain_rssi_stat_params *rssi; 37 int rssi_num; 38 bool chain_rssi_done; 39 }; 40 41 struct ath12k_wmi_dma_ring_caps_parse { 42 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 43 u32 n_dma_ring_caps; 44 }; 45 46 struct ath12k_wmi_service_ext_arg { 47 u32 default_conc_scan_config_bits; 48 u32 default_fw_config_bits; 49 struct ath12k_wmi_ppe_threshold_arg ppet; 50 u32 he_cap_info; 51 u32 mpdu_density; 52 u32 max_bssid_rx_filters; 53 u32 num_hw_modes; 54 u32 num_phy; 55 }; 56 57 struct ath12k_wmi_svc_rdy_ext_parse { 58 struct ath12k_wmi_service_ext_arg arg; 59 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 60 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 61 u32 n_hw_mode_caps; 62 u32 tot_phy_id; 63 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 64 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 65 u32 n_mac_phy_caps; 66 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 67 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 68 u32 n_ext_hal_reg_caps; 69 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 70 bool hw_mode_done; 71 bool mac_phy_done; 72 bool ext_hal_reg_done; 73 bool mac_phy_chainmask_combo_done; 74 bool mac_phy_chainmask_cap_done; 75 bool oem_dma_ring_cap_done; 76 bool dma_ring_cap_done; 77 }; 78 79 struct ath12k_wmi_svc_rdy_ext2_arg { 80 u32 reg_db_version; 81 u32 hw_min_max_tx_power_2ghz; 82 u32 hw_min_max_tx_power_5ghz; 83 u32 chwidth_num_peer_caps; 84 u32 preamble_puncture_bw; 85 u32 max_user_per_ppdu_ofdma; 86 u32 max_user_per_ppdu_mumimo; 87 u32 target_cap_flags; 88 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 89 u32 max_num_linkview_peers; 90 u32 max_num_msduq_supported_per_tid; 91 u32 default_num_msduq_supported_per_tid; 92 }; 93 94 struct ath12k_wmi_svc_rdy_ext2_parse { 95 struct ath12k_wmi_svc_rdy_ext2_arg arg; 96 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 97 bool dma_ring_cap_done; 98 bool spectral_bin_scaling_done; 99 bool mac_phy_caps_ext_done; 100 bool hal_reg_caps_ext2_done; 101 bool scan_radio_caps_ext2_done; 102 bool twt_caps_done; 103 bool htt_msdu_idx_to_qtype_map_done; 104 bool dbs_or_sbs_cap_ext_done; 105 }; 106 107 struct ath12k_wmi_rdy_parse { 108 u32 num_extra_mac_addr; 109 }; 110 111 struct ath12k_wmi_dma_buf_release_arg { 112 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 113 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 114 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 115 u32 num_buf_entry; 116 u32 num_meta; 117 bool buf_entry_done; 118 bool meta_data_done; 119 }; 120 121 struct ath12k_wmi_tlv_policy { 122 size_t min_len; 123 }; 124 125 struct wmi_tlv_mgmt_rx_parse { 126 const struct ath12k_wmi_mgmt_rx_params *fixed; 127 const u8 *frame_buf; 128 bool frame_buf_done; 129 }; 130 131 struct wmi_pdev_set_obss_bitmap_arg { 132 u32 tlv_tag; 133 u32 pdev_id; 134 u32 cmd_id; 135 const u32 *bitmap; 136 const char *label; 137 }; 138 139 static DEFINE_MUTEX(ath12k_wmi_mutex); 140 static refcount_t ath12k_wmi_refcount; 141 static void __percpu *ath12k_wmi_tb; 142 143 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 144 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 145 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 146 [WMI_TAG_SERVICE_READY_EVENT] = { 147 .min_len = sizeof(struct wmi_service_ready_event) }, 148 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 149 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 150 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 151 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 152 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 153 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 154 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 155 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 156 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 157 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 158 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 159 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 160 [WMI_TAG_VDEV_STOPPED_EVENT] = { 161 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 162 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 163 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 164 [WMI_TAG_MGMT_RX_HDR] = { 165 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 166 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 167 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 168 [WMI_TAG_SCAN_EVENT] = { 169 .min_len = sizeof(struct wmi_scan_event) }, 170 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 171 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 172 [WMI_TAG_ROAM_EVENT] = { 173 .min_len = sizeof(struct wmi_roam_event) }, 174 [WMI_TAG_CHAN_INFO_EVENT] = { 175 .min_len = sizeof(struct wmi_chan_info_event) }, 176 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 177 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 178 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 179 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 180 [WMI_TAG_READY_EVENT] = { 181 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 182 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 183 .min_len = sizeof(struct wmi_service_available_event) }, 184 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 185 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 186 [WMI_TAG_RFKILL_EVENT] = { 187 .min_len = sizeof(struct wmi_rfkill_state_change_event) }, 188 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 189 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 190 [WMI_TAG_HOST_SWFDA_EVENT] = { 191 .min_len = sizeof(struct wmi_fils_discovery_event) }, 192 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 193 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 194 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 195 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 196 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = { 197 .min_len = sizeof(struct wmi_twt_enable_event) }, 198 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = { 199 .min_len = sizeof(struct wmi_twt_disable_event) }, 200 [WMI_TAG_P2P_NOA_INFO] = { 201 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) }, 202 [WMI_TAG_P2P_NOA_EVENT] = { 203 .min_len = sizeof(struct wmi_p2p_noa_event) }, 204 [WMI_TAG_11D_NEW_COUNTRY_EVENT] = { 205 .min_len = sizeof(struct wmi_11d_new_cc_event) }, 206 [WMI_TAG_PER_CHAIN_RSSI_STATS] = { 207 .min_len = sizeof(struct wmi_per_chain_rssi_stat_params) }, 208 [WMI_TAG_OBSS_COLOR_COLLISION_EVT] = { 209 .min_len = sizeof(struct wmi_obss_color_collision_event) }, 210 [WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT] = { 211 .min_len = sizeof(struct ath12k_wmi_pdev_csa_event) }, 212 }; 213 214 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 215 { 216 return le32_encode_bits(cmd, WMI_TLV_TAG) | 217 le32_encode_bits(len, WMI_TLV_LEN); 218 } 219 220 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 221 { 222 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 223 } 224 225 #define PRIMAP(_hw_mode_) \ 226 [_hw_mode_] = _hw_mode_##_PRI 227 228 static const int ath12k_hw_mode_pri_map[] = { 229 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 230 PRIMAP(WMI_HOST_HW_MODE_DBS), 231 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 232 PRIMAP(WMI_HOST_HW_MODE_SBS), 233 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 234 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 235 /* keep last */ 236 PRIMAP(WMI_HOST_HW_MODE_MAX), 237 }; 238 239 /* 240 * Interference bitmap transform maps used by 241 * ath12k_wmi_transform_interference_bitmap(). 242 * 243 * Firmware reports bitmap bits in a primary-based order where: 244 * - bit 0 is always the primary 20 MHz segment, 245 * - bit 1 is the adjacent 20 MHz in the same 40 MHz block, 246 * - bit 2 is the lower 20 MHz segment of the adjacent 40 MHz segment 247 * - bit 3 is the higher 20 MHz segment of the adjacent 40 MHz segment 248 * - remaining bits continue outward in 80/160/320 MHz groups. 249 * 250 * cfg80211 userspace notification expects absolute frequency order where: 251 * - bit 0 is the lowest-frequency 20 MHz segment in the current chandef, 252 * - bit N increases monotonically toward higher frequency. 253 * 254 * For each bandwidth-specific map: 255 * - row index = primary 20 MHz index in absolute (low->high) order, 256 * - column index = source bit position from firmware bitmap, 257 * - value = destination bit position in absolute order bitmap. 258 * 259 * Example for 80 MHz: if primary index is 2 (third 20 MHz chunk from low 260 * frequency), row intf_map_80[2] = { 2, 3, 0, 1 } means firmware bits {0,1,2,3} 261 * are remapped to destination bits {2,3,0,1} before notifying cfg80211. 262 */ 263 264 static const int intf_map_80[4][4] = { 265 { 0, 1, 2, 3 }, 266 { 1, 0, 2, 3 }, 267 { 2, 3, 0, 1 }, 268 { 3, 2, 0, 1 } 269 }; 270 271 static const int intf_map_160[8][8] = { 272 { 0, 1, 2, 3, 4, 5, 6, 7 }, 273 { 1, 0, 2, 3, 4, 5, 6, 7 }, 274 { 2, 3, 0, 1, 4, 5, 6, 7 }, 275 { 3, 2, 0, 1, 4, 5, 6, 7 }, 276 { 4, 5, 6, 7, 0, 1, 2, 3 }, 277 { 5, 4, 6, 7, 0, 1, 2, 3 }, 278 { 6, 7, 4, 5, 0, 1, 2, 3 }, 279 { 7, 6, 4, 5, 0, 1, 2, 3 } 280 }; 281 282 static const int intf_map_320[16][16] = { 283 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 284 { 1, 0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 285 { 2, 3, 0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 286 { 3, 2, 0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }, 287 { 4, 5, 6, 7, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 }, 288 { 5, 4, 6, 7, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 }, 289 { 6, 7, 4, 5, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 }, 290 { 7, 6, 4, 5, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 }, 291 { 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 }, 292 { 9, 8, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 }, 293 { 10, 11, 8, 9, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 }, 294 { 11, 10, 8, 9, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 }, 295 { 12, 13, 14, 15, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 }, 296 { 13, 12, 14, 15, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 }, 297 { 14, 15, 12, 13, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 }, 298 { 15, 14, 12, 13, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 } 299 }; 300 301 static int 302 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 303 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 304 const void *ptr, void *data), 305 void *data) 306 { 307 const void *begin = ptr; 308 const struct wmi_tlv *tlv; 309 u16 tlv_tag, tlv_len; 310 int ret; 311 312 while (len > 0) { 313 if (len < sizeof(*tlv)) { 314 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 315 ptr - begin, len, sizeof(*tlv)); 316 return -EINVAL; 317 } 318 319 tlv = ptr; 320 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 321 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 322 ptr += sizeof(*tlv); 323 len -= sizeof(*tlv); 324 325 if (tlv_len > len) { 326 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 327 tlv_tag, ptr - begin, len, tlv_len); 328 return -EINVAL; 329 } 330 331 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 332 ath12k_wmi_tlv_policies[tlv_tag].min_len && 333 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 334 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 335 tlv_tag, ptr - begin, tlv_len, 336 ath12k_wmi_tlv_policies[tlv_tag].min_len); 337 return -EINVAL; 338 } 339 340 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 341 if (ret) 342 return ret; 343 344 ptr += tlv_len; 345 len -= tlv_len; 346 } 347 348 return 0; 349 } 350 351 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 352 const void *ptr, void *data) 353 { 354 const void **tb = data; 355 356 if (tag < WMI_TAG_MAX) 357 tb[tag] = ptr; 358 359 return 0; 360 } 361 362 static const void ** 363 ath12k_wmi_tlv_parse(struct ath12k_base *ab, struct sk_buff *skb) 364 { 365 const void **tb; 366 int ret; 367 368 tb = this_cpu_ptr(ath12k_wmi_tb); 369 memset(tb, 0, WMI_TAG_MAX * sizeof(*tb)); 370 371 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 372 ath12k_wmi_tlv_iter_parse, (void *)tb); 373 if (ret) 374 return ERR_PTR(ret); 375 376 return tb; 377 } 378 379 static u32 ath12k_wmi_tlv_data_len(const void *data) 380 { 381 const struct wmi_tlv *tlv = (const struct wmi_tlv *)data - 1; 382 383 return le32_get_bits(tlv->header, WMI_TLV_LEN); 384 } 385 386 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 387 u32 cmd_id) 388 { 389 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 390 struct ath12k_base *ab = wmi->wmi_ab->ab; 391 struct wmi_cmd_hdr *cmd_hdr; 392 int ret; 393 394 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 395 return -ENOMEM; 396 397 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 398 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 399 400 memset(skb_cb, 0, sizeof(*skb_cb)); 401 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 402 403 if (ret) 404 goto err_pull; 405 406 return 0; 407 408 err_pull: 409 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 410 return ret; 411 } 412 413 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 414 u32 cmd_id) 415 { 416 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab; 417 int ret = -EOPNOTSUPP; 418 419 might_sleep(); 420 421 wait_event_timeout(wmi_ab->tx_credits_wq, ({ 422 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 423 424 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags)) 425 ret = -ESHUTDOWN; 426 427 (ret != -EAGAIN); 428 }), WMI_SEND_TIMEOUT_HZ); 429 430 if (ret == -EAGAIN) 431 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id); 432 433 return ret; 434 } 435 436 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 437 const void *ptr, 438 struct ath12k_wmi_service_ext_arg *arg) 439 { 440 const struct wmi_service_ready_ext_event *ev = ptr; 441 int i; 442 443 if (!ev) 444 return -EINVAL; 445 446 /* Move this to host based bitmap */ 447 arg->default_conc_scan_config_bits = 448 le32_to_cpu(ev->default_conc_scan_config_bits); 449 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 450 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 451 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 452 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 453 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 454 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 455 456 for (i = 0; i < WMI_MAX_NUM_SS; i++) 457 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 458 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 459 460 return 0; 461 } 462 463 static int 464 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 465 struct ath12k_wmi_svc_rdy_ext_parse *svc, 466 u8 hw_mode_id, u8 phy_id, 467 struct ath12k_pdev *pdev) 468 { 469 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 470 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 471 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 472 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 473 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 474 struct ath12k_band_cap *cap_band; 475 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 476 struct ath12k_fw_pdev *fw_pdev; 477 u32 supported_bands; 478 u32 phy_map; 479 u32 hw_idx, phy_idx = 0; 480 int i; 481 482 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 483 return -EINVAL; 484 485 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 486 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 487 break; 488 489 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 490 phy_idx = fls(phy_map); 491 } 492 493 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 494 return -EINVAL; 495 496 phy_idx += phy_id; 497 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 498 return -EINVAL; 499 500 mac_caps = wmi_mac_phy_caps + phy_idx; 501 supported_bands = le32_to_cpu(mac_caps->supported_bands); 502 503 if (!(supported_bands & WMI_HOST_WLAN_2GHZ_CAP) && 504 !(supported_bands & WMI_HOST_WLAN_5GHZ_CAP)) 505 return -EINVAL; 506 507 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 508 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps); 509 pdev_cap->supported_bands |= supported_bands; 510 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 511 512 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 513 fw_pdev->supported_bands = supported_bands; 514 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 515 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 516 ab->fw_pdev_count++; 517 518 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 519 * band to band for a single radio, need to see how this should be 520 * handled. 521 */ 522 if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 523 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 524 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 525 } 526 527 if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 528 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 529 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 530 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 531 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 532 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 533 pdev_cap->nss_ratio_enabled = 534 WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio); 535 pdev_cap->nss_ratio_info = 536 WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio); 537 } 538 539 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 540 * For example, for 4x4 capable macphys, first 4 chains can be used for first 541 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 542 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 543 * will be advertised for second mac or vice-versa. Compute the shift value 544 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 545 * mac80211. 546 */ 547 pdev_cap->tx_chain_mask_shift = 548 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 549 pdev_cap->rx_chain_mask_shift = 550 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 551 552 if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 553 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 554 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 555 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 556 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 557 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 558 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 559 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 560 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 561 cap_band->he_cap_phy_info[i] = 562 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 563 564 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 565 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 566 567 for (i = 0; i < WMI_MAX_NUM_SS; i++) 568 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 569 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 570 } 571 572 if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 573 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 574 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 575 cap_band->max_bw_supported = 576 le32_to_cpu(mac_caps->max_bw_supported_5g); 577 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 578 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 579 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 580 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 581 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 582 cap_band->he_cap_phy_info[i] = 583 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 584 585 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 586 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 587 588 for (i = 0; i < WMI_MAX_NUM_SS; i++) 589 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 590 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 591 592 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 593 cap_band->max_bw_supported = 594 le32_to_cpu(mac_caps->max_bw_supported_5g); 595 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 596 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 597 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 598 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 599 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 600 cap_band->he_cap_phy_info[i] = 601 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 602 603 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 604 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 605 606 for (i = 0; i < WMI_MAX_NUM_SS; i++) 607 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 608 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 609 } 610 611 return 0; 612 } 613 614 static int 615 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 616 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 617 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 618 u8 phy_idx, 619 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 620 { 621 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 622 623 if (!reg_caps || !ext_caps) 624 return -EINVAL; 625 626 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 627 return -EINVAL; 628 629 ext_reg_cap = &ext_caps[phy_idx]; 630 631 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 632 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 633 param->eeprom_reg_domain_ext = 634 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 635 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 636 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 637 /* check if param->wireless_mode is needed */ 638 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 639 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 640 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 641 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 642 643 return 0; 644 } 645 646 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 647 const void *evt_buf, 648 struct ath12k_wmi_target_cap_arg *cap) 649 { 650 const struct wmi_service_ready_event *ev = evt_buf; 651 652 if (!ev) { 653 ath12k_err(ab, "%s: failed by NULL param\n", 654 __func__); 655 return -EINVAL; 656 } 657 658 cap->phy_capability = le32_to_cpu(ev->phy_capability); 659 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 660 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 661 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 662 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 663 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 664 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 665 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 666 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 667 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 668 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 669 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 670 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 671 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 672 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 673 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 674 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 675 676 return 0; 677 } 678 679 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 680 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 681 * 4-byte word. 682 */ 683 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 684 const u32 *wmi_svc_bm) 685 { 686 int i, j; 687 688 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 689 do { 690 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 691 set_bit(j, wmi->wmi_ab->svc_map); 692 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 693 } 694 } 695 696 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 697 const void *ptr, void *data) 698 { 699 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 700 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 701 u16 expect_len; 702 703 switch (tag) { 704 case WMI_TAG_SERVICE_READY_EVENT: 705 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 706 return -EINVAL; 707 break; 708 709 case WMI_TAG_ARRAY_UINT32: 710 if (!svc_ready->wmi_svc_bitmap_done) { 711 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 712 if (len < expect_len) { 713 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 714 len, tag); 715 return -EINVAL; 716 } 717 718 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 719 720 svc_ready->wmi_svc_bitmap_done = true; 721 } 722 break; 723 default: 724 break; 725 } 726 727 return 0; 728 } 729 730 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 731 { 732 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 733 int ret; 734 735 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 736 ath12k_wmi_svc_rdy_parse, 737 &svc_ready); 738 if (ret) { 739 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 740 return ret; 741 } 742 743 return 0; 744 } 745 746 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar, 747 struct ieee80211_tx_info *info) 748 { 749 struct ath12k_base *ab = ar->ab; 750 u32 freq = 0; 751 752 if (ab->hw_params->single_pdev_only && 753 ar->scan.is_roc && 754 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) 755 freq = ar->scan.roc_freq; 756 757 return freq; 758 } 759 760 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len) 761 { 762 struct sk_buff *skb; 763 struct ath12k_base *ab = wmi_ab->ab; 764 u32 round_len = roundup(len, 4); 765 766 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 767 if (!skb) 768 return NULL; 769 770 skb_reserve(skb, WMI_SKB_HEADROOM); 771 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 772 ath12k_warn(ab, "unaligned WMI skb data\n"); 773 774 skb_put(skb, round_len); 775 memset(skb->data, 0, round_len); 776 777 return skb; 778 } 779 780 int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id, 781 struct sk_buff *frame) 782 { 783 struct ath12k *ar = arvif->ar; 784 struct ath12k_wmi_pdev *wmi = ar->wmi; 785 struct wmi_mgmt_send_cmd *cmd; 786 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame); 787 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)frame->data; 788 struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif); 789 int cmd_len = sizeof(struct ath12k_wmi_mgmt_send_tx_params); 790 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)hdr; 791 struct ath12k_wmi_mlo_mgmt_send_params *ml_params; 792 struct ath12k_base *ab = ar->ab; 793 struct wmi_tlv *frame_tlv, *tlv; 794 struct ath12k_skb_cb *skb_cb; 795 u32 buf_len, buf_len_aligned; 796 u32 vdev_id = arvif->vdev_id; 797 bool link_agnostic = false; 798 struct sk_buff *skb; 799 int ret, len; 800 void *ptr; 801 802 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 803 804 buf_len_aligned = roundup(buf_len, sizeof(u32)); 805 806 len = sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned; 807 808 if (ieee80211_vif_is_mld(vif)) { 809 skb_cb = ATH12K_SKB_CB(frame); 810 if ((skb_cb->flags & ATH12K_SKB_MLO_STA) && 811 ab->hw_params->hw_ops->is_frame_link_agnostic && 812 ab->hw_params->hw_ops->is_frame_link_agnostic(arvif, mgmt)) { 813 len += cmd_len + TLV_HDR_SIZE + sizeof(*ml_params); 814 ath12k_generic_dbg(ATH12K_DBG_MGMT, 815 "Sending Mgmt Frame fc 0x%0x as link agnostic", 816 mgmt->frame_control); 817 link_agnostic = true; 818 } 819 } 820 821 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 822 if (!skb) 823 return -ENOMEM; 824 825 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 826 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 827 sizeof(*cmd)); 828 cmd->vdev_id = cpu_to_le32(vdev_id); 829 cmd->desc_id = cpu_to_le32(buf_id); 830 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info)); 831 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 832 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 833 cmd->frame_len = cpu_to_le32(frame->len); 834 cmd->buf_len = cpu_to_le32(buf_len); 835 cmd->tx_params_valid = 0; 836 837 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 838 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len_aligned); 839 840 memcpy(frame_tlv->value, frame->data, buf_len); 841 842 if (!link_agnostic) 843 goto send; 844 845 ptr = skb->data + sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned; 846 847 tlv = ptr; 848 849 /* Tx params not used currently */ 850 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TX_SEND_PARAMS, cmd_len); 851 ptr += cmd_len; 852 853 tlv = ptr; 854 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*ml_params)); 855 ptr += TLV_HDR_SIZE; 856 857 ml_params = ptr; 858 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TX_SEND_PARAMS, 859 sizeof(*ml_params)); 860 861 ml_params->hw_link_id = cpu_to_le32(WMI_MGMT_LINK_AGNOSTIC_ID); 862 863 send: 864 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 865 if (ret) { 866 ath12k_warn(ar->ab, 867 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 868 dev_kfree_skb(skb); 869 } 870 871 return ret; 872 } 873 874 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id, 875 u32 vdev_id, u32 pdev_id) 876 { 877 struct ath12k_wmi_pdev *wmi = ar->wmi; 878 struct wmi_request_stats_cmd *cmd; 879 struct sk_buff *skb; 880 int ret; 881 882 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 883 if (!skb) 884 return -ENOMEM; 885 886 cmd = (struct wmi_request_stats_cmd *)skb->data; 887 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD, 888 sizeof(*cmd)); 889 890 cmd->stats_id = cpu_to_le32(stats_id); 891 cmd->vdev_id = cpu_to_le32(vdev_id); 892 cmd->pdev_id = cpu_to_le32(pdev_id); 893 894 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID); 895 if (ret) { 896 ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n"); 897 dev_kfree_skb(skb); 898 } 899 900 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 901 "WMI request stats 0x%x vdev id %d pdev id %d\n", 902 stats_id, vdev_id, pdev_id); 903 904 return ret; 905 } 906 907 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 908 struct ath12k_wmi_vdev_create_arg *args) 909 { 910 struct ath12k_wmi_pdev *wmi = ar->wmi; 911 struct wmi_vdev_create_cmd *cmd; 912 struct sk_buff *skb; 913 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 914 bool is_ml_vdev = is_valid_ether_addr(args->mld_addr); 915 struct wmi_vdev_create_mlo_params *ml_params; 916 struct wmi_tlv *tlv; 917 int ret, len; 918 void *ptr; 919 920 /* It can be optimized my sending tx/rx chain configuration 921 * only for supported bands instead of always sending it for 922 * both the bands. 923 */ 924 len = sizeof(*cmd) + TLV_HDR_SIZE + 925 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) + 926 (is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0); 927 928 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 929 if (!skb) 930 return -ENOMEM; 931 932 cmd = (struct wmi_vdev_create_cmd *)skb->data; 933 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 934 sizeof(*cmd)); 935 936 cmd->vdev_id = cpu_to_le32(args->if_id); 937 cmd->vdev_type = cpu_to_le32(args->type); 938 cmd->vdev_subtype = cpu_to_le32(args->subtype); 939 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 940 cmd->pdev_id = cpu_to_le32(args->pdev_id); 941 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags); 942 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id); 943 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 944 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 945 946 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID) 947 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0)); 948 949 ptr = skb->data + sizeof(*cmd); 950 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 951 952 tlv = ptr; 953 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 954 955 ptr += TLV_HDR_SIZE; 956 txrx_streams = ptr; 957 len = sizeof(*txrx_streams); 958 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 959 len); 960 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G); 961 txrx_streams->supported_tx_streams = 962 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx); 963 txrx_streams->supported_rx_streams = 964 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx); 965 966 txrx_streams++; 967 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 968 len); 969 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G); 970 txrx_streams->supported_tx_streams = 971 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx); 972 txrx_streams->supported_rx_streams = 973 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx); 974 975 ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 976 977 if (is_ml_vdev) { 978 tlv = ptr; 979 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 980 sizeof(*ml_params)); 981 ptr += TLV_HDR_SIZE; 982 ml_params = ptr; 983 984 ml_params->tlv_header = 985 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS, 986 sizeof(*ml_params)); 987 ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr); 988 } 989 990 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 991 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 992 args->if_id, args->type, args->subtype, 993 macaddr, args->pdev_id); 994 995 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 996 if (ret) { 997 ath12k_warn(ar->ab, 998 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 999 dev_kfree_skb(skb); 1000 } 1001 1002 return ret; 1003 } 1004 1005 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 1006 { 1007 struct ath12k_wmi_pdev *wmi = ar->wmi; 1008 struct wmi_vdev_delete_cmd *cmd; 1009 struct sk_buff *skb; 1010 int ret; 1011 1012 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1013 if (!skb) 1014 return -ENOMEM; 1015 1016 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 1017 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 1018 sizeof(*cmd)); 1019 cmd->vdev_id = cpu_to_le32(vdev_id); 1020 1021 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 1022 1023 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 1024 if (ret) { 1025 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 1026 dev_kfree_skb(skb); 1027 } 1028 1029 return ret; 1030 } 1031 1032 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 1033 { 1034 struct ath12k_wmi_pdev *wmi = ar->wmi; 1035 struct wmi_vdev_stop_cmd *cmd; 1036 struct sk_buff *skb; 1037 int ret; 1038 1039 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1040 if (!skb) 1041 return -ENOMEM; 1042 1043 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 1044 1045 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 1046 sizeof(*cmd)); 1047 cmd->vdev_id = cpu_to_le32(vdev_id); 1048 1049 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 1050 1051 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 1052 if (ret) { 1053 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 1054 dev_kfree_skb(skb); 1055 } 1056 1057 return ret; 1058 } 1059 1060 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 1061 { 1062 struct ath12k_wmi_pdev *wmi = ar->wmi; 1063 struct wmi_vdev_down_cmd *cmd; 1064 struct sk_buff *skb; 1065 int ret; 1066 1067 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1068 if (!skb) 1069 return -ENOMEM; 1070 1071 cmd = (struct wmi_vdev_down_cmd *)skb->data; 1072 1073 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 1074 sizeof(*cmd)); 1075 cmd->vdev_id = cpu_to_le32(vdev_id); 1076 1077 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 1078 1079 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 1080 if (ret) { 1081 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 1082 dev_kfree_skb(skb); 1083 } 1084 1085 return ret; 1086 } 1087 1088 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 1089 struct wmi_vdev_start_req_arg *arg) 1090 { 1091 u32 center_freq1 = arg->band_center_freq1; 1092 1093 memset(chan, 0, sizeof(*chan)); 1094 1095 chan->mhz = cpu_to_le32(arg->freq); 1096 chan->band_center_freq1 = cpu_to_le32(center_freq1); 1097 if (arg->mode == MODE_11BE_EHT320) { 1098 if (arg->freq > center_freq1) 1099 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80); 1100 else 1101 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80); 1102 1103 chan->band_center_freq2 = cpu_to_le32(center_freq1); 1104 1105 } else if (arg->mode == MODE_11BE_EHT160 || 1106 arg->mode == MODE_11AX_HE160) { 1107 if (arg->freq > center_freq1) 1108 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40); 1109 else 1110 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40); 1111 1112 chan->band_center_freq2 = cpu_to_le32(center_freq1); 1113 } else { 1114 chan->band_center_freq2 = 0; 1115 } 1116 1117 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 1118 if (arg->passive) 1119 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 1120 if (arg->allow_ibss) 1121 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 1122 if (arg->allow_ht) 1123 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 1124 if (arg->allow_vht) 1125 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 1126 if (arg->allow_he) 1127 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 1128 if (arg->ht40plus) 1129 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 1130 if (arg->chan_radar) 1131 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 1132 if (arg->freq2_radar) 1133 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 1134 1135 chan->reg_info_1 = le32_encode_bits(arg->max_power, 1136 WMI_CHAN_REG_INFO1_MAX_PWR) | 1137 le32_encode_bits(arg->max_reg_power, 1138 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 1139 1140 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 1141 WMI_CHAN_REG_INFO2_ANT_MAX) | 1142 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 1143 } 1144 1145 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 1146 bool restart) 1147 { 1148 struct wmi_vdev_start_mlo_params *ml_params; 1149 struct wmi_partner_link_info *partner_info; 1150 struct ath12k_wmi_pdev *wmi = ar->wmi; 1151 struct wmi_vdev_start_request_cmd *cmd; 1152 struct sk_buff *skb; 1153 struct ath12k_wmi_channel_params *chan; 1154 struct wmi_tlv *tlv; 1155 void *ptr; 1156 int ret, len, i, ml_arg_size = 0; 1157 1158 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1159 return -EINVAL; 1160 1161 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1162 1163 if (!restart && arg->ml.enabled) { 1164 ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) + 1165 TLV_HDR_SIZE + (arg->ml.num_partner_links * 1166 sizeof(*partner_info)); 1167 len += ml_arg_size; 1168 } 1169 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1170 if (!skb) 1171 return -ENOMEM; 1172 1173 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1174 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1175 sizeof(*cmd)); 1176 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1177 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1178 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1179 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1180 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1181 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1182 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1183 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1184 cmd->regdomain = cpu_to_le32(arg->regdomain); 1185 cmd->he_ops = cpu_to_le32(arg->he_ops); 1186 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1187 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags); 1188 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id); 1189 1190 if (!restart) { 1191 if (arg->ssid) { 1192 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1193 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1194 } 1195 if (arg->hidden_ssid) 1196 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1197 if (arg->pmf_enabled) 1198 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1199 } 1200 1201 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1202 1203 ptr = skb->data + sizeof(*cmd); 1204 chan = ptr; 1205 1206 ath12k_wmi_put_wmi_channel(chan, arg); 1207 1208 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1209 sizeof(*chan)); 1210 ptr += sizeof(*chan); 1211 1212 tlv = ptr; 1213 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1214 1215 /* Note: This is a nested TLV containing: 1216 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv].. 1217 */ 1218 1219 ptr += sizeof(*tlv); 1220 1221 if (ml_arg_size) { 1222 tlv = ptr; 1223 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1224 sizeof(*ml_params)); 1225 ptr += TLV_HDR_SIZE; 1226 1227 ml_params = ptr; 1228 1229 ml_params->tlv_header = 1230 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS, 1231 sizeof(*ml_params)); 1232 1233 ml_params->flags = le32_encode_bits(arg->ml.enabled, 1234 ATH12K_WMI_FLAG_MLO_ENABLED) | 1235 le32_encode_bits(arg->ml.assoc_link, 1236 ATH12K_WMI_FLAG_MLO_ASSOC_LINK) | 1237 le32_encode_bits(arg->ml.mcast_link, 1238 ATH12K_WMI_FLAG_MLO_MCAST_VDEV) | 1239 le32_encode_bits(arg->ml.link_add, 1240 ATH12K_WMI_FLAG_MLO_LINK_ADD) | 1241 le32_encode_bits(arg->ml.assoc_link, 1242 ATH12K_WMI_FLAG_MLO_START_AS_ACTIVE) | 1243 cpu_to_le32(ATH12K_WMI_FLAG_MLO_IEEE_LINK_IDX_VALID); 1244 1245 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id); 1246 1247 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %u start link_id %u ml flags 0x%x\n", 1248 arg->vdev_id, arg->ml.ieee_link_id, 1249 le32_to_cpu(ml_params->flags)); 1250 1251 ptr += sizeof(*ml_params); 1252 1253 tlv = ptr; 1254 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1255 arg->ml.num_partner_links * 1256 sizeof(*partner_info)); 1257 ptr += TLV_HDR_SIZE; 1258 1259 partner_info = ptr; 1260 1261 for (i = 0; i < arg->ml.num_partner_links; i++) { 1262 struct wmi_ml_partner_info *pinfo = &arg->ml.partner_info[i]; 1263 1264 partner_info->tlv_header = 1265 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS, 1266 sizeof(*partner_info)); 1267 partner_info->vdev_id = cpu_to_le32(pinfo->vdev_id); 1268 partner_info->hw_link_id = cpu_to_le32(pinfo->hw_link_id); 1269 ether_addr_copy(partner_info->vdev_addr.addr, 1270 pinfo->addr); 1271 partner_info->flags = 1272 cpu_to_le32(ATH12K_WMI_FLAG_MLO_IEEE_LINK_IDX_VALID_PARTNER); 1273 partner_info->ieee_link_id = cpu_to_le32(pinfo->ieee_link_id); 1274 1275 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %u hw_link_id %u macaddr %pM link_id %u ml flags 0x%x\n", 1276 pinfo->vdev_id, pinfo->hw_link_id, 1277 pinfo->addr, pinfo->ieee_link_id, 1278 le32_to_cpu(partner_info->flags)); 1279 1280 partner_info++; 1281 } 1282 1283 ptr = partner_info; 1284 } 1285 1286 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1287 restart ? "restart" : "start", arg->vdev_id, 1288 arg->freq, arg->mode); 1289 1290 if (restart) 1291 ret = ath12k_wmi_cmd_send(wmi, skb, 1292 WMI_VDEV_RESTART_REQUEST_CMDID); 1293 else 1294 ret = ath12k_wmi_cmd_send(wmi, skb, 1295 WMI_VDEV_START_REQUEST_CMDID); 1296 if (ret) { 1297 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1298 restart ? "restart" : "start"); 1299 dev_kfree_skb(skb); 1300 } 1301 1302 return ret; 1303 } 1304 1305 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params) 1306 { 1307 struct ath12k_wmi_pdev *wmi = ar->wmi; 1308 struct wmi_vdev_up_cmd *cmd; 1309 struct sk_buff *skb; 1310 int ret; 1311 1312 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1313 if (!skb) 1314 return -ENOMEM; 1315 1316 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1317 1318 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1319 sizeof(*cmd)); 1320 cmd->vdev_id = cpu_to_le32(params->vdev_id); 1321 cmd->vdev_assoc_id = cpu_to_le32(params->aid); 1322 1323 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid); 1324 1325 if (params->tx_bssid) { 1326 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid); 1327 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx); 1328 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt); 1329 } 1330 1331 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1332 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1333 params->vdev_id, params->aid, params->bssid); 1334 1335 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1336 if (ret) { 1337 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1338 dev_kfree_skb(skb); 1339 } 1340 1341 return ret; 1342 } 1343 1344 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1345 struct ath12k_wmi_peer_create_arg *arg) 1346 { 1347 struct ath12k_wmi_pdev *wmi = ar->wmi; 1348 struct wmi_peer_create_cmd *cmd; 1349 struct sk_buff *skb; 1350 int ret, len; 1351 struct wmi_peer_create_mlo_params *ml_param; 1352 void *ptr; 1353 struct wmi_tlv *tlv; 1354 1355 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param); 1356 1357 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1358 if (!skb) 1359 return -ENOMEM; 1360 1361 cmd = (struct wmi_peer_create_cmd *)skb->data; 1362 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1363 sizeof(*cmd)); 1364 1365 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1366 cmd->peer_type = cpu_to_le32(arg->peer_type); 1367 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1368 1369 ptr = skb->data + sizeof(*cmd); 1370 tlv = ptr; 1371 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1372 sizeof(*ml_param)); 1373 ptr += TLV_HDR_SIZE; 1374 ml_param = ptr; 1375 ml_param->tlv_header = 1376 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS, 1377 sizeof(*ml_param)); 1378 if (arg->ml_enabled) 1379 ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 1380 1381 ptr += sizeof(*ml_param); 1382 1383 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1384 "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n", 1385 arg->vdev_id, arg->peer_addr, ml_param->flags); 1386 1387 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1388 if (ret) { 1389 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1390 dev_kfree_skb(skb); 1391 } 1392 1393 return ret; 1394 } 1395 1396 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1397 const u8 *peer_addr, u8 vdev_id) 1398 { 1399 struct ath12k_wmi_pdev *wmi = ar->wmi; 1400 struct wmi_peer_delete_cmd *cmd; 1401 struct sk_buff *skb; 1402 int ret; 1403 1404 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1405 if (!skb) 1406 return -ENOMEM; 1407 1408 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1409 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1410 sizeof(*cmd)); 1411 1412 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1413 cmd->vdev_id = cpu_to_le32(vdev_id); 1414 1415 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1416 "WMI peer delete vdev_id %d peer_addr %pM\n", 1417 vdev_id, peer_addr); 1418 1419 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1420 if (ret) { 1421 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1422 dev_kfree_skb(skb); 1423 } 1424 1425 return ret; 1426 } 1427 1428 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1429 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1430 { 1431 struct ath12k_wmi_pdev *wmi = ar->wmi; 1432 struct wmi_pdev_set_regdomain_cmd *cmd; 1433 struct sk_buff *skb; 1434 int ret; 1435 1436 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1437 if (!skb) 1438 return -ENOMEM; 1439 1440 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1441 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1442 sizeof(*cmd)); 1443 1444 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1445 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1446 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1447 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1448 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1449 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1450 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1451 1452 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1453 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1454 arg->current_rd_in_use, arg->current_rd_2g, 1455 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1456 1457 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1458 if (ret) { 1459 ath12k_warn(ar->ab, 1460 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1461 dev_kfree_skb(skb); 1462 } 1463 1464 return ret; 1465 } 1466 1467 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1468 u32 vdev_id, u32 param_id, u32 param_val) 1469 { 1470 struct ath12k_wmi_pdev *wmi = ar->wmi; 1471 struct wmi_peer_set_param_cmd *cmd; 1472 struct sk_buff *skb; 1473 int ret; 1474 1475 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1476 if (!skb) 1477 return -ENOMEM; 1478 1479 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1480 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1481 sizeof(*cmd)); 1482 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1483 cmd->vdev_id = cpu_to_le32(vdev_id); 1484 cmd->param_id = cpu_to_le32(param_id); 1485 cmd->param_value = cpu_to_le32(param_val); 1486 1487 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1488 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1489 vdev_id, peer_addr, param_id, param_val); 1490 1491 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1492 if (ret) { 1493 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1494 dev_kfree_skb(skb); 1495 } 1496 1497 return ret; 1498 } 1499 1500 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1501 u8 peer_addr[ETH_ALEN], 1502 u32 peer_tid_bitmap, 1503 u8 vdev_id) 1504 { 1505 struct ath12k_wmi_pdev *wmi = ar->wmi; 1506 struct wmi_peer_flush_tids_cmd *cmd; 1507 struct sk_buff *skb; 1508 int ret; 1509 1510 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1511 if (!skb) 1512 return -ENOMEM; 1513 1514 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1515 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1516 sizeof(*cmd)); 1517 1518 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1519 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1520 cmd->vdev_id = cpu_to_le32(vdev_id); 1521 1522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1523 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1524 vdev_id, peer_addr, peer_tid_bitmap); 1525 1526 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1527 if (ret) { 1528 ath12k_warn(ar->ab, 1529 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1530 dev_kfree_skb(skb); 1531 } 1532 1533 return ret; 1534 } 1535 1536 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1537 int vdev_id, const u8 *addr, 1538 dma_addr_t paddr, u8 tid, 1539 u8 ba_window_size_valid, 1540 u32 ba_window_size) 1541 { 1542 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1543 struct sk_buff *skb; 1544 int ret; 1545 1546 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1547 if (!skb) 1548 return -ENOMEM; 1549 1550 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1551 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1552 sizeof(*cmd)); 1553 1554 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1555 cmd->vdev_id = cpu_to_le32(vdev_id); 1556 cmd->tid = cpu_to_le32(tid); 1557 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1558 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1559 cmd->queue_no = cpu_to_le32(tid); 1560 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1561 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1562 1563 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1564 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1565 addr, vdev_id, tid); 1566 1567 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1568 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1569 if (ret) { 1570 ath12k_warn(ar->ab, 1571 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1572 dev_kfree_skb(skb); 1573 } 1574 1575 return ret; 1576 } 1577 1578 int 1579 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1580 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1581 { 1582 struct ath12k_wmi_pdev *wmi = ar->wmi; 1583 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1584 struct sk_buff *skb; 1585 int ret; 1586 1587 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1588 if (!skb) 1589 return -ENOMEM; 1590 1591 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1592 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1593 sizeof(*cmd)); 1594 1595 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1596 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1597 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1598 1599 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1600 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1601 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1602 1603 ret = ath12k_wmi_cmd_send(wmi, skb, 1604 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1605 if (ret) { 1606 ath12k_warn(ar->ab, 1607 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1608 dev_kfree_skb(skb); 1609 } 1610 1611 return ret; 1612 } 1613 1614 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1615 u32 param_value, u8 pdev_id) 1616 { 1617 struct ath12k_wmi_pdev *wmi = ar->wmi; 1618 struct wmi_pdev_set_param_cmd *cmd; 1619 struct sk_buff *skb; 1620 int ret; 1621 1622 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1623 if (!skb) 1624 return -ENOMEM; 1625 1626 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1627 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1628 sizeof(*cmd)); 1629 cmd->pdev_id = cpu_to_le32(pdev_id); 1630 cmd->param_id = cpu_to_le32(param_id); 1631 cmd->param_value = cpu_to_le32(param_value); 1632 1633 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1634 "WMI pdev set param %d pdev id %d value %d\n", 1635 param_id, pdev_id, param_value); 1636 1637 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1638 if (ret) { 1639 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1640 dev_kfree_skb(skb); 1641 } 1642 1643 return ret; 1644 } 1645 1646 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1647 { 1648 struct ath12k_wmi_pdev *wmi = ar->wmi; 1649 struct wmi_pdev_set_ps_mode_cmd *cmd; 1650 struct sk_buff *skb; 1651 int ret; 1652 1653 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1654 if (!skb) 1655 return -ENOMEM; 1656 1657 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1658 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1659 sizeof(*cmd)); 1660 cmd->vdev_id = cpu_to_le32(vdev_id); 1661 cmd->sta_ps_mode = cpu_to_le32(enable); 1662 1663 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1664 "WMI vdev set psmode %d vdev id %d\n", 1665 enable, vdev_id); 1666 1667 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1668 if (ret) { 1669 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1670 dev_kfree_skb(skb); 1671 } 1672 1673 return ret; 1674 } 1675 1676 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1677 u32 pdev_id) 1678 { 1679 struct ath12k_wmi_pdev *wmi = ar->wmi; 1680 struct wmi_pdev_suspend_cmd *cmd; 1681 struct sk_buff *skb; 1682 int ret; 1683 1684 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1685 if (!skb) 1686 return -ENOMEM; 1687 1688 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1689 1690 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1691 sizeof(*cmd)); 1692 1693 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1694 cmd->pdev_id = cpu_to_le32(pdev_id); 1695 1696 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1697 "WMI pdev suspend pdev_id %d\n", pdev_id); 1698 1699 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1700 if (ret) { 1701 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1702 dev_kfree_skb(skb); 1703 } 1704 1705 return ret; 1706 } 1707 1708 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1709 { 1710 struct ath12k_wmi_pdev *wmi = ar->wmi; 1711 struct wmi_pdev_resume_cmd *cmd; 1712 struct sk_buff *skb; 1713 int ret; 1714 1715 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1716 if (!skb) 1717 return -ENOMEM; 1718 1719 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1720 1721 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1722 sizeof(*cmd)); 1723 cmd->pdev_id = cpu_to_le32(pdev_id); 1724 1725 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1726 "WMI pdev resume pdev id %d\n", pdev_id); 1727 1728 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1729 if (ret) { 1730 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1731 dev_kfree_skb(skb); 1732 } 1733 1734 return ret; 1735 } 1736 1737 /* TODO FW Support for the cmd is not available yet. 1738 * Can be tested once the command and corresponding 1739 * event is implemented in FW 1740 */ 1741 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1742 enum wmi_bss_chan_info_req_type type) 1743 { 1744 struct ath12k_wmi_pdev *wmi = ar->wmi; 1745 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1746 struct sk_buff *skb; 1747 int ret; 1748 1749 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1750 if (!skb) 1751 return -ENOMEM; 1752 1753 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1754 1755 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1756 sizeof(*cmd)); 1757 cmd->req_type = cpu_to_le32(type); 1758 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1759 1760 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1761 "WMI bss chan info req type %d\n", type); 1762 1763 ret = ath12k_wmi_cmd_send(wmi, skb, 1764 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1765 if (ret) { 1766 ath12k_warn(ar->ab, 1767 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1768 dev_kfree_skb(skb); 1769 } 1770 1771 return ret; 1772 } 1773 1774 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1775 struct ath12k_wmi_ap_ps_arg *arg) 1776 { 1777 struct ath12k_wmi_pdev *wmi = ar->wmi; 1778 struct wmi_ap_ps_peer_cmd *cmd; 1779 struct sk_buff *skb; 1780 int ret; 1781 1782 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1783 if (!skb) 1784 return -ENOMEM; 1785 1786 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1787 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1788 sizeof(*cmd)); 1789 1790 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1791 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1792 cmd->param = cpu_to_le32(arg->param); 1793 cmd->value = cpu_to_le32(arg->value); 1794 1795 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1796 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1797 arg->vdev_id, peer_addr, arg->param, arg->value); 1798 1799 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1800 if (ret) { 1801 ath12k_warn(ar->ab, 1802 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1803 dev_kfree_skb(skb); 1804 } 1805 1806 return ret; 1807 } 1808 1809 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1810 u32 param, u32 param_value) 1811 { 1812 struct ath12k_wmi_pdev *wmi = ar->wmi; 1813 struct wmi_sta_powersave_param_cmd *cmd; 1814 struct sk_buff *skb; 1815 int ret; 1816 1817 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1818 if (!skb) 1819 return -ENOMEM; 1820 1821 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1822 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1823 sizeof(*cmd)); 1824 1825 cmd->vdev_id = cpu_to_le32(vdev_id); 1826 cmd->param = cpu_to_le32(param); 1827 cmd->value = cpu_to_le32(param_value); 1828 1829 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1830 "WMI set sta ps vdev_id %d param %d value %d\n", 1831 vdev_id, param, param_value); 1832 1833 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1834 if (ret) { 1835 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1836 dev_kfree_skb(skb); 1837 } 1838 1839 return ret; 1840 } 1841 1842 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1843 { 1844 struct ath12k_wmi_pdev *wmi = ar->wmi; 1845 struct wmi_force_fw_hang_cmd *cmd; 1846 struct sk_buff *skb; 1847 int ret, len; 1848 1849 len = sizeof(*cmd); 1850 1851 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1852 if (!skb) 1853 return -ENOMEM; 1854 1855 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1856 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1857 len); 1858 1859 cmd->type = cpu_to_le32(type); 1860 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1861 1862 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1863 1864 if (ret) { 1865 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1866 dev_kfree_skb(skb); 1867 } 1868 return ret; 1869 } 1870 1871 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1872 u32 param_id, u32 param_value) 1873 { 1874 struct ath12k_wmi_pdev *wmi = ar->wmi; 1875 struct wmi_vdev_set_param_cmd *cmd; 1876 struct sk_buff *skb; 1877 int ret; 1878 1879 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1880 if (!skb) 1881 return -ENOMEM; 1882 1883 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1884 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1885 sizeof(*cmd)); 1886 1887 cmd->vdev_id = cpu_to_le32(vdev_id); 1888 cmd->param_id = cpu_to_le32(param_id); 1889 cmd->param_value = cpu_to_le32(param_value); 1890 1891 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1892 "WMI vdev id 0x%x set param %d value %d\n", 1893 vdev_id, param_id, param_value); 1894 1895 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1896 if (ret) { 1897 ath12k_warn(ar->ab, 1898 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1899 dev_kfree_skb(skb); 1900 } 1901 1902 return ret; 1903 } 1904 1905 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1906 { 1907 struct ath12k_wmi_pdev *wmi = ar->wmi; 1908 struct wmi_get_pdev_temperature_cmd *cmd; 1909 struct sk_buff *skb; 1910 int ret; 1911 1912 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1913 if (!skb) 1914 return -ENOMEM; 1915 1916 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1917 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1918 sizeof(*cmd)); 1919 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1920 1921 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1922 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1923 1924 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1925 if (ret) { 1926 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1927 dev_kfree_skb(skb); 1928 } 1929 1930 return ret; 1931 } 1932 1933 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1934 u32 vdev_id, u32 bcn_ctrl_op) 1935 { 1936 struct ath12k_wmi_pdev *wmi = ar->wmi; 1937 struct wmi_bcn_offload_ctrl_cmd *cmd; 1938 struct sk_buff *skb; 1939 int ret; 1940 1941 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1942 if (!skb) 1943 return -ENOMEM; 1944 1945 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1946 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1947 sizeof(*cmd)); 1948 1949 cmd->vdev_id = cpu_to_le32(vdev_id); 1950 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1951 1952 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1953 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1954 vdev_id, bcn_ctrl_op); 1955 1956 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1957 if (ret) { 1958 ath12k_warn(ar->ab, 1959 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1960 dev_kfree_skb(skb); 1961 } 1962 1963 return ret; 1964 } 1965 1966 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 1967 const u8 *p2p_ie) 1968 { 1969 struct ath12k_wmi_pdev *wmi = ar->wmi; 1970 struct wmi_p2p_go_set_beacon_ie_cmd *cmd; 1971 size_t p2p_ie_len, aligned_len; 1972 struct wmi_tlv *tlv; 1973 struct sk_buff *skb; 1974 void *ptr; 1975 int ret, len; 1976 1977 p2p_ie_len = p2p_ie[1] + 2; 1978 aligned_len = roundup(p2p_ie_len, sizeof(u32)); 1979 1980 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 1981 1982 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1983 if (!skb) 1984 return -ENOMEM; 1985 1986 ptr = skb->data; 1987 cmd = ptr; 1988 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE, 1989 sizeof(*cmd)); 1990 cmd->vdev_id = cpu_to_le32(vdev_id); 1991 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len); 1992 1993 ptr += sizeof(*cmd); 1994 tlv = ptr; 1995 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 1996 aligned_len); 1997 memcpy(tlv->value, p2p_ie, p2p_ie_len); 1998 1999 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE); 2000 if (ret) { 2001 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n"); 2002 dev_kfree_skb(skb); 2003 } 2004 2005 return ret; 2006 } 2007 2008 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif, 2009 struct ieee80211_mutable_offsets *offs, 2010 struct sk_buff *bcn, 2011 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args) 2012 { 2013 struct ath12k *ar = arvif->ar; 2014 struct ath12k_wmi_pdev *wmi = ar->wmi; 2015 struct ath12k_base *ab = ar->ab; 2016 struct wmi_bcn_tmpl_cmd *cmd; 2017 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 2018 struct ath12k_vif *ahvif = arvif->ahvif; 2019 struct ieee80211_bss_conf *conf; 2020 u32 vdev_id = arvif->vdev_id; 2021 struct wmi_tlv *tlv; 2022 struct sk_buff *skb; 2023 u32 ema_params = 0; 2024 void *ptr; 2025 int ret, len; 2026 size_t aligned_len = roundup(bcn->len, 4); 2027 2028 conf = ath12k_mac_get_link_bss_conf(arvif); 2029 if (!conf) { 2030 ath12k_warn(ab, 2031 "unable to access bss link conf in beacon template command for vif %pM link %u\n", 2032 ahvif->vif->addr, arvif->link_id); 2033 return -EINVAL; 2034 } 2035 2036 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 2037 2038 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2039 if (!skb) 2040 return -ENOMEM; 2041 2042 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 2043 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 2044 sizeof(*cmd)); 2045 cmd->vdev_id = cpu_to_le32(vdev_id); 2046 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 2047 2048 if (conf->csa_active) { 2049 cmd->csa_switch_count_offset = 2050 cpu_to_le32(offs->cntdwn_counter_offs[0]); 2051 cmd->ext_csa_switch_count_offset = 2052 cpu_to_le32(offs->cntdwn_counter_offs[1]); 2053 cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF); 2054 arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]]; 2055 } 2056 2057 cmd->buf_len = cpu_to_le32(bcn->len); 2058 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off); 2059 if (ema_args) { 2060 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT); 2061 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX); 2062 if (ema_args->bcn_index == 0) 2063 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST); 2064 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt) 2065 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST); 2066 cmd->ema_params = cpu_to_le32(ema_params); 2067 } 2068 cmd->feature_enable_bitmap = 2069 cpu_to_le32(u32_encode_bits(arvif->beacon_prot, 2070 WMI_BEACON_PROTECTION_EN_BIT)); 2071 2072 ptr = skb->data + sizeof(*cmd); 2073 2074 bcn_prb_info = ptr; 2075 len = sizeof(*bcn_prb_info); 2076 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 2077 len); 2078 bcn_prb_info->caps = 0; 2079 bcn_prb_info->erp = 0; 2080 2081 ptr += sizeof(*bcn_prb_info); 2082 2083 tlv = ptr; 2084 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 2085 memcpy(tlv->value, bcn->data, bcn->len); 2086 2087 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 2088 if (ret) { 2089 ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 2090 dev_kfree_skb(skb); 2091 } 2092 2093 return ret; 2094 } 2095 2096 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 2097 struct wmi_vdev_install_key_arg *arg) 2098 { 2099 struct ath12k_wmi_pdev *wmi = ar->wmi; 2100 struct wmi_vdev_install_key_cmd *cmd; 2101 struct wmi_tlv *tlv; 2102 struct sk_buff *skb; 2103 int ret, len, key_len_aligned; 2104 2105 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 2106 * length is specified in cmd->key_len. 2107 */ 2108 key_len_aligned = roundup(arg->key_len, 4); 2109 2110 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 2111 2112 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2113 if (!skb) 2114 return -ENOMEM; 2115 2116 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 2117 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 2118 sizeof(*cmd)); 2119 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2120 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 2121 cmd->key_idx = cpu_to_le32(arg->key_idx); 2122 cmd->key_flags = cpu_to_le32(arg->key_flags); 2123 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 2124 cmd->key_len = cpu_to_le32(arg->key_len); 2125 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 2126 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 2127 2128 if (arg->key_rsc_counter) 2129 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 2130 2131 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 2132 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 2133 memcpy(tlv->value, arg->key_data, arg->key_len); 2134 2135 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2136 "WMI vdev install key idx %d cipher %d len %d\n", 2137 arg->key_idx, arg->key_cipher, arg->key_len); 2138 2139 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 2140 if (ret) { 2141 ath12k_warn(ar->ab, 2142 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 2143 dev_kfree_skb(skb); 2144 } 2145 2146 return ret; 2147 } 2148 2149 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 2150 struct ath12k_wmi_peer_assoc_arg *arg, 2151 bool hw_crypto_disabled) 2152 { 2153 cmd->peer_flags = 0; 2154 cmd->peer_flags_ext = 0; 2155 2156 if (arg->is_wme_set) { 2157 if (arg->qos_flag) 2158 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 2159 if (arg->apsd_flag) 2160 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 2161 if (arg->ht_flag) 2162 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 2163 if (arg->bw_40) 2164 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 2165 if (arg->bw_80) 2166 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 2167 if (arg->bw_160) 2168 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 2169 if (arg->bw_320) 2170 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 2171 2172 /* Typically if STBC is enabled for VHT it should be enabled 2173 * for HT as well 2174 **/ 2175 if (arg->stbc_flag) 2176 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 2177 2178 /* Typically if LDPC is enabled for VHT it should be enabled 2179 * for HT as well 2180 **/ 2181 if (arg->ldpc_flag) 2182 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 2183 2184 if (arg->static_mimops_flag) 2185 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 2186 if (arg->dynamic_mimops_flag) 2187 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 2188 if (arg->spatial_mux_flag) 2189 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 2190 if (arg->vht_flag) 2191 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 2192 if (arg->he_flag) 2193 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 2194 if (arg->twt_requester) 2195 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 2196 if (arg->twt_responder) 2197 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 2198 if (arg->eht_flag) 2199 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 2200 } 2201 2202 /* Suppress authorization for all AUTH modes that need 4-way handshake 2203 * (during re-association). 2204 * Authorization will be done for these modes on key installation. 2205 */ 2206 if (arg->auth_flag) 2207 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 2208 if (arg->need_ptk_4_way) { 2209 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 2210 if (!hw_crypto_disabled && arg->is_assoc) 2211 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 2212 } 2213 if (arg->need_gtk_2_way) 2214 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 2215 /* safe mode bypass the 4-way handshake */ 2216 if (arg->safe_mode_enabled) 2217 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 2218 WMI_PEER_NEED_GTK_2_WAY)); 2219 2220 if (arg->is_pmf_enabled) 2221 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 2222 2223 /* Disable AMSDU for station transmit, if user configures it */ 2224 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 2225 * it 2226 * if (arg->amsdu_disable) Add after FW support 2227 **/ 2228 2229 /* Target asserts if node is marked HT and all MCS is set to 0. 2230 * Mark the node as non-HT if all the mcs rates are disabled through 2231 * iwpriv 2232 **/ 2233 if (arg->peer_ht_rates.num_rates == 0) 2234 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 2235 } 2236 2237 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 2238 struct ath12k_wmi_peer_assoc_arg *arg) 2239 { 2240 struct ath12k_wmi_pdev *wmi = ar->wmi; 2241 struct wmi_peer_assoc_complete_cmd *cmd; 2242 struct ath12k_wmi_vht_rate_set_params *mcs; 2243 struct ath12k_wmi_he_rate_set_params *he_mcs; 2244 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 2245 struct wmi_peer_assoc_mlo_params *ml_params; 2246 struct wmi_peer_assoc_mlo_partner_info_params *partner_info; 2247 struct sk_buff *skb; 2248 struct wmi_tlv *tlv; 2249 void *ptr; 2250 u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay; 2251 u32 peer_ht_rates_align, eml_trans_timeout; 2252 int i, ret, len; 2253 u16 eml_cap; 2254 __le32 v; 2255 2256 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 2257 sizeof(u32)); 2258 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 2259 sizeof(u32)); 2260 2261 len = sizeof(*cmd) + 2262 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 2263 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 2264 sizeof(*mcs) + TLV_HDR_SIZE + 2265 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 2266 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count); 2267 2268 if (arg->ml.enabled) 2269 len += TLV_HDR_SIZE + sizeof(*ml_params) + 2270 TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info)); 2271 else 2272 len += (2 * TLV_HDR_SIZE); 2273 2274 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2275 if (!skb) 2276 return -ENOMEM; 2277 2278 ptr = skb->data; 2279 2280 cmd = ptr; 2281 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 2282 sizeof(*cmd)); 2283 2284 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2285 2286 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 2287 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 2288 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 2289 2290 ath12k_wmi_copy_peer_flags(cmd, arg, 2291 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 2292 &ar->ab->dev_flags)); 2293 2294 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 2295 2296 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 2297 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 2298 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 2299 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 2300 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 2301 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 2302 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 2303 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 2304 2305 /* Update 11ax capabilities */ 2306 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 2307 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 2308 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 2309 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 2310 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 2311 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 2312 cmd->peer_he_cap_phy[i] = 2313 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 2314 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 2315 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 2316 for (i = 0; i < WMI_MAX_NUM_SS; i++) 2317 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 2318 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 2319 2320 /* Update 11be capabilities */ 2321 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 2322 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 2323 0); 2324 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 2325 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 2326 0); 2327 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 2328 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 2329 2330 /* Update peer legacy rate information */ 2331 ptr += sizeof(*cmd); 2332 2333 tlv = ptr; 2334 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 2335 2336 ptr += TLV_HDR_SIZE; 2337 2338 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 2339 memcpy(ptr, arg->peer_legacy_rates.rates, 2340 arg->peer_legacy_rates.num_rates); 2341 2342 /* Update peer HT rate information */ 2343 ptr += peer_legacy_rates_align; 2344 2345 tlv = ptr; 2346 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2347 ptr += TLV_HDR_SIZE; 2348 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2349 memcpy(ptr, arg->peer_ht_rates.rates, 2350 arg->peer_ht_rates.num_rates); 2351 2352 /* VHT Rates */ 2353 ptr += peer_ht_rates_align; 2354 2355 mcs = ptr; 2356 2357 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2358 sizeof(*mcs)); 2359 2360 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2361 2362 /* Update bandwidth-NSS mapping */ 2363 cmd->peer_bw_rxnss_override = 0; 2364 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2365 2366 if (arg->vht_capable) { 2367 /* Firmware interprets mcs->tx_mcs_set field as peer's 2368 * RX capability 2369 */ 2370 mcs->rx_max_rate = cpu_to_le32(arg->tx_max_rate); 2371 mcs->rx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2372 mcs->tx_max_rate = cpu_to_le32(arg->rx_max_rate); 2373 mcs->tx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2374 } 2375 2376 /* HE Rates */ 2377 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2378 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2379 2380 ptr += sizeof(*mcs); 2381 2382 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2383 2384 tlv = ptr; 2385 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2386 ptr += TLV_HDR_SIZE; 2387 2388 /* Loop through the HE rate set */ 2389 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2390 he_mcs = ptr; 2391 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2392 sizeof(*he_mcs)); 2393 2394 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2395 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2396 ptr += sizeof(*he_mcs); 2397 } 2398 2399 tlv = ptr; 2400 len = arg->ml.enabled ? sizeof(*ml_params) : 0; 2401 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2402 ptr += TLV_HDR_SIZE; 2403 if (!len) 2404 goto skip_ml_params; 2405 2406 ml_params = ptr; 2407 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS, 2408 len); 2409 ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 2410 2411 if (arg->ml.assoc_link) 2412 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK); 2413 2414 if (arg->ml.primary_umac) 2415 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC); 2416 2417 if (arg->ml.logical_link_idx_valid) 2418 ml_params->flags |= 2419 cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID); 2420 2421 if (arg->ml.peer_id_valid) 2422 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID); 2423 2424 ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr); 2425 ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx); 2426 ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id); 2427 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id); 2428 2429 eml_cap = arg->ml.eml_cap; 2430 if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) { 2431 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT); 2432 /* Padding delay */ 2433 eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap); 2434 ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay); 2435 /* Transition delay */ 2436 eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap); 2437 ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay); 2438 /* Transition timeout */ 2439 eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap); 2440 ml_params->emlsr_trans_timeout_us = 2441 cpu_to_le32(eml_trans_timeout); 2442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u", 2443 arg->peer_mac, eml_pad_delay, eml_trans_delay, 2444 eml_trans_timeout); 2445 } 2446 2447 ptr += sizeof(*ml_params); 2448 2449 skip_ml_params: 2450 /* Loop through the EHT rate set */ 2451 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2452 tlv = ptr; 2453 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2454 ptr += TLV_HDR_SIZE; 2455 2456 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2457 eht_mcs = ptr; 2458 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET, 2459 sizeof(*eht_mcs)); 2460 2461 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2462 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2463 ptr += sizeof(*eht_mcs); 2464 } 2465 2466 /* Update MCS15 capability */ 2467 if (arg->eht_disable_mcs15) 2468 cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE); 2469 2470 tlv = ptr; 2471 len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0; 2472 /* fill ML Partner links */ 2473 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2474 ptr += TLV_HDR_SIZE; 2475 2476 if (len == 0) 2477 goto send; 2478 2479 for (i = 0; i < arg->ml.num_partner_links; i++) { 2480 u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC; 2481 2482 partner_info = ptr; 2483 partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd, 2484 sizeof(*partner_info)); 2485 partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id); 2486 partner_info->hw_link_id = 2487 cpu_to_le32(arg->ml.partner_info[i].hw_link_id); 2488 partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 2489 2490 if (arg->ml.partner_info[i].assoc_link) 2491 partner_info->flags |= 2492 cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK); 2493 2494 if (arg->ml.partner_info[i].primary_umac) 2495 partner_info->flags |= 2496 cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC); 2497 2498 if (arg->ml.partner_info[i].logical_link_idx_valid) { 2499 v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID); 2500 partner_info->flags |= v; 2501 } 2502 2503 partner_info->logical_link_idx = 2504 cpu_to_le32(arg->ml.partner_info[i].logical_link_idx); 2505 ptr += sizeof(*partner_info); 2506 } 2507 2508 send: 2509 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2510 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n", 2511 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2512 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2513 cmd->peer_listen_intval, cmd->peer_ht_caps, 2514 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2515 cmd->peer_mpdu_density, 2516 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2517 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2518 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2519 cmd->peer_he_cap_phy[2], 2520 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2521 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2522 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2523 cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops); 2524 2525 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2526 if (ret) { 2527 ath12k_warn(ar->ab, 2528 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2529 dev_kfree_skb(skb); 2530 } 2531 2532 return ret; 2533 } 2534 2535 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2536 struct ath12k_wmi_scan_req_arg *arg) 2537 { 2538 /* setup commonly used values */ 2539 arg->scan_req_id = 1; 2540 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2541 arg->dwell_time_active = 50; 2542 arg->dwell_time_active_2g = 0; 2543 arg->dwell_time_passive = 150; 2544 arg->dwell_time_active_6g = 70; 2545 arg->dwell_time_passive_6g = 70; 2546 arg->min_rest_time = 50; 2547 arg->max_rest_time = 500; 2548 arg->repeat_probe_time = 0; 2549 arg->probe_spacing_time = 0; 2550 arg->idle_time = 0; 2551 arg->max_scan_time = 20000; 2552 arg->probe_delay = 5; 2553 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2554 WMI_SCAN_EVENT_COMPLETED | 2555 WMI_SCAN_EVENT_BSS_CHANNEL | 2556 WMI_SCAN_EVENT_FOREIGN_CHAN | 2557 WMI_SCAN_EVENT_DEQUEUED; 2558 arg->scan_f_chan_stat_evnt = 1; 2559 arg->num_bssid = 1; 2560 2561 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2562 * ZEROs in probe request 2563 */ 2564 eth_broadcast_addr(arg->bssid_list[0].addr); 2565 } 2566 2567 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2568 struct ath12k_wmi_scan_req_arg *arg) 2569 { 2570 /* Scan events subscription */ 2571 if (arg->scan_ev_started) 2572 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2573 if (arg->scan_ev_completed) 2574 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2575 if (arg->scan_ev_bss_chan) 2576 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2577 if (arg->scan_ev_foreign_chan) 2578 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2579 if (arg->scan_ev_dequeued) 2580 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2581 if (arg->scan_ev_preempted) 2582 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2583 if (arg->scan_ev_start_failed) 2584 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2585 if (arg->scan_ev_restarted) 2586 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2587 if (arg->scan_ev_foreign_chn_exit) 2588 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2589 if (arg->scan_ev_suspended) 2590 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2591 if (arg->scan_ev_resumed) 2592 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2593 2594 /** Set scan control flags */ 2595 cmd->scan_ctrl_flags = 0; 2596 if (arg->scan_f_passive) 2597 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2598 if (arg->scan_f_strict_passive_pch) 2599 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2600 if (arg->scan_f_promisc_mode) 2601 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2602 if (arg->scan_f_capture_phy_err) 2603 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2604 if (arg->scan_f_half_rate) 2605 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2606 if (arg->scan_f_quarter_rate) 2607 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2608 if (arg->scan_f_cck_rates) 2609 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2610 if (arg->scan_f_ofdm_rates) 2611 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2612 if (arg->scan_f_chan_stat_evnt) 2613 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2614 if (arg->scan_f_filter_prb_req) 2615 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2616 if (arg->scan_f_bcast_probe) 2617 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2618 if (arg->scan_f_offchan_mgmt_tx) 2619 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2620 if (arg->scan_f_offchan_data_tx) 2621 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2622 if (arg->scan_f_force_active_dfs_chn) 2623 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2624 if (arg->scan_f_add_tpc_ie_in_probe) 2625 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2626 if (arg->scan_f_add_ds_ie_in_probe) 2627 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2628 if (arg->scan_f_add_spoofed_mac_in_probe) 2629 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2630 if (arg->scan_f_add_rand_seq_in_probe) 2631 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2632 if (arg->scan_f_en_ie_whitelist_in_probe) 2633 cmd->scan_ctrl_flags |= 2634 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2635 2636 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2637 WMI_SCAN_DWELL_MODE_MASK); 2638 } 2639 2640 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2641 struct ath12k_wmi_scan_req_arg *arg) 2642 { 2643 struct ath12k_wmi_pdev *wmi = ar->wmi; 2644 struct wmi_start_scan_cmd *cmd; 2645 struct ath12k_wmi_ssid_params *ssid = NULL; 2646 struct ath12k_wmi_mac_addr_params *bssid; 2647 struct sk_buff *skb; 2648 struct wmi_tlv *tlv; 2649 void *ptr; 2650 int i, ret, len; 2651 __le32 *tmp_ptr; 2652 u32 extraie_len_with_pad = 0; 2653 struct ath12k_wmi_hint_short_ssid_params *s_ssid = NULL; 2654 struct ath12k_wmi_hint_bssid_params *hint_bssid = NULL; 2655 2656 len = sizeof(*cmd); 2657 2658 len += TLV_HDR_SIZE; 2659 if (arg->num_chan) 2660 len += arg->num_chan * sizeof(u32); 2661 2662 len += TLV_HDR_SIZE; 2663 if (arg->num_ssids) 2664 len += arg->num_ssids * sizeof(*ssid); 2665 2666 len += TLV_HDR_SIZE; 2667 if (arg->num_bssid) 2668 len += sizeof(*bssid) * arg->num_bssid; 2669 2670 if (arg->num_hint_bssid) 2671 len += TLV_HDR_SIZE + 2672 arg->num_hint_bssid * sizeof(*hint_bssid); 2673 2674 if (arg->num_hint_s_ssid) 2675 len += TLV_HDR_SIZE + 2676 arg->num_hint_s_ssid * sizeof(*s_ssid); 2677 2678 len += TLV_HDR_SIZE; 2679 if (arg->extraie.len) 2680 extraie_len_with_pad = 2681 roundup(arg->extraie.len, sizeof(u32)); 2682 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) { 2683 len += extraie_len_with_pad; 2684 } else { 2685 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n", 2686 arg->extraie.len); 2687 extraie_len_with_pad = 0; 2688 } 2689 2690 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2691 if (!skb) 2692 return -ENOMEM; 2693 2694 ptr = skb->data; 2695 2696 cmd = ptr; 2697 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2698 sizeof(*cmd)); 2699 2700 cmd->scan_id = cpu_to_le32(arg->scan_id); 2701 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2702 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2703 if (ar->state_11d == ATH12K_11D_PREPARING) 2704 arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM; 2705 else 2706 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2707 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2708 2709 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2710 2711 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2712 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2713 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2714 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2715 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2716 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2717 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2718 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2719 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2720 cmd->idle_time = cpu_to_le32(arg->idle_time); 2721 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2722 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2723 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2724 cmd->num_chan = cpu_to_le32(arg->num_chan); 2725 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2726 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2727 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2728 cmd->n_probes = cpu_to_le32(arg->n_probes); 2729 2730 ptr += sizeof(*cmd); 2731 2732 len = arg->num_chan * sizeof(u32); 2733 2734 tlv = ptr; 2735 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2736 ptr += TLV_HDR_SIZE; 2737 tmp_ptr = (__le32 *)ptr; 2738 2739 for (i = 0; i < arg->num_chan; i++) 2740 tmp_ptr[i] = cpu_to_le32(arg->chan_list[i]); 2741 2742 ptr += len; 2743 2744 len = arg->num_ssids * sizeof(*ssid); 2745 tlv = ptr; 2746 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2747 2748 ptr += TLV_HDR_SIZE; 2749 2750 if (arg->num_ssids) { 2751 ssid = ptr; 2752 for (i = 0; i < arg->num_ssids; ++i) { 2753 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2754 memcpy(ssid->ssid, arg->ssid[i].ssid, 2755 arg->ssid[i].ssid_len); 2756 ssid++; 2757 } 2758 } 2759 2760 ptr += (arg->num_ssids * sizeof(*ssid)); 2761 len = arg->num_bssid * sizeof(*bssid); 2762 tlv = ptr; 2763 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2764 2765 ptr += TLV_HDR_SIZE; 2766 bssid = ptr; 2767 2768 if (arg->num_bssid) { 2769 for (i = 0; i < arg->num_bssid; ++i) { 2770 ether_addr_copy(bssid->addr, 2771 arg->bssid_list[i].addr); 2772 bssid++; 2773 } 2774 } 2775 2776 ptr += arg->num_bssid * sizeof(*bssid); 2777 2778 len = extraie_len_with_pad; 2779 tlv = ptr; 2780 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2781 ptr += TLV_HDR_SIZE; 2782 2783 if (extraie_len_with_pad) 2784 memcpy(ptr, arg->extraie.ptr, 2785 arg->extraie.len); 2786 2787 ptr += extraie_len_with_pad; 2788 2789 if (arg->num_hint_s_ssid) { 2790 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2791 tlv = ptr; 2792 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2793 ptr += TLV_HDR_SIZE; 2794 s_ssid = ptr; 2795 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2796 s_ssid->freq_flags = 2797 cpu_to_le32(arg->hint_s_ssid[i].freq_flags); 2798 s_ssid->short_ssid = 2799 cpu_to_le32(arg->hint_s_ssid[i].short_ssid); 2800 s_ssid++; 2801 } 2802 ptr += len; 2803 } 2804 2805 if (arg->num_hint_bssid) { 2806 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2807 tlv = ptr; 2808 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2809 ptr += TLV_HDR_SIZE; 2810 hint_bssid = ptr; 2811 for (i = 0; i < arg->num_hint_bssid; ++i) { 2812 hint_bssid->freq_flags = 2813 cpu_to_le32(arg->hint_bssid[i].freq_flags); 2814 ether_addr_copy(&hint_bssid->bssid.addr[0], 2815 &arg->hint_bssid[i].bssid.addr[0]); 2816 hint_bssid++; 2817 } 2818 } 2819 2820 ret = ath12k_wmi_cmd_send(wmi, skb, 2821 WMI_START_SCAN_CMDID); 2822 if (ret) { 2823 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2824 dev_kfree_skb(skb); 2825 } 2826 2827 return ret; 2828 } 2829 2830 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2831 struct ath12k_wmi_scan_cancel_arg *arg) 2832 { 2833 struct ath12k_wmi_pdev *wmi = ar->wmi; 2834 struct wmi_stop_scan_cmd *cmd; 2835 struct sk_buff *skb; 2836 int ret; 2837 2838 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2839 if (!skb) 2840 return -ENOMEM; 2841 2842 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2843 2844 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2845 sizeof(*cmd)); 2846 2847 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2848 cmd->requestor = cpu_to_le32(arg->requester); 2849 cmd->scan_id = cpu_to_le32(arg->scan_id); 2850 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2851 /* stop the scan with the corresponding scan_id */ 2852 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2853 /* Cancelling all scans */ 2854 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2855 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2856 /* Cancelling VAP scans */ 2857 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2858 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2859 /* Cancelling specific scan */ 2860 cmd->req_type = WMI_SCAN_STOP_ONE; 2861 } else { 2862 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2863 arg->req_type); 2864 dev_kfree_skb(skb); 2865 return -EINVAL; 2866 } 2867 2868 ret = ath12k_wmi_cmd_send(wmi, skb, 2869 WMI_STOP_SCAN_CMDID); 2870 if (ret) { 2871 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2872 dev_kfree_skb(skb); 2873 } 2874 2875 return ret; 2876 } 2877 2878 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2879 struct ath12k_wmi_scan_chan_list_arg *arg) 2880 { 2881 struct ath12k_wmi_pdev *wmi = ar->wmi; 2882 struct wmi_scan_chan_list_cmd *cmd; 2883 struct sk_buff *skb; 2884 struct ath12k_wmi_channel_params *chan_info; 2885 struct ath12k_wmi_channel_arg *channel_arg; 2886 struct wmi_tlv *tlv; 2887 void *ptr; 2888 int i, ret, len; 2889 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2890 __le32 *reg1, *reg2; 2891 2892 channel_arg = &arg->channel[0]; 2893 while (arg->nallchans) { 2894 len = sizeof(*cmd) + TLV_HDR_SIZE; 2895 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2896 sizeof(*chan_info); 2897 2898 num_send_chans = min3(arg->nallchans, max_chan_limit, 2899 ATH12K_WMI_MAX_NUM_CHAN_PER_CMD); 2900 2901 arg->nallchans -= num_send_chans; 2902 len += sizeof(*chan_info) * num_send_chans; 2903 2904 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2905 if (!skb) 2906 return -ENOMEM; 2907 2908 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2909 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2910 sizeof(*cmd)); 2911 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2912 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2913 if (num_sends) 2914 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2915 2916 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2917 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2918 num_send_chans, len, cmd->pdev_id, num_sends); 2919 2920 ptr = skb->data + sizeof(*cmd); 2921 2922 len = sizeof(*chan_info) * num_send_chans; 2923 tlv = ptr; 2924 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2925 len); 2926 ptr += TLV_HDR_SIZE; 2927 2928 for (i = 0; i < num_send_chans; ++i) { 2929 chan_info = ptr; 2930 memset(chan_info, 0, sizeof(*chan_info)); 2931 len = sizeof(*chan_info); 2932 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2933 len); 2934 2935 reg1 = &chan_info->reg_info_1; 2936 reg2 = &chan_info->reg_info_2; 2937 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2938 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2939 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2940 2941 if (channel_arg->is_chan_passive) 2942 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2943 if (channel_arg->allow_he) 2944 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2945 else if (channel_arg->allow_vht) 2946 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2947 else if (channel_arg->allow_ht) 2948 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2949 if (channel_arg->half_rate) 2950 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2951 if (channel_arg->quarter_rate) 2952 chan_info->info |= 2953 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2954 2955 if (channel_arg->psc_channel) 2956 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2957 2958 if (channel_arg->dfs_set) 2959 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2960 2961 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2962 WMI_CHAN_INFO_MODE); 2963 *reg1 |= le32_encode_bits(channel_arg->minpower, 2964 WMI_CHAN_REG_INFO1_MIN_PWR); 2965 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2966 WMI_CHAN_REG_INFO1_MAX_PWR); 2967 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2968 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2969 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2970 WMI_CHAN_REG_INFO1_REG_CLS); 2971 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2972 WMI_CHAN_REG_INFO2_ANT_MAX); 2973 *reg2 |= le32_encode_bits(channel_arg->maxregpower, 2974 WMI_CHAN_REG_INFO2_MAX_TX_PWR); 2975 2976 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2977 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2978 i, chan_info->mhz, chan_info->info); 2979 2980 ptr += sizeof(*chan_info); 2981 2982 channel_arg++; 2983 } 2984 2985 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2986 if (ret) { 2987 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2988 dev_kfree_skb(skb); 2989 return ret; 2990 } 2991 2992 num_sends++; 2993 } 2994 2995 return 0; 2996 } 2997 2998 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2999 struct wmi_wmm_params_all_arg *param) 3000 { 3001 struct ath12k_wmi_pdev *wmi = ar->wmi; 3002 struct wmi_vdev_set_wmm_params_cmd *cmd; 3003 struct wmi_wmm_params *wmm_param; 3004 struct wmi_wmm_params_arg *wmi_wmm_arg; 3005 struct sk_buff *skb; 3006 int ret, ac; 3007 3008 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3009 if (!skb) 3010 return -ENOMEM; 3011 3012 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 3013 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 3014 sizeof(*cmd)); 3015 3016 cmd->vdev_id = cpu_to_le32(vdev_id); 3017 cmd->wmm_param_type = 0; 3018 3019 for (ac = 0; ac < WME_NUM_AC; ac++) { 3020 switch (ac) { 3021 case WME_AC_BE: 3022 wmi_wmm_arg = ¶m->ac_be; 3023 break; 3024 case WME_AC_BK: 3025 wmi_wmm_arg = ¶m->ac_bk; 3026 break; 3027 case WME_AC_VI: 3028 wmi_wmm_arg = ¶m->ac_vi; 3029 break; 3030 case WME_AC_VO: 3031 wmi_wmm_arg = ¶m->ac_vo; 3032 break; 3033 } 3034 3035 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 3036 wmm_param->tlv_header = 3037 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 3038 sizeof(*wmm_param)); 3039 3040 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 3041 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 3042 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 3043 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 3044 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 3045 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 3046 3047 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3048 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 3049 ac, wmm_param->aifs, wmm_param->cwmin, 3050 wmm_param->cwmax, wmm_param->txoplimit, 3051 wmm_param->acm, wmm_param->no_ack); 3052 } 3053 ret = ath12k_wmi_cmd_send(wmi, skb, 3054 WMI_VDEV_SET_WMM_PARAMS_CMDID); 3055 if (ret) { 3056 ath12k_warn(ar->ab, 3057 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 3058 dev_kfree_skb(skb); 3059 } 3060 3061 return ret; 3062 } 3063 3064 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 3065 u32 pdev_id) 3066 { 3067 struct ath12k_wmi_pdev *wmi = ar->wmi; 3068 struct wmi_dfs_phyerr_offload_cmd *cmd; 3069 struct sk_buff *skb; 3070 int ret; 3071 3072 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3073 if (!skb) 3074 return -ENOMEM; 3075 3076 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 3077 cmd->tlv_header = 3078 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 3079 sizeof(*cmd)); 3080 3081 cmd->pdev_id = cpu_to_le32(pdev_id); 3082 3083 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3084 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 3085 3086 ret = ath12k_wmi_cmd_send(wmi, skb, 3087 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 3088 if (ret) { 3089 ath12k_warn(ar->ab, 3090 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 3091 dev_kfree_skb(skb); 3092 } 3093 3094 return ret; 3095 } 3096 3097 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 3098 const u8 *buf, size_t buf_len) 3099 { 3100 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3101 struct wmi_pdev_set_bios_interface_cmd *cmd; 3102 struct wmi_tlv *tlv; 3103 struct sk_buff *skb; 3104 u8 *ptr; 3105 u32 len, len_aligned; 3106 int ret; 3107 3108 len_aligned = roundup(buf_len, sizeof(u32)); 3109 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned; 3110 3111 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3112 if (!skb) 3113 return -ENOMEM; 3114 3115 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data; 3116 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD, 3117 sizeof(*cmd)); 3118 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3119 cmd->param_type_id = cpu_to_le32(param_id); 3120 cmd->length = cpu_to_le32(buf_len); 3121 3122 ptr = skb->data + sizeof(*cmd); 3123 tlv = (struct wmi_tlv *)ptr; 3124 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned); 3125 ptr += TLV_HDR_SIZE; 3126 memcpy(ptr, buf, buf_len); 3127 3128 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3129 skb, 3130 WMI_PDEV_SET_BIOS_INTERFACE_CMDID); 3131 if (ret) { 3132 ath12k_warn(ab, 3133 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n", 3134 param_id, ret); 3135 dev_kfree_skb(skb); 3136 } 3137 3138 return 0; 3139 } 3140 3141 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table) 3142 { 3143 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3144 struct wmi_pdev_set_bios_sar_table_cmd *cmd; 3145 struct wmi_tlv *tlv; 3146 struct sk_buff *skb; 3147 int ret; 3148 u8 *buf_ptr; 3149 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned; 3150 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET; 3151 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET; 3152 3153 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32)); 3154 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN, 3155 sizeof(u32)); 3156 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned + 3157 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned; 3158 3159 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3160 if (!skb) 3161 return -ENOMEM; 3162 3163 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data; 3164 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD, 3165 sizeof(*cmd)); 3166 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3167 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 3168 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 3169 3170 buf_ptr = skb->data + sizeof(*cmd); 3171 tlv = (struct wmi_tlv *)buf_ptr; 3172 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 3173 sar_table_len_aligned); 3174 buf_ptr += TLV_HDR_SIZE; 3175 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 3176 3177 buf_ptr += sar_table_len_aligned; 3178 tlv = (struct wmi_tlv *)buf_ptr; 3179 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 3180 sar_dbs_backoff_len_aligned); 3181 buf_ptr += TLV_HDR_SIZE; 3182 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 3183 3184 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3185 skb, 3186 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID); 3187 if (ret) { 3188 ath12k_warn(ab, 3189 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n", 3190 ret); 3191 dev_kfree_skb(skb); 3192 } 3193 3194 return ret; 3195 } 3196 3197 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table) 3198 { 3199 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3200 struct wmi_pdev_set_bios_geo_table_cmd *cmd; 3201 struct wmi_tlv *tlv; 3202 struct sk_buff *skb; 3203 int ret; 3204 u8 *buf_ptr; 3205 u32 len, sar_geo_len_aligned; 3206 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET; 3207 3208 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32)); 3209 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned; 3210 3211 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3212 if (!skb) 3213 return -ENOMEM; 3214 3215 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data; 3216 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 3217 sizeof(*cmd)); 3218 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3219 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 3220 3221 buf_ptr = skb->data + sizeof(*cmd); 3222 tlv = (struct wmi_tlv *)buf_ptr; 3223 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned); 3224 buf_ptr += TLV_HDR_SIZE; 3225 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 3226 3227 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3228 skb, 3229 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID); 3230 if (ret) { 3231 ath12k_warn(ab, 3232 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n", 3233 ret); 3234 dev_kfree_skb(skb); 3235 } 3236 3237 return ret; 3238 } 3239 3240 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3241 u32 tid, u32 initiator, u32 reason) 3242 { 3243 struct ath12k_wmi_pdev *wmi = ar->wmi; 3244 struct wmi_delba_send_cmd *cmd; 3245 struct sk_buff *skb; 3246 int ret; 3247 3248 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3249 if (!skb) 3250 return -ENOMEM; 3251 3252 cmd = (struct wmi_delba_send_cmd *)skb->data; 3253 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 3254 sizeof(*cmd)); 3255 cmd->vdev_id = cpu_to_le32(vdev_id); 3256 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3257 cmd->tid = cpu_to_le32(tid); 3258 cmd->initiator = cpu_to_le32(initiator); 3259 cmd->reasoncode = cpu_to_le32(reason); 3260 3261 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3262 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 3263 vdev_id, mac, tid, initiator, reason); 3264 3265 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 3266 3267 if (ret) { 3268 ath12k_warn(ar->ab, 3269 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 3270 dev_kfree_skb(skb); 3271 } 3272 3273 return ret; 3274 } 3275 3276 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3277 u32 tid, u32 status) 3278 { 3279 struct ath12k_wmi_pdev *wmi = ar->wmi; 3280 struct wmi_addba_setresponse_cmd *cmd; 3281 struct sk_buff *skb; 3282 int ret; 3283 3284 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3285 if (!skb) 3286 return -ENOMEM; 3287 3288 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 3289 cmd->tlv_header = 3290 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 3291 sizeof(*cmd)); 3292 cmd->vdev_id = cpu_to_le32(vdev_id); 3293 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3294 cmd->tid = cpu_to_le32(tid); 3295 cmd->statuscode = cpu_to_le32(status); 3296 3297 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3298 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 3299 vdev_id, mac, tid, status); 3300 3301 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 3302 3303 if (ret) { 3304 ath12k_warn(ar->ab, 3305 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 3306 dev_kfree_skb(skb); 3307 } 3308 3309 return ret; 3310 } 3311 3312 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3313 u32 tid, u32 buf_size) 3314 { 3315 struct ath12k_wmi_pdev *wmi = ar->wmi; 3316 struct wmi_addba_send_cmd *cmd; 3317 struct sk_buff *skb; 3318 int ret; 3319 3320 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3321 if (!skb) 3322 return -ENOMEM; 3323 3324 cmd = (struct wmi_addba_send_cmd *)skb->data; 3325 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 3326 sizeof(*cmd)); 3327 cmd->vdev_id = cpu_to_le32(vdev_id); 3328 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3329 cmd->tid = cpu_to_le32(tid); 3330 cmd->buffersize = cpu_to_le32(buf_size); 3331 3332 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3333 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 3334 vdev_id, mac, tid, buf_size); 3335 3336 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 3337 3338 if (ret) { 3339 ath12k_warn(ar->ab, 3340 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 3341 dev_kfree_skb(skb); 3342 } 3343 3344 return ret; 3345 } 3346 3347 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 3348 { 3349 struct ath12k_wmi_pdev *wmi = ar->wmi; 3350 struct wmi_addba_clear_resp_cmd *cmd; 3351 struct sk_buff *skb; 3352 int ret; 3353 3354 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3355 if (!skb) 3356 return -ENOMEM; 3357 3358 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 3359 cmd->tlv_header = 3360 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 3361 sizeof(*cmd)); 3362 cmd->vdev_id = cpu_to_le32(vdev_id); 3363 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3364 3365 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3366 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 3367 vdev_id, mac); 3368 3369 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 3370 3371 if (ret) { 3372 ath12k_warn(ar->ab, 3373 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 3374 dev_kfree_skb(skb); 3375 } 3376 3377 return ret; 3378 } 3379 3380 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 3381 struct ath12k_wmi_init_country_arg *arg) 3382 { 3383 struct ath12k_wmi_pdev *wmi = ar->wmi; 3384 struct wmi_init_country_cmd *cmd; 3385 struct sk_buff *skb; 3386 int ret; 3387 3388 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3389 if (!skb) 3390 return -ENOMEM; 3391 3392 cmd = (struct wmi_init_country_cmd *)skb->data; 3393 cmd->tlv_header = 3394 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 3395 sizeof(*cmd)); 3396 3397 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3398 3399 switch (arg->flags) { 3400 case ALPHA_IS_SET: 3401 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 3402 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 3403 break; 3404 case CC_IS_SET: 3405 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 3406 cmd->cc_info.country_code = 3407 cpu_to_le32(arg->cc_info.country_code); 3408 break; 3409 case REGDMN_IS_SET: 3410 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 3411 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 3412 break; 3413 default: 3414 ret = -EINVAL; 3415 goto out; 3416 } 3417 3418 ret = ath12k_wmi_cmd_send(wmi, skb, 3419 WMI_SET_INIT_COUNTRY_CMDID); 3420 3421 out: 3422 if (ret) { 3423 ath12k_warn(ar->ab, 3424 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 3425 ret); 3426 dev_kfree_skb(skb); 3427 } 3428 3429 return ret; 3430 } 3431 3432 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar, 3433 struct wmi_set_current_country_arg *arg) 3434 { 3435 struct ath12k_wmi_pdev *wmi = ar->wmi; 3436 struct wmi_set_current_country_cmd *cmd; 3437 struct sk_buff *skb; 3438 int ret; 3439 3440 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3441 if (!skb) 3442 return -ENOMEM; 3443 3444 cmd = (struct wmi_set_current_country_cmd *)skb->data; 3445 cmd->tlv_header = 3446 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD, 3447 sizeof(*cmd)); 3448 3449 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3450 memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2)); 3451 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID); 3452 3453 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3454 "set current country pdev id %d alpha2 %c%c\n", 3455 ar->pdev->pdev_id, 3456 arg->alpha2[0], 3457 arg->alpha2[1]); 3458 3459 if (ret) { 3460 ath12k_warn(ar->ab, 3461 "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret); 3462 dev_kfree_skb(skb); 3463 } 3464 3465 return ret; 3466 } 3467 3468 int 3469 ath12k_wmi_send_thermal_mitigation_cmd(struct ath12k *ar, 3470 struct ath12k_wmi_thermal_mitigation_arg *arg) 3471 { 3472 struct ath12k_wmi_therm_throt_level_config_param *lvl_conf; 3473 struct ath12k_wmi_therm_throt_config_request_cmd *cmd; 3474 struct ath12k_wmi_pdev *wmi = ar->wmi; 3475 struct wmi_tlv *tlv; 3476 struct sk_buff *skb; 3477 int i, ret, len; 3478 3479 len = sizeof(*cmd) + TLV_HDR_SIZE + (arg->num_levels * sizeof(*lvl_conf)); 3480 3481 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3482 if (!skb) 3483 return -ENOMEM; 3484 3485 cmd = (struct ath12k_wmi_therm_throt_config_request_cmd *)skb->data; 3486 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_THERM_THROT_CONFIG_REQUEST, 3487 sizeof(*cmd)); 3488 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3489 cmd->enable = cpu_to_le32(1); 3490 cmd->dc = cpu_to_le32(100); 3491 cmd->dc_per_event = cpu_to_le32(0xffffffff); 3492 cmd->therm_throt_levels = cpu_to_le32(arg->num_levels); 3493 3494 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 3495 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 3496 arg->num_levels * sizeof(*lvl_conf)); 3497 3498 lvl_conf = (struct ath12k_wmi_therm_throt_level_config_param *)tlv->value; 3499 3500 for (i = 0; i < arg->num_levels; i++) { 3501 lvl_conf->tlv_header = 3502 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 3503 sizeof(*lvl_conf)); 3504 3505 lvl_conf->temp_lwm = a_cpu_to_sle32(arg->levelconf[i].tmplwm); 3506 lvl_conf->temp_hwm = a_cpu_to_sle32(arg->levelconf[i].tmphwm); 3507 lvl_conf->dc_off_percent = cpu_to_le32(arg->levelconf[i].dcoffpercent); 3508 3509 if (test_bit(WMI_TLV_SERVICE_THERM_THROT_POUT_REDUCTION, 3510 ar->ab->wmi_ab.svc_map)) 3511 lvl_conf->pout_reduction_25db = 3512 cpu_to_le32(arg->levelconf[i].pout_reduction_db); 3513 3514 if (test_bit(WMI_TLV_SERVICE_THERM_THROT_TX_CHAIN_MASK, 3515 ar->ab->wmi_ab.svc_map)) 3516 lvl_conf->tx_chain_mask = cpu_to_le32(ar->cfg_tx_chainmask); 3517 3518 lvl_conf->duty_cycle = cpu_to_le32(ATH12K_THERMAL_DEFAULT_DUTY_CYCLE); 3519 lvl_conf++; 3520 } 3521 3522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3523 "WMI vdev set thermal throt pdev_id %u enable dc 100 dc_per_event 0xffffffff levels %d\n", 3524 ar->pdev->pdev_id, arg->num_levels); 3525 3526 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_THERM_THROT_SET_CONF_CMDID); 3527 if (ret) { 3528 ath12k_warn(ar->ab, 3529 "failed to send WMI_THERM_THROT_SET_CONF cmd: %d\n", 3530 ret); 3531 dev_kfree_skb(skb); 3532 } 3533 3534 return ret; 3535 } 3536 3537 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar, 3538 struct wmi_11d_scan_start_arg *arg) 3539 { 3540 struct ath12k_wmi_pdev *wmi = ar->wmi; 3541 struct wmi_11d_scan_start_cmd *cmd; 3542 struct sk_buff *skb; 3543 int ret; 3544 3545 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3546 if (!skb) 3547 return -ENOMEM; 3548 3549 cmd = (struct wmi_11d_scan_start_cmd *)skb->data; 3550 cmd->tlv_header = 3551 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD, 3552 sizeof(*cmd)); 3553 3554 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3555 cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec); 3556 cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec); 3557 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID); 3558 3559 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3560 "send 11d scan start vdev id %d period %d ms internal %d ms\n", 3561 arg->vdev_id, arg->scan_period_msec, 3562 arg->start_interval_msec); 3563 3564 if (ret) { 3565 ath12k_warn(ar->ab, 3566 "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret); 3567 dev_kfree_skb(skb); 3568 } 3569 3570 return ret; 3571 } 3572 3573 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id) 3574 { 3575 struct ath12k_wmi_pdev *wmi = ar->wmi; 3576 struct wmi_11d_scan_stop_cmd *cmd; 3577 struct sk_buff *skb; 3578 int ret; 3579 3580 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3581 if (!skb) 3582 return -ENOMEM; 3583 3584 cmd = (struct wmi_11d_scan_stop_cmd *)skb->data; 3585 cmd->tlv_header = 3586 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD, 3587 sizeof(*cmd)); 3588 3589 cmd->vdev_id = cpu_to_le32(vdev_id); 3590 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID); 3591 3592 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3593 "send 11d scan stop vdev id %d\n", 3594 cmd->vdev_id); 3595 3596 if (ret) { 3597 ath12k_warn(ar->ab, 3598 "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret); 3599 dev_kfree_skb(skb); 3600 } 3601 3602 return ret; 3603 } 3604 3605 int 3606 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 3607 { 3608 struct ath12k_wmi_pdev *wmi = ar->wmi; 3609 struct ath12k_base *ab = wmi->wmi_ab->ab; 3610 struct wmi_twt_enable_params_cmd *cmd; 3611 struct sk_buff *skb; 3612 int ret, len; 3613 3614 len = sizeof(*cmd); 3615 3616 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3617 if (!skb) 3618 return -ENOMEM; 3619 3620 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 3621 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 3622 len); 3623 cmd->pdev_id = cpu_to_le32(pdev_id); 3624 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 3625 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 3626 cmd->congestion_thresh_setup = 3627 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 3628 cmd->congestion_thresh_teardown = 3629 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 3630 cmd->congestion_thresh_critical = 3631 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 3632 cmd->interference_thresh_teardown = 3633 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 3634 cmd->interference_thresh_setup = 3635 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 3636 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 3637 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 3638 cmd->no_of_bcast_mcast_slots = 3639 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 3640 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 3641 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 3642 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 3643 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 3644 cmd->remove_sta_slot_interval = 3645 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 3646 /* TODO add MBSSID support */ 3647 cmd->mbss_support = 0; 3648 3649 ret = ath12k_wmi_cmd_send(wmi, skb, 3650 WMI_TWT_ENABLE_CMDID); 3651 if (ret) { 3652 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 3653 dev_kfree_skb(skb); 3654 } 3655 return ret; 3656 } 3657 3658 int 3659 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 3660 { 3661 struct ath12k_wmi_pdev *wmi = ar->wmi; 3662 struct ath12k_base *ab = wmi->wmi_ab->ab; 3663 struct wmi_twt_disable_params_cmd *cmd; 3664 struct sk_buff *skb; 3665 int ret, len; 3666 3667 len = sizeof(*cmd); 3668 3669 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3670 if (!skb) 3671 return -ENOMEM; 3672 3673 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 3674 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 3675 len); 3676 cmd->pdev_id = cpu_to_le32(pdev_id); 3677 3678 ret = ath12k_wmi_cmd_send(wmi, skb, 3679 WMI_TWT_DISABLE_CMDID); 3680 if (ret) { 3681 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 3682 dev_kfree_skb(skb); 3683 } 3684 return ret; 3685 } 3686 3687 int 3688 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 3689 struct ieee80211_he_obss_pd *he_obss_pd) 3690 { 3691 struct ath12k_wmi_pdev *wmi = ar->wmi; 3692 struct ath12k_base *ab = wmi->wmi_ab->ab; 3693 struct wmi_obss_spatial_reuse_params_cmd *cmd; 3694 struct sk_buff *skb; 3695 int ret, len; 3696 3697 len = sizeof(*cmd); 3698 3699 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3700 if (!skb) 3701 return -ENOMEM; 3702 3703 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 3704 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 3705 len); 3706 cmd->vdev_id = cpu_to_le32(vdev_id); 3707 cmd->enable = cpu_to_le32(he_obss_pd->enable); 3708 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 3709 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 3710 3711 ret = ath12k_wmi_cmd_send(wmi, skb, 3712 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 3713 if (ret) { 3714 ath12k_warn(ab, 3715 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 3716 dev_kfree_skb(skb); 3717 } 3718 return ret; 3719 } 3720 3721 u32 ath12k_wmi_build_obss_pd(const struct ath12k_wmi_obss_pd_arg *arg) 3722 { 3723 u32 param_val = 0; 3724 3725 param_val |= u32_encode_bits((u8)arg->srg_th, GENMASK(15, 8)); 3726 param_val |= u32_encode_bits((u8)arg->non_srg_th, GENMASK(7, 0)); 3727 3728 if (arg->srp_support) 3729 param_val |= ATH12K_OBSS_PD_THRESHOLD_IN_DBM; 3730 3731 if (arg->srg_enabled && arg->srp_support) 3732 param_val |= ATH12K_OBSS_PD_SRG_EN; 3733 3734 if (arg->non_srg_enabled) 3735 param_val |= ATH12K_OBSS_PD_NON_SRG_EN; 3736 3737 return param_val; 3738 } 3739 3740 static int ath12k_wmi_pdev_set_obss_bitmap(struct ath12k *ar, 3741 const struct wmi_pdev_set_obss_bitmap_arg *arg) 3742 { 3743 struct wmi_pdev_obss_pd_bitmap_cmd *cmd; 3744 struct ath12k_wmi_pdev *wmi = ar->wmi; 3745 const int len = sizeof(*cmd); 3746 struct sk_buff *skb; 3747 int ret; 3748 3749 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3750 if (!skb) 3751 return -ENOMEM; 3752 3753 cmd = (struct wmi_pdev_obss_pd_bitmap_cmd *)skb->data; 3754 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(arg->tlv_tag, len); 3755 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 3756 memcpy(cmd->bitmap, arg->bitmap, sizeof(cmd->bitmap)); 3757 3758 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3759 "wmi set pdev %u %s %08x %08x\n", 3760 arg->pdev_id, arg->label, arg->bitmap[0], arg->bitmap[1]); 3761 3762 ret = ath12k_wmi_cmd_send(wmi, skb, arg->cmd_id); 3763 if (ret) { 3764 ath12k_warn(ar->ab, "failed to send %s: %d\n", arg->label, ret); 3765 dev_kfree_skb(skb); 3766 } 3767 3768 return ret; 3769 } 3770 3771 int ath12k_wmi_pdev_set_srg_bss_color_bitmap(struct ath12k *ar, 3772 u32 pdev_id, const u32 *bitmap) 3773 { 3774 struct wmi_pdev_set_obss_bitmap_arg arg = { 3775 .tlv_tag = WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD, 3776 .pdev_id = pdev_id, 3777 .cmd_id = WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID, 3778 .bitmap = bitmap, 3779 .label = "SRG bss color bitmap", 3780 }; 3781 3782 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg); 3783 } 3784 3785 int ath12k_wmi_pdev_set_srg_partial_bssid_bitmap(struct ath12k *ar, 3786 u32 pdev_id, const u32 *bitmap) 3787 { 3788 struct wmi_pdev_set_obss_bitmap_arg arg = { 3789 .tlv_tag = WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD, 3790 .pdev_id = pdev_id, 3791 .cmd_id = WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID, 3792 .bitmap = bitmap, 3793 .label = "SRG partial bssid bitmap", 3794 }; 3795 3796 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg); 3797 } 3798 3799 int ath12k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath12k *ar, 3800 u32 pdev_id, const u32 *bitmap) 3801 { 3802 struct wmi_pdev_set_obss_bitmap_arg arg = { 3803 .tlv_tag = WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 3804 .pdev_id = pdev_id, 3805 .cmd_id = WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 3806 .bitmap = bitmap, 3807 .label = "SRG obss color enable bitmap", 3808 }; 3809 3810 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg); 3811 } 3812 3813 int ath12k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath12k *ar, 3814 u32 pdev_id, const u32 *bitmap) 3815 { 3816 struct wmi_pdev_set_obss_bitmap_arg arg = { 3817 .tlv_tag = WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 3818 .pdev_id = pdev_id, 3819 .cmd_id = WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 3820 .bitmap = bitmap, 3821 .label = "SRG obss bssid enable bitmap", 3822 }; 3823 3824 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg); 3825 } 3826 3827 int ath12k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath12k *ar, 3828 u32 pdev_id, const u32 *bitmap) 3829 { 3830 struct wmi_pdev_set_obss_bitmap_arg arg = { 3831 .tlv_tag = WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD, 3832 .pdev_id = pdev_id, 3833 .cmd_id = WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID, 3834 .bitmap = bitmap, 3835 .label = "non SRG obss color enable bitmap", 3836 }; 3837 3838 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg); 3839 } 3840 3841 int ath12k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath12k *ar, 3842 u32 pdev_id, const u32 *bitmap) 3843 { 3844 struct wmi_pdev_set_obss_bitmap_arg arg = { 3845 .tlv_tag = WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD, 3846 .pdev_id = pdev_id, 3847 .cmd_id = WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID, 3848 .bitmap = bitmap, 3849 .label = "non SRG obss bssid enable bitmap", 3850 }; 3851 3852 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg); 3853 } 3854 3855 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 3856 u8 bss_color, u32 period, 3857 bool enable) 3858 { 3859 struct ath12k_wmi_pdev *wmi = ar->wmi; 3860 struct ath12k_base *ab = wmi->wmi_ab->ab; 3861 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 3862 struct sk_buff *skb; 3863 int ret, len; 3864 3865 len = sizeof(*cmd); 3866 3867 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3868 if (!skb) 3869 return -ENOMEM; 3870 3871 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 3872 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 3873 len); 3874 cmd->vdev_id = cpu_to_le32(vdev_id); 3875 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 3876 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 3877 cmd->current_bss_color = cpu_to_le32(bss_color); 3878 cmd->detection_period_ms = cpu_to_le32(period); 3879 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 3880 cmd->free_slot_expiry_time_ms = 0; 3881 cmd->flags = 0; 3882 3883 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3884 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 3885 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 3886 cmd->detection_period_ms, cmd->scan_period_ms); 3887 3888 ret = ath12k_wmi_cmd_send(wmi, skb, 3889 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 3890 if (ret) { 3891 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 3892 dev_kfree_skb(skb); 3893 } 3894 return ret; 3895 } 3896 3897 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3898 bool enable) 3899 { 3900 struct ath12k_wmi_pdev *wmi = ar->wmi; 3901 struct ath12k_base *ab = wmi->wmi_ab->ab; 3902 struct wmi_bss_color_change_enable_params_cmd *cmd; 3903 struct sk_buff *skb; 3904 int ret, len; 3905 3906 len = sizeof(*cmd); 3907 3908 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3909 if (!skb) 3910 return -ENOMEM; 3911 3912 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3913 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3914 len); 3915 cmd->vdev_id = cpu_to_le32(vdev_id); 3916 cmd->enable = enable ? cpu_to_le32(1) : 0; 3917 3918 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3919 "wmi_send_bss_color_change_enable id %d enable %d\n", 3920 cmd->vdev_id, cmd->enable); 3921 3922 ret = ath12k_wmi_cmd_send(wmi, skb, 3923 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3924 if (ret) { 3925 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3926 dev_kfree_skb(skb); 3927 } 3928 return ret; 3929 } 3930 3931 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3932 struct sk_buff *tmpl) 3933 { 3934 struct wmi_tlv *tlv; 3935 struct sk_buff *skb; 3936 void *ptr; 3937 int ret, len; 3938 size_t aligned_len; 3939 struct wmi_fils_discovery_tmpl_cmd *cmd; 3940 3941 aligned_len = roundup(tmpl->len, 4); 3942 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3943 3944 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3945 "WMI vdev %i set FILS discovery template\n", vdev_id); 3946 3947 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3948 if (!skb) 3949 return -ENOMEM; 3950 3951 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3952 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3953 sizeof(*cmd)); 3954 cmd->vdev_id = cpu_to_le32(vdev_id); 3955 cmd->buf_len = cpu_to_le32(tmpl->len); 3956 ptr = skb->data + sizeof(*cmd); 3957 3958 tlv = ptr; 3959 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3960 memcpy(tlv->value, tmpl->data, tmpl->len); 3961 3962 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3963 if (ret) { 3964 ath12k_warn(ar->ab, 3965 "WMI vdev %i failed to send FILS discovery template command\n", 3966 vdev_id); 3967 dev_kfree_skb(skb); 3968 } 3969 return ret; 3970 } 3971 3972 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3973 struct sk_buff *tmpl) 3974 { 3975 struct wmi_probe_tmpl_cmd *cmd; 3976 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3977 struct wmi_tlv *tlv; 3978 struct sk_buff *skb; 3979 void *ptr; 3980 int ret, len; 3981 size_t aligned_len = roundup(tmpl->len, 4); 3982 3983 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3984 "WMI vdev %i set probe response template\n", vdev_id); 3985 3986 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3987 3988 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3989 if (!skb) 3990 return -ENOMEM; 3991 3992 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3993 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3994 sizeof(*cmd)); 3995 cmd->vdev_id = cpu_to_le32(vdev_id); 3996 cmd->buf_len = cpu_to_le32(tmpl->len); 3997 3998 ptr = skb->data + sizeof(*cmd); 3999 4000 probe_info = ptr; 4001 len = sizeof(*probe_info); 4002 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 4003 len); 4004 probe_info->caps = 0; 4005 probe_info->erp = 0; 4006 4007 ptr += sizeof(*probe_info); 4008 4009 tlv = ptr; 4010 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 4011 memcpy(tlv->value, tmpl->data, tmpl->len); 4012 4013 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 4014 if (ret) { 4015 ath12k_warn(ar->ab, 4016 "WMI vdev %i failed to send probe response template command\n", 4017 vdev_id); 4018 dev_kfree_skb(skb); 4019 } 4020 return ret; 4021 } 4022 4023 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 4024 bool unsol_bcast_probe_resp_enabled) 4025 { 4026 struct sk_buff *skb; 4027 int ret, len; 4028 struct wmi_fils_discovery_cmd *cmd; 4029 4030 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4031 "WMI vdev %i set %s interval to %u TU\n", 4032 vdev_id, unsol_bcast_probe_resp_enabled ? 4033 "unsolicited broadcast probe response" : "FILS discovery", 4034 interval); 4035 4036 len = sizeof(*cmd); 4037 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 4038 if (!skb) 4039 return -ENOMEM; 4040 4041 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 4042 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 4043 len); 4044 cmd->vdev_id = cpu_to_le32(vdev_id); 4045 cmd->interval = cpu_to_le32(interval); 4046 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 4047 4048 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 4049 if (ret) { 4050 ath12k_warn(ar->ab, 4051 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 4052 vdev_id); 4053 dev_kfree_skb(skb); 4054 } 4055 return ret; 4056 } 4057 4058 static void 4059 ath12k_wmi_obss_color_collision_event(struct ath12k_base *ab, struct sk_buff *skb) 4060 { 4061 const struct wmi_obss_color_collision_event *ev; 4062 struct ath12k_link_vif *arvif; 4063 u32 vdev_id, evt_type; 4064 const void **tb; 4065 u64 bitmap; 4066 4067 tb = ath12k_wmi_tlv_parse(ab, skb); 4068 if (IS_ERR(tb)) { 4069 ath12k_warn(ab, "failed to parse OBSS color collision tlv %ld\n", 4070 PTR_ERR(tb)); 4071 return; 4072 } 4073 4074 ev = tb[WMI_TAG_OBSS_COLOR_COLLISION_EVT]; 4075 if (!ev) { 4076 ath12k_warn(ab, "failed to fetch OBSS color collision event\n"); 4077 return; 4078 } 4079 4080 vdev_id = le32_to_cpu(ev->vdev_id); 4081 evt_type = le32_to_cpu(ev->evt_type); 4082 bitmap = le64_to_cpu(ev->obss_color_bitmap); 4083 4084 guard(rcu)(); 4085 4086 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id); 4087 if (!arvif) { 4088 ath12k_warn(ab, "no arvif found for vdev %u in OBSS color collision event\n", 4089 vdev_id); 4090 return; 4091 } 4092 4093 switch (evt_type) { 4094 case WMI_BSS_COLOR_COLLISION_DETECTION: 4095 ieee80211_obss_color_collision_notify(arvif->ahvif->vif, 4096 bitmap, 4097 arvif->link_id); 4098 ath12k_dbg(ab, ATH12K_DBG_WMI, 4099 "obss color collision detected vdev %u event %d bitmap %016llx\n", 4100 vdev_id, evt_type, bitmap); 4101 break; 4102 case WMI_BSS_COLOR_COLLISION_DISABLE: 4103 case WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY: 4104 case WMI_BSS_COLOR_FREE_SLOT_AVAILABLE: 4105 break; 4106 default: 4107 ath12k_warn(ab, "unknown OBSS color collision event type %d\n", evt_type); 4108 } 4109 } 4110 4111 static void 4112 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 4113 struct ath12k_wmi_pdev_band_arg *arg) 4114 { 4115 u8 i; 4116 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 4117 struct ath12k_pdev *pdev; 4118 4119 for (i = 0; i < soc->num_radios; i++) { 4120 pdev = &soc->pdevs[i]; 4121 hal_reg_cap = &soc->hal_reg_cap[i]; 4122 arg[i].pdev_id = pdev->pdev_id; 4123 4124 switch (pdev->cap.supported_bands) { 4125 case WMI_HOST_WLAN_2GHZ_5GHZ_CAP: 4126 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 4127 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 4128 break; 4129 case WMI_HOST_WLAN_2GHZ_CAP: 4130 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 4131 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 4132 break; 4133 case WMI_HOST_WLAN_5GHZ_CAP: 4134 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 4135 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 4136 break; 4137 default: 4138 break; 4139 } 4140 } 4141 } 4142 4143 static void 4144 ath12k_wmi_copy_resource_config(struct ath12k_base *ab, 4145 struct ath12k_wmi_resource_config_params *wmi_cfg, 4146 struct ath12k_wmi_resource_config_arg *tg_cfg) 4147 { 4148 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 4149 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 4150 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 4151 wmi_cfg->num_offload_reorder_buffs = 4152 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 4153 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 4154 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 4155 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 4156 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 4157 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 4158 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 4159 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 4160 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 4161 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 4162 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 4163 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 4164 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 4165 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 4166 wmi_cfg->roam_offload_max_ap_profiles = 4167 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 4168 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 4169 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 4170 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 4171 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 4172 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 4173 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 4174 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 4175 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 4176 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 4177 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 4178 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 4179 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 4180 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 4181 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 4182 wmi_cfg->num_tdls_conn_table_entries = 4183 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 4184 wmi_cfg->beacon_tx_offload_max_vdev = 4185 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 4186 wmi_cfg->num_multicast_filter_entries = 4187 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 4188 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 4189 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 4190 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 4191 wmi_cfg->max_tdls_concurrent_sleep_sta = 4192 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 4193 wmi_cfg->max_tdls_concurrent_buffer_sta = 4194 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 4195 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 4196 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 4197 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 4198 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 4199 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 4200 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 4201 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 4202 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config | 4203 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 | 4204 WMI_RSRC_CFG_FLAG1_ACK_RSSI); 4205 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 4206 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 4207 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 4208 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 4209 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver, 4210 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION); 4211 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 4212 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 4213 if (ab->hw_params->reoq_lut_support) 4214 wmi_cfg->host_service_flags |= 4215 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT); 4216 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt); 4217 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period); 4218 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET | 4219 WMI_RSRC_CFG_FLAGS2_FW_AST_INDICATION_DISABLE); 4220 4221 if (tg_cfg->is_wds_null_frame_supported) 4222 wmi_cfg->flags2 |= 4223 cpu_to_le32(WMI_RSRC_CFG_FLAGS2_WDS_NULL_FRAME_SUPPORT); 4224 } 4225 4226 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 4227 struct ath12k_wmi_init_cmd_arg *arg) 4228 { 4229 struct ath12k_base *ab = wmi->wmi_ab->ab; 4230 struct sk_buff *skb; 4231 struct wmi_init_cmd *cmd; 4232 struct ath12k_wmi_resource_config_params *cfg; 4233 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 4234 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 4235 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 4236 struct wmi_tlv *tlv; 4237 size_t ret, len; 4238 void *ptr; 4239 u32 hw_mode_len = 0; 4240 u16 idx; 4241 4242 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 4243 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 4244 (arg->num_band_to_mac * sizeof(*band_to_mac)); 4245 4246 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 4247 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 4248 4249 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 4250 if (!skb) 4251 return -ENOMEM; 4252 4253 cmd = (struct wmi_init_cmd *)skb->data; 4254 4255 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 4256 sizeof(*cmd)); 4257 4258 ptr = skb->data + sizeof(*cmd); 4259 cfg = ptr; 4260 4261 ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg); 4262 4263 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 4264 sizeof(*cfg)); 4265 4266 ptr += sizeof(*cfg); 4267 host_mem_chunks = ptr + TLV_HDR_SIZE; 4268 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 4269 4270 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 4271 host_mem_chunks[idx].tlv_header = 4272 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 4273 len); 4274 4275 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 4276 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 4277 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 4278 4279 ath12k_dbg(ab, ATH12K_DBG_WMI, 4280 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 4281 arg->mem_chunks[idx].req_id, 4282 (u64)arg->mem_chunks[idx].paddr, 4283 arg->mem_chunks[idx].len); 4284 } 4285 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 4286 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 4287 4288 /* num_mem_chunks is zero */ 4289 tlv = ptr; 4290 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 4291 ptr += TLV_HDR_SIZE + len; 4292 4293 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 4294 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 4295 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 4296 sizeof(*hw_mode)); 4297 4298 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 4299 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 4300 4301 ptr += sizeof(*hw_mode); 4302 4303 len = arg->num_band_to_mac * sizeof(*band_to_mac); 4304 tlv = ptr; 4305 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 4306 4307 ptr += TLV_HDR_SIZE; 4308 len = sizeof(*band_to_mac); 4309 4310 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 4311 band_to_mac = (void *)ptr; 4312 4313 band_to_mac->tlv_header = 4314 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 4315 len); 4316 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 4317 band_to_mac->start_freq = 4318 cpu_to_le32(arg->band_to_mac[idx].start_freq); 4319 band_to_mac->end_freq = 4320 cpu_to_le32(arg->band_to_mac[idx].end_freq); 4321 ptr += sizeof(*band_to_mac); 4322 } 4323 } 4324 4325 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 4326 if (ret) { 4327 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 4328 dev_kfree_skb(skb); 4329 } 4330 4331 return ret; 4332 } 4333 4334 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 4335 int pdev_id) 4336 { 4337 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 4338 struct sk_buff *skb; 4339 int ret; 4340 4341 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4342 if (!skb) 4343 return -ENOMEM; 4344 4345 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 4346 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 4347 sizeof(*cmd)); 4348 4349 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 4350 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 4351 4352 cmd->pdev_id = cpu_to_le32(pdev_id); 4353 4354 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4355 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 4356 4357 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 4358 if (ret) { 4359 ath12k_warn(ar->ab, 4360 "failed to send lro cfg req wmi cmd\n"); 4361 dev_kfree_skb(skb); 4362 } 4363 4364 return ret; 4365 } 4366 4367 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 4368 { 4369 unsigned long time_left; 4370 4371 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 4372 WMI_SERVICE_READY_TIMEOUT_HZ); 4373 if (!time_left) 4374 return -ETIMEDOUT; 4375 4376 return 0; 4377 } 4378 4379 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 4380 { 4381 unsigned long time_left; 4382 4383 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 4384 WMI_SERVICE_READY_TIMEOUT_HZ); 4385 if (!time_left) 4386 return -ETIMEDOUT; 4387 4388 return 0; 4389 } 4390 4391 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 4392 enum wmi_host_hw_mode_config_type mode) 4393 { 4394 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 4395 struct sk_buff *skb; 4396 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 4397 int len; 4398 int ret; 4399 4400 len = sizeof(*cmd); 4401 4402 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 4403 if (!skb) 4404 return -ENOMEM; 4405 4406 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 4407 4408 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 4409 sizeof(*cmd)); 4410 4411 cmd->pdev_id = WMI_PDEV_ID_SOC; 4412 cmd->hw_mode_index = cpu_to_le32(mode); 4413 4414 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 4415 if (ret) { 4416 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 4417 dev_kfree_skb(skb); 4418 } 4419 4420 return ret; 4421 } 4422 4423 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 4424 { 4425 struct ath12k_dp *dp = ath12k_ab_to_dp(ab); 4426 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 4427 struct ath12k_wmi_init_cmd_arg arg = {}; 4428 4429 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 4430 ab->wmi_ab.svc_map)) 4431 arg.res_cfg.is_reg_cc_ext_event_supported = true; 4432 4433 if (test_bit(WMI_TLV_SERVICE_WDS_NULL_FRAME_SUPPORT, ab->wmi_ab.svc_map)) 4434 arg.res_cfg.is_wds_null_frame_supported = true; 4435 4436 ab->hw_params->wmi_init(ab, &arg.res_cfg); 4437 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode; 4438 4439 arg.num_mem_chunks = wmi_ab->num_mem_chunks; 4440 arg.hw_mode_id = wmi_ab->preferred_hw_mode; 4441 arg.mem_chunks = wmi_ab->mem_chunks; 4442 4443 if (ab->hw_params->single_pdev_only) 4444 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 4445 4446 arg.num_band_to_mac = ab->num_radios; 4447 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 4448 4449 dp->peer_metadata_ver = arg.res_cfg.peer_metadata_ver; 4450 4451 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg); 4452 } 4453 4454 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 4455 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 4456 { 4457 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 4458 struct sk_buff *skb; 4459 int ret; 4460 4461 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4462 if (!skb) 4463 return -ENOMEM; 4464 4465 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 4466 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 4467 sizeof(*cmd)); 4468 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 4469 cmd->scan_count = cpu_to_le32(arg->scan_count); 4470 cmd->scan_period = cpu_to_le32(arg->scan_period); 4471 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 4472 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 4473 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 4474 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 4475 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 4476 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 4477 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 4478 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 4479 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 4480 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 4481 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 4482 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 4483 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 4484 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 4485 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 4486 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 4487 4488 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4489 "WMI spectral scan config cmd vdev_id 0x%x\n", 4490 arg->vdev_id); 4491 4492 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4493 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 4494 if (ret) { 4495 ath12k_warn(ar->ab, 4496 "failed to send spectral scan config wmi cmd\n"); 4497 dev_kfree_skb(skb); 4498 } 4499 4500 return ret; 4501 } 4502 4503 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 4504 u32 trigger, u32 enable) 4505 { 4506 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 4507 struct sk_buff *skb; 4508 int ret; 4509 4510 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4511 if (!skb) 4512 return -ENOMEM; 4513 4514 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 4515 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 4516 sizeof(*cmd)); 4517 4518 cmd->vdev_id = cpu_to_le32(vdev_id); 4519 cmd->trigger_cmd = cpu_to_le32(trigger); 4520 cmd->enable_cmd = cpu_to_le32(enable); 4521 4522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4523 "WMI spectral enable cmd vdev id 0x%x\n", 4524 vdev_id); 4525 4526 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4527 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 4528 if (ret) { 4529 ath12k_warn(ar->ab, 4530 "failed to send spectral enable wmi cmd\n"); 4531 dev_kfree_skb(skb); 4532 } 4533 4534 return ret; 4535 } 4536 4537 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 4538 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 4539 { 4540 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 4541 struct sk_buff *skb; 4542 int ret; 4543 4544 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4545 if (!skb) 4546 return -ENOMEM; 4547 4548 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 4549 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 4550 sizeof(*cmd)); 4551 4552 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 4553 cmd->module_id = cpu_to_le32(arg->module_id); 4554 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 4555 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 4556 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 4557 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 4558 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 4559 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 4560 cmd->num_elems = cpu_to_le32(arg->num_elems); 4561 cmd->buf_size = cpu_to_le32(arg->buf_size); 4562 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 4563 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 4564 4565 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4566 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 4567 arg->pdev_id); 4568 4569 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4570 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 4571 if (ret) { 4572 ath12k_warn(ar->ab, 4573 "failed to send dma ring cfg req wmi cmd\n"); 4574 dev_kfree_skb(skb); 4575 } 4576 4577 return ret; 4578 } 4579 4580 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 4581 u16 tag, u16 len, 4582 const void *ptr, void *data) 4583 { 4584 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4585 4586 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 4587 return -EPROTO; 4588 4589 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 4590 return -ENOBUFS; 4591 4592 arg->num_buf_entry++; 4593 return 0; 4594 } 4595 4596 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 4597 u16 tag, u16 len, 4598 const void *ptr, void *data) 4599 { 4600 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4601 4602 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 4603 return -EPROTO; 4604 4605 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 4606 return -ENOBUFS; 4607 4608 arg->num_meta++; 4609 4610 return 0; 4611 } 4612 4613 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 4614 u16 tag, u16 len, 4615 const void *ptr, void *data) 4616 { 4617 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4618 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 4619 u32 pdev_id; 4620 int ret; 4621 4622 switch (tag) { 4623 case WMI_TAG_DMA_BUF_RELEASE: 4624 fixed = ptr; 4625 arg->fixed = *fixed; 4626 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 4627 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 4628 break; 4629 case WMI_TAG_ARRAY_STRUCT: 4630 if (!arg->buf_entry_done) { 4631 arg->num_buf_entry = 0; 4632 arg->buf_entry = ptr; 4633 4634 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4635 ath12k_wmi_dma_buf_entry_parse, 4636 arg); 4637 if (ret) { 4638 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 4639 ret); 4640 return ret; 4641 } 4642 4643 arg->buf_entry_done = true; 4644 } else if (!arg->meta_data_done) { 4645 arg->num_meta = 0; 4646 arg->meta_data = ptr; 4647 4648 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4649 ath12k_wmi_dma_buf_meta_parse, 4650 arg); 4651 if (ret) { 4652 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 4653 ret); 4654 return ret; 4655 } 4656 4657 arg->meta_data_done = true; 4658 } 4659 break; 4660 default: 4661 break; 4662 } 4663 return 0; 4664 } 4665 4666 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 4667 struct sk_buff *skb) 4668 { 4669 struct ath12k_wmi_dma_buf_release_arg arg = {}; 4670 struct ath12k_dbring_buf_release_event param; 4671 int ret; 4672 4673 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4674 ath12k_wmi_dma_buf_parse, 4675 &arg); 4676 if (ret) { 4677 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 4678 return; 4679 } 4680 4681 param.fixed = arg.fixed; 4682 param.buf_entry = arg.buf_entry; 4683 param.num_buf_entry = arg.num_buf_entry; 4684 param.meta_data = arg.meta_data; 4685 param.num_meta = arg.num_meta; 4686 4687 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 4688 if (ret) { 4689 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 4690 return; 4691 } 4692 } 4693 4694 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 4695 u16 tag, u16 len, 4696 const void *ptr, void *data) 4697 { 4698 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4699 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 4700 u32 phy_map = 0; 4701 4702 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 4703 return -EPROTO; 4704 4705 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 4706 return -ENOBUFS; 4707 4708 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 4709 hw_mode_id); 4710 svc_rdy_ext->n_hw_mode_caps++; 4711 4712 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 4713 svc_rdy_ext->tot_phy_id += fls(phy_map); 4714 4715 return 0; 4716 } 4717 4718 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 4719 u16 len, const void *ptr, void *data) 4720 { 4721 struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info; 4722 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4723 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 4724 enum wmi_host_hw_mode_config_type mode, pref; 4725 u32 i; 4726 int ret; 4727 4728 svc_rdy_ext->n_hw_mode_caps = 0; 4729 svc_rdy_ext->hw_mode_caps = ptr; 4730 4731 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4732 ath12k_wmi_hw_mode_caps_parse, 4733 svc_rdy_ext); 4734 if (ret) { 4735 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4736 return ret; 4737 } 4738 4739 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 4740 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 4741 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 4742 4743 if (mode >= WMI_HOST_HW_MODE_MAX) 4744 continue; 4745 4746 pref = soc->wmi_ab.preferred_hw_mode; 4747 4748 if (ath12k_hw_mode_pri_map[mode] <= ath12k_hw_mode_pri_map[pref]) { 4749 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 4750 soc->wmi_ab.preferred_hw_mode = mode; 4751 } 4752 } 4753 4754 svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps; 4755 4756 ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n", 4757 svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode); 4758 4759 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 4760 return -EINVAL; 4761 4762 return 0; 4763 } 4764 4765 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 4766 u16 tag, u16 len, 4767 const void *ptr, void *data) 4768 { 4769 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4770 4771 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 4772 return -EPROTO; 4773 4774 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 4775 return -ENOBUFS; 4776 4777 if (!svc_rdy_ext->n_mac_phy_caps) { 4778 svc_rdy_ext->mac_phy_caps = 4779 kzalloc_objs(*svc_rdy_ext->mac_phy_caps, 4780 svc_rdy_ext->tot_phy_id, 4781 GFP_ATOMIC); 4782 if (!svc_rdy_ext->mac_phy_caps) 4783 return -ENOMEM; 4784 } 4785 4786 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 4787 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 4788 svc_rdy_ext->n_mac_phy_caps++; 4789 return 0; 4790 } 4791 4792 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 4793 u16 tag, u16 len, 4794 const void *ptr, void *data) 4795 { 4796 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4797 4798 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 4799 return -EPROTO; 4800 4801 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 4802 return -ENOBUFS; 4803 4804 svc_rdy_ext->n_ext_hal_reg_caps++; 4805 return 0; 4806 } 4807 4808 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 4809 u16 len, const void *ptr, void *data) 4810 { 4811 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4812 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4813 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 4814 int ret; 4815 u32 i; 4816 4817 svc_rdy_ext->n_ext_hal_reg_caps = 0; 4818 svc_rdy_ext->ext_hal_reg_caps = ptr; 4819 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4820 ath12k_wmi_ext_hal_reg_caps_parse, 4821 svc_rdy_ext); 4822 if (ret) { 4823 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4824 return ret; 4825 } 4826 4827 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 4828 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 4829 svc_rdy_ext->soc_hal_reg_caps, 4830 svc_rdy_ext->ext_hal_reg_caps, i, 4831 ®_cap); 4832 if (ret) { 4833 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 4834 return ret; 4835 } 4836 4837 if (reg_cap.phy_id >= MAX_RADIOS) { 4838 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id); 4839 return -EINVAL; 4840 } 4841 4842 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 4843 } 4844 return 0; 4845 } 4846 4847 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 4848 u16 len, const void *ptr, 4849 void *data) 4850 { 4851 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4852 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4853 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 4854 u32 phy_id_map; 4855 int pdev_index = 0; 4856 int ret; 4857 4858 svc_rdy_ext->soc_hal_reg_caps = ptr; 4859 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 4860 4861 soc->num_radios = 0; 4862 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 4863 soc->fw_pdev_count = 0; 4864 4865 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 4866 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 4867 svc_rdy_ext, 4868 hw_mode_id, soc->num_radios, 4869 &soc->pdevs[pdev_index]); 4870 if (ret) { 4871 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 4872 soc->num_radios); 4873 return ret; 4874 } 4875 4876 soc->num_radios++; 4877 4878 /* For single_pdev_only targets, 4879 * save mac_phy capability in the same pdev 4880 */ 4881 if (soc->hw_params->single_pdev_only) 4882 pdev_index = 0; 4883 else 4884 pdev_index = soc->num_radios; 4885 4886 /* TODO: mac_phy_cap prints */ 4887 phy_id_map >>= 1; 4888 } 4889 4890 if (soc->hw_params->single_pdev_only) { 4891 soc->num_radios = 1; 4892 soc->pdevs[0].pdev_id = 0; 4893 } 4894 4895 return 0; 4896 } 4897 4898 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 4899 u16 tag, u16 len, 4900 const void *ptr, void *data) 4901 { 4902 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 4903 4904 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 4905 return -EPROTO; 4906 4907 parse->n_dma_ring_caps++; 4908 return 0; 4909 } 4910 4911 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 4912 u32 num_cap) 4913 { 4914 size_t sz; 4915 void *ptr; 4916 4917 sz = num_cap * sizeof(struct ath12k_dbring_cap); 4918 ptr = kzalloc(sz, GFP_ATOMIC); 4919 if (!ptr) 4920 return -ENOMEM; 4921 4922 ab->db_caps = ptr; 4923 ab->num_db_cap = num_cap; 4924 4925 return 0; 4926 } 4927 4928 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 4929 { 4930 kfree(ab->db_caps); 4931 ab->db_caps = NULL; 4932 ab->num_db_cap = 0; 4933 } 4934 4935 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 4936 u16 len, const void *ptr, void *data) 4937 { 4938 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 4939 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 4940 struct ath12k_dbring_cap *dir_buff_caps; 4941 int ret; 4942 u32 i; 4943 4944 dma_caps_parse->n_dma_ring_caps = 0; 4945 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 4946 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4947 ath12k_wmi_dma_ring_caps_parse, 4948 dma_caps_parse); 4949 if (ret) { 4950 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 4951 return ret; 4952 } 4953 4954 if (!dma_caps_parse->n_dma_ring_caps) 4955 return 0; 4956 4957 if (ab->num_db_cap) { 4958 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 4959 return 0; 4960 } 4961 4962 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 4963 if (ret) 4964 return ret; 4965 4966 dir_buff_caps = ab->db_caps; 4967 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 4968 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 4969 ath12k_warn(ab, "Invalid module id %d\n", 4970 le32_to_cpu(dma_caps[i].module_id)); 4971 ret = -EINVAL; 4972 goto free_dir_buff; 4973 } 4974 4975 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4976 dir_buff_caps[i].pdev_id = 4977 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4978 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4979 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4980 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4981 } 4982 4983 return 0; 4984 4985 free_dir_buff: 4986 ath12k_wmi_free_dbring_caps(ab); 4987 return ret; 4988 } 4989 4990 static void 4991 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab, 4992 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap, 4993 struct ath12k_svc_ext_mac_phy_info *mac_phy_info) 4994 { 4995 mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id); 4996 mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands); 4997 mac_phy_info->hw_freq_range.low_2ghz_freq = 4998 __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq); 4999 mac_phy_info->hw_freq_range.high_2ghz_freq = 5000 __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq); 5001 mac_phy_info->hw_freq_range.low_5ghz_freq = 5002 __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq); 5003 mac_phy_info->hw_freq_range.high_5ghz_freq = 5004 __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq); 5005 } 5006 5007 static void 5008 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab, 5009 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext) 5010 { 5011 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info; 5012 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap; 5013 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 5014 struct ath12k_svc_ext_mac_phy_info *mac_phy_info; 5015 u32 hw_mode_id, phy_bit_map; 5016 u8 hw_idx; 5017 5018 mac_phy_info = &svc_ext_info->mac_phy_info[0]; 5019 mac_phy_cap = svc_rdy_ext->mac_phy_caps; 5020 5021 for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) { 5022 hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx]; 5023 hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id); 5024 phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map); 5025 5026 while (phy_bit_map) { 5027 ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info); 5028 mac_phy_info->hw_mode_config_type = 5029 le32_get_bits(hw_mode_cap->hw_mode_config_type, 5030 WMI_HW_MODE_CAP_CFG_TYPE); 5031 ath12k_dbg(ab, ATH12K_DBG_WMI, 5032 "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n", 5033 hw_idx, hw_mode_id, 5034 mac_phy_info->hw_mode_config_type, 5035 mac_phy_info->supported_bands, mac_phy_info->phy_id, 5036 mac_phy_info->hw_freq_range.low_2ghz_freq, 5037 mac_phy_info->hw_freq_range.high_2ghz_freq, 5038 mac_phy_info->hw_freq_range.low_5ghz_freq, 5039 mac_phy_info->hw_freq_range.high_5ghz_freq); 5040 5041 mac_phy_cap++; 5042 mac_phy_info++; 5043 5044 phy_bit_map >>= 1; 5045 } 5046 } 5047 } 5048 5049 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 5050 u16 tag, u16 len, 5051 const void *ptr, void *data) 5052 { 5053 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info; 5054 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 5055 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 5056 int ret; 5057 5058 switch (tag) { 5059 case WMI_TAG_SERVICE_READY_EXT_EVENT: 5060 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 5061 &svc_rdy_ext->arg); 5062 if (ret) { 5063 ath12k_warn(ab, "unable to extract ext params\n"); 5064 return ret; 5065 } 5066 break; 5067 5068 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 5069 svc_rdy_ext->hw_caps = ptr; 5070 svc_rdy_ext->arg.num_hw_modes = 5071 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 5072 break; 5073 5074 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 5075 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 5076 svc_rdy_ext); 5077 if (ret) 5078 return ret; 5079 break; 5080 5081 case WMI_TAG_ARRAY_STRUCT: 5082 if (!svc_rdy_ext->hw_mode_done) { 5083 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 5084 if (ret) 5085 return ret; 5086 5087 svc_rdy_ext->hw_mode_done = true; 5088 } else if (!svc_rdy_ext->mac_phy_done) { 5089 svc_rdy_ext->n_mac_phy_caps = 0; 5090 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 5091 ath12k_wmi_mac_phy_caps_parse, 5092 svc_rdy_ext); 5093 if (ret) { 5094 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5095 return ret; 5096 } 5097 5098 if (svc_rdy_ext->tot_phy_id > 5099 ARRAY_SIZE(svc_ext_info->mac_phy_info)) { 5100 ath12k_warn(ab, "too many PHY entries %u (max %zu)\n", 5101 svc_rdy_ext->tot_phy_id, 5102 ARRAY_SIZE(svc_ext_info->mac_phy_info)); 5103 return -EINVAL; 5104 } 5105 5106 if (svc_rdy_ext->n_mac_phy_caps < svc_rdy_ext->tot_phy_id) { 5107 ath12k_warn(ab, 5108 "not enough MAC/PHY caps %u, expected %u\n", 5109 svc_rdy_ext->n_mac_phy_caps, 5110 svc_rdy_ext->tot_phy_id); 5111 return -EINVAL; 5112 } 5113 5114 ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext); 5115 5116 svc_rdy_ext->mac_phy_done = true; 5117 } else if (!svc_rdy_ext->ext_hal_reg_done) { 5118 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 5119 if (ret) 5120 return ret; 5121 5122 svc_rdy_ext->ext_hal_reg_done = true; 5123 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 5124 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 5125 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 5126 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 5127 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 5128 svc_rdy_ext->oem_dma_ring_cap_done = true; 5129 } else if (!svc_rdy_ext->dma_ring_cap_done) { 5130 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 5131 &svc_rdy_ext->dma_caps_parse); 5132 if (ret) 5133 return ret; 5134 5135 svc_rdy_ext->dma_ring_cap_done = true; 5136 } 5137 break; 5138 5139 default: 5140 break; 5141 } 5142 return 0; 5143 } 5144 5145 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 5146 struct sk_buff *skb) 5147 { 5148 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 5149 int ret; 5150 5151 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5152 ath12k_wmi_svc_rdy_ext_parse, 5153 &svc_rdy_ext); 5154 if (ret) { 5155 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 5156 goto err; 5157 } 5158 5159 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 5160 complete(&ab->wmi_ab.service_ready); 5161 5162 kfree(svc_rdy_ext.mac_phy_caps); 5163 return 0; 5164 5165 err: 5166 kfree(svc_rdy_ext.mac_phy_caps); 5167 ath12k_wmi_free_dbring_caps(ab); 5168 return ret; 5169 } 5170 5171 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 5172 const void *ptr, 5173 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 5174 { 5175 const struct wmi_service_ready_ext2_event *ev = ptr; 5176 5177 if (!ev) 5178 return -EINVAL; 5179 5180 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 5181 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 5182 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 5183 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 5184 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 5185 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 5186 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 5187 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 5188 return 0; 5189 } 5190 5191 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 5192 const __le32 cap_mac_info[], 5193 const __le32 cap_phy_info[], 5194 const __le32 supp_mcs[], 5195 const struct ath12k_wmi_ppe_threshold_params *ppet, 5196 __le32 cap_info_internal) 5197 { 5198 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 5199 u8 *phy_cap = (u8 *)&cap_band->eht_cap_phy_info[0]; 5200 u32 support_320mhz; 5201 u8 i; 5202 5203 if (band == NL80211_BAND_6GHZ) 5204 support_320mhz = cap_band->eht_cap_phy_info[0] & 5205 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 5206 5207 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 5208 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 5209 5210 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 5211 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 5212 5213 if (band == NL80211_BAND_6GHZ) { 5214 cap_band->eht_cap_phy_info[0] |= support_320mhz; 5215 } else { 5216 /* 5217 * Firmware may report 6 GHz/320 MHz specific capabilities for 5218 * non-6 GHz bands, so explicitly clear them. 5219 */ 5220 phy_cap[0] &= ~IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 5221 phy_cap[1] &= ~IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK; 5222 phy_cap[2] &= ~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK; 5223 phy_cap[3] &= ~IEEE80211_EHT_PHY_CAP3_SOUNDING_DIM_320MHZ_MASK; 5224 phy_cap[6] &= ~IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_320MHZ; 5225 phy_cap[6] &= ~IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP; 5226 phy_cap[7] &= ~IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ; 5227 phy_cap[7] &= ~IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ; 5228 } 5229 5230 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 5231 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 5232 if (band != NL80211_BAND_2GHZ) { 5233 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 5234 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 5235 } 5236 5237 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 5238 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 5239 for (i = 0; i < WMI_MAX_NUM_SS; i++) 5240 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 5241 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 5242 5243 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 5244 } 5245 5246 static int 5247 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 5248 const struct ath12k_wmi_caps_ext_params *caps, 5249 struct ath12k_pdev *pdev) 5250 { 5251 u32 bands; 5252 int i; 5253 5254 if (ab->hw_params->single_pdev_only) { 5255 for (i = 0; i < ab->fw_pdev_count; i++) { 5256 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 5257 5258 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) && 5259 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 5260 bands = fw_pdev->supported_bands; 5261 break; 5262 } 5263 } 5264 5265 if (i == ab->fw_pdev_count) 5266 return -EINVAL; 5267 } else { 5268 bands = pdev->cap.supported_bands; 5269 } 5270 5271 if (bands & WMI_HOST_WLAN_2GHZ_CAP) { 5272 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 5273 caps->eht_cap_mac_info_2ghz, 5274 caps->eht_cap_phy_info_2ghz, 5275 caps->eht_supp_mcs_ext_2ghz, 5276 &caps->eht_ppet_2ghz, 5277 caps->eht_cap_info_internal); 5278 } 5279 5280 if (bands & WMI_HOST_WLAN_5GHZ_CAP) { 5281 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 5282 caps->eht_cap_mac_info_5ghz, 5283 caps->eht_cap_phy_info_5ghz, 5284 caps->eht_supp_mcs_ext_5ghz, 5285 &caps->eht_ppet_5ghz, 5286 caps->eht_cap_info_internal); 5287 5288 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 5289 caps->eht_cap_mac_info_5ghz, 5290 caps->eht_cap_phy_info_5ghz, 5291 caps->eht_supp_mcs_ext_5ghz, 5292 &caps->eht_ppet_5ghz, 5293 caps->eht_cap_info_internal); 5294 } 5295 5296 pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability); 5297 pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability); 5298 5299 return 0; 5300 } 5301 5302 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 5303 u16 len, const void *ptr, 5304 void *data) 5305 { 5306 const struct ath12k_wmi_caps_ext_params *caps = ptr; 5307 struct ath12k_band_cap *cap_band; 5308 u32 support_320mhz; 5309 int i = 0, ret; 5310 5311 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 5312 return -EPROTO; 5313 5314 if (ab->hw_params->single_pdev_only) { 5315 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) { 5316 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) & 5317 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 5318 cap_band = &ab->pdevs[0].cap.band[NL80211_BAND_6GHZ]; 5319 cap_band->eht_cap_phy_info[0] |= support_320mhz; 5320 } 5321 5322 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id)) 5323 return 0; 5324 } else { 5325 for (i = 0; i < ab->num_radios; i++) { 5326 if (ab->pdevs[i].pdev_id == 5327 ath12k_wmi_caps_ext_get_pdev_id(caps)) 5328 break; 5329 } 5330 5331 if (i == ab->num_radios) 5332 return -EINVAL; 5333 } 5334 5335 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 5336 if (ret) { 5337 ath12k_warn(ab, 5338 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 5339 ret, ab->pdevs[i].pdev_id); 5340 return ret; 5341 } 5342 5343 return 0; 5344 } 5345 5346 static void 5347 ath12k_wmi_update_freq_info(struct ath12k_base *ab, 5348 struct ath12k_svc_ext_mac_phy_info *mac_cap, 5349 enum ath12k_hw_mode mode, 5350 u32 phy_id) 5351 { 5352 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5353 struct ath12k_hw_mode_freq_range_arg *mac_range; 5354 5355 mac_range = &hw_mode_info->freq_range_caps[mode][phy_id]; 5356 5357 if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 5358 mac_range->low_2ghz_freq = max_t(u32, 5359 mac_cap->hw_freq_range.low_2ghz_freq, 5360 ATH12K_MIN_2GHZ_FREQ); 5361 mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ? 5362 min_t(u32, 5363 mac_cap->hw_freq_range.high_2ghz_freq, 5364 ATH12K_MAX_2GHZ_FREQ) : 5365 ATH12K_MAX_2GHZ_FREQ; 5366 } 5367 5368 if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 5369 mac_range->low_5ghz_freq = max_t(u32, 5370 mac_cap->hw_freq_range.low_5ghz_freq, 5371 ATH12K_MIN_5GHZ_FREQ); 5372 mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ? 5373 min_t(u32, 5374 mac_cap->hw_freq_range.high_5ghz_freq, 5375 ATH12K_MAX_6GHZ_FREQ) : 5376 ATH12K_MAX_6GHZ_FREQ; 5377 } 5378 } 5379 5380 static bool 5381 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab, 5382 enum ath12k_hw_mode hwmode) 5383 { 5384 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5385 struct ath12k_hw_mode_freq_range_arg *mac_range; 5386 u8 phy_id; 5387 5388 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5389 mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id]; 5390 /* modify SBS/DBS range only when both phy for DBS are filled */ 5391 if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq) 5392 return false; 5393 } 5394 5395 return true; 5396 } 5397 5398 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab) 5399 { 5400 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5401 struct ath12k_hw_mode_freq_range_arg *mac_range; 5402 u8 phy_id; 5403 5404 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS]; 5405 /* Reset 5 GHz range for shared mac for DBS */ 5406 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5407 if (mac_range[phy_id].low_2ghz_freq && 5408 mac_range[phy_id].low_5ghz_freq) { 5409 mac_range[phy_id].low_5ghz_freq = 0; 5410 mac_range[phy_id].high_5ghz_freq = 0; 5411 } 5412 } 5413 } 5414 5415 static u32 5416 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range) 5417 { 5418 u32 highest_freq = 0; 5419 u8 phy_id; 5420 5421 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5422 if (range[phy_id].high_5ghz_freq > highest_freq) 5423 highest_freq = range[phy_id].high_5ghz_freq; 5424 } 5425 5426 return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ; 5427 } 5428 5429 static u32 5430 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range) 5431 { 5432 u32 lowest_freq = 0; 5433 u8 phy_id; 5434 5435 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5436 if ((!lowest_freq && range[phy_id].low_5ghz_freq) || 5437 range[phy_id].low_5ghz_freq < lowest_freq) 5438 lowest_freq = range[phy_id].low_5ghz_freq; 5439 } 5440 5441 return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ; 5442 } 5443 5444 static void 5445 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab, 5446 u16 sbs_range_sep, 5447 struct ath12k_hw_mode_freq_range_arg *ref_freq) 5448 { 5449 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5450 struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range; 5451 u8 phy_id; 5452 5453 upper_sbs_freq_range = 5454 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE]; 5455 5456 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5457 upper_sbs_freq_range[phy_id].low_2ghz_freq = 5458 ref_freq[phy_id].low_2ghz_freq; 5459 upper_sbs_freq_range[phy_id].high_2ghz_freq = 5460 ref_freq[phy_id].high_2ghz_freq; 5461 5462 /* update for shared mac */ 5463 if (upper_sbs_freq_range[phy_id].low_2ghz_freq) { 5464 upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10; 5465 upper_sbs_freq_range[phy_id].high_5ghz_freq = 5466 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq); 5467 } else { 5468 upper_sbs_freq_range[phy_id].low_5ghz_freq = 5469 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq); 5470 upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep; 5471 } 5472 } 5473 } 5474 5475 static void 5476 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab, 5477 u16 sbs_range_sep, 5478 struct ath12k_hw_mode_freq_range_arg *ref_freq) 5479 { 5480 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5481 struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range; 5482 u8 phy_id; 5483 5484 lower_sbs_freq_range = 5485 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE]; 5486 5487 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5488 lower_sbs_freq_range[phy_id].low_2ghz_freq = 5489 ref_freq[phy_id].low_2ghz_freq; 5490 lower_sbs_freq_range[phy_id].high_2ghz_freq = 5491 ref_freq[phy_id].high_2ghz_freq; 5492 5493 /* update for shared mac */ 5494 if (lower_sbs_freq_range[phy_id].low_2ghz_freq) { 5495 lower_sbs_freq_range[phy_id].low_5ghz_freq = 5496 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq); 5497 lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep; 5498 } else { 5499 lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10; 5500 lower_sbs_freq_range[phy_id].high_5ghz_freq = 5501 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq); 5502 } 5503 } 5504 } 5505 5506 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode) 5507 { 5508 static const char * const mode_str[] = { 5509 [ATH12K_HW_MODE_SMM] = "SMM", 5510 [ATH12K_HW_MODE_DBS] = "DBS", 5511 [ATH12K_HW_MODE_SBS] = "SBS", 5512 [ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE", 5513 [ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE", 5514 }; 5515 5516 if (hw_mode >= ARRAY_SIZE(mode_str)) 5517 return "Unknown"; 5518 5519 return mode_str[hw_mode]; 5520 } 5521 5522 static void 5523 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab, 5524 struct ath12k_hw_mode_freq_range_arg *freq_range, 5525 enum ath12k_hw_mode hw_mode) 5526 { 5527 u8 i; 5528 5529 for (i = 0; i < MAX_RADIOS; i++) 5530 if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq) 5531 ath12k_dbg(ab, ATH12K_DBG_WMI, 5532 "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]", 5533 ath12k_wmi_hw_mode_to_str(hw_mode), 5534 hw_mode, i, 5535 freq_range[i].low_2ghz_freq, 5536 freq_range[i].high_2ghz_freq, 5537 freq_range[i].low_5ghz_freq, 5538 freq_range[i].high_5ghz_freq); 5539 } 5540 5541 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab) 5542 { 5543 struct ath12k_hw_mode_freq_range_arg *freq_range; 5544 u8 i; 5545 5546 for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) { 5547 freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i]; 5548 ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i); 5549 } 5550 } 5551 5552 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id) 5553 { 5554 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5555 struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range; 5556 struct ath12k_hw_mode_freq_range_arg *non_shared_range; 5557 u8 shared_phy_id; 5558 5559 sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id]; 5560 5561 /* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id 5562 * keep the range as it is in SBS 5563 */ 5564 if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq) 5565 return 0; 5566 5567 if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) { 5568 ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz"); 5569 ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS); 5570 return -EINVAL; 5571 } 5572 5573 non_shared_range = sbs_mac_range; 5574 /* if SBS mac range has only 5 GHz then it's the non-shared phy, so 5575 * modify the range as per the shared mac. 5576 */ 5577 shared_phy_id = phy_id ? 0 : 1; 5578 shared_mac_range = 5579 &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id]; 5580 5581 if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) { 5582 ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared"); 5583 /* If the shared mac lower 5 GHz frequency is greater than 5584 * non-shared mac lower 5 GHz frequency then the shared mac has 5585 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high 5586 * freq should be less than the shared mac's low 5 GHz freq. 5587 */ 5588 if (non_shared_range->high_5ghz_freq >= 5589 shared_mac_range->low_5ghz_freq) 5590 non_shared_range->high_5ghz_freq = 5591 max_t(u32, shared_mac_range->low_5ghz_freq - 10, 5592 non_shared_range->low_5ghz_freq); 5593 } else if (shared_mac_range->high_5ghz_freq < 5594 non_shared_range->high_5ghz_freq) { 5595 ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared"); 5596 /* If the shared mac high 5 GHz frequency is less than 5597 * non-shared mac high 5 GHz frequency then the shared mac has 5598 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low 5599 * freq should be greater than the shared mac's high 5 GHz freq. 5600 */ 5601 if (shared_mac_range->high_5ghz_freq >= 5602 non_shared_range->low_5ghz_freq) 5603 non_shared_range->low_5ghz_freq = 5604 min_t(u32, shared_mac_range->high_5ghz_freq + 10, 5605 non_shared_range->high_5ghz_freq); 5606 } else { 5607 ath12k_warn(ab, "invalid SBS range with all 5 GHz shared"); 5608 return -EINVAL; 5609 } 5610 5611 return 0; 5612 } 5613 5614 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab) 5615 { 5616 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5617 struct ath12k_hw_mode_freq_range_arg *mac_range; 5618 u16 sbs_range_sep; 5619 u8 phy_id; 5620 int ret; 5621 5622 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS]; 5623 5624 /* If sbs_lower_band_end_freq has a value, then the frequency range 5625 * will be split using that value. 5626 */ 5627 sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq; 5628 if (sbs_range_sep) { 5629 ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep, 5630 mac_range); 5631 ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep, 5632 mac_range); 5633 /* Hardware specifies the range boundary with sbs_range_sep, 5634 * (i.e. the boundary between 5 GHz high and 5 GHz low), 5635 * reset the original one to make sure it will not get used. 5636 */ 5637 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS); 5638 return; 5639 } 5640 5641 /* If sbs_lower_band_end_freq is not set that means firmware will send one 5642 * shared mac range and one non-shared mac range. so update that freq. 5643 */ 5644 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5645 ret = ath12k_wmi_modify_sbs_freq(ab, phy_id); 5646 if (ret) { 5647 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS); 5648 break; 5649 } 5650 } 5651 } 5652 5653 static void 5654 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab, 5655 enum wmi_host_hw_mode_config_type hw_config_type, 5656 u32 phy_id, 5657 struct ath12k_svc_ext_mac_phy_info *mac_cap) 5658 { 5659 if (phy_id >= MAX_RADIOS) { 5660 ath12k_err(ab, "mac more than two not supported: %d", phy_id); 5661 return; 5662 } 5663 5664 ath12k_dbg(ab, ATH12K_DBG_WMI, 5665 "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]", 5666 hw_config_type, phy_id, mac_cap->supported_bands, 5667 ab->wmi_ab.sbs_lower_band_end_freq, 5668 mac_cap->hw_freq_range.low_2ghz_freq, 5669 mac_cap->hw_freq_range.high_2ghz_freq, 5670 mac_cap->hw_freq_range.low_5ghz_freq, 5671 mac_cap->hw_freq_range.high_5ghz_freq); 5672 5673 switch (hw_config_type) { 5674 case WMI_HOST_HW_MODE_SINGLE: 5675 if (phy_id) { 5676 ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported"); 5677 break; 5678 } 5679 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id); 5680 break; 5681 5682 case WMI_HOST_HW_MODE_DBS: 5683 if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS)) 5684 ath12k_wmi_update_freq_info(ab, mac_cap, 5685 ATH12K_HW_MODE_DBS, phy_id); 5686 break; 5687 case WMI_HOST_HW_MODE_DBS_SBS: 5688 case WMI_HOST_HW_MODE_DBS_OR_SBS: 5689 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id); 5690 if (ab->wmi_ab.sbs_lower_band_end_freq || 5691 mac_cap->hw_freq_range.low_5ghz_freq || 5692 mac_cap->hw_freq_range.low_2ghz_freq) 5693 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, 5694 phy_id); 5695 5696 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS)) 5697 ath12k_wmi_update_dbs_freq_info(ab); 5698 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS)) 5699 ath12k_wmi_update_sbs_freq_info(ab); 5700 break; 5701 case WMI_HOST_HW_MODE_SBS: 5702 case WMI_HOST_HW_MODE_SBS_PASSIVE: 5703 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id); 5704 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS)) 5705 ath12k_wmi_update_sbs_freq_info(ab); 5706 5707 break; 5708 default: 5709 break; 5710 } 5711 } 5712 5713 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab) 5714 { 5715 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) || 5716 (ab->wmi_ab.sbs_lower_band_end_freq && 5717 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) && 5718 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE))) 5719 return true; 5720 5721 return false; 5722 } 5723 5724 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab) 5725 { 5726 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info; 5727 struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info; 5728 enum wmi_host_hw_mode_config_type hw_config_type; 5729 struct ath12k_svc_ext_mac_phy_info *tmp; 5730 bool dbs_mode = false, sbs_mode = false; 5731 u32 i, j = 0; 5732 5733 if (!svc_ext_info->num_hw_modes) { 5734 ath12k_err(ab, "invalid number of hw modes"); 5735 return -EINVAL; 5736 } 5737 5738 ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d", 5739 svc_ext_info->num_hw_modes); 5740 5741 memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps)); 5742 5743 for (i = 0; i < svc_ext_info->num_hw_modes; i++) { 5744 if (j >= ATH12K_MAX_MAC_PHY_CAP) 5745 return -EINVAL; 5746 5747 /* Update for MAC0 */ 5748 tmp = &svc_ext_info->mac_phy_info[j++]; 5749 hw_config_type = tmp->hw_mode_config_type; 5750 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp); 5751 5752 /* SBS and DBS have dual MAC. Up to 2 MACs are considered. */ 5753 if (hw_config_type == WMI_HOST_HW_MODE_DBS || 5754 hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE || 5755 hw_config_type == WMI_HOST_HW_MODE_SBS || 5756 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) { 5757 if (j >= ATH12K_MAX_MAC_PHY_CAP) 5758 return -EINVAL; 5759 /* Update for MAC1 */ 5760 tmp = &svc_ext_info->mac_phy_info[j++]; 5761 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, 5762 tmp->phy_id, tmp); 5763 5764 if (hw_config_type == WMI_HOST_HW_MODE_DBS || 5765 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) 5766 dbs_mode = true; 5767 5768 if (ath12k_wmi_sbs_range_present(ab) && 5769 (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE || 5770 hw_config_type == WMI_HOST_HW_MODE_SBS || 5771 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)) 5772 sbs_mode = true; 5773 } 5774 } 5775 5776 info->support_dbs = dbs_mode; 5777 info->support_sbs = sbs_mode; 5778 5779 ath12k_wmi_dump_freq_range(ab); 5780 5781 return 0; 5782 } 5783 5784 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 5785 u16 tag, u16 len, 5786 const void *ptr, void *data) 5787 { 5788 const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps; 5789 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 5790 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 5791 int ret; 5792 5793 switch (tag) { 5794 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 5795 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 5796 &parse->arg); 5797 if (ret) { 5798 ath12k_warn(ab, 5799 "failed to extract wmi service ready ext2 parameters: %d\n", 5800 ret); 5801 return ret; 5802 } 5803 5804 ab->wmi_ab.dp_peer_meta_data_ver = 5805 u32_get_bits(parse->arg.target_cap_flags, 5806 WMI_TARGET_CAP_FLAGS_RX_PEER_METADATA_VERSION); 5807 break; 5808 5809 case WMI_TAG_ARRAY_STRUCT: 5810 if (!parse->dma_ring_cap_done) { 5811 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 5812 &parse->dma_caps_parse); 5813 if (ret) 5814 return ret; 5815 5816 parse->dma_ring_cap_done = true; 5817 } else if (!parse->spectral_bin_scaling_done) { 5818 /* TODO: This is a place-holder as WMI tag for 5819 * spectral scaling is before 5820 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 5821 */ 5822 parse->spectral_bin_scaling_done = true; 5823 } else if (!parse->mac_phy_caps_ext_done) { 5824 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 5825 ath12k_wmi_tlv_mac_phy_caps_ext, 5826 parse); 5827 if (ret) { 5828 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 5829 ret); 5830 return ret; 5831 } 5832 5833 parse->mac_phy_caps_ext_done = true; 5834 } else if (!parse->hal_reg_caps_ext2_done) { 5835 parse->hal_reg_caps_ext2_done = true; 5836 } else if (!parse->scan_radio_caps_ext2_done) { 5837 parse->scan_radio_caps_ext2_done = true; 5838 } else if (!parse->twt_caps_done) { 5839 parse->twt_caps_done = true; 5840 } else if (!parse->htt_msdu_idx_to_qtype_map_done) { 5841 parse->htt_msdu_idx_to_qtype_map_done = true; 5842 } else if (!parse->dbs_or_sbs_cap_ext_done) { 5843 dbs_or_sbs_caps = ptr; 5844 ab->wmi_ab.sbs_lower_band_end_freq = 5845 __le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq); 5846 5847 ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n", 5848 ab->wmi_ab.sbs_lower_band_end_freq); 5849 5850 ret = ath12k_wmi_update_hw_mode_list(ab); 5851 if (ret) { 5852 ath12k_warn(ab, "failed to update hw mode list: %d\n", 5853 ret); 5854 return ret; 5855 } 5856 5857 parse->dbs_or_sbs_cap_ext_done = true; 5858 } 5859 5860 break; 5861 default: 5862 break; 5863 } 5864 5865 return 0; 5866 } 5867 5868 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 5869 struct sk_buff *skb) 5870 { 5871 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 5872 int ret; 5873 5874 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5875 ath12k_wmi_svc_rdy_ext2_parse, 5876 &svc_rdy_ext2); 5877 if (ret) { 5878 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 5879 goto err; 5880 } 5881 5882 complete(&ab->wmi_ab.service_ready); 5883 5884 return 0; 5885 5886 err: 5887 ath12k_wmi_free_dbring_caps(ab); 5888 return ret; 5889 } 5890 5891 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 5892 struct wmi_vdev_start_resp_event *vdev_rsp) 5893 { 5894 const void **tb; 5895 const struct wmi_vdev_start_resp_event *ev; 5896 int ret; 5897 5898 tb = ath12k_wmi_tlv_parse(ab, skb); 5899 if (IS_ERR(tb)) { 5900 ret = PTR_ERR(tb); 5901 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5902 return ret; 5903 } 5904 5905 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 5906 if (!ev) { 5907 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 5908 return -EPROTO; 5909 } 5910 5911 *vdev_rsp = *ev; 5912 5913 return 0; 5914 } 5915 5916 static struct ath12k_reg_rule 5917 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 5918 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 5919 { 5920 struct ath12k_reg_rule *reg_rule_ptr; 5921 u32 count; 5922 5923 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 5924 GFP_ATOMIC); 5925 5926 if (!reg_rule_ptr) 5927 return NULL; 5928 5929 for (count = 0; count < num_reg_rules; count++) { 5930 reg_rule_ptr[count].start_freq = 5931 le32_get_bits(wmi_reg_rule[count].freq_info, 5932 REG_RULE_START_FREQ); 5933 reg_rule_ptr[count].end_freq = 5934 le32_get_bits(wmi_reg_rule[count].freq_info, 5935 REG_RULE_END_FREQ); 5936 reg_rule_ptr[count].max_bw = 5937 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5938 REG_RULE_MAX_BW); 5939 reg_rule_ptr[count].reg_power = 5940 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5941 REG_RULE_REG_PWR); 5942 reg_rule_ptr[count].ant_gain = 5943 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5944 REG_RULE_ANT_GAIN); 5945 reg_rule_ptr[count].flags = 5946 le32_get_bits(wmi_reg_rule[count].flag_info, 5947 REG_RULE_FLAGS); 5948 reg_rule_ptr[count].psd_flag = 5949 le32_get_bits(wmi_reg_rule[count].psd_power_info, 5950 REG_RULE_PSD_INFO); 5951 reg_rule_ptr[count].psd_eirp = 5952 le32_get_bits(wmi_reg_rule[count].psd_power_info, 5953 REG_RULE_PSD_EIRP); 5954 } 5955 5956 return reg_rule_ptr; 5957 } 5958 5959 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule, 5960 u32 num_reg_rules) 5961 { 5962 u8 num_invalid_5ghz_rules = 0; 5963 u32 count, start_freq; 5964 5965 for (count = 0; count < num_reg_rules; count++) { 5966 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ); 5967 5968 if (start_freq >= ATH12K_MIN_6GHZ_FREQ) 5969 num_invalid_5ghz_rules++; 5970 } 5971 5972 return num_invalid_5ghz_rules; 5973 } 5974 5975 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 5976 struct sk_buff *skb, 5977 struct ath12k_reg_info *reg_info) 5978 { 5979 const void **tb; 5980 const struct wmi_reg_chan_list_cc_ext_event *ev; 5981 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 5982 u32 num_2g_reg_rules, num_5g_reg_rules; 5983 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 5984 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 5985 u8 num_invalid_5ghz_ext_rules; 5986 u32 total_reg_rules = 0; 5987 int ret, i, j; 5988 5989 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 5990 5991 tb = ath12k_wmi_tlv_parse(ab, skb); 5992 if (IS_ERR(tb)) { 5993 ret = PTR_ERR(tb); 5994 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5995 return ret; 5996 } 5997 5998 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 5999 if (!ev) { 6000 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 6001 return -EPROTO; 6002 } 6003 6004 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 6005 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 6006 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 6007 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 6008 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 6009 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 6010 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 6011 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 6012 6013 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 6014 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 6015 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 6016 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 6017 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 6018 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 6019 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 6020 } 6021 6022 num_2g_reg_rules = reg_info->num_2g_reg_rules; 6023 total_reg_rules += num_2g_reg_rules; 6024 num_5g_reg_rules = reg_info->num_5g_reg_rules; 6025 total_reg_rules += num_5g_reg_rules; 6026 6027 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 6028 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 6029 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 6030 return -EINVAL; 6031 } 6032 6033 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 6034 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 6035 6036 if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) { 6037 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 6038 i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES); 6039 return -EINVAL; 6040 } 6041 6042 total_reg_rules += num_6g_reg_rules_ap[i]; 6043 } 6044 6045 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 6046 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 6047 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 6048 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 6049 6050 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 6051 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 6052 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 6053 6054 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 6055 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 6056 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 6057 6058 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES || 6059 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES || 6060 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) { 6061 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 6062 i); 6063 return -EINVAL; 6064 } 6065 } 6066 6067 if (!total_reg_rules) { 6068 ath12k_warn(ab, "No reg rules available\n"); 6069 return -EINVAL; 6070 } 6071 6072 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 6073 6074 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 6075 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 6076 reg_info->num_phy = le32_to_cpu(ev->num_phy); 6077 reg_info->phy_id = le32_to_cpu(ev->phy_id); 6078 reg_info->ctry_code = le32_to_cpu(ev->country_id); 6079 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 6080 6081 switch (le32_to_cpu(ev->status_code)) { 6082 case WMI_REG_SET_CC_STATUS_PASS: 6083 reg_info->status_code = REG_SET_CC_STATUS_PASS; 6084 break; 6085 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 6086 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 6087 break; 6088 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 6089 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 6090 break; 6091 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 6092 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 6093 break; 6094 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 6095 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 6096 break; 6097 case WMI_REG_SET_CC_STATUS_FAIL: 6098 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 6099 break; 6100 } 6101 6102 reg_info->is_ext_reg_event = true; 6103 6104 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 6105 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 6106 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 6107 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 6108 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 6109 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 6110 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 6111 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 6112 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 6113 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 6114 6115 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 6116 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 6117 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 6118 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 6119 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 6120 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 6121 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 6122 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 6123 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 6124 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 6125 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 6126 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 6127 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 6128 } 6129 6130 ath12k_dbg(ab, ATH12K_DBG_WMI, 6131 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x", 6132 __func__, reg_info->alpha2, reg_info->dfs_region, 6133 reg_info->min_bw_2g, reg_info->max_bw_2g, 6134 reg_info->min_bw_5g, reg_info->max_bw_5g, 6135 reg_info->phybitmap); 6136 6137 ath12k_dbg(ab, ATH12K_DBG_WMI, 6138 "num_2g_reg_rules %d num_5g_reg_rules %d", 6139 num_2g_reg_rules, num_5g_reg_rules); 6140 6141 ath12k_dbg(ab, ATH12K_DBG_WMI, 6142 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 6143 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 6144 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 6145 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 6146 6147 ath12k_dbg(ab, ATH12K_DBG_WMI, 6148 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 6149 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 6150 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 6151 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 6152 6153 ath12k_dbg(ab, ATH12K_DBG_WMI, 6154 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 6155 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 6156 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 6157 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 6158 6159 ext_wmi_reg_rule = 6160 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 6161 + sizeof(*ev) 6162 + sizeof(struct wmi_tlv)); 6163 6164 if (num_2g_reg_rules) { 6165 reg_info->reg_rules_2g_ptr = 6166 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 6167 ext_wmi_reg_rule); 6168 6169 if (!reg_info->reg_rules_2g_ptr) { 6170 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 6171 return -ENOMEM; 6172 } 6173 } 6174 6175 ext_wmi_reg_rule += num_2g_reg_rules; 6176 6177 /* Firmware might include 6 GHz reg rule in 5 GHz rule list 6178 * for few countries along with separate 6 GHz rule. 6179 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list 6180 * causes intersect check to be true, and same rules will be 6181 * shown multiple times in iw cmd. 6182 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list 6183 */ 6184 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule, 6185 num_5g_reg_rules); 6186 6187 if (num_invalid_5ghz_ext_rules) { 6188 ath12k_dbg(ab, ATH12K_DBG_WMI, 6189 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules", 6190 reg_info->alpha2, reg_info->num_5g_reg_rules, 6191 num_invalid_5ghz_ext_rules); 6192 6193 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules; 6194 reg_info->num_5g_reg_rules = num_5g_reg_rules; 6195 } 6196 6197 if (num_5g_reg_rules) { 6198 reg_info->reg_rules_5g_ptr = 6199 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 6200 ext_wmi_reg_rule); 6201 6202 if (!reg_info->reg_rules_5g_ptr) { 6203 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 6204 return -ENOMEM; 6205 } 6206 } 6207 6208 /* We have adjusted the number of 5 GHz reg rules above. But still those 6209 * many rules needs to be adjusted in ext_wmi_reg_rule. 6210 * 6211 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases. 6212 */ 6213 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules); 6214 6215 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 6216 reg_info->reg_rules_6g_ap_ptr[i] = 6217 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 6218 ext_wmi_reg_rule); 6219 6220 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 6221 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 6222 return -ENOMEM; 6223 } 6224 6225 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 6226 } 6227 6228 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 6229 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 6230 reg_info->reg_rules_6g_client_ptr[j][i] = 6231 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 6232 ext_wmi_reg_rule); 6233 6234 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 6235 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 6236 return -ENOMEM; 6237 } 6238 6239 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 6240 } 6241 } 6242 6243 reg_info->client_type = le32_to_cpu(ev->client_type); 6244 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 6245 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 6246 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 6247 le32_to_cpu(ev->domain_code_6g_ap_lpi); 6248 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 6249 le32_to_cpu(ev->domain_code_6g_ap_sp); 6250 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 6251 le32_to_cpu(ev->domain_code_6g_ap_vlp); 6252 6253 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 6254 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 6255 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 6256 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 6257 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 6258 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 6259 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 6260 } 6261 6262 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 6263 6264 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 6265 reg_info->client_type, reg_info->domain_code_6g_super_id); 6266 6267 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 6268 6269 return 0; 6270 } 6271 6272 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 6273 struct wmi_peer_delete_resp_event *peer_del_resp) 6274 { 6275 const void **tb; 6276 const struct wmi_peer_delete_resp_event *ev; 6277 int ret; 6278 6279 tb = ath12k_wmi_tlv_parse(ab, skb); 6280 if (IS_ERR(tb)) { 6281 ret = PTR_ERR(tb); 6282 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6283 return ret; 6284 } 6285 6286 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 6287 if (!ev) { 6288 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 6289 return -EPROTO; 6290 } 6291 6292 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 6293 6294 peer_del_resp->vdev_id = ev->vdev_id; 6295 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 6296 ev->peer_macaddr.addr); 6297 6298 return 0; 6299 } 6300 6301 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 6302 struct sk_buff *skb, 6303 u32 *vdev_id) 6304 { 6305 const void **tb; 6306 const struct wmi_vdev_delete_resp_event *ev; 6307 int ret; 6308 6309 tb = ath12k_wmi_tlv_parse(ab, skb); 6310 if (IS_ERR(tb)) { 6311 ret = PTR_ERR(tb); 6312 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6313 return ret; 6314 } 6315 6316 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 6317 if (!ev) { 6318 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 6319 return -EPROTO; 6320 } 6321 6322 *vdev_id = le32_to_cpu(ev->vdev_id); 6323 6324 return 0; 6325 } 6326 6327 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, 6328 struct sk_buff *skb, 6329 u32 *vdev_id, u32 *tx_status) 6330 { 6331 const void **tb; 6332 const struct wmi_bcn_tx_status_event *ev; 6333 int ret; 6334 6335 tb = ath12k_wmi_tlv_parse(ab, skb); 6336 if (IS_ERR(tb)) { 6337 ret = PTR_ERR(tb); 6338 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6339 return ret; 6340 } 6341 6342 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 6343 if (!ev) { 6344 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 6345 return -EPROTO; 6346 } 6347 6348 *vdev_id = le32_to_cpu(ev->vdev_id); 6349 *tx_status = le32_to_cpu(ev->tx_status); 6350 6351 return 0; 6352 } 6353 6354 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 6355 u32 *vdev_id) 6356 { 6357 const void **tb; 6358 const struct wmi_vdev_stopped_event *ev; 6359 int ret; 6360 6361 tb = ath12k_wmi_tlv_parse(ab, skb); 6362 if (IS_ERR(tb)) { 6363 ret = PTR_ERR(tb); 6364 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6365 return ret; 6366 } 6367 6368 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 6369 if (!ev) { 6370 ath12k_warn(ab, "failed to fetch vdev stop ev"); 6371 return -EPROTO; 6372 } 6373 6374 *vdev_id = le32_to_cpu(ev->vdev_id); 6375 6376 return 0; 6377 } 6378 6379 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 6380 u16 tag, u16 len, 6381 const void *ptr, void *data) 6382 { 6383 struct wmi_tlv_mgmt_rx_parse *parse = data; 6384 6385 switch (tag) { 6386 case WMI_TAG_MGMT_RX_HDR: 6387 parse->fixed = ptr; 6388 break; 6389 case WMI_TAG_ARRAY_BYTE: 6390 if (!parse->frame_buf_done) { 6391 parse->frame_buf = ptr; 6392 parse->frame_buf_done = true; 6393 } 6394 break; 6395 } 6396 return 0; 6397 } 6398 6399 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 6400 struct sk_buff *skb, 6401 struct ath12k_wmi_mgmt_rx_arg *hdr) 6402 { 6403 struct wmi_tlv_mgmt_rx_parse parse = { }; 6404 const struct ath12k_wmi_mgmt_rx_params *ev; 6405 const u8 *frame; 6406 int i, ret; 6407 6408 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6409 ath12k_wmi_tlv_mgmt_rx_parse, 6410 &parse); 6411 if (ret) { 6412 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 6413 return ret; 6414 } 6415 6416 ev = parse.fixed; 6417 frame = parse.frame_buf; 6418 6419 if (!ev || !frame) { 6420 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 6421 return -EPROTO; 6422 } 6423 6424 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 6425 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 6426 hdr->channel = le32_to_cpu(ev->channel); 6427 hdr->snr = le32_to_cpu(ev->snr); 6428 hdr->rate = le32_to_cpu(ev->rate); 6429 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 6430 hdr->buf_len = le32_to_cpu(ev->buf_len); 6431 hdr->status = le32_to_cpu(ev->status); 6432 hdr->flags = le32_to_cpu(ev->flags); 6433 hdr->rssi = a_sle32_to_cpu(ev->rssi); 6434 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 6435 6436 for (i = 0; i < ATH_MAX_ANTENNA; i++) 6437 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 6438 6439 if (skb->len < (frame - skb->data) + hdr->buf_len) { 6440 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 6441 return -EPROTO; 6442 } 6443 6444 /* shift the sk_buff to point to `frame` */ 6445 skb_trim(skb, 0); 6446 skb_put(skb, frame - skb->data); 6447 skb_pull(skb, frame - skb->data); 6448 skb_put(skb, hdr->buf_len); 6449 6450 return 0; 6451 } 6452 6453 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 6454 u32 status, u32 ack_rssi) 6455 { 6456 struct sk_buff *msdu; 6457 struct ieee80211_tx_info *info; 6458 struct ath12k_skb_cb *skb_cb; 6459 int num_mgmt; 6460 6461 spin_lock_bh(&ar->txmgmt_idr_lock); 6462 msdu = idr_find(&ar->txmgmt_idr, desc_id); 6463 6464 if (!msdu) { 6465 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 6466 desc_id); 6467 spin_unlock_bh(&ar->txmgmt_idr_lock); 6468 return -ENOENT; 6469 } 6470 6471 idr_remove(&ar->txmgmt_idr, desc_id); 6472 spin_unlock_bh(&ar->txmgmt_idr_lock); 6473 6474 skb_cb = ATH12K_SKB_CB(msdu); 6475 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 6476 6477 info = IEEE80211_SKB_CB(msdu); 6478 memset(&info->status, 0, sizeof(info->status)); 6479 6480 /* skip tx rate update from ieee80211_status*/ 6481 info->status.rates[0].idx = -1; 6482 6483 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) { 6484 info->flags |= IEEE80211_TX_STAT_ACK; 6485 info->status.ack_signal = ack_rssi; 6486 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID; 6487 } 6488 6489 if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status) 6490 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 6491 6492 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu); 6493 6494 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 6495 6496 /* WARN when we received this event without doing any mgmt tx */ 6497 if (num_mgmt < 0) 6498 WARN_ON_ONCE(1); 6499 6500 if (!num_mgmt) 6501 wake_up(&ar->txmgmt_empty_waitq); 6502 6503 return 0; 6504 } 6505 6506 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 6507 struct sk_buff *skb, 6508 struct wmi_mgmt_tx_compl_event *param) 6509 { 6510 const void **tb; 6511 const struct wmi_mgmt_tx_compl_event *ev; 6512 int ret; 6513 6514 tb = ath12k_wmi_tlv_parse(ab, skb); 6515 if (IS_ERR(tb)) { 6516 ret = PTR_ERR(tb); 6517 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6518 return ret; 6519 } 6520 6521 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 6522 if (!ev) { 6523 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 6524 return -EPROTO; 6525 } 6526 6527 param->pdev_id = ev->pdev_id; 6528 param->desc_id = ev->desc_id; 6529 param->status = ev->status; 6530 param->ppdu_id = ev->ppdu_id; 6531 param->ack_rssi = ev->ack_rssi; 6532 6533 return 0; 6534 } 6535 6536 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 6537 { 6538 lockdep_assert_held(&ar->data_lock); 6539 6540 switch (ar->scan.state) { 6541 case ATH12K_SCAN_IDLE: 6542 case ATH12K_SCAN_RUNNING: 6543 case ATH12K_SCAN_ABORTING: 6544 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 6545 ath12k_scan_state_str(ar->scan.state), 6546 ar->scan.state); 6547 break; 6548 case ATH12K_SCAN_STARTING: 6549 ar->scan.state = ATH12K_SCAN_RUNNING; 6550 6551 if (ar->scan.is_roc) 6552 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar)); 6553 6554 complete(&ar->scan.started); 6555 break; 6556 } 6557 } 6558 6559 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 6560 { 6561 lockdep_assert_held(&ar->data_lock); 6562 6563 switch (ar->scan.state) { 6564 case ATH12K_SCAN_IDLE: 6565 case ATH12K_SCAN_RUNNING: 6566 case ATH12K_SCAN_ABORTING: 6567 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 6568 ath12k_scan_state_str(ar->scan.state), 6569 ar->scan.state); 6570 break; 6571 case ATH12K_SCAN_STARTING: 6572 complete(&ar->scan.started); 6573 __ath12k_mac_scan_finish(ar); 6574 break; 6575 } 6576 } 6577 6578 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 6579 { 6580 lockdep_assert_held(&ar->data_lock); 6581 6582 switch (ar->scan.state) { 6583 case ATH12K_SCAN_IDLE: 6584 case ATH12K_SCAN_STARTING: 6585 /* One suspected reason scan can be completed while starting is 6586 * if firmware fails to deliver all scan events to the host, 6587 * e.g. when transport pipe is full. This has been observed 6588 * with spectral scan phyerr events starving wmi transport 6589 * pipe. In such case the "scan completed" event should be (and 6590 * is) ignored by the host as it may be just firmware's scan 6591 * state machine recovering. 6592 */ 6593 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 6594 ath12k_scan_state_str(ar->scan.state), 6595 ar->scan.state); 6596 break; 6597 case ATH12K_SCAN_RUNNING: 6598 case ATH12K_SCAN_ABORTING: 6599 __ath12k_mac_scan_finish(ar); 6600 break; 6601 } 6602 } 6603 6604 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 6605 { 6606 lockdep_assert_held(&ar->data_lock); 6607 6608 switch (ar->scan.state) { 6609 case ATH12K_SCAN_IDLE: 6610 case ATH12K_SCAN_STARTING: 6611 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 6612 ath12k_scan_state_str(ar->scan.state), 6613 ar->scan.state); 6614 break; 6615 case ATH12K_SCAN_RUNNING: 6616 case ATH12K_SCAN_ABORTING: 6617 ar->scan_channel = NULL; 6618 break; 6619 } 6620 } 6621 6622 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 6623 { 6624 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 6625 6626 lockdep_assert_held(&ar->data_lock); 6627 6628 switch (ar->scan.state) { 6629 case ATH12K_SCAN_IDLE: 6630 case ATH12K_SCAN_STARTING: 6631 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 6632 ath12k_scan_state_str(ar->scan.state), 6633 ar->scan.state); 6634 break; 6635 case ATH12K_SCAN_RUNNING: 6636 case ATH12K_SCAN_ABORTING: 6637 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq); 6638 6639 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 6640 complete(&ar->scan.on_channel); 6641 6642 break; 6643 } 6644 } 6645 6646 static const char * 6647 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 6648 enum wmi_scan_completion_reason reason) 6649 { 6650 switch (type) { 6651 case WMI_SCAN_EVENT_STARTED: 6652 return "started"; 6653 case WMI_SCAN_EVENT_COMPLETED: 6654 switch (reason) { 6655 case WMI_SCAN_REASON_COMPLETED: 6656 return "completed"; 6657 case WMI_SCAN_REASON_CANCELLED: 6658 return "completed [cancelled]"; 6659 case WMI_SCAN_REASON_PREEMPTED: 6660 return "completed [preempted]"; 6661 case WMI_SCAN_REASON_TIMEDOUT: 6662 return "completed [timedout]"; 6663 case WMI_SCAN_REASON_INTERNAL_FAILURE: 6664 return "completed [internal err]"; 6665 case WMI_SCAN_REASON_MAX: 6666 break; 6667 } 6668 return "completed [unknown]"; 6669 case WMI_SCAN_EVENT_BSS_CHANNEL: 6670 return "bss channel"; 6671 case WMI_SCAN_EVENT_FOREIGN_CHAN: 6672 return "foreign channel"; 6673 case WMI_SCAN_EVENT_DEQUEUED: 6674 return "dequeued"; 6675 case WMI_SCAN_EVENT_PREEMPTED: 6676 return "preempted"; 6677 case WMI_SCAN_EVENT_START_FAILED: 6678 return "start failed"; 6679 case WMI_SCAN_EVENT_RESTARTED: 6680 return "restarted"; 6681 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 6682 return "foreign channel exit"; 6683 default: 6684 return "unknown"; 6685 } 6686 } 6687 6688 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 6689 struct wmi_scan_event *scan_evt_param) 6690 { 6691 const void **tb; 6692 const struct wmi_scan_event *ev; 6693 int ret; 6694 6695 tb = ath12k_wmi_tlv_parse(ab, skb); 6696 if (IS_ERR(tb)) { 6697 ret = PTR_ERR(tb); 6698 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6699 return ret; 6700 } 6701 6702 ev = tb[WMI_TAG_SCAN_EVENT]; 6703 if (!ev) { 6704 ath12k_warn(ab, "failed to fetch scan ev"); 6705 return -EPROTO; 6706 } 6707 6708 scan_evt_param->event_type = ev->event_type; 6709 scan_evt_param->reason = ev->reason; 6710 scan_evt_param->channel_freq = ev->channel_freq; 6711 scan_evt_param->scan_req_id = ev->scan_req_id; 6712 scan_evt_param->scan_id = ev->scan_id; 6713 scan_evt_param->vdev_id = ev->vdev_id; 6714 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 6715 6716 return 0; 6717 } 6718 6719 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 6720 struct wmi_peer_sta_kickout_arg *arg) 6721 { 6722 const void **tb; 6723 const struct wmi_peer_sta_kickout_event *ev; 6724 int ret; 6725 6726 tb = ath12k_wmi_tlv_parse(ab, skb); 6727 if (IS_ERR(tb)) { 6728 ret = PTR_ERR(tb); 6729 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6730 return ret; 6731 } 6732 6733 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 6734 if (!ev) { 6735 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 6736 return -EPROTO; 6737 } 6738 6739 arg->mac_addr = ev->peer_macaddr.addr; 6740 arg->reason = le32_to_cpu(ev->reason); 6741 arg->rssi = le32_to_cpu(ev->rssi); 6742 6743 return 0; 6744 } 6745 6746 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 6747 struct wmi_roam_event *roam_ev) 6748 { 6749 const void **tb; 6750 const struct wmi_roam_event *ev; 6751 int ret; 6752 6753 tb = ath12k_wmi_tlv_parse(ab, skb); 6754 if (IS_ERR(tb)) { 6755 ret = PTR_ERR(tb); 6756 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6757 return ret; 6758 } 6759 6760 ev = tb[WMI_TAG_ROAM_EVENT]; 6761 if (!ev) { 6762 ath12k_warn(ab, "failed to fetch roam ev"); 6763 return -EPROTO; 6764 } 6765 6766 roam_ev->vdev_id = ev->vdev_id; 6767 roam_ev->reason = ev->reason; 6768 roam_ev->rssi = ev->rssi; 6769 6770 return 0; 6771 } 6772 6773 static int freq_to_idx(struct ieee80211_hw *hw, int freq) 6774 { 6775 struct ieee80211_supported_band *sband; 6776 int band, ch, idx = 0; 6777 6778 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 6779 sband = hw->wiphy->bands[band]; 6780 if (!sband) 6781 continue; 6782 6783 for (ch = 0; ch < sband->n_channels; ch++, idx++) 6784 if (sband->channels[ch].center_freq == freq) 6785 goto exit; 6786 } 6787 6788 exit: 6789 return idx; 6790 } 6791 6792 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 6793 struct wmi_chan_info_event *ch_info_ev) 6794 { 6795 const void **tb; 6796 const struct wmi_chan_info_event *ev; 6797 int ret; 6798 6799 tb = ath12k_wmi_tlv_parse(ab, skb); 6800 if (IS_ERR(tb)) { 6801 ret = PTR_ERR(tb); 6802 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6803 return ret; 6804 } 6805 6806 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 6807 if (!ev) { 6808 ath12k_warn(ab, "failed to fetch chan info ev"); 6809 return -EPROTO; 6810 } 6811 6812 ch_info_ev->err_code = ev->err_code; 6813 ch_info_ev->freq = ev->freq; 6814 ch_info_ev->cmd_flags = ev->cmd_flags; 6815 ch_info_ev->noise_floor = ev->noise_floor; 6816 ch_info_ev->rx_clear_count = ev->rx_clear_count; 6817 ch_info_ev->cycle_count = ev->cycle_count; 6818 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 6819 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 6820 ch_info_ev->rx_frame_count = ev->rx_frame_count; 6821 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 6822 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 6823 ch_info_ev->vdev_id = ev->vdev_id; 6824 6825 return 0; 6826 } 6827 6828 static int 6829 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 6830 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 6831 { 6832 const void **tb; 6833 const struct wmi_pdev_bss_chan_info_event *ev; 6834 int ret; 6835 6836 tb = ath12k_wmi_tlv_parse(ab, skb); 6837 if (IS_ERR(tb)) { 6838 ret = PTR_ERR(tb); 6839 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6840 return ret; 6841 } 6842 6843 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 6844 if (!ev) { 6845 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 6846 return -EPROTO; 6847 } 6848 6849 bss_ch_info_ev->pdev_id = ev->pdev_id; 6850 bss_ch_info_ev->freq = ev->freq; 6851 bss_ch_info_ev->noise_floor = ev->noise_floor; 6852 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 6853 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 6854 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 6855 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 6856 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 6857 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 6858 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 6859 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 6860 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 6861 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 6862 6863 return 0; 6864 } 6865 6866 static int 6867 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 6868 struct wmi_vdev_install_key_complete_arg *arg) 6869 { 6870 const void **tb; 6871 const struct wmi_vdev_install_key_compl_event *ev; 6872 int ret; 6873 6874 tb = ath12k_wmi_tlv_parse(ab, skb); 6875 if (IS_ERR(tb)) { 6876 ret = PTR_ERR(tb); 6877 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6878 return ret; 6879 } 6880 6881 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 6882 if (!ev) { 6883 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 6884 return -EPROTO; 6885 } 6886 6887 arg->vdev_id = le32_to_cpu(ev->vdev_id); 6888 arg->macaddr = ev->peer_macaddr.addr; 6889 arg->key_idx = le32_to_cpu(ev->key_idx); 6890 arg->key_flags = le32_to_cpu(ev->key_flags); 6891 arg->status = le32_to_cpu(ev->status); 6892 6893 return 0; 6894 } 6895 6896 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 6897 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 6898 { 6899 const void **tb; 6900 const struct wmi_peer_assoc_conf_event *ev; 6901 int ret; 6902 6903 tb = ath12k_wmi_tlv_parse(ab, skb); 6904 if (IS_ERR(tb)) { 6905 ret = PTR_ERR(tb); 6906 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6907 return ret; 6908 } 6909 6910 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 6911 if (!ev) { 6912 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 6913 return -EPROTO; 6914 } 6915 6916 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 6917 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 6918 6919 return 0; 6920 } 6921 6922 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 6923 { 6924 /* try to send pending beacons first. they take priority */ 6925 wake_up(&ab->wmi_ab.tx_credits_wq); 6926 } 6927 6928 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb) 6929 { 6930 const struct wmi_11d_new_cc_event *ev; 6931 struct ath12k *ar; 6932 struct ath12k_pdev *pdev; 6933 const void **tb; 6934 int ret, i; 6935 6936 tb = ath12k_wmi_tlv_parse(ab, skb); 6937 if (IS_ERR(tb)) { 6938 ret = PTR_ERR(tb); 6939 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6940 return ret; 6941 } 6942 6943 ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT]; 6944 if (!ev) { 6945 ath12k_warn(ab, "failed to fetch 11d new cc ev"); 6946 return -EPROTO; 6947 } 6948 6949 spin_lock_bh(&ab->base_lock); 6950 memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN); 6951 spin_unlock_bh(&ab->base_lock); 6952 6953 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n", 6954 ab->new_alpha2[0], 6955 ab->new_alpha2[1]); 6956 6957 for (i = 0; i < ab->num_radios; i++) { 6958 pdev = &ab->pdevs[i]; 6959 ar = pdev->ar; 6960 ar->state_11d = ATH12K_11D_IDLE; 6961 ar->ah->regd_updated = false; 6962 complete(&ar->completed_11d_scan); 6963 } 6964 6965 queue_work(ab->workqueue, &ab->update_11d_work); 6966 6967 return 0; 6968 } 6969 6970 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 6971 struct sk_buff *skb) 6972 { 6973 dev_kfree_skb(skb); 6974 } 6975 6976 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 6977 { 6978 struct ath12k_reg_info *reg_info; 6979 struct ath12k *ar = NULL; 6980 u8 pdev_idx = 255; 6981 int ret; 6982 6983 reg_info = kzalloc_obj(*reg_info, GFP_ATOMIC); 6984 if (!reg_info) { 6985 ret = -ENOMEM; 6986 goto fallback; 6987 } 6988 6989 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 6990 if (ret) { 6991 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 6992 goto mem_free; 6993 } 6994 6995 /* 6996 * Set the valid pdev_idx before validating so that, even when the 6997 * event is dropped or falls back, the completion the caller in 6998 * ath12k_mac_hw_register() may be waiting on is still signalled at 6999 * the end and it does not time out. 7000 */ 7001 pdev_idx = reg_info->phy_id; 7002 7003 ret = ath12k_reg_validate_reg_info(ab, reg_info); 7004 if (ret == ATH12K_REG_STATUS_FALLBACK) { 7005 ath12k_warn(ab, "failed to validate reg info %d\n", ret); 7006 /* firmware has successfully switches to new regd but host can not 7007 * continue, so free reginfo and fallback to old regd 7008 */ 7009 goto mem_free; 7010 } else if (ret == ATH12K_REG_STATUS_DROP) { 7011 /* reg info is valid but we will not store it and 7012 * not going to create new regd for it 7013 */ 7014 ret = ATH12K_REG_STATUS_VALID; 7015 goto mem_free; 7016 } 7017 7018 /* free old reg_info if it exist */ 7019 if (ab->reg_info[pdev_idx]) { 7020 ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]); 7021 kfree(ab->reg_info[pdev_idx]); 7022 } 7023 /* reg_info is valid, we store it for later use 7024 * even below regd build failed 7025 */ 7026 ab->reg_info[pdev_idx] = reg_info; 7027 7028 ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC, 7029 IEEE80211_REG_UNSET_AP); 7030 if (ret) { 7031 ath12k_warn(ab, "failed to handle chan list %d\n", ret); 7032 goto fallback; 7033 } 7034 7035 goto out; 7036 7037 mem_free: 7038 ath12k_reg_reset_reg_info(reg_info); 7039 kfree(reg_info); 7040 7041 if (ret == ATH12K_REG_STATUS_VALID) 7042 goto out; 7043 7044 fallback: 7045 /* Fallback to older reg (by sending previous country setting 7046 * again if fw has succeeded and we failed to process here. 7047 * The Regdomain should be uniform across driver and fw. Since the 7048 * FW has processed the command and sent a success status, we expect 7049 * this function to succeed as well. If it doesn't, CTRY needs to be 7050 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 7051 */ 7052 /* TODO: This is rare, but still should also be handled */ 7053 WARN_ON(1); 7054 7055 out: 7056 /* In some error cases, even a valid pdev_idx might not be available */ 7057 if (pdev_idx < ab->num_radios) 7058 ar = ab->pdevs[pdev_idx].ar; 7059 7060 /* During the boot-time update, 'ar' might not be allocated, 7061 * so the completion cannot be marked at that point. 7062 * This boot-time update is handled in ath12k_mac_hw_register() 7063 * before registering the hardware. 7064 */ 7065 if (ar) 7066 complete_all(&ar->regd_update_completed); 7067 7068 return ret; 7069 } 7070 7071 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 7072 const void *ptr, void *data) 7073 { 7074 struct ath12k_wmi_rdy_parse *rdy_parse = data; 7075 struct wmi_ready_event fixed_param; 7076 struct ath12k_wmi_mac_addr_params *addr_list; 7077 struct ath12k_pdev *pdev; 7078 u32 num_mac_addr; 7079 int i; 7080 7081 switch (tag) { 7082 case WMI_TAG_READY_EVENT: 7083 memset(&fixed_param, 0, sizeof(fixed_param)); 7084 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 7085 min_t(u16, sizeof(fixed_param), len)); 7086 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 7087 rdy_parse->num_extra_mac_addr = 7088 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 7089 7090 ether_addr_copy(ab->mac_addr, 7091 fixed_param.ready_event_min.mac_addr.addr); 7092 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 7093 ab->wmi_ready = true; 7094 break; 7095 case WMI_TAG_ARRAY_FIXED_STRUCT: 7096 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 7097 num_mac_addr = rdy_parse->num_extra_mac_addr; 7098 7099 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 7100 break; 7101 7102 for (i = 0; i < ab->num_radios; i++) { 7103 pdev = &ab->pdevs[i]; 7104 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 7105 } 7106 ab->pdevs_macaddr_valid = true; 7107 break; 7108 default: 7109 break; 7110 } 7111 7112 return 0; 7113 } 7114 7115 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 7116 { 7117 struct ath12k_wmi_rdy_parse rdy_parse = { }; 7118 int ret; 7119 7120 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 7121 ath12k_wmi_rdy_parse, &rdy_parse); 7122 if (ret) { 7123 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 7124 return ret; 7125 } 7126 7127 complete(&ab->wmi_ab.unified_ready); 7128 return 0; 7129 } 7130 7131 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 7132 { 7133 struct wmi_peer_delete_resp_event peer_del_resp; 7134 struct ath12k *ar; 7135 u32 vdev_id; 7136 7137 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 7138 ath12k_warn(ab, "failed to extract peer delete resp\n"); 7139 return; 7140 } 7141 7142 vdev_id = le32_to_cpu(peer_del_resp.vdev_id); 7143 7144 rcu_read_lock(); 7145 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 7146 if (!ar) { 7147 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d\n", 7148 vdev_id); 7149 rcu_read_unlock(); 7150 return; 7151 } 7152 7153 ath12k_peer_delete_resp_signal(ar, vdev_id, 7154 peer_del_resp.peer_macaddr.addr); 7155 rcu_read_unlock(); 7156 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 7157 vdev_id, peer_del_resp.peer_macaddr.addr); 7158 } 7159 7160 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 7161 struct sk_buff *skb) 7162 { 7163 struct ath12k *ar; 7164 u32 vdev_id = 0; 7165 7166 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 7167 ath12k_warn(ab, "failed to extract vdev delete resp"); 7168 return; 7169 } 7170 7171 rcu_read_lock(); 7172 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 7173 if (!ar) { 7174 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 7175 vdev_id); 7176 rcu_read_unlock(); 7177 return; 7178 } 7179 7180 complete(&ar->vdev_delete_done); 7181 7182 rcu_read_unlock(); 7183 7184 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 7185 vdev_id); 7186 } 7187 7188 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 7189 { 7190 switch (vdev_resp_status) { 7191 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 7192 return "invalid vdev id"; 7193 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 7194 return "not supported"; 7195 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 7196 return "dfs violation"; 7197 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 7198 return "invalid regdomain"; 7199 default: 7200 return "unknown"; 7201 } 7202 } 7203 7204 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 7205 { 7206 struct wmi_vdev_start_resp_event vdev_start_resp; 7207 struct ath12k *ar; 7208 u32 status; 7209 7210 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 7211 ath12k_warn(ab, "failed to extract vdev start resp"); 7212 return; 7213 } 7214 7215 rcu_read_lock(); 7216 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 7217 if (!ar) { 7218 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 7219 vdev_start_resp.vdev_id); 7220 rcu_read_unlock(); 7221 return; 7222 } 7223 7224 ar->last_wmi_vdev_start_status = 0; 7225 7226 status = le32_to_cpu(vdev_start_resp.status); 7227 if (WARN_ON_ONCE(status)) { 7228 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 7229 status, ath12k_wmi_vdev_resp_print(status)); 7230 ar->last_wmi_vdev_start_status = status; 7231 } 7232 7233 ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power); 7234 7235 complete(&ar->vdev_setup_done); 7236 7237 rcu_read_unlock(); 7238 7239 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 7240 vdev_start_resp.vdev_id); 7241 } 7242 7243 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 7244 { 7245 struct ath12k_link_vif *arvif; 7246 struct ath12k *ar; 7247 u32 vdev_id, tx_status; 7248 7249 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) { 7250 ath12k_warn(ab, "failed to extract bcn tx status"); 7251 return; 7252 } 7253 7254 guard(rcu)(); 7255 7256 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id); 7257 if (!arvif) { 7258 ath12k_warn(ab, "invalid vdev %u in bcn tx status\n", 7259 vdev_id); 7260 return; 7261 } 7262 7263 ar = arvif->ar; 7264 wiphy_work_queue(ath12k_ar_to_hw(ar)->wiphy, &arvif->bcn_tx_work); 7265 } 7266 7267 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 7268 { 7269 struct ath12k *ar; 7270 u32 vdev_id = 0; 7271 7272 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 7273 ath12k_warn(ab, "failed to extract vdev stopped event"); 7274 return; 7275 } 7276 7277 rcu_read_lock(); 7278 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 7279 if (!ar) { 7280 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 7281 vdev_id); 7282 rcu_read_unlock(); 7283 return; 7284 } 7285 7286 complete(&ar->vdev_setup_done); 7287 7288 rcu_read_unlock(); 7289 7290 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 7291 } 7292 7293 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 7294 { 7295 struct ath12k_wmi_mgmt_rx_arg rx_ev = {}; 7296 struct ath12k *ar; 7297 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 7298 struct ath12k_dp_link_peer *peer; 7299 struct ieee80211_hdr *hdr; 7300 bool is_4addr_null_pkt; 7301 struct ath12k_dp *dp; 7302 u16 fc; 7303 struct ieee80211_supported_band *sband; 7304 s32 noise_floor; 7305 7306 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 7307 ath12k_warn(ab, "failed to extract mgmt rx event"); 7308 dev_kfree_skb(skb); 7309 return; 7310 } 7311 7312 memset(status, 0, sizeof(*status)); 7313 7314 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 7315 rx_ev.status); 7316 7317 rcu_read_lock(); 7318 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 7319 7320 if (!ar) { 7321 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 7322 rx_ev.pdev_id); 7323 dev_kfree_skb(skb); 7324 goto exit; 7325 } 7326 7327 if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) || 7328 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 7329 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 7330 WMI_RX_STATUS_ERR_CRC))) { 7331 dev_kfree_skb(skb); 7332 goto exit; 7333 } 7334 7335 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 7336 status->flag |= RX_FLAG_MMIC_ERROR; 7337 7338 if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ && 7339 rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) { 7340 status->band = NL80211_BAND_6GHZ; 7341 status->freq = rx_ev.chan_freq; 7342 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 7343 status->band = NL80211_BAND_2GHZ; 7344 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) { 7345 status->band = NL80211_BAND_5GHZ; 7346 } else { 7347 /* Shouldn't happen unless list of advertised channels to 7348 * mac80211 has been changed. 7349 */ 7350 WARN_ON_ONCE(1); 7351 dev_kfree_skb(skb); 7352 goto exit; 7353 } 7354 7355 if (rx_ev.phy_mode == MODE_11B && 7356 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 7357 ath12k_dbg(ab, ATH12K_DBG_WMI, 7358 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 7359 7360 sband = &ar->mac.sbands[status->band]; 7361 7362 if (status->band != NL80211_BAND_6GHZ) 7363 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 7364 status->band); 7365 7366 spin_lock_bh(&ar->data_lock); 7367 noise_floor = ath12k_pdev_get_noise_floor(ar); 7368 spin_unlock_bh(&ar->data_lock); 7369 7370 status->signal = rx_ev.snr + noise_floor; 7371 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 7372 7373 hdr = (struct ieee80211_hdr *)skb->data; 7374 fc = le16_to_cpu(hdr->frame_control); 7375 7376 is_4addr_null_pkt = (ieee80211_is_nullfunc(hdr->frame_control) || 7377 ieee80211_is_qos_nullfunc(hdr->frame_control)) && 7378 ieee80211_has_a4(hdr->frame_control); 7379 7380 /* 7381 * Add check to drop frames other than 4-address NULL frame. Since 7382 * firmware sends all NULL frames in this path (3-address and 4-address) 7383 */ 7384 if (ieee80211_is_data(hdr->frame_control) && !is_4addr_null_pkt) { 7385 dev_kfree_skb(skb); 7386 goto exit; 7387 } 7388 7389 if (is_4addr_null_pkt) { 7390 dp = ath12k_ab_to_dp(ar->ab); 7391 spin_lock_bh(&dp->dp_lock); 7392 peer = ath12k_dp_link_peer_find_by_pdev_and_addr(dp, ar->pdev_idx, 7393 hdr->addr2); 7394 if (!peer) { 7395 spin_unlock_bh(&dp->dp_lock); 7396 dev_kfree_skb(skb); 7397 goto exit; 7398 } 7399 spin_unlock_bh(&dp->dp_lock); 7400 goto send_rx; 7401 } 7402 7403 /* Firmware is guaranteed to report all essential management frames via 7404 * WMI while it can deliver some extra via HTT. Since there can be 7405 * duplicates split the reporting wrt monitor/sniffing. 7406 */ 7407 status->flag |= RX_FLAG_SKIP_MONITOR; 7408 7409 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 7410 * including group privacy action frames. 7411 */ 7412 if (ieee80211_has_protected(hdr->frame_control)) { 7413 status->flag |= RX_FLAG_DECRYPTED; 7414 7415 if (!ieee80211_is_robust_mgmt_frame(skb)) { 7416 status->flag |= RX_FLAG_IV_STRIPPED | 7417 RX_FLAG_MMIC_STRIPPED; 7418 hdr->frame_control = __cpu_to_le16(fc & 7419 ~IEEE80211_FCTL_PROTECTED); 7420 } 7421 } 7422 7423 if (ieee80211_is_beacon(hdr->frame_control)) 7424 ath12k_mac_handle_beacon(ar, skb); 7425 7426 send_rx: 7427 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7428 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 7429 skb, skb->len, 7430 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 7431 7432 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7433 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 7434 status->freq, status->band, status->signal, 7435 status->rate_idx); 7436 7437 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb); 7438 7439 exit: 7440 rcu_read_unlock(); 7441 } 7442 7443 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 7444 { 7445 struct wmi_mgmt_tx_compl_event tx_compl_param = {}; 7446 struct ath12k *ar; 7447 7448 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 7449 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 7450 return; 7451 } 7452 7453 rcu_read_lock(); 7454 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 7455 if (!ar) { 7456 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 7457 tx_compl_param.pdev_id); 7458 goto exit; 7459 } 7460 7461 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 7462 le32_to_cpu(tx_compl_param.status), 7463 le32_to_cpu(tx_compl_param.ack_rssi)); 7464 7465 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7466 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 7467 tx_compl_param.pdev_id, tx_compl_param.desc_id, 7468 tx_compl_param.status); 7469 7470 exit: 7471 rcu_read_unlock(); 7472 } 7473 7474 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab, 7475 u32 vdev_id, 7476 enum ath12k_scan_state state) 7477 { 7478 int i; 7479 struct ath12k_pdev *pdev; 7480 struct ath12k *ar; 7481 7482 for (i = 0; i < ab->num_radios; i++) { 7483 pdev = rcu_dereference(ab->pdevs_active[i]); 7484 if (pdev && pdev->ar) { 7485 ar = pdev->ar; 7486 7487 spin_lock_bh(&ar->data_lock); 7488 if (ar->scan.state == state && 7489 ar->scan.arvif && 7490 ar->scan.arvif->vdev_id == vdev_id) { 7491 spin_unlock_bh(&ar->data_lock); 7492 return ar; 7493 } 7494 spin_unlock_bh(&ar->data_lock); 7495 } 7496 } 7497 return NULL; 7498 } 7499 7500 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 7501 { 7502 struct ath12k *ar; 7503 struct wmi_scan_event scan_ev = {}; 7504 7505 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 7506 ath12k_warn(ab, "failed to extract scan event"); 7507 return; 7508 } 7509 7510 rcu_read_lock(); 7511 7512 /* In case the scan was cancelled, ex. during interface teardown, 7513 * the interface will not be found in active interfaces. 7514 * Rather, in such scenarios, iterate over the active pdev's to 7515 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 7516 * aborting scan's vdev id matches this event info. 7517 */ 7518 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 7519 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) { 7520 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 7521 ATH12K_SCAN_ABORTING); 7522 if (!ar) 7523 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 7524 ATH12K_SCAN_RUNNING); 7525 } else { 7526 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 7527 } 7528 7529 if (!ar) { 7530 ath12k_warn(ab, "Received scan event for unknown vdev"); 7531 rcu_read_unlock(); 7532 return; 7533 } 7534 7535 spin_lock_bh(&ar->data_lock); 7536 7537 ath12k_dbg(ab, ATH12K_DBG_WMI, 7538 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 7539 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 7540 le32_to_cpu(scan_ev.reason)), 7541 le32_to_cpu(scan_ev.event_type), 7542 le32_to_cpu(scan_ev.reason), 7543 le32_to_cpu(scan_ev.channel_freq), 7544 le32_to_cpu(scan_ev.scan_req_id), 7545 le32_to_cpu(scan_ev.scan_id), 7546 le32_to_cpu(scan_ev.vdev_id), 7547 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 7548 7549 switch (le32_to_cpu(scan_ev.event_type)) { 7550 case WMI_SCAN_EVENT_STARTED: 7551 ath12k_wmi_event_scan_started(ar); 7552 break; 7553 case WMI_SCAN_EVENT_COMPLETED: 7554 ath12k_wmi_event_scan_completed(ar); 7555 break; 7556 case WMI_SCAN_EVENT_BSS_CHANNEL: 7557 ath12k_wmi_event_scan_bss_chan(ar); 7558 break; 7559 case WMI_SCAN_EVENT_FOREIGN_CHAN: 7560 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 7561 break; 7562 case WMI_SCAN_EVENT_START_FAILED: 7563 ath12k_warn(ab, "received scan start failure event\n"); 7564 ath12k_wmi_event_scan_start_failed(ar); 7565 break; 7566 case WMI_SCAN_EVENT_DEQUEUED: 7567 __ath12k_mac_scan_finish(ar); 7568 break; 7569 case WMI_SCAN_EVENT_PREEMPTED: 7570 case WMI_SCAN_EVENT_RESTARTED: 7571 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 7572 default: 7573 break; 7574 } 7575 7576 spin_unlock_bh(&ar->data_lock); 7577 7578 rcu_read_unlock(); 7579 } 7580 7581 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 7582 { 7583 struct wmi_peer_sta_kickout_arg arg = {}; 7584 struct ath12k_link_vif *arvif; 7585 struct ieee80211_sta *sta; 7586 struct ath12k_sta *ahsta; 7587 struct ath12k_link_sta *arsta; 7588 struct ath12k *ar; 7589 7590 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 7591 ath12k_warn(ab, "failed to extract peer sta kickout event"); 7592 return; 7593 } 7594 7595 rcu_read_lock(); 7596 7597 spin_lock_bh(&ab->base_lock); 7598 7599 arsta = ath12k_link_sta_find_by_addr(ab, arg.mac_addr); 7600 7601 if (!arsta) { 7602 ath12k_warn(ab, "arsta not found %pM\n", 7603 arg.mac_addr); 7604 goto exit; 7605 } 7606 7607 arvif = arsta->arvif; 7608 if (!arvif) { 7609 ath12k_warn(ab, "invalid arvif in peer sta kickout ev for STA %pM", 7610 arg.mac_addr); 7611 goto exit; 7612 } 7613 7614 ar = arvif->ar; 7615 ahsta = arsta->ahsta; 7616 sta = ath12k_ahsta_to_sta(ahsta); 7617 7618 ath12k_dbg(ab, ATH12K_DBG_WMI, 7619 "peer sta kickout event %pM reason: %d rssi: %d\n", 7620 arg.mac_addr, arg.reason, arg.rssi); 7621 7622 switch (arg.reason) { 7623 case WMI_PEER_STA_KICKOUT_REASON_INACTIVITY: 7624 if (arvif->ahvif->vif->type == NL80211_IFTYPE_STATION) { 7625 ath12k_mac_handle_beacon_miss(ar, arvif); 7626 break; 7627 } 7628 fallthrough; 7629 default: 7630 ieee80211_report_low_ack(sta, 10); 7631 } 7632 7633 exit: 7634 spin_unlock_bh(&ab->base_lock); 7635 rcu_read_unlock(); 7636 } 7637 7638 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 7639 { 7640 struct ath12k_link_vif *arvif; 7641 struct wmi_roam_event roam_ev = {}; 7642 struct ath12k *ar; 7643 u32 vdev_id; 7644 u8 roam_reason; 7645 7646 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 7647 ath12k_warn(ab, "failed to extract roam event"); 7648 return; 7649 } 7650 7651 vdev_id = le32_to_cpu(roam_ev.vdev_id); 7652 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason), 7653 WMI_ROAM_REASON_MASK); 7654 7655 ath12k_dbg(ab, ATH12K_DBG_WMI, 7656 "wmi roam event vdev %u reason %d rssi %d\n", 7657 vdev_id, roam_reason, roam_ev.rssi); 7658 7659 guard(rcu)(); 7660 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id); 7661 if (!arvif) { 7662 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id); 7663 return; 7664 } 7665 7666 ar = arvif->ar; 7667 7668 if (roam_reason >= WMI_ROAM_REASON_MAX) 7669 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 7670 roam_reason, vdev_id); 7671 7672 switch (roam_reason) { 7673 case WMI_ROAM_REASON_BEACON_MISS: 7674 ath12k_mac_handle_beacon_miss(ar, arvif); 7675 break; 7676 case WMI_ROAM_REASON_BETTER_AP: 7677 case WMI_ROAM_REASON_LOW_RSSI: 7678 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 7679 case WMI_ROAM_REASON_HO_FAILED: 7680 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 7681 roam_reason, vdev_id); 7682 break; 7683 } 7684 } 7685 7686 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 7687 { 7688 struct wmi_chan_info_event ch_info_ev = {}; 7689 struct ath12k *ar; 7690 struct ath12k_hw *ah; 7691 struct survey_info *survey; 7692 int idx; 7693 /* HW channel counters frequency value in hertz */ 7694 u32 cc_freq_hz = ab->cc_freq_hz; 7695 7696 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) { 7697 ath12k_warn(ab, "failed to extract chan info event"); 7698 return; 7699 } 7700 7701 ath12k_dbg(ab, ATH12K_DBG_WMI, 7702 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 7703 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 7704 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 7705 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 7706 ch_info_ev.mac_clk_mhz); 7707 7708 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 7709 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 7710 return; 7711 } 7712 7713 rcu_read_lock(); 7714 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 7715 if (!ar) { 7716 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 7717 ch_info_ev.vdev_id); 7718 rcu_read_unlock(); 7719 return; 7720 } 7721 spin_lock_bh(&ar->data_lock); 7722 ah = ath12k_ar_to_ah(ar); 7723 7724 switch (ar->scan.state) { 7725 case ATH12K_SCAN_IDLE: 7726 case ATH12K_SCAN_STARTING: 7727 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 7728 goto exit; 7729 case ATH12K_SCAN_RUNNING: 7730 case ATH12K_SCAN_ABORTING: 7731 break; 7732 } 7733 7734 idx = freq_to_idx(ath12k_ar_to_hw(ar), le32_to_cpu(ch_info_ev.freq)); 7735 if (idx >= ARRAY_SIZE(ah->survey)) { 7736 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 7737 ch_info_ev.freq, idx); 7738 goto exit; 7739 } 7740 7741 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 7742 * HW channel counters frequency value 7743 */ 7744 if (ch_info_ev.mac_clk_mhz) 7745 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 7746 7747 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 7748 scoped_guard(spinlock_bh, &ah->survey_lock) { 7749 survey = &ah->survey[idx]; 7750 memset(survey, 0, sizeof(*survey)); 7751 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 7752 survey->time = 7753 div_u64(le32_to_cpu(ch_info_ev.cycle_count), 7754 cc_freq_hz); 7755 survey->time_busy = 7756 div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 7757 cc_freq_hz); 7758 survey->filled = SURVEY_INFO_NOISE_DBM | 7759 SURVEY_INFO_TIME | 7760 SURVEY_INFO_TIME_BUSY; 7761 } 7762 } 7763 exit: 7764 spin_unlock_bh(&ar->data_lock); 7765 rcu_read_unlock(); 7766 } 7767 7768 static void 7769 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 7770 { 7771 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 7772 struct survey_info *survey; 7773 struct ath12k *ar; 7774 struct ath12k_hw *ah; 7775 u32 cc_freq_hz = ab->cc_freq_hz; 7776 u64 busy, total, tx, rx, rx_bss; 7777 int idx; 7778 7779 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 7780 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 7781 return; 7782 } 7783 7784 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 7785 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 7786 7787 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 7788 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 7789 7790 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 7791 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 7792 7793 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 7794 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 7795 7796 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 7797 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 7798 7799 ath12k_dbg(ab, ATH12K_DBG_WMI, 7800 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 7801 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 7802 bss_ch_info_ev.noise_floor, busy, total, 7803 tx, rx, rx_bss); 7804 7805 rcu_read_lock(); 7806 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 7807 7808 if (!ar) { 7809 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 7810 bss_ch_info_ev.pdev_id); 7811 rcu_read_unlock(); 7812 return; 7813 } 7814 7815 ah = ath12k_ar_to_ah(ar); 7816 7817 idx = freq_to_idx(ath12k_ar_to_hw(ar), le32_to_cpu(bss_ch_info_ev.freq)); 7818 if (idx >= ARRAY_SIZE(ah->survey)) { 7819 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 7820 bss_ch_info_ev.freq, idx); 7821 goto exit; 7822 } 7823 7824 scoped_guard(spinlock_bh, &ah->survey_lock) { 7825 survey = &ah->survey[idx]; 7826 7827 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 7828 survey->time = div_u64(total, cc_freq_hz); 7829 survey->time_busy = div_u64(busy, cc_freq_hz); 7830 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 7831 survey->time_tx = div_u64(tx, cc_freq_hz); 7832 survey->filled |= (SURVEY_INFO_NOISE_DBM | 7833 SURVEY_INFO_TIME | 7834 SURVEY_INFO_TIME_BUSY | 7835 SURVEY_INFO_TIME_RX | 7836 SURVEY_INFO_TIME_TX); 7837 } 7838 7839 exit: 7840 complete(&ar->bss_survey_done); 7841 7842 rcu_read_unlock(); 7843 } 7844 7845 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 7846 struct sk_buff *skb) 7847 { 7848 struct wmi_vdev_install_key_complete_arg install_key_compl = {}; 7849 struct ath12k *ar; 7850 7851 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 7852 ath12k_warn(ab, "failed to extract install key compl event"); 7853 return; 7854 } 7855 7856 ath12k_dbg(ab, ATH12K_DBG_WMI, 7857 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 7858 install_key_compl.key_idx, install_key_compl.key_flags, 7859 install_key_compl.macaddr, install_key_compl.status); 7860 7861 rcu_read_lock(); 7862 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 7863 if (!ar) { 7864 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 7865 install_key_compl.vdev_id); 7866 rcu_read_unlock(); 7867 return; 7868 } 7869 7870 ar->install_key_status = 0; 7871 7872 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 7873 ath12k_warn(ab, "install key failed for %pM status %d\n", 7874 install_key_compl.macaddr, install_key_compl.status); 7875 ar->install_key_status = install_key_compl.status; 7876 } 7877 7878 complete(&ar->install_key_done); 7879 rcu_read_unlock(); 7880 } 7881 7882 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 7883 u16 tag, u16 len, 7884 const void *ptr, 7885 void *data) 7886 { 7887 const struct wmi_service_available_event *ev; 7888 u16 wmi_ext2_service_words; 7889 __le32 *wmi_ext2_service_bitmap; 7890 int i, j; 7891 u16 expected_len; 7892 7893 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 7894 if (len < expected_len) { 7895 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 7896 len, tag); 7897 return -EINVAL; 7898 } 7899 7900 switch (tag) { 7901 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 7902 ev = (struct wmi_service_available_event *)ptr; 7903 for (i = 0, j = WMI_MAX_SERVICE; 7904 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 7905 i++) { 7906 do { 7907 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 7908 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 7909 set_bit(j, ab->wmi_ab.svc_map); 7910 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 7911 } 7912 7913 ath12k_dbg(ab, ATH12K_DBG_WMI, 7914 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 7915 ev->wmi_service_segment_bitmap[0], 7916 ev->wmi_service_segment_bitmap[1], 7917 ev->wmi_service_segment_bitmap[2], 7918 ev->wmi_service_segment_bitmap[3]); 7919 break; 7920 case WMI_TAG_ARRAY_UINT32: 7921 wmi_ext2_service_bitmap = (__le32 *)ptr; 7922 wmi_ext2_service_words = len / sizeof(u32); 7923 for (i = 0, j = WMI_MAX_EXT_SERVICE; 7924 i < wmi_ext2_service_words && j < WMI_MAX_EXT2_SERVICE; 7925 i++) { 7926 do { 7927 if (__le32_to_cpu(wmi_ext2_service_bitmap[i]) & 7928 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 7929 set_bit(j, ab->wmi_ab.svc_map); 7930 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 7931 ath12k_dbg(ab, ATH12K_DBG_WMI, 7932 "wmi_ext2_service bitmap 0x%08x\n", 7933 __le32_to_cpu(wmi_ext2_service_bitmap[i])); 7934 } 7935 7936 break; 7937 } 7938 return 0; 7939 } 7940 7941 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 7942 { 7943 int ret; 7944 7945 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 7946 ath12k_wmi_tlv_services_parser, 7947 NULL); 7948 return ret; 7949 } 7950 7951 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 7952 { 7953 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {}; 7954 struct ath12k *ar; 7955 7956 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 7957 ath12k_warn(ab, "failed to extract peer assoc conf event"); 7958 return; 7959 } 7960 7961 ath12k_dbg(ab, ATH12K_DBG_WMI, 7962 "peer assoc conf ev vdev id %d macaddr %pM\n", 7963 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 7964 7965 rcu_read_lock(); 7966 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 7967 7968 if (!ar) { 7969 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 7970 peer_assoc_conf.vdev_id); 7971 rcu_read_unlock(); 7972 return; 7973 } 7974 7975 complete(&ar->peer_assoc_done); 7976 rcu_read_unlock(); 7977 } 7978 7979 static void 7980 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar, 7981 struct ath12k_fw_stats *fw_stats, 7982 char *buf, u32 *length) 7983 { 7984 const struct ath12k_fw_stats_vdev *vdev; 7985 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7986 struct ath12k_link_vif *arvif; 7987 u32 len = *length; 7988 u8 *vif_macaddr; 7989 int i; 7990 7991 len += scnprintf(buf + len, buf_len - len, "\n"); 7992 len += scnprintf(buf + len, buf_len - len, "%30s\n", 7993 "ath12k VDEV stats"); 7994 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7995 "================="); 7996 7997 list_for_each_entry(vdev, &fw_stats->vdevs, list) { 7998 arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id); 7999 if (!arvif) 8000 continue; 8001 vif_macaddr = arvif->ahvif->vif->addr; 8002 8003 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8004 "VDEV ID", vdev->vdev_id); 8005 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", 8006 "VDEV MAC address", vif_macaddr); 8007 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8008 "beacon snr", vdev->beacon_snr); 8009 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8010 "data snr", vdev->data_snr); 8011 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8012 "num rx frames", vdev->num_rx_frames); 8013 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8014 "num rts fail", vdev->num_rts_fail); 8015 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8016 "num rts success", vdev->num_rts_success); 8017 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8018 "num rx err", vdev->num_rx_err); 8019 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8020 "num rx discard", vdev->num_rx_discard); 8021 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8022 "num tx not acked", vdev->num_tx_not_acked); 8023 8024 for (i = 0 ; i < WLAN_MAX_AC; i++) 8025 len += scnprintf(buf + len, buf_len - len, 8026 "%25s [%02d] %u\n", 8027 "num tx frames", i, 8028 vdev->num_tx_frames[i]); 8029 8030 for (i = 0 ; i < WLAN_MAX_AC; i++) 8031 len += scnprintf(buf + len, buf_len - len, 8032 "%25s [%02d] %u\n", 8033 "num tx frames retries", i, 8034 vdev->num_tx_frames_retries[i]); 8035 8036 for (i = 0 ; i < WLAN_MAX_AC; i++) 8037 len += scnprintf(buf + len, buf_len - len, 8038 "%25s [%02d] %u\n", 8039 "num tx frames failures", i, 8040 vdev->num_tx_frames_failures[i]); 8041 8042 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++) 8043 len += scnprintf(buf + len, buf_len - len, 8044 "%25s [%02d] 0x%08x\n", 8045 "tx rate history", i, 8046 vdev->tx_rate_history[i]); 8047 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++) 8048 len += scnprintf(buf + len, buf_len - len, 8049 "%25s [%02d] %u\n", 8050 "beacon rssi history", i, 8051 vdev->beacon_rssi_history[i]); 8052 8053 len += scnprintf(buf + len, buf_len - len, "\n"); 8054 *length = len; 8055 } 8056 } 8057 8058 static void 8059 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar, 8060 struct ath12k_fw_stats *fw_stats, 8061 char *buf, u32 *length) 8062 { 8063 const struct ath12k_fw_stats_bcn *bcn; 8064 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 8065 struct ath12k_link_vif *arvif; 8066 u32 len = *length; 8067 size_t num_bcn; 8068 8069 num_bcn = list_count_nodes(&fw_stats->bcn); 8070 8071 len += scnprintf(buf + len, buf_len - len, "\n"); 8072 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 8073 "ath12k Beacon stats", num_bcn); 8074 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8075 "==================="); 8076 8077 list_for_each_entry(bcn, &fw_stats->bcn, list) { 8078 arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id); 8079 if (!arvif) 8080 continue; 8081 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8082 "VDEV ID", bcn->vdev_id); 8083 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", 8084 "VDEV MAC address", arvif->ahvif->vif->addr); 8085 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8086 "================"); 8087 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8088 "Num of beacon tx success", bcn->tx_bcn_succ_cnt); 8089 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 8090 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt); 8091 8092 len += scnprintf(buf + len, buf_len - len, "\n"); 8093 *length = len; 8094 } 8095 } 8096 8097 static void 8098 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 8099 char *buf, u32 *length, u64 fw_soc_drop_cnt) 8100 { 8101 u32 len = *length; 8102 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 8103 8104 len = scnprintf(buf + len, buf_len - len, "\n"); 8105 len += scnprintf(buf + len, buf_len - len, "%30s\n", 8106 "ath12k PDEV stats"); 8107 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8108 "================="); 8109 8110 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8111 "Channel noise floor", pdev->ch_noise_floor); 8112 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8113 "Channel TX power", pdev->chan_tx_power); 8114 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8115 "TX frame count", pdev->tx_frame_count); 8116 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8117 "RX frame count", pdev->rx_frame_count); 8118 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8119 "RX clear count", pdev->rx_clear_count); 8120 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8121 "Cycle count", pdev->cycle_count); 8122 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8123 "PHY error count", pdev->phy_err_count); 8124 len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n", 8125 "soc drop count", fw_soc_drop_cnt); 8126 8127 *length = len; 8128 } 8129 8130 static void 8131 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 8132 char *buf, u32 *length) 8133 { 8134 u32 len = *length; 8135 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 8136 8137 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 8138 "ath12k PDEV TX stats"); 8139 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8140 "===================="); 8141 8142 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8143 "HTT cookies queued", pdev->comp_queued); 8144 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8145 "HTT cookies disp.", pdev->comp_delivered); 8146 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8147 "MSDU queued", pdev->msdu_enqued); 8148 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8149 "MPDU queued", pdev->mpdu_enqued); 8150 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8151 "MSDUs dropped", pdev->wmm_drop); 8152 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8153 "Local enqued", pdev->local_enqued); 8154 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8155 "Local freed", pdev->local_freed); 8156 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8157 "HW queued", pdev->hw_queued); 8158 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8159 "PPDUs reaped", pdev->hw_reaped); 8160 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8161 "Num underruns", pdev->underrun); 8162 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8163 "PPDUs cleaned", pdev->tx_abort); 8164 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8165 "MPDUs requeued", pdev->mpdus_requed); 8166 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8167 "Excessive retries", pdev->tx_ko); 8168 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8169 "HW rate", pdev->data_rc); 8170 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8171 "Sched self triggers", pdev->self_triggers); 8172 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8173 "Dropped due to SW retries", 8174 pdev->sw_retry_failure); 8175 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8176 "Illegal rate phy errors", 8177 pdev->illgl_rate_phy_err); 8178 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8179 "PDEV continuous xretry", pdev->pdev_cont_xretry); 8180 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8181 "TX timeout", pdev->pdev_tx_timeout); 8182 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8183 "PDEV resets", pdev->pdev_resets); 8184 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8185 "Stateless TIDs alloc failures", 8186 pdev->stateless_tid_alloc_failure); 8187 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8188 "PHY underrun", pdev->phy_underrun); 8189 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 8190 "MPDU is more than txop limit", pdev->txop_ovf); 8191 *length = len; 8192 } 8193 8194 static void 8195 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 8196 char *buf, u32 *length) 8197 { 8198 u32 len = *length; 8199 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 8200 8201 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 8202 "ath12k PDEV RX stats"); 8203 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 8204 "===================="); 8205 8206 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8207 "Mid PPDU route change", 8208 pdev->mid_ppdu_route_change); 8209 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8210 "Tot. number of statuses", pdev->status_rcvd); 8211 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8212 "Extra frags on rings 0", pdev->r0_frags); 8213 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8214 "Extra frags on rings 1", pdev->r1_frags); 8215 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8216 "Extra frags on rings 2", pdev->r2_frags); 8217 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8218 "Extra frags on rings 3", pdev->r3_frags); 8219 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8220 "MSDUs delivered to HTT", pdev->htt_msdus); 8221 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8222 "MPDUs delivered to HTT", pdev->htt_mpdus); 8223 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8224 "MSDUs delivered to stack", pdev->loc_msdus); 8225 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8226 "MPDUs delivered to stack", pdev->loc_mpdus); 8227 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8228 "Oversized AMSUs", pdev->oversize_amsdu); 8229 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8230 "PHY errors", pdev->phy_errs); 8231 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8232 "PHY errors drops", pdev->phy_err_drop); 8233 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 8234 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs); 8235 *length = len; 8236 } 8237 8238 static void 8239 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar, 8240 struct ath12k_fw_stats *fw_stats, 8241 char *buf, u32 *length) 8242 { 8243 const struct ath12k_fw_stats_pdev *pdev; 8244 u32 len = *length; 8245 8246 pdev = list_first_entry_or_null(&fw_stats->pdevs, 8247 struct ath12k_fw_stats_pdev, list); 8248 if (!pdev) { 8249 ath12k_warn(ar->ab, "failed to get pdev stats\n"); 8250 return; 8251 } 8252 8253 ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len, 8254 ar->ab->fw_soc_drop_count); 8255 ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len); 8256 ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len); 8257 8258 *length = len; 8259 } 8260 8261 void ath12k_wmi_fw_stats_dump(struct ath12k *ar, 8262 struct ath12k_fw_stats *fw_stats, 8263 u32 stats_id, char *buf) 8264 { 8265 u32 len = 0; 8266 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 8267 8268 spin_lock_bh(&ar->data_lock); 8269 8270 switch (stats_id) { 8271 case WMI_REQUEST_VDEV_STAT: 8272 ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len); 8273 break; 8274 case WMI_REQUEST_BCN_STAT: 8275 ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len); 8276 break; 8277 case WMI_REQUEST_PDEV_STAT: 8278 ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len); 8279 break; 8280 default: 8281 break; 8282 } 8283 8284 spin_unlock_bh(&ar->data_lock); 8285 8286 if (len >= buf_len) 8287 buf[len - 1] = 0; 8288 else 8289 buf[len] = 0; 8290 } 8291 8292 static void 8293 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src, 8294 struct ath12k_fw_stats_vdev *dst) 8295 { 8296 int i; 8297 8298 dst->vdev_id = le32_to_cpu(src->vdev_id); 8299 dst->beacon_snr = le32_to_cpu(src->beacon_snr); 8300 dst->data_snr = le32_to_cpu(src->data_snr); 8301 dst->num_rx_frames = le32_to_cpu(src->num_rx_frames); 8302 dst->num_rts_fail = le32_to_cpu(src->num_rts_fail); 8303 dst->num_rts_success = le32_to_cpu(src->num_rts_success); 8304 dst->num_rx_err = le32_to_cpu(src->num_rx_err); 8305 dst->num_rx_discard = le32_to_cpu(src->num_rx_discard); 8306 dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked); 8307 8308 for (i = 0; i < WLAN_MAX_AC; i++) 8309 dst->num_tx_frames[i] = 8310 le32_to_cpu(src->num_tx_frames[i]); 8311 8312 for (i = 0; i < WLAN_MAX_AC; i++) 8313 dst->num_tx_frames_retries[i] = 8314 le32_to_cpu(src->num_tx_frames_retries[i]); 8315 8316 for (i = 0; i < WLAN_MAX_AC; i++) 8317 dst->num_tx_frames_failures[i] = 8318 le32_to_cpu(src->num_tx_frames_failures[i]); 8319 8320 for (i = 0; i < MAX_TX_RATE_VALUES; i++) 8321 dst->tx_rate_history[i] = 8322 le32_to_cpu(src->tx_rate_history[i]); 8323 8324 for (i = 0; i < MAX_TX_RATE_VALUES; i++) 8325 dst->beacon_rssi_history[i] = 8326 le32_to_cpu(src->beacon_rssi_history[i]); 8327 } 8328 8329 static void 8330 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src, 8331 struct ath12k_fw_stats_bcn *dst) 8332 { 8333 dst->vdev_id = le32_to_cpu(src->vdev_id); 8334 dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt); 8335 dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt); 8336 } 8337 8338 static void 8339 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src, 8340 struct ath12k_fw_stats_pdev *dst) 8341 { 8342 dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf); 8343 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); 8344 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); 8345 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); 8346 dst->cycle_count = __le32_to_cpu(src->cycle_count); 8347 dst->phy_err_count = __le32_to_cpu(src->phy_err_count); 8348 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); 8349 } 8350 8351 static void 8352 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src, 8353 struct ath12k_fw_stats_pdev *dst) 8354 { 8355 dst->comp_queued = a_sle32_to_cpu(src->comp_queued); 8356 dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered); 8357 dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued); 8358 dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued); 8359 dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop); 8360 dst->local_enqued = a_sle32_to_cpu(src->local_enqued); 8361 dst->local_freed = a_sle32_to_cpu(src->local_freed); 8362 dst->hw_queued = a_sle32_to_cpu(src->hw_queued); 8363 dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped); 8364 dst->underrun = a_sle32_to_cpu(src->underrun); 8365 dst->tx_abort = a_sle32_to_cpu(src->tx_abort); 8366 dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed); 8367 dst->tx_ko = __le32_to_cpu(src->tx_ko); 8368 dst->data_rc = __le32_to_cpu(src->data_rc); 8369 dst->self_triggers = __le32_to_cpu(src->self_triggers); 8370 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); 8371 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); 8372 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); 8373 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); 8374 dst->pdev_resets = __le32_to_cpu(src->pdev_resets); 8375 dst->stateless_tid_alloc_failure = 8376 __le32_to_cpu(src->stateless_tid_alloc_failure); 8377 dst->phy_underrun = __le32_to_cpu(src->phy_underrun); 8378 dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 8379 } 8380 8381 static void 8382 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src, 8383 struct ath12k_fw_stats_pdev *dst) 8384 { 8385 dst->mid_ppdu_route_change = 8386 a_sle32_to_cpu(src->mid_ppdu_route_change); 8387 dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd); 8388 dst->r0_frags = a_sle32_to_cpu(src->r0_frags); 8389 dst->r1_frags = a_sle32_to_cpu(src->r1_frags); 8390 dst->r2_frags = a_sle32_to_cpu(src->r2_frags); 8391 dst->r3_frags = a_sle32_to_cpu(src->r3_frags); 8392 dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus); 8393 dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus); 8394 dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus); 8395 dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus); 8396 dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu); 8397 dst->phy_errs = a_sle32_to_cpu(src->phy_errs); 8398 dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop); 8399 dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs); 8400 } 8401 8402 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab, 8403 struct wmi_tlv_fw_stats_parse *parse, 8404 const void *ptr, 8405 u16 len) 8406 { 8407 const struct wmi_stats_event *ev = parse->ev; 8408 struct ath12k_fw_stats *stats = parse->stats; 8409 struct ath12k *ar; 8410 struct ath12k_link_vif *arvif; 8411 struct ath12k_link_sta *arsta; 8412 int i, ret = 0; 8413 const void *data = ptr; 8414 8415 if (!ev) { 8416 ath12k_warn(ab, "failed to fetch update stats ev"); 8417 return -EPROTO; 8418 } 8419 8420 if (!stats) 8421 return -EINVAL; 8422 8423 rcu_read_lock(); 8424 8425 stats->pdev_id = le32_to_cpu(ev->pdev_id); 8426 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id); 8427 if (!ar) { 8428 ath12k_warn(ab, "invalid pdev id %d in update stats event\n", 8429 le32_to_cpu(ev->pdev_id)); 8430 ret = -EPROTO; 8431 goto exit; 8432 } 8433 8434 for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) { 8435 const struct wmi_vdev_stats_params *src; 8436 struct ath12k_fw_stats_vdev *dst; 8437 8438 src = data; 8439 if (len < sizeof(*src)) { 8440 ret = -EPROTO; 8441 goto exit; 8442 } 8443 8444 arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id)); 8445 if (arvif) { 8446 spin_lock_bh(&ab->base_lock); 8447 arsta = ath12k_link_sta_find_by_addr(ab, arvif->bssid); 8448 if (arsta) { 8449 arsta->rssi_beacon = le32_to_cpu(src->beacon_snr); 8450 ath12k_dbg(ab, ATH12K_DBG_WMI, 8451 "wmi stats vdev id %d snr %d\n", 8452 src->vdev_id, src->beacon_snr); 8453 } else { 8454 ath12k_warn(ab, 8455 "not found link sta with bssid %pM for vdev stat\n", 8456 arvif->bssid); 8457 } 8458 spin_unlock_bh(&ab->base_lock); 8459 } 8460 8461 data += sizeof(*src); 8462 len -= sizeof(*src); 8463 dst = kzalloc_obj(*dst, GFP_ATOMIC); 8464 if (!dst) 8465 continue; 8466 ath12k_wmi_pull_vdev_stats(src, dst); 8467 stats->stats_id = WMI_REQUEST_VDEV_STAT; 8468 list_add_tail(&dst->list, &stats->vdevs); 8469 } 8470 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) { 8471 const struct ath12k_wmi_bcn_stats_params *src; 8472 struct ath12k_fw_stats_bcn *dst; 8473 8474 src = data; 8475 if (len < sizeof(*src)) { 8476 ret = -EPROTO; 8477 goto exit; 8478 } 8479 8480 data += sizeof(*src); 8481 len -= sizeof(*src); 8482 dst = kzalloc_obj(*dst, GFP_ATOMIC); 8483 if (!dst) 8484 continue; 8485 ath12k_wmi_pull_bcn_stats(src, dst); 8486 stats->stats_id = WMI_REQUEST_BCN_STAT; 8487 list_add_tail(&dst->list, &stats->bcn); 8488 } 8489 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) { 8490 const struct ath12k_wmi_pdev_stats_params *src; 8491 struct ath12k_fw_stats_pdev *dst; 8492 8493 src = data; 8494 if (len < sizeof(*src)) { 8495 ret = -EPROTO; 8496 goto exit; 8497 } 8498 8499 stats->stats_id = WMI_REQUEST_PDEV_STAT; 8500 8501 data += sizeof(*src); 8502 len -= sizeof(*src); 8503 8504 dst = kzalloc_obj(*dst, GFP_ATOMIC); 8505 if (!dst) 8506 continue; 8507 8508 ath12k_wmi_pull_pdev_stats_base(&src->base, dst); 8509 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst); 8510 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst); 8511 list_add_tail(&dst->list, &stats->pdevs); 8512 } 8513 8514 exit: 8515 rcu_read_unlock(); 8516 return ret; 8517 } 8518 8519 static int ath12k_wmi_tlv_rssi_chain_parse(struct ath12k_base *ab, 8520 u16 tag, u16 len, 8521 const void *ptr, void *data) 8522 { 8523 const struct wmi_rssi_stat_params *stats_rssi = ptr; 8524 struct wmi_tlv_fw_stats_parse *parse = data; 8525 const struct wmi_stats_event *ev = parse->ev; 8526 struct ath12k_fw_stats *stats = parse->stats; 8527 struct ath12k_link_vif *arvif; 8528 struct ath12k_link_sta *arsta; 8529 struct ath12k *ar; 8530 int vdev_id; 8531 int j; 8532 8533 if (!ev) { 8534 ath12k_warn(ab, "failed to fetch update stats ev"); 8535 return -EPROTO; 8536 } 8537 8538 if (tag != WMI_TAG_RSSI_STATS) 8539 return -EPROTO; 8540 8541 if (!stats) 8542 return -EINVAL; 8543 8544 stats->pdev_id = le32_to_cpu(ev->pdev_id); 8545 vdev_id = le32_to_cpu(stats_rssi->vdev_id); 8546 guard(rcu)(); 8547 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id); 8548 if (!ar) { 8549 ath12k_warn(ab, "invalid pdev id %d in rssi chain parse\n", 8550 stats->pdev_id); 8551 return -EPROTO; 8552 } 8553 8554 arvif = ath12k_mac_get_arvif(ar, vdev_id); 8555 if (!arvif) { 8556 ath12k_warn(ab, "not found vif for vdev id %d\n", vdev_id); 8557 return -EPROTO; 8558 } 8559 8560 ath12k_dbg(ab, ATH12K_DBG_WMI, 8561 "stats bssid %pM vif %p\n", 8562 arvif->bssid, arvif->ahvif->vif); 8563 8564 guard(spinlock_bh)(&ab->base_lock); 8565 arsta = ath12k_link_sta_find_by_addr(ab, arvif->bssid); 8566 if (!arsta) { 8567 ath12k_warn(ab, 8568 "not found link sta with bssid %pM for rssi chain\n", 8569 arvif->bssid); 8570 return -EPROTO; 8571 } 8572 8573 BUILD_BUG_ON(ARRAY_SIZE(arsta->chain_signal) > 8574 ARRAY_SIZE(stats_rssi->rssi_avg_beacon)); 8575 8576 for (j = 0; j < ARRAY_SIZE(arsta->chain_signal); j++) 8577 arsta->chain_signal[j] = le32_to_cpu(stats_rssi->rssi_avg_beacon[j]); 8578 8579 stats->stats_id = WMI_REQUEST_RSSI_PER_CHAIN_STAT; 8580 8581 return 0; 8582 } 8583 8584 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab, 8585 u16 tag, u16 len, 8586 const void *ptr, void *data) 8587 { 8588 struct wmi_tlv_fw_stats_parse *parse = data; 8589 int ret = 0; 8590 8591 switch (tag) { 8592 case WMI_TAG_STATS_EVENT: 8593 parse->ev = ptr; 8594 break; 8595 case WMI_TAG_ARRAY_BYTE: 8596 ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len); 8597 break; 8598 case WMI_TAG_PER_CHAIN_RSSI_STATS: 8599 parse->rssi = ptr; 8600 if (le32_to_cpu(parse->ev->stats_id) & WMI_REQUEST_RSSI_PER_CHAIN_STAT) 8601 parse->rssi_num = le32_to_cpu(parse->rssi->num_per_chain_rssi); 8602 break; 8603 case WMI_TAG_ARRAY_STRUCT: 8604 if (parse->rssi_num && !parse->chain_rssi_done) { 8605 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 8606 ath12k_wmi_tlv_rssi_chain_parse, 8607 parse); 8608 if (ret) 8609 return ret; 8610 8611 parse->chain_rssi_done = true; 8612 } 8613 break; 8614 default: 8615 break; 8616 } 8617 return ret; 8618 } 8619 8620 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb, 8621 struct ath12k_fw_stats *stats) 8622 { 8623 struct wmi_tlv_fw_stats_parse parse = {}; 8624 8625 stats->stats_id = 0; 8626 parse.stats = stats; 8627 8628 return ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 8629 ath12k_wmi_tlv_fw_stats_parse, 8630 &parse); 8631 } 8632 8633 static void ath12k_wmi_fw_stats_process(struct ath12k *ar, 8634 struct ath12k_fw_stats *stats) 8635 { 8636 struct ath12k_base *ab = ar->ab; 8637 struct ath12k_pdev *pdev; 8638 bool is_end = true; 8639 size_t total_vdevs_started = 0; 8640 int i; 8641 8642 if (stats->stats_id == WMI_REQUEST_VDEV_STAT) { 8643 if (list_empty(&stats->vdevs)) { 8644 ath12k_warn(ab, "empty vdev stats"); 8645 return; 8646 } 8647 /* FW sends all the active VDEV stats irrespective of PDEV, 8648 * hence limit until the count of all VDEVs started 8649 */ 8650 rcu_read_lock(); 8651 for (i = 0; i < ab->num_radios; i++) { 8652 pdev = rcu_dereference(ab->pdevs_active[i]); 8653 if (pdev && pdev->ar) 8654 total_vdevs_started += pdev->ar->num_started_vdevs; 8655 } 8656 rcu_read_unlock(); 8657 8658 if (total_vdevs_started) 8659 is_end = ((++ar->fw_stats.num_vdev_recvd) == 8660 total_vdevs_started); 8661 8662 list_splice_tail_init(&stats->vdevs, 8663 &ar->fw_stats.vdevs); 8664 8665 if (is_end) 8666 complete(&ar->fw_stats_done); 8667 8668 return; 8669 } 8670 8671 if (stats->stats_id == WMI_REQUEST_BCN_STAT) { 8672 if (list_empty(&stats->bcn)) { 8673 ath12k_warn(ab, "empty beacon stats"); 8674 return; 8675 } 8676 8677 list_splice_tail_init(&stats->bcn, 8678 &ar->fw_stats.bcn); 8679 complete(&ar->fw_stats_done); 8680 } 8681 } 8682 8683 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 8684 { 8685 struct ath12k_fw_stats stats = {}; 8686 struct ath12k *ar; 8687 int ret; 8688 8689 INIT_LIST_HEAD(&stats.pdevs); 8690 INIT_LIST_HEAD(&stats.vdevs); 8691 INIT_LIST_HEAD(&stats.bcn); 8692 8693 ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats); 8694 if (ret) { 8695 ath12k_warn(ab, "failed to pull fw stats: %d\n", ret); 8696 goto free; 8697 } 8698 8699 ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats"); 8700 8701 rcu_read_lock(); 8702 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id); 8703 if (!ar) { 8704 rcu_read_unlock(); 8705 ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n", 8706 stats.pdev_id, ret); 8707 goto free; 8708 } 8709 8710 spin_lock_bh(&ar->data_lock); 8711 8712 /* Handle WMI_REQUEST_PDEV_STAT status update */ 8713 if (stats.stats_id == WMI_REQUEST_PDEV_STAT) { 8714 list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs); 8715 complete(&ar->fw_stats_done); 8716 goto complete; 8717 } 8718 8719 /* Handle WMI_REQUEST_RSSI_PER_CHAIN_STAT status update */ 8720 if (stats.stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) { 8721 complete(&ar->fw_stats_done); 8722 goto complete; 8723 } 8724 8725 /* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */ 8726 ath12k_wmi_fw_stats_process(ar, &stats); 8727 8728 complete: 8729 complete(&ar->fw_stats_complete); 8730 spin_unlock_bh(&ar->data_lock); 8731 rcu_read_unlock(); 8732 8733 /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised 8734 * at this point, no need to free the individual list. 8735 */ 8736 return; 8737 8738 free: 8739 ath12k_fw_stats_free(&stats); 8740 } 8741 8742 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 8743 * is not part of BDF CTL(Conformance test limits) table entries. 8744 */ 8745 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 8746 struct sk_buff *skb) 8747 { 8748 const void **tb; 8749 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 8750 int ret; 8751 8752 tb = ath12k_wmi_tlv_parse(ab, skb); 8753 if (IS_ERR(tb)) { 8754 ret = PTR_ERR(tb); 8755 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8756 return; 8757 } 8758 8759 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 8760 if (!ev) { 8761 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 8762 return; 8763 } 8764 8765 ath12k_dbg(ab, ATH12K_DBG_WMI, 8766 "pdev ctl failsafe check ev status %d\n", 8767 ev->ctl_failsafe_status); 8768 8769 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 8770 * to 10 dBm else the CTL power entry in the BDF would be picked up. 8771 */ 8772 if (ev->ctl_failsafe_status != 0) 8773 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 8774 ev->ctl_failsafe_status); 8775 } 8776 8777 static int 8778 ath12k_wmi_incumbent_signal_interference_subtlv_parser(struct ath12k_base *ab, 8779 u16 tag, u16 len, 8780 const void *ptr, 8781 void *data) 8782 { 8783 const struct ath12k_wmi_incumbent_signal_interference_params *info; 8784 struct ath12k_wmi_incumbent_signal_interference_arg *arg = data; 8785 8786 switch (tag) { 8787 case WMI_TAG_DCS_INCUMBENT_SIGNAL_INTERFERENCE_TYPE: 8788 if (len < sizeof(*info)) { 8789 ath12k_warn(ab, 8790 "DCS incumbent signal interference subtlv 0x%x invalid len %u\n", 8791 tag, len); 8792 return -EINVAL; 8793 } 8794 8795 info = ptr; 8796 8797 arg->chan_width = le32_to_cpu(info->chan_width); 8798 arg->chan_freq = le32_to_cpu(info->chan_freq); 8799 arg->center_freq0 = le32_to_cpu(info->center_freq0); 8800 arg->center_freq1 = le32_to_cpu(info->center_freq1); 8801 arg->chan_bw_interference_bitmap = 8802 le32_to_cpu(info->chan_bw_interference_bitmap); 8803 8804 ath12k_dbg(ab, ATH12K_DBG_WMI, 8805 "incumbent signal interference chan width %u freq %u center_freq0 %u center_freq1 %u bitmap 0x%x\n", 8806 arg->chan_width, arg->chan_freq, 8807 arg->center_freq0, arg->center_freq1, 8808 arg->chan_bw_interference_bitmap); 8809 break; 8810 default: 8811 ath12k_warn(ab, "Received invalid tag 0x%x for WMI DCS interference in subtlvs\n", 8812 tag); 8813 return -EINVAL; 8814 } 8815 8816 return 0; 8817 } 8818 8819 static int ath12k_wmi_dcs_interference_event_parser(struct ath12k_base *ab, 8820 u16 tag, u16 len, 8821 const void *ptr, void *data) 8822 { 8823 int ret = 0; 8824 8825 switch (tag) { 8826 case WMI_TAG_DCS_INTERFERENCE_EVENT: 8827 /* Fixed param should already be processed */ 8828 break; 8829 case WMI_TAG_ARRAY_STRUCT: 8830 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 8831 ath12k_wmi_incumbent_signal_interference_subtlv_parser, 8832 data); 8833 break; 8834 default: 8835 ath12k_warn(ab, "Received invalid tag 0x%x for WMI DCS interference event\n", 8836 tag); 8837 ret = -EINVAL; 8838 break; 8839 } 8840 8841 return ret; 8842 } 8843 8844 static bool 8845 ath12k_wmi_validate_interference_info(struct ath12k *ar, 8846 struct ath12k_wmi_incumbent_signal_interference_arg *info) 8847 { 8848 switch (info->chan_width) { 8849 case WMI_CHAN_WIDTH_20: 8850 if (info->chan_bw_interference_bitmap > ATH12K_WMI_DCS_SEG_PRI20) { 8851 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 8852 "DCS interference event received with wrong chan width bmap 0x%x for 20 MHz", 8853 info->chan_bw_interference_bitmap); 8854 return false; 8855 } 8856 break; 8857 case WMI_CHAN_WIDTH_40: 8858 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 | 8859 ATH12K_WMI_DCS_SEG_SEC20)) { 8860 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 8861 "DCS interference event received with wrong chan width bmap 0x%x for 40 MHz", 8862 info->chan_bw_interference_bitmap); 8863 return false; 8864 } 8865 break; 8866 case WMI_CHAN_WIDTH_80: 8867 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 | 8868 ATH12K_WMI_DCS_SEG_SEC20 | 8869 ATH12K_WMI_DCS_SEG_SEC40)) { 8870 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 8871 "DCS interference event received with wrong chan width bmap 0x%x for 80 MHz", 8872 info->chan_bw_interference_bitmap); 8873 return false; 8874 } 8875 break; 8876 case WMI_CHAN_WIDTH_160: 8877 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 | 8878 ATH12K_WMI_DCS_SEG_SEC20 | 8879 ATH12K_WMI_DCS_SEG_SEC40 | 8880 ATH12K_WMI_DCS_SEG_SEC80)) { 8881 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 8882 "DCS interference event received with wrong chan width bmap 0x%x for 160 MHz", 8883 info->chan_bw_interference_bitmap); 8884 return false; 8885 } 8886 break; 8887 case WMI_CHAN_WIDTH_320: 8888 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 | 8889 ATH12K_WMI_DCS_SEG_SEC20 | 8890 ATH12K_WMI_DCS_SEG_SEC40 | 8891 ATH12K_WMI_DCS_SEG_SEC80 | 8892 ATH12K_WMI_DCS_SEG_SEC160)) { 8893 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 8894 "DCS interference event received with wrong chan width bmap 0x%x for 320 MHz", 8895 info->chan_bw_interference_bitmap); 8896 return false; 8897 } 8898 break; 8899 default: 8900 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 8901 "DCS interference event received with unknown channel width %u", 8902 info->chan_width); 8903 return false; 8904 } 8905 return true; 8906 } 8907 8908 static u32 8909 ath12k_wmi_transform_interference_bitmap(int input_bitmap, 8910 struct cfg80211_chan_def *chandef) 8911 { 8912 u16 output_bits[ATH12K_MAX_20MHZ_SEGMENTS] = {}; 8913 u16 input_bits[ATH12K_MAX_20MHZ_SEGMENTS] = {}; 8914 u32 start_freq, segment_freq; 8915 int primary_index = -1; 8916 u32 output_bitmap = 0; 8917 u16 num_sub_chans; 8918 int bandwidth; 8919 8920 bandwidth = nl80211_chan_width_to_mhz(chandef->width); 8921 if (bandwidth < 0) 8922 return 0; 8923 8924 /* 8925 * Firmware reports bit 0 as primary 20 MHz irrespective of absolute 8926 * frequency position. Convert to standardized lowest-to-highest 20 MHz 8927 * ordering expected by cfg80211/mac80211 userspace consumers. 8928 */ 8929 num_sub_chans = bandwidth / 20; 8930 start_freq = (chandef->center_freq1 - bandwidth / 2) + 10; 8931 8932 for (int i = 0; i < ATH12K_MAX_20MHZ_SEGMENTS; i++) { 8933 segment_freq = start_freq + (i * 20); 8934 if (segment_freq == chandef->chan->center_freq) { 8935 primary_index = i; 8936 break; 8937 } 8938 } 8939 if (primary_index == -1) 8940 return 0; 8941 8942 for (int i = 0; i < ATH12K_MAX_20MHZ_SEGMENTS; ++i) 8943 input_bits[i] = BIT(i) & input_bitmap; 8944 8945 for (int i = 0; i < num_sub_chans; ++i) { 8946 int src = i, dst = i; 8947 8948 switch (bandwidth) { 8949 case 40: 8950 if (primary_index == 1) 8951 dst = 1 - i; 8952 break; 8953 case 80: 8954 dst = intf_map_80[primary_index][i]; 8955 break; 8956 case 160: 8957 dst = intf_map_160[primary_index][i]; 8958 break; 8959 case 320: 8960 dst = intf_map_320[primary_index][i]; 8961 break; 8962 } 8963 output_bits[dst] = input_bits[src]; 8964 } 8965 8966 for (int i = 0; i < ATH12K_MAX_20MHZ_SEGMENTS; ++i) 8967 output_bitmap |= output_bits[i] ? BIT(i) : 0; 8968 8969 return output_bitmap; 8970 } 8971 8972 static void 8973 ath12k_wmi_process_incumbent_signal_interference_evt(struct ath12k_base *ab, 8974 struct sk_buff *skb, 8975 const struct ath12k_wmi_intf_arg *intf_arg) 8976 { 8977 struct ath12k_wmi_incumbent_signal_interference_arg info = {}; 8978 struct ath12k_incumbent_signal_interference *incumbent; 8979 struct ath12k_mac_get_any_chanctx_conf_arg arg; 8980 u32 transformed_intf_bitmap; 8981 struct ieee80211_hw *hw; 8982 struct ath12k *ar; 8983 int ret; 8984 8985 guard(rcu)(); 8986 8987 ar = ath12k_mac_get_ar_by_pdev_id(ab, intf_arg->pdev_id); 8988 if (!ar) { 8989 ath12k_warn(ab, "incumbent signal interference detected on invalid pdev %d\n", 8990 intf_arg->pdev_id); 8991 return; 8992 } 8993 if (!ar->supports_6ghz) { 8994 ath12k_warn(ab, "pdev does not support 6 GHz, dropping DCS interference event\n"); 8995 return; 8996 } 8997 8998 incumbent = &ar->incumbent_signal_interference; 8999 spin_lock_bh(&ar->data_lock); 9000 if (incumbent->handling_in_progress) { 9001 spin_unlock_bh(&ar->data_lock); 9002 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 9003 "incumbent signal interference handling ongoing, dropping DCS interference event"); 9004 return; 9005 } 9006 spin_unlock_bh(&ar->data_lock); 9007 9008 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 9009 ath12k_wmi_dcs_interference_event_parser, 9010 &info); 9011 if (ret) { 9012 ath12k_warn(ab, 9013 "failed to parse incumbent signal interference TLV. Error %d\n", 9014 ret); 9015 return; 9016 } 9017 9018 if (!ath12k_wmi_validate_interference_info(ar, &info)) { 9019 ath12k_warn(ab, "invalid DCS incumbent signal interference TLV - Skipping event"); 9020 return; 9021 } 9022 9023 arg.ar = ar; 9024 arg.chanctx_conf = NULL; 9025 hw = ath12k_ar_to_hw(ar); 9026 ieee80211_iter_chan_contexts_atomic(hw, 9027 ath12k_mac_get_any_chanctx_conf_iter, 9028 &arg); 9029 if (!arg.chanctx_conf) { 9030 ath12k_warn(ab, "failed to find valid chanctx_conf in incumbent signal intf detected event\n"); 9031 return; 9032 } 9033 9034 if (info.chan_freq != arg.chanctx_conf->def.chan->center_freq) { 9035 ath12k_dbg(ab, ATH12K_DBG_WMI, 9036 "dcs interference event received with wrong channel %d (ctx freq %d)", 9037 info.chan_freq, arg.chanctx_conf->def.chan->center_freq); 9038 return; 9039 } 9040 9041 spin_lock_bh(&ar->data_lock); 9042 incumbent->center_freq = arg.chanctx_conf->def.chan->center_freq; 9043 incumbent->width = arg.chanctx_conf->def.width; 9044 incumbent->chan_bw_interference_bitmap = info.chan_bw_interference_bitmap; 9045 incumbent->handling_in_progress = true; 9046 spin_unlock_bh(&ar->data_lock); 9047 transformed_intf_bitmap = 9048 ath12k_wmi_transform_interference_bitmap(info.chan_bw_interference_bitmap, 9049 &arg.chanctx_conf->def); 9050 ath12k_dbg(ab, ATH12K_DBG_WMI, 9051 "incumbent signal interference bitmap 0x%x (transformed 0x%x)\n", 9052 info.chan_bw_interference_bitmap, transformed_intf_bitmap); 9053 cfg80211_incumbent_signal_notify(hw->wiphy, 9054 &arg.chanctx_conf->def, 9055 transformed_intf_bitmap, 9056 GFP_ATOMIC); 9057 } 9058 9059 static void 9060 ath12k_wmi_dcs_interference_event(struct ath12k_base *ab, 9061 struct sk_buff *skb) 9062 { 9063 const struct ath12k_wmi_dcs_interference_ev_fixed_params *dcs_intf_ev; 9064 struct ath12k_wmi_intf_arg dcs_intf_arg; 9065 const struct wmi_tlv *tlv; 9066 u16 tlv_tag; 9067 u8 *ptr; 9068 9069 if (skb->len < (sizeof(*dcs_intf_ev) + TLV_HDR_SIZE)) { 9070 ath12k_warn(ab, "DCS interference event is of incorrect length\n"); 9071 return; 9072 } 9073 9074 ptr = skb->data; 9075 tlv = (struct wmi_tlv *)ptr; 9076 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 9077 ptr += sizeof(*tlv); 9078 9079 if (tlv_tag != WMI_TAG_DCS_INTERFERENCE_EVENT) { 9080 ath12k_warn(ab, "DCS interference event received with wrong tag\n"); 9081 return; 9082 } 9083 9084 dcs_intf_ev = (struct ath12k_wmi_dcs_interference_ev_fixed_params *)ptr; 9085 9086 dcs_intf_arg.interference_type = 9087 le32_to_cpu(dcs_intf_ev->interference_type); 9088 dcs_intf_arg.pdev_id = le32_to_cpu(dcs_intf_ev->pdev_id); 9089 9090 if (dcs_intf_arg.interference_type == 9091 ATH12K_WMI_DCS_INCUMBENT_SIGNAL_INTERFERENCE) { 9092 ath12k_dbg(ab, ATH12K_DBG_WMI, 9093 "incumbent signal interference (Type %u) detected on pdev %u.", 9094 dcs_intf_arg.interference_type, 9095 dcs_intf_arg.pdev_id); 9096 ath12k_wmi_process_incumbent_signal_interference_evt(ab, skb, 9097 &dcs_intf_arg); 9098 } 9099 } 9100 9101 static void 9102 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 9103 const struct ath12k_wmi_pdev_csa_event *ev, 9104 const u32 *vdev_ids) 9105 { 9106 u32 current_switch_count = le32_to_cpu(ev->current_switch_count); 9107 u32 vdev_ids_len = ath12k_wmi_tlv_data_len(vdev_ids); 9108 u32 num_vdevs = le32_to_cpu(ev->num_vdevs); 9109 struct ieee80211_bss_conf *conf; 9110 struct ath12k_link_vif *arvif; 9111 struct ath12k_vif *ahvif; 9112 int i; 9113 9114 if (num_vdevs > vdev_ids_len / sizeof(*vdev_ids)) { 9115 ath12k_warn(ab, "csa switch count num_vdevs %u exceeds tlv array length %u\n", 9116 num_vdevs, vdev_ids_len); 9117 return; 9118 } 9119 9120 rcu_read_lock(); 9121 for (i = 0; i < num_vdevs; i++) { 9122 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 9123 9124 if (!arvif) { 9125 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 9126 vdev_ids[i]); 9127 continue; 9128 } 9129 ahvif = arvif->ahvif; 9130 9131 if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) { 9132 ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n", 9133 arvif->link_id); 9134 continue; 9135 } 9136 9137 conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]); 9138 if (!conf) { 9139 ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n", 9140 ahvif->vif->addr, arvif->link_id); 9141 continue; 9142 } 9143 9144 if (!arvif->is_up || !conf->csa_active) 9145 continue; 9146 9147 /* Finish CSA when counter reaches zero */ 9148 if (!current_switch_count) { 9149 ieee80211_csa_finish(ahvif->vif, arvif->link_id); 9150 arvif->current_cntdown_counter = 0; 9151 } else if (current_switch_count > 1) { 9152 /* If the count in event is not what we expect, don't update the 9153 * mac80211 count. Since during beacon Tx failure, count in the 9154 * firmware will not decrement and this event will come with the 9155 * previous count value again 9156 */ 9157 if (current_switch_count != arvif->current_cntdown_counter) 9158 continue; 9159 9160 arvif->current_cntdown_counter = 9161 ieee80211_beacon_update_cntdwn(ahvif->vif, 9162 arvif->link_id); 9163 } 9164 } 9165 rcu_read_unlock(); 9166 } 9167 9168 static void 9169 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 9170 struct sk_buff *skb) 9171 { 9172 const void **tb; 9173 const struct ath12k_wmi_pdev_csa_event *ev; 9174 const u32 *vdev_ids; 9175 int ret; 9176 9177 tb = ath12k_wmi_tlv_parse(ab, skb); 9178 if (IS_ERR(tb)) { 9179 ret = PTR_ERR(tb); 9180 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 9181 return; 9182 } 9183 9184 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 9185 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 9186 9187 if (!ev || !vdev_ids) { 9188 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 9189 return; 9190 } 9191 9192 ath12k_dbg(ab, ATH12K_DBG_WMI, 9193 "pdev csa switch count %d for pdev %d, num_vdevs %d", 9194 ev->current_switch_count, ev->pdev_id, 9195 ev->num_vdevs); 9196 9197 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 9198 } 9199 9200 static void 9201 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 9202 { 9203 const void **tb; 9204 struct ath12k_mac_get_any_chanctx_conf_arg arg; 9205 const struct ath12k_wmi_pdev_radar_event *ev; 9206 struct ath12k *ar; 9207 int ret; 9208 9209 tb = ath12k_wmi_tlv_parse(ab, skb); 9210 if (IS_ERR(tb)) { 9211 ret = PTR_ERR(tb); 9212 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 9213 return; 9214 } 9215 9216 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 9217 9218 if (!ev) { 9219 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 9220 return; 9221 } 9222 9223 ath12k_dbg(ab, ATH12K_DBG_WMI, 9224 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 9225 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 9226 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 9227 ev->freq_offset, ev->sidx); 9228 9229 rcu_read_lock(); 9230 9231 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 9232 9233 if (!ar) { 9234 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 9235 ev->pdev_id); 9236 goto exit; 9237 } 9238 9239 arg.ar = ar; 9240 arg.chanctx_conf = NULL; 9241 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar), 9242 ath12k_mac_get_any_chanctx_conf_iter, &arg); 9243 if (!arg.chanctx_conf) { 9244 ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n"); 9245 goto exit; 9246 } 9247 9248 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 9249 ev->pdev_id); 9250 9251 if (ar->dfs_block_radar_events) 9252 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 9253 else 9254 ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf); 9255 9256 exit: 9257 rcu_read_unlock(); 9258 } 9259 9260 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id, 9261 struct sk_buff *skb) 9262 { 9263 const struct ath12k_wmi_ftm_event *ev; 9264 const void **tb; 9265 int ret; 9266 u16 length; 9267 9268 tb = ath12k_wmi_tlv_parse(ab, skb); 9269 9270 if (IS_ERR(tb)) { 9271 ret = PTR_ERR(tb); 9272 ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret); 9273 return; 9274 } 9275 9276 ev = tb[WMI_TAG_ARRAY_BYTE]; 9277 if (!ev) { 9278 ath12k_warn(ab, "failed to fetch ftm msg\n"); 9279 return; 9280 } 9281 9282 length = skb->len - TLV_HDR_SIZE; 9283 ath12k_tm_process_event(ab, cmd_id, ev, length); 9284 } 9285 9286 static void 9287 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 9288 struct sk_buff *skb) 9289 { 9290 const struct wmi_pdev_temperature_event *ev; 9291 struct ath12k *ar; 9292 const void **tb; 9293 int temp; 9294 u32 pdev_id; 9295 9296 tb = ath12k_wmi_tlv_parse(ab, skb); 9297 if (IS_ERR(tb)) { 9298 ath12k_warn(ab, "failed to parse tlv: %ld\n", PTR_ERR(tb)); 9299 return; 9300 } 9301 9302 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 9303 if (!ev) { 9304 ath12k_warn(ab, "failed to fetch pdev temp ev\n"); 9305 return; 9306 } 9307 9308 temp = a_sle32_to_cpu(ev->temp); 9309 pdev_id = le32_to_cpu(ev->pdev_id); 9310 9311 ath12k_dbg(ab, ATH12K_DBG_WMI, 9312 "pdev temperature ev temp %d pdev_id %u\n", 9313 temp, pdev_id); 9314 9315 rcu_read_lock(); 9316 9317 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id); 9318 if (!ar) { 9319 ath12k_warn(ab, "invalid pdev id %u in pdev temperature ev\n", 9320 pdev_id); 9321 goto exit; 9322 } 9323 9324 ath12k_thermal_event_temperature(ar, temp); 9325 9326 exit: 9327 rcu_read_unlock(); 9328 } 9329 9330 static void ath12k_wmi_thermal_throt_stats_event(struct ath12k_base *ab, 9331 struct sk_buff *skb) 9332 { 9333 const struct wmi_therm_throt_stats_event *ev; 9334 struct ath12k *ar; 9335 const void **tb; 9336 9337 tb = ath12k_wmi_tlv_parse(ab, skb); 9338 if (IS_ERR(tb)) { 9339 ath12k_err(ab, "failed to parse thermal throttling stats tlv: %ld\n", 9340 PTR_ERR(tb)); 9341 return; 9342 } 9343 9344 ev = tb[WMI_TAG_THERM_THROT_STATS_EVENT]; 9345 if (!ev) { 9346 ath12k_err(ab, "failed to fetch thermal throt stats ev\n"); 9347 return; 9348 } 9349 9350 rcu_read_lock(); 9351 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 9352 if (!ar) { 9353 ath12k_warn(ab, "received thermal_throt_stats in invalid pdev %u\n", 9354 le32_to_cpu(ev->pdev_id)); 9355 rcu_read_unlock(); 9356 return; 9357 } 9358 rcu_read_unlock(); 9359 9360 ath12k_dbg(ab, ATH12K_DBG_WMI, 9361 "thermal stats ev level %u pdev_id %u temp %u throt_levels %u\n", 9362 le32_to_cpu(ev->level), le32_to_cpu(ev->pdev_id), 9363 le32_to_cpu(ev->temp), le32_to_cpu(ev->therm_throt_levels)); 9364 } 9365 9366 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 9367 struct sk_buff *skb) 9368 { 9369 const void **tb; 9370 const struct wmi_fils_discovery_event *ev; 9371 int ret; 9372 9373 tb = ath12k_wmi_tlv_parse(ab, skb); 9374 if (IS_ERR(tb)) { 9375 ret = PTR_ERR(tb); 9376 ath12k_warn(ab, 9377 "failed to parse FILS discovery event tlv %d\n", 9378 ret); 9379 return; 9380 } 9381 9382 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 9383 if (!ev) { 9384 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 9385 return; 9386 } 9387 9388 ath12k_warn(ab, 9389 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 9390 ev->vdev_id, ev->fils_tt, ev->tbtt); 9391 } 9392 9393 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 9394 struct sk_buff *skb) 9395 { 9396 const void **tb; 9397 const struct wmi_probe_resp_tx_status_event *ev; 9398 int ret; 9399 9400 tb = ath12k_wmi_tlv_parse(ab, skb); 9401 if (IS_ERR(tb)) { 9402 ret = PTR_ERR(tb); 9403 ath12k_warn(ab, 9404 "failed to parse probe response transmission status event tlv: %d\n", 9405 ret); 9406 return; 9407 } 9408 9409 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 9410 if (!ev) { 9411 ath12k_warn(ab, 9412 "failed to fetch probe response transmission status event"); 9413 return; 9414 } 9415 9416 if (ev->tx_status) 9417 ath12k_warn(ab, 9418 "Probe response transmission failed for vdev_id %u, status %u\n", 9419 ev->vdev_id, ev->tx_status); 9420 } 9421 9422 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab, 9423 struct sk_buff *skb) 9424 { 9425 const void **tb; 9426 const struct wmi_p2p_noa_event *ev; 9427 const struct ath12k_wmi_p2p_noa_info *noa; 9428 struct ath12k *ar; 9429 int ret, vdev_id; 9430 9431 tb = ath12k_wmi_tlv_parse(ab, skb); 9432 if (IS_ERR(tb)) { 9433 ret = PTR_ERR(tb); 9434 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret); 9435 return ret; 9436 } 9437 9438 ev = tb[WMI_TAG_P2P_NOA_EVENT]; 9439 noa = tb[WMI_TAG_P2P_NOA_INFO]; 9440 9441 if (!ev || !noa) 9442 return -EPROTO; 9443 9444 vdev_id = __le32_to_cpu(ev->vdev_id); 9445 9446 ath12k_dbg(ab, ATH12K_DBG_WMI, 9447 "wmi tlv p2p noa vdev_id %i descriptors %u\n", 9448 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM)); 9449 9450 rcu_read_lock(); 9451 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 9452 if (!ar) { 9453 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n", 9454 vdev_id); 9455 ret = -EINVAL; 9456 goto unlock; 9457 } 9458 9459 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa); 9460 9461 ret = 0; 9462 9463 unlock: 9464 rcu_read_unlock(); 9465 return ret; 9466 } 9467 9468 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab, 9469 struct sk_buff *skb) 9470 { 9471 const struct wmi_rfkill_state_change_event *ev; 9472 const void **tb; 9473 int ret; 9474 9475 tb = ath12k_wmi_tlv_parse(ab, skb); 9476 if (IS_ERR(tb)) { 9477 ret = PTR_ERR(tb); 9478 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 9479 return; 9480 } 9481 9482 ev = tb[WMI_TAG_RFKILL_EVENT]; 9483 if (!ev) 9484 return; 9485 9486 ath12k_dbg(ab, ATH12K_DBG_MAC, 9487 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n", 9488 le32_to_cpu(ev->gpio_pin_num), 9489 le32_to_cpu(ev->int_type), 9490 le32_to_cpu(ev->radio_state)); 9491 9492 spin_lock_bh(&ab->base_lock); 9493 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON)); 9494 spin_unlock_bh(&ab->base_lock); 9495 9496 queue_work(ab->workqueue, &ab->rfkill_work); 9497 } 9498 9499 static void 9500 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb) 9501 { 9502 trace_ath12k_wmi_diag(ab, skb->data, skb->len); 9503 } 9504 9505 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab, 9506 struct sk_buff *skb) 9507 { 9508 const void **tb; 9509 const struct wmi_twt_enable_event *ev; 9510 int ret; 9511 9512 tb = ath12k_wmi_tlv_parse(ab, skb); 9513 if (IS_ERR(tb)) { 9514 ret = PTR_ERR(tb); 9515 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n", 9516 ret); 9517 return; 9518 } 9519 9520 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT]; 9521 if (!ev) { 9522 ath12k_warn(ab, "failed to fetch twt enable wmi event\n"); 9523 return; 9524 } 9525 9526 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n", 9527 le32_to_cpu(ev->pdev_id), 9528 le32_to_cpu(ev->status)); 9529 } 9530 9531 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab, 9532 struct sk_buff *skb) 9533 { 9534 const void **tb; 9535 const struct wmi_twt_disable_event *ev; 9536 int ret; 9537 9538 tb = ath12k_wmi_tlv_parse(ab, skb); 9539 if (IS_ERR(tb)) { 9540 ret = PTR_ERR(tb); 9541 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n", 9542 ret); 9543 return; 9544 } 9545 9546 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT]; 9547 if (!ev) { 9548 ath12k_warn(ab, "failed to fetch twt disable wmi event\n"); 9549 return; 9550 } 9551 9552 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n", 9553 le32_to_cpu(ev->pdev_id), 9554 le32_to_cpu(ev->status)); 9555 } 9556 9557 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab, 9558 u16 tag, u16 len, 9559 const void *ptr, void *data) 9560 { 9561 const struct wmi_wow_ev_pg_fault_param *pf_param; 9562 const struct wmi_wow_ev_param *param; 9563 struct wmi_wow_ev_arg *arg = data; 9564 int pf_len; 9565 9566 switch (tag) { 9567 case WMI_TAG_WOW_EVENT_INFO: 9568 param = ptr; 9569 arg->wake_reason = le32_to_cpu(param->wake_reason); 9570 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n", 9571 arg->wake_reason, wow_reason(arg->wake_reason)); 9572 break; 9573 9574 case WMI_TAG_ARRAY_BYTE: 9575 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) { 9576 pf_param = ptr; 9577 pf_len = le32_to_cpu(pf_param->len); 9578 if (pf_len > len - sizeof(pf_len) || 9579 pf_len < 0) { 9580 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n", 9581 pf_len); 9582 return -EINVAL; 9583 } 9584 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n", 9585 pf_len); 9586 ath12k_dbg_dump(ab, ATH12K_DBG_WMI, 9587 "wow_reason_page_fault packet present", 9588 "wow_pg_fault ", 9589 pf_param->data, 9590 pf_len); 9591 } 9592 break; 9593 default: 9594 break; 9595 } 9596 9597 return 0; 9598 } 9599 9600 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb) 9601 { 9602 struct wmi_wow_ev_arg arg = { }; 9603 int ret; 9604 9605 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 9606 ath12k_wmi_wow_wakeup_host_parse, 9607 &arg); 9608 if (ret) { 9609 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n", 9610 ret); 9611 return; 9612 } 9613 9614 complete(&ab->wow.wakeup_completed); 9615 } 9616 9617 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab, 9618 struct sk_buff *skb) 9619 { 9620 const struct wmi_gtk_offload_status_event *ev; 9621 struct ath12k_link_vif *arvif; 9622 __be64 replay_ctr_be; 9623 u64 replay_ctr; 9624 const void **tb; 9625 int ret; 9626 9627 tb = ath12k_wmi_tlv_parse(ab, skb); 9628 if (IS_ERR(tb)) { 9629 ret = PTR_ERR(tb); 9630 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 9631 return; 9632 } 9633 9634 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT]; 9635 if (!ev) { 9636 ath12k_warn(ab, "failed to fetch gtk offload status ev"); 9637 return; 9638 } 9639 9640 rcu_read_lock(); 9641 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id)); 9642 if (!arvif) { 9643 rcu_read_unlock(); 9644 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n", 9645 le32_to_cpu(ev->vdev_id)); 9646 return; 9647 } 9648 9649 replay_ctr = le64_to_cpu(ev->replay_ctr); 9650 arvif->rekey_data.replay_ctr = replay_ctr; 9651 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n", 9652 le32_to_cpu(ev->refresh_cnt), replay_ctr); 9653 9654 /* supplicant expects big-endian replay counter */ 9655 replay_ctr_be = cpu_to_be64(replay_ctr); 9656 9657 ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid, 9658 (void *)&replay_ctr_be, GFP_ATOMIC); 9659 9660 rcu_read_unlock(); 9661 } 9662 9663 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab, 9664 struct sk_buff *skb) 9665 { 9666 const struct wmi_mlo_setup_complete_event *ev; 9667 struct ath12k *ar = NULL; 9668 struct ath12k_pdev *pdev; 9669 const void **tb; 9670 int ret, i; 9671 9672 tb = ath12k_wmi_tlv_parse(ab, skb); 9673 if (IS_ERR(tb)) { 9674 ret = PTR_ERR(tb); 9675 ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n", 9676 ret); 9677 return; 9678 } 9679 9680 ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT]; 9681 if (!ev) { 9682 ath12k_warn(ab, "failed to fetch mlo setup complete event\n"); 9683 return; 9684 } 9685 9686 if (le32_to_cpu(ev->pdev_id) > ab->num_radios) 9687 goto skip_lookup; 9688 9689 for (i = 0; i < ab->num_radios; i++) { 9690 pdev = &ab->pdevs[i]; 9691 if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) { 9692 ar = pdev->ar; 9693 break; 9694 } 9695 } 9696 9697 skip_lookup: 9698 if (!ar) { 9699 ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n", 9700 ev->pdev_id, ev->status); 9701 return; 9702 } 9703 9704 ar->mlo_setup_status = le32_to_cpu(ev->status); 9705 complete(&ar->mlo_setup_done); 9706 } 9707 9708 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab, 9709 struct sk_buff *skb) 9710 { 9711 const struct wmi_mlo_teardown_complete_event *ev; 9712 const void **tb; 9713 int ret; 9714 9715 tb = ath12k_wmi_tlv_parse(ab, skb); 9716 if (IS_ERR(tb)) { 9717 ret = PTR_ERR(tb); 9718 ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret); 9719 return; 9720 } 9721 9722 ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE]; 9723 if (!ev) 9724 ath12k_warn(ab, "failed to fetch teardown complete event\n"); 9725 } 9726 9727 #ifdef CONFIG_ATH12K_DEBUGFS 9728 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab, 9729 const void *ptr, u16 tag, u16 len, 9730 struct wmi_tpc_stats_arg *tpc_stats) 9731 { 9732 u32 len1, len2, len3, len4; 9733 s16 *dst_ptr; 9734 s8 *dst_ptr_ctl; 9735 9736 len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len); 9737 len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len); 9738 len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len); 9739 len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len); 9740 9741 switch (tpc_stats->event_count) { 9742 case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT: 9743 if (len1 > len) 9744 return -ENOBUFS; 9745 9746 if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) { 9747 dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array; 9748 memcpy(dst_ptr, ptr, len1); 9749 } 9750 break; 9751 case ATH12K_TPC_STATS_RATES_EVENT1: 9752 if (len2 > len) 9753 return -ENOBUFS; 9754 9755 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) { 9756 dst_ptr = tpc_stats->rates_array1.rate_array; 9757 memcpy(dst_ptr, ptr, len2); 9758 } 9759 break; 9760 case ATH12K_TPC_STATS_RATES_EVENT2: 9761 if (len3 > len) 9762 return -ENOBUFS; 9763 9764 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) { 9765 dst_ptr = tpc_stats->rates_array2.rate_array; 9766 memcpy(dst_ptr, ptr, len3); 9767 } 9768 break; 9769 case ATH12K_TPC_STATS_CTL_TABLE_EVENT: 9770 if (len4 > len) 9771 return -ENOBUFS; 9772 9773 if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) { 9774 dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table; 9775 memcpy(dst_ptr_ctl, ptr, len4); 9776 } 9777 break; 9778 } 9779 return 0; 9780 } 9781 9782 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab, 9783 struct wmi_tpc_stats_arg *tpc_stats, 9784 struct wmi_max_reg_power_fixed_params *ev) 9785 { 9786 struct wmi_max_reg_power_allowed_arg *reg_pwr; 9787 u32 total_size; 9788 9789 ath12k_dbg(ab, ATH12K_DBG_WMI, 9790 "Received reg power array type %d length %d for tpc stats\n", 9791 ev->reg_power_type, ev->reg_array_len); 9792 9793 switch (le32_to_cpu(ev->reg_power_type)) { 9794 case TPC_STATS_REG_PWR_ALLOWED_TYPE: 9795 reg_pwr = &tpc_stats->max_reg_allowed_power; 9796 break; 9797 default: 9798 return -EINVAL; 9799 } 9800 9801 /* Each entry is 2 byte hence multiplying the indices with 2 */ 9802 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) * 9803 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2; 9804 if (le32_to_cpu(ev->reg_array_len) != total_size) { 9805 ath12k_warn(ab, 9806 "Total size and reg_array_len doesn't match for tpc stats\n"); 9807 return -EINVAL; 9808 } 9809 9810 memcpy(®_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params)); 9811 9812 reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len), 9813 GFP_ATOMIC); 9814 if (!reg_pwr->reg_pwr_array) 9815 return -ENOMEM; 9816 9817 tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED; 9818 9819 return 0; 9820 } 9821 9822 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab, 9823 struct wmi_tpc_stats_arg *tpc_stats, 9824 struct wmi_tpc_rates_array_fixed_params *ev) 9825 { 9826 struct wmi_tpc_rates_array_arg *rates_array; 9827 u32 flag = 0, rate_array_len; 9828 9829 ath12k_dbg(ab, ATH12K_DBG_WMI, 9830 "Received rates array type %d length %d for tpc stats\n", 9831 ev->rate_array_type, ev->rate_array_len); 9832 9833 switch (le32_to_cpu(ev->rate_array_type)) { 9834 case ATH12K_TPC_STATS_RATES_ARRAY1: 9835 rates_array = &tpc_stats->rates_array1; 9836 flag = WMI_TPC_RATES_ARRAY1; 9837 break; 9838 case ATH12K_TPC_STATS_RATES_ARRAY2: 9839 rates_array = &tpc_stats->rates_array2; 9840 flag = WMI_TPC_RATES_ARRAY2; 9841 break; 9842 default: 9843 ath12k_warn(ab, 9844 "Received invalid type of rates array for tpc stats\n"); 9845 return -EINVAL; 9846 } 9847 memcpy(&rates_array->tpc_rates_array, ev, 9848 sizeof(struct wmi_tpc_rates_array_fixed_params)); 9849 rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len); 9850 rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC); 9851 if (!rates_array->rate_array) 9852 return -ENOMEM; 9853 9854 tpc_stats->tlvs_rcvd |= flag; 9855 return 0; 9856 } 9857 9858 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab, 9859 struct wmi_tpc_stats_arg *tpc_stats, 9860 struct wmi_tpc_ctl_pwr_fixed_params *ev) 9861 { 9862 struct wmi_tpc_ctl_pwr_table_arg *ctl_array; 9863 u32 total_size, ctl_array_len, flag = 0; 9864 9865 ath12k_dbg(ab, ATH12K_DBG_WMI, 9866 "Received ctl array type %d length %d for tpc stats\n", 9867 ev->ctl_array_type, ev->ctl_array_len); 9868 9869 switch (le32_to_cpu(ev->ctl_array_type)) { 9870 case ATH12K_TPC_STATS_CTL_ARRAY: 9871 ctl_array = &tpc_stats->ctl_array; 9872 flag = WMI_TPC_CTL_PWR_ARRAY; 9873 break; 9874 default: 9875 ath12k_warn(ab, 9876 "Received invalid type of ctl pwr table for tpc stats\n"); 9877 return -EINVAL; 9878 } 9879 9880 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) * 9881 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4); 9882 if (le32_to_cpu(ev->ctl_array_len) != total_size) { 9883 ath12k_warn(ab, 9884 "Total size and ctl_array_len doesn't match for tpc stats\n"); 9885 return -EINVAL; 9886 } 9887 9888 memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params)); 9889 ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len); 9890 ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC); 9891 if (!ctl_array->ctl_pwr_table) 9892 return -ENOMEM; 9893 9894 tpc_stats->tlvs_rcvd |= flag; 9895 return 0; 9896 } 9897 9898 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab, 9899 u16 tag, u16 len, 9900 const void *ptr, void *data) 9901 { 9902 struct wmi_tpc_rates_array_fixed_params *tpc_rates_array; 9903 struct wmi_max_reg_power_fixed_params *tpc_reg_pwr; 9904 struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr; 9905 struct wmi_tpc_stats_arg *tpc_stats = data; 9906 struct wmi_tpc_config_params *tpc_config; 9907 int ret = 0; 9908 9909 if (!tpc_stats) { 9910 ath12k_warn(ab, "tpc stats memory unavailable\n"); 9911 return -EINVAL; 9912 } 9913 9914 switch (tag) { 9915 case WMI_TAG_TPC_STATS_CONFIG_EVENT: 9916 tpc_config = (struct wmi_tpc_config_params *)ptr; 9917 memcpy(&tpc_stats->tpc_config, tpc_config, 9918 sizeof(struct wmi_tpc_config_params)); 9919 break; 9920 case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED: 9921 tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr; 9922 ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr); 9923 break; 9924 case WMI_TAG_TPC_STATS_RATES_ARRAY: 9925 tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr; 9926 ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array); 9927 break; 9928 case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT: 9929 tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr; 9930 ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr); 9931 break; 9932 default: 9933 ath12k_warn(ab, 9934 "Received invalid tag for tpc stats in subtlvs\n"); 9935 return -EINVAL; 9936 } 9937 return ret; 9938 } 9939 9940 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab, 9941 u16 tag, u16 len, 9942 const void *ptr, void *data) 9943 { 9944 struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data; 9945 int ret; 9946 9947 switch (tag) { 9948 case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM: 9949 ret = 0; 9950 /* Fixed param is already processed*/ 9951 break; 9952 case WMI_TAG_ARRAY_STRUCT: 9953 /* len 0 is expected for array of struct when there 9954 * is no content of that type to pack inside that tlv 9955 */ 9956 if (len == 0) 9957 return 0; 9958 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 9959 ath12k_wmi_tpc_stats_subtlv_parser, 9960 tpc_stats); 9961 break; 9962 case WMI_TAG_ARRAY_INT16: 9963 if (len == 0) 9964 return 0; 9965 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr, 9966 WMI_TAG_ARRAY_INT16, 9967 len, tpc_stats); 9968 break; 9969 case WMI_TAG_ARRAY_BYTE: 9970 if (len == 0) 9971 return 0; 9972 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr, 9973 WMI_TAG_ARRAY_BYTE, 9974 len, tpc_stats); 9975 break; 9976 default: 9977 ath12k_warn(ab, "Received invalid tag for tpc stats\n"); 9978 ret = -EINVAL; 9979 break; 9980 } 9981 return ret; 9982 } 9983 9984 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar) 9985 { 9986 struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats; 9987 9988 lockdep_assert_held(&ar->data_lock); 9989 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n"); 9990 if (tpc_stats) { 9991 kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array); 9992 kfree(tpc_stats->rates_array1.rate_array); 9993 kfree(tpc_stats->rates_array2.rate_array); 9994 kfree(tpc_stats->ctl_array.ctl_pwr_table); 9995 kfree(tpc_stats); 9996 ar->debug.tpc_stats = NULL; 9997 } 9998 } 9999 10000 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab, 10001 struct sk_buff *skb) 10002 { 10003 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param; 10004 struct wmi_tpc_stats_arg *tpc_stats; 10005 const struct wmi_tlv *tlv; 10006 void *ptr = skb->data; 10007 struct ath12k *ar; 10008 u16 tlv_tag; 10009 u16 tlv_len; 10010 u32 event_count; 10011 int ret; 10012 10013 if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) { 10014 ath12k_warn(ab, "TPC stats event size invalid\n"); 10015 return; 10016 } 10017 10018 tlv = (struct wmi_tlv *)ptr; 10019 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 10020 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 10021 ptr += sizeof(*tlv); 10022 10023 if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) { 10024 ath12k_warn(ab, "TPC stats without fixed param tlv at start\n"); 10025 return; 10026 } 10027 10028 if (tlv_len < sizeof(*fixed_param)) { 10029 ath12k_warn(ab, "TPC stats fixed param tlv len %u too short\n", 10030 tlv_len); 10031 return; 10032 } 10033 10034 fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr; 10035 rcu_read_lock(); 10036 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1); 10037 if (!ar) { 10038 ath12k_warn(ab, "Failed to get ar for tpc stats\n"); 10039 rcu_read_unlock(); 10040 return; 10041 } 10042 spin_lock_bh(&ar->data_lock); 10043 if (!ar->debug.tpc_request) { 10044 /* Event is received either without request or the 10045 * timeout, if memory is already allocated free it 10046 */ 10047 if (ar->debug.tpc_stats) { 10048 ath12k_warn(ab, "Freeing memory for tpc_stats\n"); 10049 ath12k_wmi_free_tpc_stats_mem(ar); 10050 } 10051 goto unlock; 10052 } 10053 10054 event_count = le32_to_cpu(fixed_param->event_count); 10055 if (event_count == 0) { 10056 if (ar->debug.tpc_stats) { 10057 ath12k_warn(ab, 10058 "Invalid tpc memory present\n"); 10059 goto unlock; 10060 } 10061 ar->debug.tpc_stats = 10062 kzalloc_obj(struct wmi_tpc_stats_arg, GFP_ATOMIC); 10063 if (!ar->debug.tpc_stats) { 10064 ath12k_warn(ab, 10065 "Failed to allocate memory for tpc stats\n"); 10066 goto unlock; 10067 } 10068 } 10069 10070 tpc_stats = ar->debug.tpc_stats; 10071 if (!tpc_stats) { 10072 ath12k_warn(ab, "tpc stats memory unavailable\n"); 10073 goto unlock; 10074 } 10075 10076 if (!(event_count == 0)) { 10077 if (event_count != tpc_stats->event_count + 1) { 10078 ath12k_warn(ab, 10079 "Invalid tpc event received\n"); 10080 goto unlock; 10081 } 10082 } 10083 tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id); 10084 tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event); 10085 tpc_stats->event_count = le32_to_cpu(fixed_param->event_count); 10086 ath12k_dbg(ab, ATH12K_DBG_WMI, 10087 "tpc stats event_count %d\n", 10088 tpc_stats->event_count); 10089 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 10090 ath12k_wmi_tpc_stats_event_parser, 10091 tpc_stats); 10092 if (ret) { 10093 ath12k_wmi_free_tpc_stats_mem(ar); 10094 ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret); 10095 goto unlock; 10096 } 10097 10098 if (tpc_stats->end_of_event) 10099 complete(&ar->debug.tpc_complete); 10100 10101 unlock: 10102 spin_unlock_bh(&ar->data_lock); 10103 rcu_read_unlock(); 10104 } 10105 #else 10106 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab, 10107 struct sk_buff *skb) 10108 { 10109 } 10110 #endif 10111 10112 static int 10113 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab, 10114 u16 tag, u16 len, 10115 const void *ptr, void *data) 10116 { 10117 const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info; 10118 const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info; 10119 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data; 10120 struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg; 10121 s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM]; 10122 u8 num_20mhz_segments; 10123 s8 min_nf, *nf_ptr; 10124 int i, j; 10125 10126 switch (tag) { 10127 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO: 10128 if (len < sizeof(*param_info)) { 10129 ath12k_warn(ab, 10130 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd", 10131 tag, len); 10132 return -EINVAL; 10133 } 10134 10135 param_info = ptr; 10136 10137 param_arg.curr_bw = le32_to_cpu(param_info->curr_bw); 10138 param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask); 10139 10140 /* The received array is actually a 2D byte-array for per chain, 10141 * per 20MHz subband. Convert to 2D byte-array 10142 */ 10143 nf_ptr = ¶m_arg.nf_hw_dbm[0][0]; 10144 10145 for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) { 10146 nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]); 10147 10148 for (j = 0; j < 4; j++) { 10149 *nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF; 10150 nf_ptr++; 10151 } 10152 } 10153 10154 switch (param_arg.curr_bw) { 10155 case WMI_CHAN_WIDTH_20: 10156 num_20mhz_segments = 1; 10157 break; 10158 case WMI_CHAN_WIDTH_40: 10159 num_20mhz_segments = 2; 10160 break; 10161 case WMI_CHAN_WIDTH_80: 10162 num_20mhz_segments = 4; 10163 break; 10164 case WMI_CHAN_WIDTH_160: 10165 num_20mhz_segments = 8; 10166 break; 10167 case WMI_CHAN_WIDTH_320: 10168 num_20mhz_segments = 16; 10169 break; 10170 default: 10171 ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event", 10172 param_arg.curr_bw); 10173 /* In error case, still consider the primary 20 MHz segment since 10174 * that would be much better than instead of dropping the whole 10175 * event 10176 */ 10177 num_20mhz_segments = 1; 10178 } 10179 10180 min_nf = ATH12K_DEFAULT_NOISE_FLOOR; 10181 10182 for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) { 10183 if (!(param_arg.curr_rx_chainmask & BIT(i))) 10184 continue; 10185 10186 for (j = 0; j < num_20mhz_segments; j++) { 10187 if (param_arg.nf_hw_dbm[i][j] < min_nf) 10188 min_nf = param_arg.nf_hw_dbm[i][j]; 10189 } 10190 } 10191 10192 rssi_info->min_nf_dbm = min_nf; 10193 rssi_info->nf_dbm_present = true; 10194 break; 10195 case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO: 10196 if (len < sizeof(*temp_info)) { 10197 ath12k_warn(ab, 10198 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd", 10199 tag, len); 10200 return -EINVAL; 10201 } 10202 10203 temp_info = ptr; 10204 rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset); 10205 rssi_info->temp_offset_present = true; 10206 break; 10207 default: 10208 ath12k_dbg(ab, ATH12K_DBG_WMI, 10209 "Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag); 10210 } 10211 10212 return 0; 10213 } 10214 10215 static int 10216 ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab, 10217 u16 tag, u16 len, 10218 const void *ptr, void *data) 10219 { 10220 int ret = 0; 10221 10222 switch (tag) { 10223 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM: 10224 /* Fixed param is already processed*/ 10225 break; 10226 case WMI_TAG_ARRAY_STRUCT: 10227 /* len 0 is expected for array of struct when there 10228 * is no content of that type inside that tlv 10229 */ 10230 if (len == 0) 10231 return 0; 10232 10233 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 10234 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser, 10235 data); 10236 break; 10237 default: 10238 ath12k_dbg(ab, ATH12K_DBG_WMI, 10239 "Received invalid tag 0x%x for RSSI dbm conv info event\n", 10240 tag); 10241 break; 10242 } 10243 10244 return ret; 10245 } 10246 10247 static int 10248 ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr, 10249 size_t len, int *pdev_id) 10250 { 10251 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param; 10252 const struct wmi_tlv *tlv; 10253 u16 tlv_tag; 10254 10255 if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) { 10256 ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len); 10257 return -EINVAL; 10258 } 10259 10260 tlv = (struct wmi_tlv *)ptr; 10261 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 10262 ptr += sizeof(*tlv); 10263 10264 if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) { 10265 ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n"); 10266 return -EINVAL; 10267 } 10268 10269 fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr; 10270 *pdev_id = le32_to_cpu(fixed_param->pdev_id); 10271 10272 return 0; 10273 } 10274 10275 static void 10276 ath12k_wmi_update_rssi_offsets(struct ath12k *ar, 10277 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info) 10278 { 10279 struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info; 10280 10281 lockdep_assert_held(&ar->data_lock); 10282 10283 if (rssi_info->temp_offset_present) 10284 info->temp_offset = rssi_info->temp_offset; 10285 10286 if (rssi_info->nf_dbm_present) 10287 info->min_nf_dbm = rssi_info->min_nf_dbm; 10288 10289 info->noise_floor = info->min_nf_dbm + info->temp_offset; 10290 } 10291 10292 static void 10293 ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab, 10294 struct sk_buff *skb) 10295 { 10296 struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info = {}; 10297 struct ath12k *ar; 10298 s32 noise_floor; 10299 u32 pdev_id; 10300 int ret; 10301 10302 ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len, 10303 &pdev_id); 10304 if (ret) { 10305 ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n", 10306 ret); 10307 return; 10308 } 10309 10310 rcu_read_lock(); 10311 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id); 10312 /* If pdev is not active, ignore the event */ 10313 if (!ar) 10314 goto out_unlock; 10315 10316 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 10317 ath12k_wmi_rssi_dbm_conv_info_event_parser, 10318 &rssi_info); 10319 if (ret) { 10320 ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n"); 10321 goto out_unlock; 10322 } 10323 10324 spin_lock_bh(&ar->data_lock); 10325 ath12k_wmi_update_rssi_offsets(ar, &rssi_info); 10326 noise_floor = ath12k_pdev_get_noise_floor(ar); 10327 spin_unlock_bh(&ar->data_lock); 10328 10329 ath12k_dbg(ab, ATH12K_DBG_WMI, 10330 "RSSI noise floor updated, new value is %d dbm\n", noise_floor); 10331 out_unlock: 10332 rcu_read_unlock(); 10333 } 10334 10335 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 10336 { 10337 struct wmi_cmd_hdr *cmd_hdr; 10338 enum wmi_tlv_event_id id; 10339 10340 cmd_hdr = skb_pull_data(skb, sizeof(*cmd_hdr)); 10341 if (!cmd_hdr) 10342 goto out; 10343 10344 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 10345 10346 switch (id) { 10347 /* Process all the WMI events here */ 10348 case WMI_SERVICE_READY_EVENTID: 10349 ath12k_service_ready_event(ab, skb); 10350 break; 10351 case WMI_SERVICE_READY_EXT_EVENTID: 10352 ath12k_service_ready_ext_event(ab, skb); 10353 break; 10354 case WMI_SERVICE_READY_EXT2_EVENTID: 10355 ath12k_service_ready_ext2_event(ab, skb); 10356 break; 10357 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 10358 ath12k_reg_chan_list_event(ab, skb); 10359 break; 10360 case WMI_READY_EVENTID: 10361 ath12k_ready_event(ab, skb); 10362 break; 10363 case WMI_PEER_DELETE_RESP_EVENTID: 10364 ath12k_peer_delete_resp_event(ab, skb); 10365 break; 10366 case WMI_VDEV_START_RESP_EVENTID: 10367 ath12k_vdev_start_resp_event(ab, skb); 10368 break; 10369 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 10370 ath12k_bcn_tx_status_event(ab, skb); 10371 break; 10372 case WMI_VDEV_STOPPED_EVENTID: 10373 ath12k_vdev_stopped_event(ab, skb); 10374 break; 10375 case WMI_MGMT_RX_EVENTID: 10376 ath12k_mgmt_rx_event(ab, skb); 10377 /* mgmt_rx_event() owns the skb now! */ 10378 return; 10379 case WMI_MGMT_TX_COMPLETION_EVENTID: 10380 ath12k_mgmt_tx_compl_event(ab, skb); 10381 break; 10382 case WMI_SCAN_EVENTID: 10383 ath12k_scan_event(ab, skb); 10384 break; 10385 case WMI_PEER_STA_KICKOUT_EVENTID: 10386 ath12k_peer_sta_kickout_event(ab, skb); 10387 break; 10388 case WMI_ROAM_EVENTID: 10389 ath12k_roam_event(ab, skb); 10390 break; 10391 case WMI_CHAN_INFO_EVENTID: 10392 ath12k_chan_info_event(ab, skb); 10393 break; 10394 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 10395 ath12k_pdev_bss_chan_info_event(ab, skb); 10396 break; 10397 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 10398 ath12k_vdev_install_key_compl_event(ab, skb); 10399 break; 10400 case WMI_SERVICE_AVAILABLE_EVENTID: 10401 ath12k_service_available_event(ab, skb); 10402 break; 10403 case WMI_PEER_ASSOC_CONF_EVENTID: 10404 ath12k_peer_assoc_conf_event(ab, skb); 10405 break; 10406 case WMI_UPDATE_STATS_EVENTID: 10407 ath12k_update_stats_event(ab, skb); 10408 break; 10409 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 10410 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 10411 break; 10412 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 10413 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 10414 break; 10415 case WMI_PDEV_TEMPERATURE_EVENTID: 10416 ath12k_wmi_pdev_temperature_event(ab, skb); 10417 break; 10418 case WMI_THERM_THROT_STATS_EVENTID: 10419 ath12k_wmi_thermal_throt_stats_event(ab, skb); 10420 break; 10421 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 10422 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 10423 break; 10424 case WMI_HOST_FILS_DISCOVERY_EVENTID: 10425 ath12k_fils_discovery_event(ab, skb); 10426 break; 10427 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 10428 ath12k_probe_resp_tx_status_event(ab, skb); 10429 break; 10430 case WMI_RFKILL_STATE_CHANGE_EVENTID: 10431 ath12k_rfkill_state_change_event(ab, skb); 10432 break; 10433 case WMI_TWT_ENABLE_EVENTID: 10434 ath12k_wmi_twt_enable_event(ab, skb); 10435 break; 10436 case WMI_TWT_DISABLE_EVENTID: 10437 ath12k_wmi_twt_disable_event(ab, skb); 10438 break; 10439 case WMI_P2P_NOA_EVENTID: 10440 ath12k_wmi_p2p_noa_event(ab, skb); 10441 break; 10442 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 10443 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 10444 break; 10445 case WMI_VDEV_DELETE_RESP_EVENTID: 10446 ath12k_vdev_delete_resp_event(ab, skb); 10447 break; 10448 case WMI_DIAG_EVENTID: 10449 ath12k_wmi_diag_event(ab, skb); 10450 break; 10451 case WMI_WOW_WAKEUP_HOST_EVENTID: 10452 ath12k_wmi_event_wow_wakeup_host(ab, skb); 10453 break; 10454 case WMI_GTK_OFFLOAD_STATUS_EVENTID: 10455 ath12k_wmi_gtk_offload_status_event(ab, skb); 10456 break; 10457 case WMI_MLO_SETUP_COMPLETE_EVENTID: 10458 ath12k_wmi_event_mlo_setup_complete(ab, skb); 10459 break; 10460 case WMI_MLO_TEARDOWN_COMPLETE_EVENTID: 10461 ath12k_wmi_event_teardown_complete(ab, skb); 10462 break; 10463 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID: 10464 ath12k_wmi_process_tpc_stats(ab, skb); 10465 break; 10466 case WMI_11D_NEW_COUNTRY_EVENTID: 10467 ath12k_reg_11d_new_cc_event(ab, skb); 10468 break; 10469 case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID: 10470 ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb); 10471 break; 10472 case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID: 10473 ath12k_wmi_obss_color_collision_event(ab, skb); 10474 break; 10475 case WMI_DCS_INTERFERENCE_EVENTID: 10476 ath12k_wmi_dcs_interference_event(ab, skb); 10477 break; 10478 /* add Unsupported events (rare) here */ 10479 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 10480 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 10481 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 10482 ath12k_dbg(ab, ATH12K_DBG_WMI, 10483 "ignoring unsupported event 0x%x\n", id); 10484 break; 10485 /* add Unsupported events (frequent) here */ 10486 case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID: 10487 case WMI_MGMT_RX_FW_CONSUMED_EVENTID: 10488 /* debug might flood hence silently ignore (no-op) */ 10489 break; 10490 case WMI_PDEV_UTF_EVENTID: 10491 if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags)) 10492 ath12k_tm_wmi_event_segmented(ab, id, skb); 10493 else 10494 ath12k_tm_wmi_event_unsegmented(ab, id, skb); 10495 break; 10496 default: 10497 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 10498 break; 10499 } 10500 10501 out: 10502 dev_kfree_skb(skb); 10503 } 10504 10505 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 10506 u32 pdev_idx) 10507 { 10508 int status; 10509 static const u32 svc_id[] = { 10510 ATH12K_HTC_SVC_ID_WMI_CONTROL, 10511 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 10512 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 10513 }; 10514 struct ath12k_htc_svc_conn_req conn_req = {}; 10515 struct ath12k_htc_svc_conn_resp conn_resp = {}; 10516 10517 /* these fields are the same for all service endpoints */ 10518 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 10519 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 10520 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 10521 10522 /* connect to control service */ 10523 conn_req.service_id = svc_id[pdev_idx]; 10524 10525 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 10526 if (status) { 10527 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 10528 status); 10529 return status; 10530 } 10531 10532 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 10533 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 10534 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 10535 10536 return 0; 10537 } 10538 10539 static int 10540 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 10541 const struct wmi_unit_test_arg *ut) 10542 { 10543 struct ath12k_wmi_pdev *wmi = ar->wmi; 10544 struct wmi_unit_test_cmd *cmd; 10545 int buf_len, arg_len; 10546 struct sk_buff *skb; 10547 struct wmi_tlv *tlv; 10548 __le32 *ut_cmd_args; 10549 void *ptr; 10550 int ret; 10551 int i; 10552 10553 arg_len = sizeof(*ut_cmd_args) * ut->num_args; 10554 buf_len = sizeof(*cmd) + arg_len + TLV_HDR_SIZE; 10555 10556 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 10557 if (!skb) 10558 return -ENOMEM; 10559 10560 ptr = skb->data; 10561 cmd = ptr; 10562 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 10563 sizeof(*cmd)); 10564 cmd->vdev_id = cpu_to_le32(ut->vdev_id); 10565 cmd->module_id = cpu_to_le32(ut->module_id); 10566 cmd->num_args = cpu_to_le32(ut->num_args); 10567 cmd->diag_token = cpu_to_le32(ut->diag_token); 10568 10569 ptr += sizeof(*cmd); 10570 tlv = ptr; 10571 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 10572 10573 ptr += TLV_HDR_SIZE; 10574 ut_cmd_args = ptr; 10575 for (i = 0; i < ut->num_args; i++) 10576 ut_cmd_args[i] = cpu_to_le32(ut->args[i]); 10577 10578 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10579 "WMI unit test : module %d vdev %d n_args %d token %d\n", 10580 ut->module_id, ut->vdev_id, ut->num_args, ut->diag_token); 10581 10582 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 10583 10584 if (ret) { 10585 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 10586 ret); 10587 dev_kfree_skb(skb); 10588 } 10589 10590 return ret; 10591 } 10592 10593 int ath12k_wmi_simulate_radar(struct ath12k *ar) 10594 { 10595 struct ath12k_link_vif *arvif; 10596 struct wmi_unit_test_arg wmi_ut = {}; 10597 bool arvif_found = false; 10598 10599 list_for_each_entry(arvif, &ar->arvifs, list) { 10600 if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) { 10601 arvif_found = true; 10602 break; 10603 } 10604 } 10605 10606 if (!arvif_found) 10607 return -EINVAL; 10608 10609 wmi_ut.args[DFS_TEST_CMDID] = 0; 10610 wmi_ut.args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 10611 /* 10612 * Currently we could pass segment_id(b0 - b1), chirp(b2) 10613 * freq offset (b3 - b10) to unit test. For simulation 10614 * purpose this can be set to 0 which is valid. 10615 */ 10616 wmi_ut.args[DFS_TEST_RADAR_PARAM] = 0; 10617 10618 wmi_ut.vdev_id = arvif->vdev_id; 10619 wmi_ut.module_id = DFS_UNIT_TEST_MODULE; 10620 wmi_ut.num_args = DFS_MAX_TEST_ARGS; 10621 wmi_ut.diag_token = DFS_UNIT_TEST_TOKEN; 10622 10623 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 10624 10625 return ath12k_wmi_send_unit_test_cmd(ar, &wmi_ut); 10626 } 10627 10628 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar, 10629 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type) 10630 { 10631 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd; 10632 struct ath12k_wmi_pdev *wmi = ar->wmi; 10633 struct sk_buff *skb; 10634 struct wmi_tlv *tlv; 10635 __le32 *pdev_id; 10636 u32 buf_len; 10637 void *ptr; 10638 int ret; 10639 10640 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE; 10641 10642 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 10643 if (!skb) 10644 return -ENOMEM; 10645 cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data; 10646 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM, 10647 sizeof(*cmd)); 10648 10649 cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT); 10650 cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET); 10651 cmd->subid = cpu_to_le32(tpc_stats_type); 10652 10653 ptr = skb->data + sizeof(*cmd); 10654 10655 /* The below TLV arrays optionally follow this fixed param TLV structure 10656 * 1. ARRAY_UINT32 pdev_ids[] 10657 * If this array is present and non-zero length, stats should only 10658 * be provided from the pdevs identified in the array. 10659 * 2. ARRAY_UNIT32 vdev_ids[] 10660 * If this array is present and non-zero length, stats should only 10661 * be provided from the vdevs identified in the array. 10662 * 3. ath12k_wmi_mac_addr_params peer_macaddr[]; 10663 * If this array is present and non-zero length, stats should only 10664 * be provided from the peers with the MAC addresses specified 10665 * in the array 10666 */ 10667 tlv = ptr; 10668 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32)); 10669 ptr += TLV_HDR_SIZE; 10670 10671 pdev_id = ptr; 10672 *pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar)); 10673 ptr += sizeof(*pdev_id); 10674 10675 tlv = ptr; 10676 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 10677 ptr += TLV_HDR_SIZE; 10678 10679 tlv = ptr; 10680 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0); 10681 ptr += TLV_HDR_SIZE; 10682 10683 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID); 10684 if (ret) { 10685 ath12k_warn(ar->ab, 10686 "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n"); 10687 dev_kfree_skb(skb); 10688 return ret; 10689 } 10690 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n", 10691 ar->pdev->pdev_id); 10692 10693 return ret; 10694 } 10695 10696 int ath12k_wmi_simulate_incumbent_signal_interference(struct ath12k *ar, 10697 u32 chan_bw_interference_bitmap) 10698 { 10699 struct wmi_unit_test_arg wmi_ut = {}; 10700 struct ath12k_link_vif *arvif; 10701 struct ath12k_vif *ahvif; 10702 bool arvif_found = false; 10703 10704 list_for_each_entry(arvif, &ar->arvifs, list) { 10705 ahvif = arvif->ahvif; 10706 if (arvif->is_started && ahvif->vdev_type == WMI_VDEV_TYPE_AP) { 10707 arvif_found = true; 10708 break; 10709 } 10710 } 10711 10712 if (!arvif_found) 10713 return -EINVAL; 10714 10715 wmi_ut.args[ATH12K_WMI_INCUMBENT_SIGNAL_TEST_INTF] = 10716 ATH12K_WMI_UNIT_TEST_INCUMBENT_SIGNAL_INTF_TYPE; 10717 wmi_ut.args[ATH12K_WMI_INCUMBENT_SIGNAL_TEST_BITMAP] = 10718 chan_bw_interference_bitmap; 10719 10720 wmi_ut.vdev_id = arvif->vdev_id; 10721 wmi_ut.module_id = ATH12K_WMI_INCUMBENT_SIGNAL_UNIT_TEST_MODULE; 10722 wmi_ut.num_args = ATH12K_WMI_INCUMBENT_SIGNAL_MAX_TEST_ARGS; 10723 wmi_ut.diag_token = ATH12K_WMI_INCUMBENT_SIGNAL_UNIT_TEST_TOKEN; 10724 10725 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10726 "Triggering incumbent signal interference simulation, interference bitmap: 0x%x\n", 10727 chan_bw_interference_bitmap); 10728 10729 return ath12k_wmi_send_unit_test_cmd(ar, &wmi_ut); 10730 } 10731 10732 int ath12k_wmi_connect(struct ath12k_base *ab) 10733 { 10734 u32 i; 10735 u8 wmi_ep_count; 10736 10737 wmi_ep_count = ab->htc.wmi_ep_count; 10738 if (wmi_ep_count > ab->hw_params->max_radios) 10739 return -1; 10740 10741 for (i = 0; i < wmi_ep_count; i++) 10742 ath12k_connect_pdev_htc_service(ab, i); 10743 10744 return 0; 10745 } 10746 10747 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 10748 { 10749 if (WARN_ON(pdev_id >= MAX_RADIOS)) 10750 return; 10751 10752 /* TODO: Deinit any pdev specific wmi resource */ 10753 } 10754 10755 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 10756 u8 pdev_id) 10757 { 10758 struct ath12k_wmi_pdev *wmi_handle; 10759 10760 if (pdev_id >= ab->hw_params->max_radios) 10761 return -EINVAL; 10762 10763 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 10764 10765 wmi_handle->wmi_ab = &ab->wmi_ab; 10766 10767 ab->wmi_ab.ab = ab; 10768 /* TODO: Init remaining resource specific to pdev */ 10769 10770 return 0; 10771 } 10772 10773 int ath12k_wmi_attach(struct ath12k_base *ab) 10774 { 10775 int ret; 10776 10777 ret = ath12k_wmi_pdev_attach(ab, 0); 10778 if (ret) 10779 return ret; 10780 10781 ab->wmi_ab.ab = ab; 10782 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 10783 10784 /* It's overwritten when service_ext_ready is handled */ 10785 if (ab->hw_params->single_pdev_only) 10786 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 10787 10788 /* TODO: Init remaining wmi soc resources required */ 10789 init_completion(&ab->wmi_ab.service_ready); 10790 init_completion(&ab->wmi_ab.unified_ready); 10791 10792 return 0; 10793 } 10794 10795 void ath12k_wmi_detach(struct ath12k_base *ab) 10796 { 10797 int i; 10798 10799 /* TODO: Deinit wmi resource specific to SOC as required */ 10800 10801 for (i = 0; i < ab->htc.wmi_ep_count; i++) 10802 ath12k_wmi_pdev_detach(ab, i); 10803 10804 ath12k_wmi_free_dbring_caps(ab); 10805 } 10806 10807 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg) 10808 { 10809 struct wmi_hw_data_filter_cmd *cmd; 10810 struct sk_buff *skb; 10811 int ret, len; 10812 10813 len = sizeof(*cmd); 10814 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10815 10816 if (!skb) 10817 return -ENOMEM; 10818 10819 cmd = (struct wmi_hw_data_filter_cmd *)skb->data; 10820 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD, 10821 sizeof(*cmd)); 10822 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 10823 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0); 10824 10825 /* Set all modes in case of disable */ 10826 if (arg->enable) 10827 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap); 10828 else 10829 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U); 10830 10831 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10832 "wmi hw data filter enable %d filter_bitmap 0x%x\n", 10833 arg->enable, arg->hw_filter_bitmap); 10834 10835 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID); 10836 if (ret) { 10837 ath12k_warn(ar->ab, "failed to send WMI_HW_DATA_FILTER_CMDID\n"); 10838 dev_kfree_skb(skb); 10839 } 10840 10841 return ret; 10842 } 10843 10844 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar) 10845 { 10846 struct wmi_wow_host_wakeup_cmd *cmd; 10847 struct sk_buff *skb; 10848 size_t len; 10849 int ret; 10850 10851 len = sizeof(*cmd); 10852 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10853 if (!skb) 10854 return -ENOMEM; 10855 10856 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data; 10857 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 10858 sizeof(*cmd)); 10859 10860 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n"); 10861 10862 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID); 10863 if (ret) { 10864 ath12k_warn(ar->ab, "failed to send WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID\n"); 10865 dev_kfree_skb(skb); 10866 } 10867 10868 return ret; 10869 } 10870 10871 int ath12k_wmi_wow_enable(struct ath12k *ar) 10872 { 10873 struct wmi_wow_enable_cmd *cmd; 10874 struct sk_buff *skb; 10875 int ret, len; 10876 10877 len = sizeof(*cmd); 10878 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10879 if (!skb) 10880 return -ENOMEM; 10881 10882 cmd = (struct wmi_wow_enable_cmd *)skb->data; 10883 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD, 10884 sizeof(*cmd)); 10885 10886 cmd->enable = cpu_to_le32(1); 10887 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED); 10888 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n"); 10889 10890 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID); 10891 if (ret) { 10892 ath12k_warn(ar->ab, "failed to send WMI_WOW_ENABLE_CMDID\n"); 10893 dev_kfree_skb(skb); 10894 } 10895 10896 return ret; 10897 } 10898 10899 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 10900 enum wmi_wow_wakeup_event event, 10901 u32 enable) 10902 { 10903 struct wmi_wow_add_del_event_cmd *cmd; 10904 struct sk_buff *skb; 10905 size_t len; 10906 int ret; 10907 10908 len = sizeof(*cmd); 10909 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10910 if (!skb) 10911 return -ENOMEM; 10912 10913 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data; 10914 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD, 10915 sizeof(*cmd)); 10916 cmd->vdev_id = cpu_to_le32(vdev_id); 10917 cmd->is_add = cpu_to_le32(enable); 10918 cmd->event_bitmap = cpu_to_le32((1 << event)); 10919 10920 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n", 10921 wow_wakeup_event(event), enable, vdev_id); 10922 10923 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID); 10924 if (ret) { 10925 ath12k_warn(ar->ab, "failed to send WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID\n"); 10926 dev_kfree_skb(skb); 10927 } 10928 10929 return ret; 10930 } 10931 10932 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 10933 const u8 *pattern, const u8 *mask, 10934 int pattern_len, int pattern_offset) 10935 { 10936 struct wmi_wow_add_pattern_cmd *cmd; 10937 struct wmi_wow_bitmap_pattern_params *bitmap; 10938 struct wmi_tlv *tlv; 10939 struct sk_buff *skb; 10940 void *ptr; 10941 size_t len; 10942 int ret; 10943 10944 len = sizeof(*cmd) + 10945 sizeof(*tlv) + /* array struct */ 10946 sizeof(*bitmap) + /* bitmap */ 10947 sizeof(*tlv) + /* empty ipv4 sync */ 10948 sizeof(*tlv) + /* empty ipv6 sync */ 10949 sizeof(*tlv) + /* empty magic */ 10950 sizeof(*tlv) + /* empty info timeout */ 10951 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */ 10952 10953 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10954 if (!skb) 10955 return -ENOMEM; 10956 10957 /* cmd */ 10958 ptr = skb->data; 10959 cmd = ptr; 10960 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD, 10961 sizeof(*cmd)); 10962 cmd->vdev_id = cpu_to_le32(vdev_id); 10963 cmd->pattern_id = cpu_to_le32(pattern_id); 10964 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 10965 10966 ptr += sizeof(*cmd); 10967 10968 /* bitmap */ 10969 tlv = ptr; 10970 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap)); 10971 10972 ptr += sizeof(*tlv); 10973 10974 bitmap = ptr; 10975 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T, 10976 sizeof(*bitmap)); 10977 memcpy(bitmap->patternbuf, pattern, pattern_len); 10978 memcpy(bitmap->bitmaskbuf, mask, pattern_len); 10979 bitmap->pattern_offset = cpu_to_le32(pattern_offset); 10980 bitmap->pattern_len = cpu_to_le32(pattern_len); 10981 bitmap->bitmask_len = cpu_to_le32(pattern_len); 10982 bitmap->pattern_id = cpu_to_le32(pattern_id); 10983 10984 ptr += sizeof(*bitmap); 10985 10986 /* ipv4 sync */ 10987 tlv = ptr; 10988 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10989 10990 ptr += sizeof(*tlv); 10991 10992 /* ipv6 sync */ 10993 tlv = ptr; 10994 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10995 10996 ptr += sizeof(*tlv); 10997 10998 /* magic */ 10999 tlv = ptr; 11000 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 11001 11002 ptr += sizeof(*tlv); 11003 11004 /* pattern info timeout */ 11005 tlv = ptr; 11006 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 11007 11008 ptr += sizeof(*tlv); 11009 11010 /* ratelimit interval */ 11011 tlv = ptr; 11012 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32)); 11013 11014 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n", 11015 vdev_id, pattern_id, pattern_offset, pattern_len); 11016 11017 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ", 11018 bitmap->patternbuf, pattern_len); 11019 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ", 11020 bitmap->bitmaskbuf, pattern_len); 11021 11022 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID); 11023 if (ret) { 11024 ath12k_warn(ar->ab, "failed to send WMI_WOW_ADD_WAKE_PATTERN_CMDID\n"); 11025 dev_kfree_skb(skb); 11026 } 11027 11028 return ret; 11029 } 11030 11031 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id) 11032 { 11033 struct wmi_wow_del_pattern_cmd *cmd; 11034 struct sk_buff *skb; 11035 size_t len; 11036 int ret; 11037 11038 len = sizeof(*cmd); 11039 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 11040 if (!skb) 11041 return -ENOMEM; 11042 11043 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data; 11044 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD, 11045 sizeof(*cmd)); 11046 cmd->vdev_id = cpu_to_le32(vdev_id); 11047 cmd->pattern_id = cpu_to_le32(pattern_id); 11048 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 11049 11050 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n", 11051 vdev_id, pattern_id); 11052 11053 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID); 11054 if (ret) { 11055 ath12k_warn(ar->ab, "failed to send WMI_WOW_DEL_WAKE_PATTERN_CMDID\n"); 11056 dev_kfree_skb(skb); 11057 } 11058 11059 return ret; 11060 } 11061 11062 static struct sk_buff * 11063 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id, 11064 struct wmi_pno_scan_req_arg *pno) 11065 { 11066 struct nlo_configured_params *nlo_list; 11067 size_t len, nlo_list_len, channel_list_len; 11068 struct wmi_wow_nlo_config_cmd *cmd; 11069 __le32 *channel_list; 11070 struct wmi_tlv *tlv; 11071 struct sk_buff *skb; 11072 void *ptr; 11073 u32 i; 11074 11075 len = sizeof(*cmd) + 11076 sizeof(*tlv) + 11077 /* TLV place holder for array of structures 11078 * nlo_configured_params(nlo_list) 11079 */ 11080 sizeof(*tlv); 11081 /* TLV place holder for array of uint32 channel_list */ 11082 11083 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count; 11084 len += channel_list_len; 11085 11086 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count; 11087 len += nlo_list_len; 11088 11089 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 11090 if (!skb) 11091 return ERR_PTR(-ENOMEM); 11092 11093 ptr = skb->data; 11094 cmd = ptr; 11095 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd)); 11096 11097 cmd->vdev_id = cpu_to_le32(pno->vdev_id); 11098 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN); 11099 11100 /* current FW does not support min-max range for dwell time */ 11101 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time); 11102 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time); 11103 11104 if (pno->do_passive_scan) 11105 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE); 11106 11107 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period); 11108 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period); 11109 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles); 11110 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time); 11111 11112 if (pno->enable_pno_scan_randomization) { 11113 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ | 11114 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ); 11115 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr); 11116 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask); 11117 } 11118 11119 ptr += sizeof(*cmd); 11120 11121 /* nlo_configured_params(nlo_list) */ 11122 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count); 11123 tlv = ptr; 11124 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len); 11125 11126 ptr += sizeof(*tlv); 11127 nlo_list = ptr; 11128 for (i = 0; i < pno->uc_networks_count; i++) { 11129 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header); 11130 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 11131 sizeof(*nlo_list)); 11132 11133 nlo_list[i].ssid.valid = cpu_to_le32(1); 11134 nlo_list[i].ssid.ssid.ssid_len = 11135 cpu_to_le32(pno->a_networks[i].ssid.ssid_len); 11136 memcpy(nlo_list[i].ssid.ssid.ssid, 11137 pno->a_networks[i].ssid.ssid, 11138 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len)); 11139 11140 if (pno->a_networks[i].rssi_threshold && 11141 pno->a_networks[i].rssi_threshold > -300) { 11142 nlo_list[i].rssi_cond.valid = cpu_to_le32(1); 11143 nlo_list[i].rssi_cond.rssi = 11144 cpu_to_le32(pno->a_networks[i].rssi_threshold); 11145 } 11146 11147 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1); 11148 nlo_list[i].bcast_nw_type.bcast_nw_type = 11149 cpu_to_le32(pno->a_networks[i].bcast_nw_type); 11150 } 11151 11152 ptr += nlo_list_len; 11153 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count); 11154 tlv = ptr; 11155 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len); 11156 ptr += sizeof(*tlv); 11157 channel_list = ptr; 11158 11159 for (i = 0; i < pno->a_networks[0].channel_count; i++) 11160 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]); 11161 11162 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n", 11163 vdev_id); 11164 11165 return skb; 11166 } 11167 11168 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar, 11169 u32 vdev_id) 11170 { 11171 struct wmi_wow_nlo_config_cmd *cmd; 11172 struct sk_buff *skb; 11173 size_t len; 11174 11175 len = sizeof(*cmd); 11176 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 11177 if (!skb) 11178 return ERR_PTR(-ENOMEM); 11179 11180 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data; 11181 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len); 11182 11183 cmd->vdev_id = cpu_to_le32(vdev_id); 11184 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP); 11185 11186 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 11187 "wmi tlv stop pno config vdev_id %d\n", vdev_id); 11188 return skb; 11189 } 11190 11191 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 11192 struct wmi_pno_scan_req_arg *pno_scan) 11193 { 11194 struct sk_buff *skb; 11195 int ret; 11196 11197 if (pno_scan->enable) 11198 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan); 11199 else 11200 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id); 11201 11202 if (IS_ERR_OR_NULL(skb)) 11203 return -ENOMEM; 11204 11205 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID); 11206 if (ret) { 11207 ath12k_warn(ar->ab, "failed to send WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID\n"); 11208 dev_kfree_skb(skb); 11209 } 11210 11211 return ret; 11212 } 11213 11214 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar, 11215 struct wmi_arp_ns_offload_arg *offload, 11216 void **ptr, 11217 bool enable, 11218 bool ext) 11219 { 11220 struct wmi_ns_offload_params *ns; 11221 struct wmi_tlv *tlv; 11222 void *buf_ptr = *ptr; 11223 u32 ns_cnt, ns_ext_tuples; 11224 int i, max_offloads; 11225 11226 ns_cnt = offload->ipv6_count; 11227 11228 tlv = buf_ptr; 11229 11230 if (ext) { 11231 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS; 11232 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 11233 ns_ext_tuples * sizeof(*ns)); 11234 i = WMI_MAX_NS_OFFLOADS; 11235 max_offloads = offload->ipv6_count; 11236 } else { 11237 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 11238 WMI_MAX_NS_OFFLOADS * sizeof(*ns)); 11239 i = 0; 11240 max_offloads = WMI_MAX_NS_OFFLOADS; 11241 } 11242 11243 buf_ptr += sizeof(*tlv); 11244 11245 for (; i < max_offloads; i++) { 11246 ns = buf_ptr; 11247 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE, 11248 sizeof(*ns)); 11249 11250 if (enable) { 11251 if (i < ns_cnt) 11252 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID); 11253 11254 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16); 11255 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16); 11256 11257 if (offload->ipv6_type[i]) 11258 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST); 11259 11260 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN); 11261 11262 if (!is_zero_ether_addr(ns->target_mac.addr)) 11263 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID); 11264 11265 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 11266 "wmi index %d ns_solicited %pI6 target %pI6", 11267 i, ns->solicitation_ipaddr, 11268 ns->target_ipaddr[0]); 11269 } 11270 11271 buf_ptr += sizeof(*ns); 11272 } 11273 11274 *ptr = buf_ptr; 11275 } 11276 11277 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar, 11278 struct wmi_arp_ns_offload_arg *offload, 11279 void **ptr, 11280 bool enable) 11281 { 11282 struct wmi_arp_offload_params *arp; 11283 struct wmi_tlv *tlv; 11284 void *buf_ptr = *ptr; 11285 int i; 11286 11287 /* fill arp tuple */ 11288 tlv = buf_ptr; 11289 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 11290 WMI_MAX_ARP_OFFLOADS * sizeof(*arp)); 11291 buf_ptr += sizeof(*tlv); 11292 11293 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) { 11294 arp = buf_ptr; 11295 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE, 11296 sizeof(*arp)); 11297 11298 if (enable && i < offload->ipv4_count) { 11299 /* Copy the target ip addr and flags */ 11300 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID); 11301 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4); 11302 11303 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4", 11304 arp->target_ipaddr); 11305 } 11306 11307 buf_ptr += sizeof(*arp); 11308 } 11309 11310 *ptr = buf_ptr; 11311 } 11312 11313 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 11314 struct ath12k_link_vif *arvif, 11315 struct wmi_arp_ns_offload_arg *offload, 11316 bool enable) 11317 { 11318 struct wmi_set_arp_ns_offload_cmd *cmd; 11319 struct wmi_tlv *tlv; 11320 struct sk_buff *skb; 11321 void *buf_ptr; 11322 size_t len; 11323 u8 ns_cnt, ns_ext_tuples = 0; 11324 int ret; 11325 11326 ns_cnt = offload->ipv6_count; 11327 11328 len = sizeof(*cmd) + 11329 sizeof(*tlv) + 11330 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) + 11331 sizeof(*tlv) + 11332 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params); 11333 11334 if (ns_cnt > WMI_MAX_NS_OFFLOADS) { 11335 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS; 11336 len += sizeof(*tlv) + 11337 ns_ext_tuples * sizeof(struct wmi_ns_offload_params); 11338 } 11339 11340 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 11341 if (!skb) 11342 return -ENOMEM; 11343 11344 buf_ptr = skb->data; 11345 cmd = buf_ptr; 11346 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 11347 sizeof(*cmd)); 11348 cmd->flags = cpu_to_le32(0); 11349 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 11350 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples); 11351 11352 buf_ptr += sizeof(*cmd); 11353 11354 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0); 11355 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable); 11356 11357 if (ns_ext_tuples) 11358 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1); 11359 11360 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID); 11361 if (ret) { 11362 ath12k_warn(ar->ab, "failed to send WMI_SET_ARP_NS_OFFLOAD_CMDID\n"); 11363 dev_kfree_skb(skb); 11364 } 11365 11366 return ret; 11367 } 11368 11369 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 11370 struct ath12k_link_vif *arvif, bool enable) 11371 { 11372 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data; 11373 struct wmi_gtk_rekey_offload_cmd *cmd; 11374 struct sk_buff *skb; 11375 __le64 replay_ctr; 11376 int ret, len; 11377 11378 len = sizeof(*cmd); 11379 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 11380 if (!skb) 11381 return -ENOMEM; 11382 11383 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 11384 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 11385 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 11386 11387 if (enable) { 11388 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE); 11389 11390 /* the length in rekey_data and cmd is equal */ 11391 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck)); 11392 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek)); 11393 11394 replay_ctr = cpu_to_le64(rekey_data->replay_ctr); 11395 memcpy(cmd->replay_ctr, &replay_ctr, 11396 sizeof(replay_ctr)); 11397 } else { 11398 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE); 11399 } 11400 11401 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n", 11402 arvif->vdev_id, enable); 11403 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 11404 if (ret) { 11405 ath12k_warn(ar->ab, "failed to send WMI_GTK_OFFLOAD_CMDID offload\n"); 11406 dev_kfree_skb(skb); 11407 } 11408 11409 return ret; 11410 } 11411 11412 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 11413 struct ath12k_link_vif *arvif) 11414 { 11415 struct wmi_gtk_rekey_offload_cmd *cmd; 11416 struct sk_buff *skb; 11417 int ret, len; 11418 11419 len = sizeof(*cmd); 11420 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 11421 if (!skb) 11422 return -ENOMEM; 11423 11424 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 11425 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 11426 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 11427 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE); 11428 11429 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n", 11430 arvif->vdev_id); 11431 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 11432 if (ret) { 11433 ath12k_warn(ar->ab, "failed to send WMI_GTK_OFFLOAD_CMDID getinfo\n"); 11434 dev_kfree_skb(skb); 11435 } 11436 11437 return ret; 11438 } 11439 11440 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 11441 const struct wmi_sta_keepalive_arg *arg) 11442 { 11443 struct wmi_sta_keepalive_arp_resp_params *arp; 11444 struct ath12k_wmi_pdev *wmi = ar->wmi; 11445 struct wmi_sta_keepalive_cmd *cmd; 11446 struct sk_buff *skb; 11447 size_t len; 11448 int ret; 11449 11450 len = sizeof(*cmd) + sizeof(*arp); 11451 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 11452 if (!skb) 11453 return -ENOMEM; 11454 11455 cmd = (struct wmi_sta_keepalive_cmd *)skb->data; 11456 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd)); 11457 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 11458 cmd->enabled = cpu_to_le32(arg->enabled); 11459 cmd->interval = cpu_to_le32(arg->interval); 11460 cmd->method = cpu_to_le32(arg->method); 11461 11462 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1); 11463 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 11464 sizeof(*arp)); 11465 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE || 11466 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) { 11467 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr); 11468 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr); 11469 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr); 11470 } 11471 11472 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 11473 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n", 11474 arg->vdev_id, arg->enabled, arg->method, arg->interval); 11475 11476 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID); 11477 if (ret) { 11478 ath12k_warn(ar->ab, "failed to send WMI_STA_KEEPALIVE_CMDID\n"); 11479 dev_kfree_skb(skb); 11480 } 11481 11482 return ret; 11483 } 11484 11485 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params) 11486 { 11487 struct wmi_mlo_setup_cmd *cmd; 11488 struct ath12k_wmi_pdev *wmi = ar->wmi; 11489 u32 *partner_links, num_links; 11490 int i, ret, buf_len, arg_len; 11491 struct sk_buff *skb; 11492 struct wmi_tlv *tlv; 11493 void *ptr; 11494 11495 num_links = mlo_params->num_partner_links; 11496 arg_len = num_links * sizeof(u32); 11497 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len; 11498 11499 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 11500 if (!skb) 11501 return -ENOMEM; 11502 11503 cmd = (struct wmi_mlo_setup_cmd *)skb->data; 11504 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD, 11505 sizeof(*cmd)); 11506 cmd->mld_group_id = mlo_params->group_id; 11507 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 11508 ptr = skb->data + sizeof(*cmd); 11509 11510 tlv = ptr; 11511 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 11512 ptr += TLV_HDR_SIZE; 11513 11514 partner_links = ptr; 11515 for (i = 0; i < num_links; i++) 11516 partner_links[i] = mlo_params->partner_link_id[i]; 11517 11518 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID); 11519 if (ret) { 11520 ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n", 11521 ret); 11522 dev_kfree_skb(skb); 11523 } 11524 11525 return ret; 11526 } 11527 11528 int ath12k_wmi_mlo_ready(struct ath12k *ar) 11529 { 11530 struct wmi_mlo_ready_cmd *cmd; 11531 struct ath12k_wmi_pdev *wmi = ar->wmi; 11532 struct sk_buff *skb; 11533 int ret, len; 11534 11535 len = sizeof(*cmd); 11536 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 11537 if (!skb) 11538 return -ENOMEM; 11539 11540 cmd = (struct wmi_mlo_ready_cmd *)skb->data; 11541 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD, 11542 sizeof(*cmd)); 11543 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 11544 11545 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID); 11546 if (ret) { 11547 ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n", 11548 ret); 11549 dev_kfree_skb(skb); 11550 } 11551 11552 return ret; 11553 } 11554 11555 int ath12k_wmi_mlo_teardown(struct ath12k *ar) 11556 { 11557 struct wmi_mlo_teardown_cmd *cmd; 11558 struct ath12k_wmi_pdev *wmi = ar->wmi; 11559 struct sk_buff *skb; 11560 int ret, len; 11561 11562 len = sizeof(*cmd); 11563 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 11564 if (!skb) 11565 return -ENOMEM; 11566 11567 cmd = (struct wmi_mlo_teardown_cmd *)skb->data; 11568 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD, 11569 sizeof(*cmd)); 11570 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 11571 cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON; 11572 11573 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID); 11574 if (ret) { 11575 ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n", 11576 ret); 11577 dev_kfree_skb(skb); 11578 } 11579 11580 return ret; 11581 } 11582 11583 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar) 11584 { 11585 return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 11586 ar->ab->wmi_ab.svc_map) && ar->supports_6ghz; 11587 } 11588 11589 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar, 11590 u32 vdev_id, 11591 struct ath12k_reg_tpc_power_info *param) 11592 { 11593 struct wmi_vdev_set_tpc_power_cmd *cmd; 11594 struct ath12k_wmi_pdev *wmi = ar->wmi; 11595 struct wmi_vdev_ch_power_params *ch; 11596 int i, ret, len, array_len; 11597 struct sk_buff *skb; 11598 struct wmi_tlv *tlv; 11599 u8 *ptr; 11600 11601 array_len = sizeof(*ch) * param->num_pwr_levels; 11602 len = sizeof(*cmd) + TLV_HDR_SIZE + array_len; 11603 11604 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 11605 if (!skb) 11606 return -ENOMEM; 11607 11608 ptr = skb->data; 11609 11610 cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr; 11611 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD, 11612 sizeof(*cmd)); 11613 cmd->vdev_id = cpu_to_le32(vdev_id); 11614 cmd->psd_power = cpu_to_le32(param->is_psd_power); 11615 cmd->eirp_power = cpu_to_le32(param->eirp_power); 11616 cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type); 11617 11618 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 11619 "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n", 11620 vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type); 11621 11622 ptr += sizeof(*cmd); 11623 tlv = (struct wmi_tlv *)ptr; 11624 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len); 11625 11626 ptr += TLV_HDR_SIZE; 11627 ch = (struct wmi_vdev_ch_power_params *)ptr; 11628 11629 for (i = 0; i < param->num_pwr_levels; i++, ch++) { 11630 ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO, 11631 sizeof(*ch)); 11632 ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq); 11633 ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power); 11634 11635 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n", 11636 ch->chan_cfreq, ch->tx_power); 11637 } 11638 11639 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID); 11640 if (ret) { 11641 ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n"); 11642 dev_kfree_skb(skb); 11643 } 11644 11645 return ret; 11646 } 11647 11648 static int 11649 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab, 11650 struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap, 11651 struct wmi_mlo_link_set_active_arg *arg) 11652 { 11653 struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg; 11654 u8 i; 11655 11656 if (arg->num_disallow_mode_comb > 11657 ARRAY_SIZE(arg->disallow_bmap)) { 11658 ath12k_warn(ab, "invalid num_disallow_mode_comb: %d", 11659 arg->num_disallow_mode_comb); 11660 return -EINVAL; 11661 } 11662 11663 dislw_bmap_arg = &arg->disallow_bmap[0]; 11664 for (i = 0; i < arg->num_disallow_mode_comb; i++) { 11665 dislw_bmap->tlv_header = 11666 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap)); 11667 dislw_bmap->disallowed_mode_bitmap = 11668 cpu_to_le32(dislw_bmap_arg->disallowed_mode); 11669 dislw_bmap->ieee_link_id_comb = 11670 le32_encode_bits(dislw_bmap_arg->ieee_link_id[0], 11671 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) | 11672 le32_encode_bits(dislw_bmap_arg->ieee_link_id[1], 11673 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) | 11674 le32_encode_bits(dislw_bmap_arg->ieee_link_id[2], 11675 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) | 11676 le32_encode_bits(dislw_bmap_arg->ieee_link_id[3], 11677 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4); 11678 11679 ath12k_dbg(ab, ATH12K_DBG_WMI, 11680 "entry %d disallowed_mode %d ieee_link_id_comb 0x%x", 11681 i, dislw_bmap_arg->disallowed_mode, 11682 dislw_bmap_arg->ieee_link_id_comb); 11683 dislw_bmap++; 11684 dislw_bmap_arg++; 11685 } 11686 11687 return 0; 11688 } 11689 11690 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab, 11691 struct wmi_mlo_link_set_active_arg *arg) 11692 { 11693 struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap; 11694 struct wmi_mlo_set_active_link_number_params *link_num_param; 11695 u32 num_link_num_param = 0, num_vdev_bitmap = 0; 11696 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 11697 struct wmi_mlo_link_set_active_cmd *cmd; 11698 u32 num_inactive_vdev_bitmap = 0; 11699 u32 num_disallow_mode_comb = 0; 11700 struct wmi_tlv *tlv; 11701 struct sk_buff *skb; 11702 __le32 *vdev_bitmap; 11703 void *buf_ptr; 11704 int i, ret; 11705 u32 len; 11706 11707 if (!arg->num_vdev_bitmap && !arg->num_link_entry) { 11708 ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry"); 11709 return -EINVAL; 11710 } 11711 11712 switch (arg->force_mode) { 11713 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM: 11714 case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM: 11715 num_link_num_param = arg->num_link_entry; 11716 fallthrough; 11717 case WMI_MLO_LINK_FORCE_MODE_ACTIVE: 11718 case WMI_MLO_LINK_FORCE_MODE_INACTIVE: 11719 case WMI_MLO_LINK_FORCE_MODE_NO_FORCE: 11720 num_vdev_bitmap = arg->num_vdev_bitmap; 11721 break; 11722 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE: 11723 num_vdev_bitmap = arg->num_vdev_bitmap; 11724 num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap; 11725 break; 11726 default: 11727 ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode); 11728 return -EINVAL; 11729 } 11730 11731 num_disallow_mode_comb = arg->num_disallow_mode_comb; 11732 len = sizeof(*cmd) + 11733 TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param + 11734 TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap + 11735 TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE + 11736 TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb; 11737 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) 11738 len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap; 11739 11740 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 11741 if (!skb) 11742 return -ENOMEM; 11743 11744 cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data; 11745 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD, 11746 sizeof(*cmd)); 11747 cmd->force_mode = cpu_to_le32(arg->force_mode); 11748 cmd->reason = cpu_to_le32(arg->reason); 11749 ath12k_dbg(ab, ATH12K_DBG_WMI, 11750 "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d", 11751 arg->force_mode, arg->reason, num_link_num_param, 11752 num_vdev_bitmap, num_inactive_vdev_bitmap, 11753 num_disallow_mode_comb); 11754 11755 buf_ptr = skb->data + sizeof(*cmd); 11756 tlv = buf_ptr; 11757 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 11758 sizeof(*link_num_param) * num_link_num_param); 11759 buf_ptr += TLV_HDR_SIZE; 11760 11761 if (num_link_num_param) { 11762 cmd->ctrl_flags = 11763 le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0, 11764 CRTL_F_DYNC_FORCE_LINK_NUM); 11765 11766 link_num_param = buf_ptr; 11767 for (i = 0; i < num_link_num_param; i++) { 11768 link_num_param->tlv_header = 11769 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param)); 11770 link_num_param->num_of_link = 11771 cpu_to_le32(arg->link_num[i].num_of_link); 11772 link_num_param->vdev_type = 11773 cpu_to_le32(arg->link_num[i].vdev_type); 11774 link_num_param->vdev_subtype = 11775 cpu_to_le32(arg->link_num[i].vdev_subtype); 11776 link_num_param->home_freq = 11777 cpu_to_le32(arg->link_num[i].home_freq); 11778 ath12k_dbg(ab, ATH12K_DBG_WMI, 11779 "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d", 11780 i, arg->link_num[i].num_of_link, 11781 arg->link_num[i].vdev_type, 11782 arg->link_num[i].vdev_subtype, 11783 arg->link_num[i].home_freq, 11784 __le32_to_cpu(cmd->ctrl_flags)); 11785 link_num_param++; 11786 } 11787 11788 buf_ptr += sizeof(*link_num_param) * num_link_num_param; 11789 } 11790 11791 tlv = buf_ptr; 11792 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 11793 sizeof(*vdev_bitmap) * num_vdev_bitmap); 11794 buf_ptr += TLV_HDR_SIZE; 11795 11796 if (num_vdev_bitmap) { 11797 vdev_bitmap = buf_ptr; 11798 for (i = 0; i < num_vdev_bitmap; i++) { 11799 vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]); 11800 ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x", 11801 i, arg->vdev_bitmap[i]); 11802 } 11803 11804 buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap; 11805 } 11806 11807 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) { 11808 tlv = buf_ptr; 11809 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 11810 sizeof(*vdev_bitmap) * 11811 num_inactive_vdev_bitmap); 11812 buf_ptr += TLV_HDR_SIZE; 11813 11814 if (num_inactive_vdev_bitmap) { 11815 vdev_bitmap = buf_ptr; 11816 for (i = 0; i < num_inactive_vdev_bitmap; i++) { 11817 vdev_bitmap[i] = 11818 cpu_to_le32(arg->inactive_vdev_bitmap[i]); 11819 ath12k_dbg(ab, ATH12K_DBG_WMI, 11820 "entry %d inactive_vdev_id_bitmap 0x%x", 11821 i, arg->inactive_vdev_bitmap[i]); 11822 } 11823 11824 buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap; 11825 } 11826 } else { 11827 /* add empty vdev bitmap2 tlv */ 11828 tlv = buf_ptr; 11829 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 11830 buf_ptr += TLV_HDR_SIZE; 11831 } 11832 11833 /* add empty ieee_link_id_bitmap tlv */ 11834 tlv = buf_ptr; 11835 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 11836 buf_ptr += TLV_HDR_SIZE; 11837 11838 /* add empty ieee_link_id_bitmap2 tlv */ 11839 tlv = buf_ptr; 11840 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 11841 buf_ptr += TLV_HDR_SIZE; 11842 11843 tlv = buf_ptr; 11844 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 11845 sizeof(*disallowed_mode_bmap) * 11846 arg->num_disallow_mode_comb); 11847 buf_ptr += TLV_HDR_SIZE; 11848 11849 ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg); 11850 if (ret) 11851 goto free_skb; 11852 11853 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID); 11854 if (ret) { 11855 ath12k_warn(ab, 11856 "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret); 11857 goto free_skb; 11858 } 11859 11860 ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd"); 11861 11862 return ret; 11863 11864 free_skb: 11865 dev_kfree_skb(skb); 11866 return ret; 11867 } 11868 11869 int ath12k_wmi_alloc(void) 11870 { 11871 guard(mutex)(&ath12k_wmi_mutex); 11872 11873 if (!ath12k_wmi_tb) { 11874 ath12k_wmi_tb = __alloc_percpu(WMI_TAG_MAX * sizeof(void *), 11875 __alignof__(void *)); 11876 if (!ath12k_wmi_tb) 11877 return -ENOMEM; 11878 11879 refcount_set(&ath12k_wmi_refcount, 1); 11880 } else { 11881 refcount_inc(&ath12k_wmi_refcount); 11882 } 11883 11884 return 0; 11885 } 11886 11887 void ath12k_wmi_free(void) 11888 { 11889 guard(mutex)(&ath12k_wmi_mutex); 11890 11891 if (refcount_dec_and_test(&ath12k_wmi_refcount)) { 11892 free_percpu(ath12k_wmi_tb); 11893 ath12k_wmi_tb = NULL; 11894 } 11895 } 11896