1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Support for Intel Camera Imaging ISP subsystem. 4 * Copyright (c) 2015, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 */ 15 16 /* CSI reveiver has 3 ports. */ 17 #define N_CSI_PORTS (3) 18 19 #include "system_local.h" 20 #include "isys_dma_global.h" /* isys2401_dma_channel, 21 * isys2401_dma_cfg_t 22 */ 23 24 #include "ibuf_ctrl_local.h" /* ibuf_cfg_t, 25 * ibuf_ctrl_cfg_t 26 */ 27 28 #include "isys_stream2mmio.h" /* stream2mmio_cfg_t */ 29 30 #include "csi_rx.h" /* csi_rx_frontend_cfg_t, 31 * csi_rx_backend_cfg_t, 32 * csi_rx_backend_lut_entry_t 33 */ 34 #include "pixelgen.h" 35 36 #define INPUT_SYSTEM_N_STREAM_ID 6 /* maximum number of simultaneous 37 virtual channels supported*/ 38 39 typedef enum { 40 INPUT_SYSTEM_SOURCE_TYPE_UNDEFINED = 0, 41 INPUT_SYSTEM_SOURCE_TYPE_SENSOR, 42 INPUT_SYSTEM_SOURCE_TYPE_PRBS, 43 N_INPUT_SYSTEM_SOURCE_TYPE 44 } input_system_source_type_t; 45 46 typedef struct input_system_channel_s input_system_channel_t; 47 struct input_system_channel_s { 48 stream2mmio_ID_t stream2mmio_id; 49 stream2mmio_sid_ID_t stream2mmio_sid_id; 50 51 ibuf_ctrl_ID_t ibuf_ctrl_id; 52 isp2401_ib_buffer_t ib_buffer; 53 54 isys2401_dma_ID_t dma_id; 55 isys2401_dma_channel dma_channel; 56 }; 57 58 typedef struct input_system_channel_cfg_s input_system_channel_cfg_t; 59 struct input_system_channel_cfg_s { 60 stream2mmio_cfg_t stream2mmio_cfg; 61 ibuf_ctrl_cfg_t ibuf_ctrl_cfg; 62 isys2401_dma_cfg_t dma_cfg; 63 isys2401_dma_port_cfg_t dma_src_port_cfg; 64 isys2401_dma_port_cfg_t dma_dest_port_cfg; 65 }; 66 67 typedef struct input_system_input_port_s input_system_input_port_t; 68 struct input_system_input_port_s { 69 input_system_source_type_t source_type; 70 71 struct { 72 csi_rx_frontend_ID_t frontend_id; 73 csi_rx_backend_ID_t backend_id; 74 csi_mipi_packet_type_t packet_type; 75 csi_rx_backend_lut_entry_t backend_lut_entry; 76 } csi_rx; 77 78 struct { 79 csi_mipi_packet_type_t packet_type; 80 csi_rx_backend_lut_entry_t backend_lut_entry; 81 } metadata; 82 83 struct { 84 pixelgen_ID_t pixelgen_id; 85 } pixelgen; 86 }; 87 88 typedef struct input_system_input_port_cfg_s input_system_input_port_cfg_t; 89 struct input_system_input_port_cfg_s { 90 struct { 91 csi_rx_frontend_cfg_t frontend_cfg; 92 csi_rx_backend_cfg_t backend_cfg; 93 csi_rx_backend_cfg_t md_backend_cfg; 94 } csi_rx_cfg; 95 96 struct { 97 pixelgen_tpg_cfg_t tpg_cfg; 98 pixelgen_prbs_cfg_t prbs_cfg; 99 } pixelgen_cfg; 100 }; 101 102 typedef struct isp2401_input_system_cfg_s isp2401_input_system_cfg_t; 103 struct isp2401_input_system_cfg_s { 104 input_system_input_port_ID_t input_port_id; 105 106 input_system_source_type_t mode; 107 108 bool online; 109 bool raw_packed; 110 s8 linked_isys_stream_id; 111 112 struct { 113 bool comp_enable; 114 s32 active_lanes; 115 s32 fmt_type; 116 s32 ch_id; 117 s32 comp_predictor; 118 s32 comp_scheme; 119 } csi_port_attr; 120 121 pixelgen_tpg_cfg_t tpg_port_attr; 122 123 pixelgen_prbs_cfg_t prbs_port_attr; 124 125 struct { 126 s32 align_req_in_bytes; 127 s32 bits_per_pixel; 128 s32 pixels_per_line; 129 s32 lines_per_frame; 130 } input_port_resolution; 131 132 struct { 133 s32 left_padding; 134 s32 max_isp_input_width; 135 } output_port_attr; 136 137 struct { 138 bool enable; 139 s32 fmt_type; 140 s32 align_req_in_bytes; 141 s32 bits_per_pixel; 142 s32 pixels_per_line; 143 s32 lines_per_frame; 144 } metadata; 145 }; 146 147 typedef struct virtual_input_system_stream_s virtual_input_system_stream_t; 148 struct virtual_input_system_stream_s { 149 u32 id; /*Used when multiple MIPI data types and/or virtual channels are used. 150 Must be unique within one CSI RX 151 and lower than SH_CSS_MAX_ISYS_CHANNEL_NODES */ 152 u8 enable_metadata; 153 input_system_input_port_t input_port; 154 input_system_channel_t channel; 155 input_system_channel_t md_channel; /* metadata channel */ 156 u8 online; 157 s8 linked_isys_stream_id; 158 u8 valid; 159 }; 160 161 typedef struct virtual_input_system_stream_cfg_s 162 virtual_input_system_stream_cfg_t; 163 struct virtual_input_system_stream_cfg_s { 164 u8 enable_metadata; 165 input_system_input_port_cfg_t input_port_cfg; 166 input_system_channel_cfg_t channel_cfg; 167 input_system_channel_cfg_t md_channel_cfg; 168 u8 valid; 169 }; 170 171 #define ISP_INPUT_BUF_START_ADDR 0 172 #define NUM_OF_INPUT_BUF 2 173 #define NUM_OF_LINES_PER_BUF 2 174 #define LINES_OF_ISP_INPUT_BUF (NUM_OF_INPUT_BUF * NUM_OF_LINES_PER_BUF) 175 #define ISP_INPUT_BUF_STRIDE SH_CSS_MAX_SENSOR_WIDTH 176