1 // SPDX-License-Identifier: GPL-2.0-only
2 /*******************************************************************************
3 This contains the functions to handle the platform driver.
4
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
6
7
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9 *******************************************************************************/
10
11 #include <linux/device.h>
12 #include <linux/platform_device.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/module.h>
15 #include <linux/io.h>
16 #include <linux/of.h>
17 #include <linux/of_net.h>
18 #include <linux/of_mdio.h>
19
20 #include "stmmac.h"
21 #include "stmmac_platform.h"
22
23 #ifdef CONFIG_OF
24
25 /**
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
27 * @dev: struct device of the platform device
28 * @mcast_bins: Multicast filtering bins
29 * Description:
30 * this function validates the number of Multicast filtering bins specified
31 * by the configuration through the device tree. The Synopsys GMAC supports
32 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
33 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
34 * to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
35 * invalid and will cause the filtering algorithm to use Multicast
36 * promiscuous mode.
37 */
dwmac1000_validate_mcast_bins(struct device * dev,int mcast_bins)38 static int dwmac1000_validate_mcast_bins(struct device *dev, int mcast_bins)
39 {
40 int x = mcast_bins;
41
42 switch (x) {
43 case HASH_TABLE_SIZE:
44 case 128:
45 case 256:
46 break;
47 default:
48 x = 0;
49 dev_info(dev, "Hash table entries set to unexpected value %d\n",
50 mcast_bins);
51 break;
52 }
53 return x;
54 }
55
56 /**
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
58 * @dev: struct device of the platform device
59 * @ucast_entries: number of Unicast address entries
60 * Description:
61 * This function validates the number of Unicast address entries supported
62 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
63 * supports 1..32, 64, or 128 Unicast filter entries for its Unicast filter
64 * logic. This function validates a valid, supported configuration is
65 * selected, and defaults to 1 Unicast address if an unsupported
66 * configuration is selected.
67 */
dwmac1000_validate_ucast_entries(struct device * dev,int ucast_entries)68 static int dwmac1000_validate_ucast_entries(struct device *dev,
69 int ucast_entries)
70 {
71 int x = ucast_entries;
72
73 switch (x) {
74 case 1 ... 32:
75 case 64:
76 case 128:
77 break;
78 default:
79 x = 1;
80 dev_info(dev, "Unicast table entries set to unexpected value %d\n",
81 ucast_entries);
82 break;
83 }
84 return x;
85 }
86
87 /**
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
89 * @pdev: platform device
90 * Description:
91 * if required, from device-tree the AXI internal register can be tuned
92 * by using platform parameters.
93 */
stmmac_axi_setup(struct platform_device * pdev)94 static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
95 {
96 struct device_node *np;
97 struct stmmac_axi *axi;
98 u32 axi_blen[AXI_BLEN];
99
100 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
101 if (!np)
102 return NULL;
103
104 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
105 if (!axi) {
106 of_node_put(np);
107 return ERR_PTR(-ENOMEM);
108 }
109
110 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
111 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
112 axi->axi_fb = of_property_read_bool(np, "snps,fb");
113
114 if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
115 axi->axi_wr_osr_lmt = 1;
116 if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
117 axi->axi_rd_osr_lmt = 1;
118 of_property_read_u32_array(np, "snps,blen", axi_blen, AXI_BLEN);
119 stmmac_axi_blen_to_mask(&axi->axi_blen_regval, axi_blen, AXI_BLEN);
120 of_node_put(np);
121
122 return axi;
123 }
124
125 /**
126 * stmmac_mtl_setup - parse DT parameters for multiple queues configuration
127 * @pdev: platform device
128 * @plat: enet data
129 */
stmmac_mtl_setup(struct platform_device * pdev,struct plat_stmmacenet_data * plat)130 static int stmmac_mtl_setup(struct platform_device *pdev,
131 struct plat_stmmacenet_data *plat)
132 {
133 struct device_node *rx_node;
134 struct device_node *tx_node;
135 u8 queue = 0;
136 int ret = 0;
137 u32 value;
138
139 /* First Queue must always be in DCB mode. As MTL_QUEUE_DCB = 1 we need
140 * to always set this, otherwise Queue will be classified as AVB
141 * (because MTL_QUEUE_AVB = 0).
142 */
143 plat->rx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
144 plat->tx_queues_cfg[0].mode_to_use = MTL_QUEUE_DCB;
145
146 rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
147 if (!rx_node)
148 return ret;
149
150 tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
151 if (!tx_node) {
152 of_node_put(rx_node);
153 return ret;
154 }
155
156 /* Processing RX queues common config */
157 if (!of_property_read_u32(rx_node, "snps,rx-queues-to-use", &value)) {
158 if (value > MTL_MAX_RX_QUEUES)
159 value = MTL_MAX_RX_QUEUES;
160 plat->rx_queues_to_use = value;
161 }
162
163 if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
164 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
165 else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
166 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
167 else
168 plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
169
170 /* Processing individual RX queue config */
171 for_each_child_of_node_scoped(rx_node, q_node) {
172 if (queue >= plat->rx_queues_to_use)
173 break;
174
175 if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
176 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
177 else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
178 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
179 else
180 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
181
182 of_property_read_u32(q_node, "snps,map-to-dma-channel",
183 &plat->rx_queues_cfg[queue].chan);
184 /* TODO: Dynamic mapping to be included in the future */
185
186 if (!of_property_read_u32(q_node, "snps,priority",
187 &plat->rx_queues_cfg[queue].prio))
188 plat->rx_queues_cfg[queue].use_prio = true;
189
190 /* RX queue specific packet type routing */
191 if (of_property_read_bool(q_node, "snps,route-avcp"))
192 plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
193 else if (of_property_read_bool(q_node, "snps,route-ptp"))
194 plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
195 else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
196 plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
197 else if (of_property_read_bool(q_node, "snps,route-up"))
198 plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
199 else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
200 plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
201
202 queue++;
203 }
204 if (queue != plat->rx_queues_to_use) {
205 ret = -EINVAL;
206 dev_err(&pdev->dev, "Not all RX queues were configured\n");
207 goto out;
208 }
209
210 /* Processing TX queues common config */
211 if (!of_property_read_u32(tx_node, "snps,tx-queues-to-use", &value)) {
212 if (value > MTL_MAX_TX_QUEUES)
213 value = MTL_MAX_TX_QUEUES;
214 plat->tx_queues_to_use = value;
215 }
216
217 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
218 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
219 else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
220 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
221 else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
222 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
223 else
224 plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
225
226 queue = 0;
227
228 /* Processing individual TX queue config */
229 for_each_child_of_node_scoped(tx_node, q_node) {
230 if (queue >= plat->tx_queues_to_use)
231 break;
232
233 if (of_property_read_u32(q_node, "snps,weight",
234 &plat->tx_queues_cfg[queue].weight))
235 plat->tx_queues_cfg[queue].weight = 0x10 + queue;
236
237 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
238 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
239 } else if (of_property_read_bool(q_node,
240 "snps,avb-algorithm")) {
241 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
242
243 /* Credit Base Shaper parameters used by AVB */
244 if (of_property_read_u32(q_node, "snps,send_slope",
245 &plat->tx_queues_cfg[queue].send_slope))
246 plat->tx_queues_cfg[queue].send_slope = 0x0;
247 if (of_property_read_u32(q_node, "snps,idle_slope",
248 &plat->tx_queues_cfg[queue].idle_slope))
249 plat->tx_queues_cfg[queue].idle_slope = 0x0;
250 if (of_property_read_u32(q_node, "snps,high_credit",
251 &plat->tx_queues_cfg[queue].high_credit))
252 plat->tx_queues_cfg[queue].high_credit = 0x0;
253 if (of_property_read_u32(q_node, "snps,low_credit",
254 &plat->tx_queues_cfg[queue].low_credit))
255 plat->tx_queues_cfg[queue].low_credit = 0x0;
256 } else {
257 plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
258 }
259
260 if (!of_property_read_u32(q_node, "snps,priority",
261 &plat->tx_queues_cfg[queue].prio))
262 plat->tx_queues_cfg[queue].use_prio = true;
263
264 plat->tx_queues_cfg[queue].coe_unsupported =
265 of_property_read_bool(q_node, "snps,coe-unsupported");
266
267 queue++;
268 }
269 if (queue != plat->tx_queues_to_use) {
270 ret = -EINVAL;
271 dev_err(&pdev->dev, "Not all TX queues were configured\n");
272 goto out;
273 }
274
275 out:
276 of_node_put(rx_node);
277 of_node_put(tx_node);
278
279 return ret;
280 }
281
282 /**
283 * stmmac_of_get_mdio() - Gets the MDIO bus from the devicetree.
284 * @np: devicetree node
285 *
286 * The MDIO bus will be searched for in the following ways:
287 * 1. The compatible is "snps,dwc-qos-ethernet-4.10" && a "mdio" named
288 * child node exists
289 * 2. A child node with the "snps,dwmac-mdio" compatible is present
290 *
291 * Return: The MDIO node if present otherwise NULL
292 */
stmmac_of_get_mdio(struct device_node * np)293 static struct device_node *stmmac_of_get_mdio(struct device_node *np)
294 {
295 static const struct of_device_id need_mdio_ids[] = {
296 { .compatible = "snps,dwc-qos-ethernet-4.10" },
297 {},
298 };
299 struct device_node *mdio_node = NULL;
300
301 if (of_match_node(need_mdio_ids, np)) {
302 mdio_node = of_get_child_by_name(np, "mdio");
303 } else {
304 /**
305 * If snps,dwmac-mdio is passed from DT, always register
306 * the MDIO
307 */
308 for_each_child_of_node(np, mdio_node) {
309 if (of_device_is_compatible(mdio_node,
310 "snps,dwmac-mdio"))
311 break;
312 }
313 }
314
315 return mdio_node;
316 }
317
318 /**
319 * stmmac_mdio_setup() - Populate platform related MDIO structures.
320 * @plat: driver data platform structure
321 * @np: devicetree node
322 * @dev: device pointer
323 *
324 * This searches for MDIO information from the devicetree.
325 * If an MDIO node is found, it's assigned to plat->mdio_node and
326 * plat->mdio_bus_data is allocated.
327 * If no connection can be determined, just plat->mdio_bus_data is allocated
328 * to indicate a bus should be created and scanned for a phy.
329 * If it's determined there's no MDIO bus needed, both are left NULL.
330 *
331 * This expects that plat->phy_node has already been searched for.
332 *
333 * Return: 0 on success, errno otherwise.
334 */
stmmac_mdio_setup(struct plat_stmmacenet_data * plat,struct device_node * np,struct device * dev)335 static int stmmac_mdio_setup(struct plat_stmmacenet_data *plat,
336 struct device_node *np, struct device *dev)
337 {
338 bool legacy_mdio;
339
340 plat->mdio_node = stmmac_of_get_mdio(np);
341 if (plat->mdio_node)
342 dev_dbg(dev, "Found MDIO subnode\n");
343
344 /* Legacy devicetrees allowed for no MDIO bus description and expect
345 * the bus to be scanned for devices. If there's no phy or fixed-link
346 * described assume this is the case since there must be something
347 * connected to the MAC.
348 */
349 legacy_mdio = !of_phy_is_fixed_link(np) && !plat->phy_node;
350 if (legacy_mdio)
351 dev_info(dev, "Deprecated MDIO bus assumption used\n");
352
353 if (plat->mdio_node || legacy_mdio) {
354 plat->mdio_bus_data = devm_kzalloc(dev,
355 sizeof(*plat->mdio_bus_data),
356 GFP_KERNEL);
357 if (!plat->mdio_bus_data)
358 return -ENOMEM;
359
360 plat->mdio_bus_data->needs_reset = true;
361 }
362
363 return 0;
364 }
365
366 /**
367 * stmmac_of_get_mac_mode - retrieves the interface of the MAC
368 * @np: - device-tree node
369 * Description:
370 * Similar to `of_get_phy_mode()`, this function will retrieve (from
371 * the device-tree) the interface mode on the MAC side. This assumes
372 * that there is mode converter in-between the MAC & PHY
373 * (e.g. GMII-to-RGMII).
374 */
stmmac_of_get_mac_mode(struct device_node * np)375 static int stmmac_of_get_mac_mode(struct device_node *np)
376 {
377 const char *pm;
378 int err, i;
379
380 err = of_property_read_string(np, "mac-mode", &pm);
381 if (err < 0)
382 return err;
383
384 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
385 if (!strcasecmp(pm, phy_modes(i)))
386 return i;
387 }
388
389 return -ENODEV;
390 }
391
392 /* Compatible string array for all gmac4 devices */
393 static const char * const stmmac_gmac4_compats[] = {
394 "snps,dwmac-4.00",
395 "snps,dwmac-4.10a",
396 "snps,dwmac-4.20a",
397 "snps,dwmac-5.00a",
398 "snps,dwmac-5.10a",
399 "snps,dwmac-5.20",
400 "snps,dwmac-5.30a",
401 "snps,dwmac-5.40a",
402 NULL
403 };
404
405 /**
406 * stmmac_probe_config_dt - parse device-tree driver parameters
407 * @pdev: platform_device structure
408 * @mac: MAC address to use
409 * Description:
410 * this function is to read the driver parameters from device-tree and
411 * set some private fields that will be used by the main at runtime.
412 */
413 static struct plat_stmmacenet_data *
stmmac_probe_config_dt(struct platform_device * pdev,u8 * mac)414 stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
415 {
416 struct device_node *np = pdev->dev.of_node;
417 struct plat_stmmacenet_data *plat;
418 struct stmmac_dma_cfg *dma_cfg;
419 static int bus_id = -ENODEV;
420 int phy_mode;
421 void *ret;
422 int rc;
423
424 plat = stmmac_plat_dat_alloc(&pdev->dev);
425 if (!plat)
426 return ERR_PTR(-ENOMEM);
427
428 rc = of_get_mac_address(np, mac);
429 if (rc) {
430 if (rc == -EPROBE_DEFER)
431 return ERR_PTR(rc);
432
433 eth_zero_addr(mac);
434 }
435
436 phy_mode = device_get_phy_mode(&pdev->dev);
437 if (phy_mode < 0)
438 return ERR_PTR(phy_mode);
439
440 plat->phy_interface = phy_mode;
441
442 rc = stmmac_of_get_mac_mode(np);
443 if (rc >= 0 && rc != phy_mode)
444 dev_warn(&pdev->dev,
445 "\"mac-mode\" property used for %s but differs to \"phy-mode\" of %s, and will be ignored. Please report.\n",
446 phy_modes(rc), phy_modes(phy_mode));
447
448 /* Some wrapper drivers still rely on phy_node. Let's save it while
449 * they are not converted to phylink. */
450 plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
451
452 /* Get max speed of operation from device tree */
453 of_property_read_u32(np, "max-speed", &plat->max_speed);
454
455 plat->bus_id = of_alias_get_id(np, "ethernet");
456 if (plat->bus_id < 0) {
457 if (bus_id < 0)
458 bus_id = of_alias_get_highest_id("ethernet");
459 /* No ethernet alias found, init at -1 so first bus_id is 0 */
460 if (bus_id < 0)
461 bus_id = -1;
462 plat->bus_id = ++bus_id;
463 }
464
465 if (of_property_read_u32(np, "snps,clk-csr", &plat->clk_csr))
466 of_property_read_u32(np, "clk_csr", &plat->clk_csr);
467
468 /* "snps,phy-addr" is not a standard property. Mark it as deprecated
469 * and warn of its use. Remove this when phy node support is added.
470 */
471 if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
472 dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
473
474 rc = stmmac_mdio_setup(plat, np, &pdev->dev);
475 if (rc) {
476 ret = ERR_PTR(rc);
477 goto error_put_phy;
478 }
479
480 of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
481
482 of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
483
484 plat->force_sf_dma_mode =
485 of_property_read_bool(np, "snps,force_sf_dma_mode");
486
487 if (of_property_read_bool(np, "snps,en-tx-lpi-clockgating")) {
488 dev_warn(&pdev->dev,
489 "OF property snps,en-tx-lpi-clockgating is deprecated, please convert driver to use STMMAC_FLAG_EN_TX_LPI_CLK_PHY_CAP\n");
490 plat->flags |= STMMAC_FLAG_EN_TX_LPI_CLOCKGATING;
491 }
492
493 /*
494 * Currently only the properties needed on SPEAr600
495 * are provided. All other properties should be added
496 * once needed on other platforms.
497 */
498 if (of_device_is_compatible(np, "st,spear600-gmac") ||
499 of_device_is_compatible(np, "snps,dwmac-3.50a") ||
500 of_device_is_compatible(np, "snps,dwmac-3.70a") ||
501 of_device_is_compatible(np, "snps,dwmac-3.72a") ||
502 of_device_is_compatible(np, "snps,dwmac")) {
503 /* Note that the max-frame-size parameter as defined in the
504 * ePAPR v1.1 spec is defined as max-frame-size, it's
505 * actually used as the IEEE definition of MAC Client
506 * data, or MTU. The ePAPR specification is confusing as
507 * the definition is max-frame-size, but usage examples
508 * are clearly MTUs
509 */
510 of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
511 of_property_read_u32(np, "snps,multicast-filter-bins",
512 &plat->multicast_filter_bins);
513 of_property_read_u32(np, "snps,perfect-filter-entries",
514 &plat->unicast_filter_entries);
515 plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
516 &pdev->dev, plat->unicast_filter_entries);
517 plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
518 &pdev->dev, plat->multicast_filter_bins);
519 plat->core_type = DWMAC_CORE_GMAC;
520 plat->pmt = true;
521 }
522
523 if (of_device_is_compatible(np, "snps,dwmac-3.40a")) {
524 plat->core_type = DWMAC_CORE_GMAC;
525 plat->enh_desc = true;
526 plat->tx_coe = true;
527 plat->bugged_jumbo = true;
528 plat->pmt = true;
529 }
530
531 if (of_device_compatible_match(np, stmmac_gmac4_compats)) {
532 plat->core_type = DWMAC_CORE_GMAC4;
533 plat->pmt = true;
534 if (of_property_read_bool(np, "snps,tso"))
535 plat->flags |= STMMAC_FLAG_TSO_EN;
536 }
537
538 if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
539 of_device_is_compatible(np, "snps,dwmac-3.710")) {
540 plat->enh_desc = true;
541 plat->bugged_jumbo = true;
542 plat->force_sf_dma_mode = true;
543 }
544
545 if (of_device_is_compatible(np, "snps,dwxgmac")) {
546 plat->core_type = DWMAC_CORE_XGMAC;
547 plat->pmt = true;
548 if (of_property_read_bool(np, "snps,tso"))
549 plat->flags |= STMMAC_FLAG_TSO_EN;
550 of_property_read_u32(np, "snps,multicast-filter-bins",
551 &plat->multicast_filter_bins);
552 }
553
554 dma_cfg = plat->dma_cfg;
555
556 of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
557 if (!dma_cfg->pbl)
558 dma_cfg->pbl = DEFAULT_DMA_PBL;
559 of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
560 of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
561 dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
562
563 dma_cfg->aal = of_property_read_bool(np, "snps,aal");
564 dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
565 dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
566
567 plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
568 if (plat->force_thresh_dma_mode && plat->force_sf_dma_mode) {
569 plat->force_sf_dma_mode = 0;
570 dev_warn(&pdev->dev,
571 "force_sf_dma_mode is ignored if force_thresh_dma_mode is set.\n");
572 }
573
574 of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
575
576 plat->axi = stmmac_axi_setup(pdev);
577
578 rc = stmmac_mtl_setup(pdev, plat);
579 if (rc) {
580 ret = ERR_PTR(rc);
581 goto error_put_mdio;
582 }
583
584 /* clock setup */
585 if (!of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
586 plat->stmmac_clk = devm_clk_get(&pdev->dev,
587 STMMAC_RESOURCE_NAME);
588 if (IS_ERR(plat->stmmac_clk)) {
589 dev_warn(&pdev->dev, "Cannot get CSR clock\n");
590 plat->stmmac_clk = NULL;
591 }
592 clk_prepare_enable(plat->stmmac_clk);
593 }
594
595 plat->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
596 if (IS_ERR(plat->pclk)) {
597 ret = plat->pclk;
598 goto error_pclk_get;
599 }
600 clk_prepare_enable(plat->pclk);
601
602 /* Fall-back to main clock in case of no PTP ref is passed */
603 plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
604 if (IS_ERR(plat->clk_ptp_ref)) {
605 plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
606 plat->clk_ptp_ref = NULL;
607 dev_info(&pdev->dev, "PTP uses main clock\n");
608 } else {
609 plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
610 dev_dbg(&pdev->dev, "PTP rate %lu\n", plat->clk_ptp_rate);
611 }
612
613 plat->stmmac_rst = devm_reset_control_get_optional(&pdev->dev,
614 STMMAC_RESOURCE_NAME);
615 if (IS_ERR(plat->stmmac_rst)) {
616 ret = plat->stmmac_rst;
617 goto error_hw_init;
618 }
619
620 plat->stmmac_ahb_rst = devm_reset_control_get_optional_shared(
621 &pdev->dev, "ahb");
622 if (IS_ERR(plat->stmmac_ahb_rst)) {
623 ret = plat->stmmac_ahb_rst;
624 goto error_hw_init;
625 }
626
627 return plat;
628
629 error_hw_init:
630 clk_disable_unprepare(plat->pclk);
631 error_pclk_get:
632 clk_disable_unprepare(plat->stmmac_clk);
633 error_put_mdio:
634 of_node_put(plat->mdio_node);
635 error_put_phy:
636 of_node_put(plat->phy_node);
637
638 return ret;
639 }
640
devm_stmmac_remove_config_dt(void * data)641 static void devm_stmmac_remove_config_dt(void *data)
642 {
643 struct plat_stmmacenet_data *plat = data;
644
645 clk_disable_unprepare(plat->stmmac_clk);
646 clk_disable_unprepare(plat->pclk);
647 of_node_put(plat->mdio_node);
648 of_node_put(plat->phy_node);
649 }
650
651 /**
652 * devm_stmmac_probe_config_dt
653 * @pdev: platform_device structure
654 * @mac: MAC address to use
655 * Description: Devres variant of stmmac_probe_config_dt().
656 */
657 struct plat_stmmacenet_data *
devm_stmmac_probe_config_dt(struct platform_device * pdev,u8 * mac)658 devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
659 {
660 struct plat_stmmacenet_data *plat;
661 int ret;
662
663 plat = stmmac_probe_config_dt(pdev, mac);
664 if (IS_ERR(plat))
665 return plat;
666
667 ret = devm_add_action_or_reset(&pdev->dev,
668 devm_stmmac_remove_config_dt, plat);
669 if (ret)
670 return ERR_PTR(ret);
671
672 return plat;
673 }
674 #else
675 struct plat_stmmacenet_data *
devm_stmmac_probe_config_dt(struct platform_device * pdev,u8 * mac)676 devm_stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac)
677 {
678 return ERR_PTR(-EINVAL);
679 }
680 #endif /* CONFIG_OF */
681 EXPORT_SYMBOL_GPL(devm_stmmac_probe_config_dt);
682
stmmac_pltfr_find_clk(struct plat_stmmacenet_data * plat_dat,const char * name)683 struct clk *stmmac_pltfr_find_clk(struct plat_stmmacenet_data *plat_dat,
684 const char *name)
685 {
686 for (int i = 0; i < plat_dat->num_clks; i++)
687 if (strcmp(plat_dat->clks[i].id, name) == 0)
688 return plat_dat->clks[i].clk;
689
690 return NULL;
691 }
692 EXPORT_SYMBOL_GPL(stmmac_pltfr_find_clk);
693
694 /**
695 * stmmac_pltfr_get_irq_array - Read per-channel IRQs from platform device
696 * @pdev: platform device
697 * @fmt: IRQ name format string (e.g., "tx-queue-%d")
698 * @irqs: array to store IRQ numbers
699 * @num: maximum number of IRQs to read
700 *
701 * Return: 0 on success, -EPROBE_DEFER if IRQ is deferred, -EINVAL on error.
702 * Missing IRQs are set to 0 and iteration stops at first missing IRQ.
703 */
stmmac_pltfr_get_irq_array(struct platform_device * pdev,const char * fmt,int * irqs,size_t num)704 static int stmmac_pltfr_get_irq_array(struct platform_device *pdev,
705 const char *fmt, int *irqs, size_t num)
706 {
707 char name[16];
708 int i;
709
710 for (i = 0; i < num; i++) {
711 if (snprintf(name, sizeof(name), fmt, i) >= sizeof(name))
712 return -EINVAL;
713
714 irqs[i] = platform_get_irq_byname_optional(pdev, name);
715 if (irqs[i] == -EPROBE_DEFER)
716 return -EPROBE_DEFER;
717
718 if (irqs[i] <= 0) {
719 dev_dbg(&pdev->dev, "IRQ %s not found\n", name);
720
721 /* Stop silently on first unset irq */
722 irqs[i] = 0;
723 break;
724 }
725 }
726
727 return 0;
728 }
729
stmmac_get_platform_resources(struct platform_device * pdev,struct stmmac_resources * stmmac_res)730 int stmmac_get_platform_resources(struct platform_device *pdev,
731 struct stmmac_resources *stmmac_res)
732 {
733 int ret;
734
735 memset(stmmac_res, 0, sizeof(*stmmac_res));
736
737 /* Get IRQ information early to have an ability to ask for deferred
738 * probe if needed before we went too far with resource allocation.
739 */
740 stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
741 if (stmmac_res->irq < 0)
742 return stmmac_res->irq;
743
744 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
745 * The external wake up irq can be passed through the platform code
746 * named as "eth_wake_irq"
747 *
748 * In case the wake up interrupt is not passed from the platform
749 * so the driver will continue to use the mac irq (ndev->irq)
750 */
751 stmmac_res->wol_irq =
752 platform_get_irq_byname_optional(pdev, "eth_wake_irq");
753 if (stmmac_res->wol_irq < 0) {
754 if (stmmac_res->wol_irq == -EPROBE_DEFER)
755 return -EPROBE_DEFER;
756 dev_info(&pdev->dev, "IRQ eth_wake_irq not found\n");
757 stmmac_res->wol_irq = stmmac_res->irq;
758 }
759
760 stmmac_res->sfty_irq =
761 platform_get_irq_byname_optional(pdev, "sfty");
762 if (stmmac_res->sfty_irq < 0) {
763 if (stmmac_res->sfty_irq == -EPROBE_DEFER)
764 return -EPROBE_DEFER;
765 dev_info(&pdev->dev, "IRQ sfty not found\n");
766 }
767
768 stmmac_res->addr = devm_platform_ioremap_resource(pdev, 0);
769
770 if (IS_ERR(stmmac_res->addr))
771 return PTR_ERR(stmmac_res->addr);
772
773 /* TX channels irq */
774 ret = stmmac_pltfr_get_irq_array(pdev, "tx-queue-%d",
775 stmmac_res->tx_irq,
776 MTL_MAX_TX_QUEUES);
777 if (ret)
778 return ret;
779
780 /* RX channels irq */
781 ret = stmmac_pltfr_get_irq_array(pdev, "rx-queue-%d",
782 stmmac_res->rx_irq,
783 MTL_MAX_RX_QUEUES);
784 if (ret)
785 return ret;
786
787 return 0;
788 }
789 EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
790
791 /**
792 * stmmac_pltfr_init
793 * @dev: pointer to the device structure
794 * @plat: driver data platform structure
795 * Description: Call the platform's init callback (if any) and propagate
796 * the return value.
797 */
stmmac_pltfr_init(struct device * dev,struct plat_stmmacenet_data * plat)798 static int stmmac_pltfr_init(struct device *dev,
799 struct plat_stmmacenet_data *plat)
800 {
801 int ret = 0;
802
803 if (plat->init)
804 ret = plat->init(dev, plat->bsp_priv);
805
806 return ret;
807 }
808
809 /**
810 * stmmac_pltfr_exit
811 * @dev: pointer to the device structure
812 * @plat: driver data platform structure
813 * Description: Call the platform's exit callback (if any).
814 */
stmmac_pltfr_exit(struct device * dev,struct plat_stmmacenet_data * plat)815 static void stmmac_pltfr_exit(struct device *dev,
816 struct plat_stmmacenet_data *plat)
817 {
818 if (plat->exit)
819 plat->exit(dev, plat->bsp_priv);
820 }
821
stmmac_plat_suspend(struct device * dev,void * bsp_priv)822 static int stmmac_plat_suspend(struct device *dev, void *bsp_priv)
823 {
824 struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));
825
826 stmmac_pltfr_exit(dev, priv->plat);
827
828 return 0;
829 }
830
stmmac_plat_resume(struct device * dev,void * bsp_priv)831 static int stmmac_plat_resume(struct device *dev, void *bsp_priv)
832 {
833 struct stmmac_priv *priv = netdev_priv(dev_get_drvdata(dev));
834
835 return stmmac_pltfr_init(dev, priv->plat);
836 }
837
838 /**
839 * stmmac_pltfr_probe
840 * @pdev: platform device pointer
841 * @plat: driver data platform structure
842 * @res: stmmac resources structure
843 * Description: This calls the platform's init() callback and probes the
844 * stmmac driver.
845 */
stmmac_pltfr_probe(struct platform_device * pdev,struct plat_stmmacenet_data * plat,struct stmmac_resources * res)846 int stmmac_pltfr_probe(struct platform_device *pdev,
847 struct plat_stmmacenet_data *plat,
848 struct stmmac_resources *res)
849 {
850 if (!plat->suspend && plat->exit)
851 plat->suspend = stmmac_plat_suspend;
852 if (!plat->resume && plat->init)
853 plat->resume = stmmac_plat_resume;
854
855 return stmmac_dvr_probe(&pdev->dev, plat, res);
856 }
857 EXPORT_SYMBOL_GPL(stmmac_pltfr_probe);
858
devm_stmmac_pltfr_remove(void * data)859 static void devm_stmmac_pltfr_remove(void *data)
860 {
861 struct platform_device *pdev = data;
862
863 stmmac_pltfr_remove(pdev);
864 }
865
866 /**
867 * devm_stmmac_pltfr_probe
868 * @pdev: pointer to the platform device
869 * @plat: driver data platform structure
870 * @res: stmmac resources
871 * Description: Devres variant of stmmac_pltfr_probe(). Allows users to skip
872 * calling stmmac_pltfr_remove() on driver detach.
873 */
devm_stmmac_pltfr_probe(struct platform_device * pdev,struct plat_stmmacenet_data * plat,struct stmmac_resources * res)874 int devm_stmmac_pltfr_probe(struct platform_device *pdev,
875 struct plat_stmmacenet_data *plat,
876 struct stmmac_resources *res)
877 {
878 int ret;
879
880 ret = stmmac_pltfr_probe(pdev, plat, res);
881 if (ret)
882 return ret;
883
884 return devm_add_action_or_reset(&pdev->dev, devm_stmmac_pltfr_remove,
885 pdev);
886 }
887 EXPORT_SYMBOL_GPL(devm_stmmac_pltfr_probe);
888
889 /**
890 * stmmac_pltfr_remove
891 * @pdev: pointer to the platform device
892 * Description: This undoes the effects of stmmac_pltfr_probe() by removing the
893 * driver and calling the platform's exit() callback.
894 */
stmmac_pltfr_remove(struct platform_device * pdev)895 void stmmac_pltfr_remove(struct platform_device *pdev)
896 {
897 stmmac_dvr_remove(&pdev->dev);
898 }
899 EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
900
stmmac_bus_clks_config(struct stmmac_priv * priv,bool enabled)901 static int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled)
902 {
903 struct plat_stmmacenet_data *plat_dat = priv->plat;
904 int ret;
905
906 if (enabled) {
907 ret = clk_prepare_enable(plat_dat->stmmac_clk);
908 if (ret)
909 return ret;
910 ret = clk_prepare_enable(plat_dat->pclk);
911 if (ret) {
912 clk_disable_unprepare(plat_dat->stmmac_clk);
913 return ret;
914 }
915 if (plat_dat->clks_config) {
916 ret = plat_dat->clks_config(plat_dat->bsp_priv, enabled);
917 if (ret) {
918 clk_disable_unprepare(plat_dat->stmmac_clk);
919 clk_disable_unprepare(plat_dat->pclk);
920 return ret;
921 }
922 }
923 } else {
924 clk_disable_unprepare(plat_dat->stmmac_clk);
925 clk_disable_unprepare(plat_dat->pclk);
926 if (plat_dat->clks_config)
927 plat_dat->clks_config(plat_dat->bsp_priv, enabled);
928 }
929
930 return 0;
931 }
932
stmmac_runtime_suspend(struct device * dev)933 static int __maybe_unused stmmac_runtime_suspend(struct device *dev)
934 {
935 struct net_device *ndev = dev_get_drvdata(dev);
936 struct stmmac_priv *priv = netdev_priv(ndev);
937
938 stmmac_bus_clks_config(priv, false);
939
940 return 0;
941 }
942
stmmac_runtime_resume(struct device * dev)943 static int __maybe_unused stmmac_runtime_resume(struct device *dev)
944 {
945 struct net_device *ndev = dev_get_drvdata(dev);
946 struct stmmac_priv *priv = netdev_priv(ndev);
947
948 return stmmac_bus_clks_config(priv, true);
949 }
950
stmmac_pltfr_noirq_suspend(struct device * dev)951 static int __maybe_unused stmmac_pltfr_noirq_suspend(struct device *dev)
952 {
953 struct net_device *ndev = dev_get_drvdata(dev);
954 struct stmmac_priv *priv = netdev_priv(ndev);
955 int ret;
956
957 if (!netif_running(ndev))
958 return 0;
959
960 if (!priv->wolopts) {
961 /* Disable clock in case of PWM is off */
962 clk_disable_unprepare(priv->plat->clk_ptp_ref);
963
964 ret = pm_runtime_force_suspend(dev);
965 if (ret)
966 return ret;
967 }
968
969 return 0;
970 }
971
stmmac_pltfr_noirq_resume(struct device * dev)972 static int __maybe_unused stmmac_pltfr_noirq_resume(struct device *dev)
973 {
974 struct net_device *ndev = dev_get_drvdata(dev);
975 struct stmmac_priv *priv = netdev_priv(ndev);
976 int ret;
977
978 if (!netif_running(ndev))
979 return 0;
980
981 if (!priv->wolopts) {
982 /* enable the clk previously disabled */
983 ret = pm_runtime_force_resume(dev);
984 if (ret)
985 return ret;
986
987 ret = clk_prepare_enable(priv->plat->clk_ptp_ref);
988 if (ret < 0) {
989 netdev_warn(priv->dev,
990 "failed to enable PTP reference clock: %pe\n",
991 ERR_PTR(ret));
992 return ret;
993 }
994 }
995
996 return 0;
997 }
998
999 const struct dev_pm_ops stmmac_pltfr_pm_ops = {
1000 SET_SYSTEM_SLEEP_PM_OPS(stmmac_suspend, stmmac_resume)
1001 SET_RUNTIME_PM_OPS(stmmac_runtime_suspend, stmmac_runtime_resume, NULL)
1002 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(stmmac_pltfr_noirq_suspend, stmmac_pltfr_noirq_resume)
1003 };
1004 EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
1005
1006 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
1007 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1008 MODULE_LICENSE("GPL");
1009