1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_H_ 5 #define _ICE_H_ 6 7 #include <linux/types.h> 8 #include <linux/errno.h> 9 #include <linux/kernel.h> 10 #include <linux/module.h> 11 #include <linux/firmware.h> 12 #include <linux/netdevice.h> 13 #include <linux/compiler.h> 14 #include <linux/etherdevice.h> 15 #include <linux/skbuff.h> 16 #include <linux/cpumask.h> 17 #include <linux/rtnetlink.h> 18 #include <linux/if_vlan.h> 19 #include <linux/dma-mapping.h> 20 #include <linux/pci.h> 21 #include <linux/workqueue.h> 22 #include <linux/wait.h> 23 #include <linux/interrupt.h> 24 #include <linux/ethtool.h> 25 #include <linux/timer.h> 26 #include <linux/delay.h> 27 #include <linux/bitmap.h> 28 #include <linux/log2.h> 29 #include <linux/ip.h> 30 #include <linux/sctp.h> 31 #include <linux/ipv6.h> 32 #include <linux/pkt_sched.h> 33 #include <linux/if_bridge.h> 34 #include <linux/ctype.h> 35 #include <linux/linkmode.h> 36 #include <linux/bpf.h> 37 #include <linux/btf.h> 38 #include <linux/auxiliary_bus.h> 39 #include <linux/net/intel/virtchnl.h> 40 #include <linux/cpu_rmap.h> 41 #include <linux/dim.h> 42 #include <linux/gnss.h> 43 #include <net/pkt_cls.h> 44 #include <net/pkt_sched.h> 45 #include <net/tc_act/tc_mirred.h> 46 #include <net/tc_act/tc_gact.h> 47 #include <net/ip.h> 48 #include <net/devlink.h> 49 #include <net/ipv6.h> 50 #include <net/xdp_sock.h> 51 #include <net/xdp_sock_drv.h> 52 #include <net/geneve.h> 53 #include <net/gre.h> 54 #include <net/udp_tunnel.h> 55 #include <net/vxlan.h> 56 #include <net/gtp.h> 57 #include <linux/ppp_defs.h> 58 #include "ice_devids.h" 59 #include "ice_type.h" 60 #include "ice_txrx.h" 61 #include "ice_dcb.h" 62 #include "ice_switch.h" 63 #include "ice_common.h" 64 #include "ice_flow.h" 65 #include "ice_sched.h" 66 #include "ice_idc_int.h" 67 #include "ice_sriov.h" 68 #include "ice_vf_mbx.h" 69 #include "ice_ptp.h" 70 #include "ice_tspll.h" 71 #include "ice_fdir.h" 72 #include "ice_xsk.h" 73 #include "ice_arfs.h" 74 #include "ice_repr.h" 75 #include "ice_eswitch.h" 76 #include "ice_lag.h" 77 #include "ice_vsi_vlan_ops.h" 78 #include "ice_gnss.h" 79 #include "ice_irq.h" 80 #include "ice_dpll.h" 81 #include "ice_adapter.h" 82 #include "devlink/health.h" 83 84 #define ICE_BAR0 0 85 #define ICE_REQ_DESC_MULTIPLE 32 86 #define ICE_MIN_NUM_DESC 64 87 #define ICE_MAX_NUM_DESC_E810 8160 88 #define ICE_MAX_NUM_DESC_E830 8096 89 #define ICE_MAX_NUM_DESC_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \ 90 ICE_MAX_NUM_DESC_E830 : \ 91 ICE_MAX_NUM_DESC_E810) 92 #define ICE_DFLT_MIN_RX_DESC 512 93 #define ICE_DFLT_NUM_TX_DESC 256 94 #define ICE_DFLT_NUM_RX_DESC 2048 95 96 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 97 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) 98 #define ICE_AQ_LEN 192 99 #define ICE_MBXSQ_LEN 64 100 #define ICE_SBQ_LEN 64 101 #define ICE_MIN_LAN_TXRX_MSIX 1 102 #define ICE_MIN_LAN_OICR_MSIX 1 103 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX) 104 #define ICE_FDIR_MSIX 2 105 #define ICE_NO_VSI 0xffff 106 #define ICE_VSI_MAP_CONTIG 0 107 #define ICE_VSI_MAP_SCATTER 1 108 #define ICE_MAX_SCATTER_TXQS 16 109 #define ICE_MAX_SCATTER_RXQS 16 110 #define ICE_Q_WAIT_RETRY_LIMIT 10 111 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT) 112 #define ICE_MAX_LG_RSS_QS 256 113 #define ICE_INVAL_Q_INDEX 0xffff 114 115 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */ 116 117 #define ICE_CHNL_START_TC 1 118 119 #define ICE_MAX_RESET_WAIT 20 120 121 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4) 122 123 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) 124 125 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD) 126 127 #define ICE_MAX_TSO_SIZE 131072 128 129 #define ICE_UP_TABLE_TRANSLATE(val, i) \ 130 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \ 131 ICE_AQ_VSI_UP_TABLE_UP##i##_M) 132 133 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i])) 134 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i])) 135 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i])) 136 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i])) 137 138 /* Minimum BW limit is 500 Kbps for any scheduler node */ 139 #define ICE_MIN_BW_LIMIT 500 140 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes. 141 * use it to convert user specified BW limit into Kbps 142 */ 143 #define ICE_BW_KBPS_DIVISOR 125 144 145 /* Default recipes have priority 4 and below, hence priority values between 5..7 146 * can be used as filter priority for advanced switch filter (advanced switch 147 * filters need new recipe to be created for specified extraction sequence 148 * because default recipe extraction sequence does not represent custom 149 * extraction) 150 */ 151 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7 152 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields + 153 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as 154 * SYN/FIN/RST)) 155 */ 156 #define ICE_SWITCH_FLTR_PRIO_RSVD 6 157 #define ICE_SWITCH_FLTR_PRIO_VSI 5 158 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI 159 160 /* Macro for each VSI in a PF */ 161 #define ice_for_each_vsi(pf, i) \ 162 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++) 163 164 /* Macros for each Tx/Xdp/Rx ring in a VSI */ 165 #define ice_for_each_txq(vsi, i) \ 166 for ((i) = 0; (i) < (vsi)->num_txq; (i)++) 167 168 #define ice_for_each_xdp_txq(vsi, i) \ 169 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++) 170 171 #define ice_for_each_rxq(vsi, i) \ 172 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++) 173 174 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */ 175 #define ice_for_each_alloc_txq(vsi, i) \ 176 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++) 177 178 #define ice_for_each_alloc_rxq(vsi, i) \ 179 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++) 180 181 #define ice_for_each_q_vector(vsi, i) \ 182 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++) 183 184 #define ice_for_each_chnl_tc(i) \ 185 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++) 186 187 #define ICE_UCAST_PROMISC_BITS ICE_PROMISC_UCAST_RX 188 189 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_RX | \ 190 ICE_PROMISC_VLAN_RX) 191 192 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX) 193 194 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \ 195 ICE_PROMISC_MCAST_RX | \ 196 ICE_PROMISC_VLAN_TX | \ 197 ICE_PROMISC_VLAN_RX) 198 199 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev)) 200 201 enum ice_feature { 202 ICE_F_DSCP, 203 ICE_F_PHY_RCLK, 204 ICE_F_SMA_CTRL, 205 ICE_F_CGU, 206 ICE_F_GNSS, 207 ICE_F_TXTIME, 208 ICE_F_GCS, 209 ICE_F_ROCE_LAG, 210 ICE_F_SRIOV_LAG, 211 ICE_F_SRIOV_AA_LAG, 212 ICE_F_MBX_LIMIT, 213 ICE_F_MAX 214 }; 215 216 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key); 217 218 struct ice_channel { 219 struct list_head list; 220 u8 type; 221 u16 sw_id; 222 u16 base_q; 223 u16 num_rxq; 224 u16 num_txq; 225 u16 vsi_num; 226 u8 ena_tc; 227 struct ice_aqc_vsi_props info; 228 u64 max_tx_rate; 229 u64 min_tx_rate; 230 atomic_t num_sb_fltr; 231 struct ice_vsi *ch_vsi; 232 }; 233 234 struct ice_txq_meta { 235 u32 q_teid; /* Tx-scheduler element identifier */ 236 u16 q_id; /* Entry in VSI's txq_map bitmap */ 237 u16 q_handle; /* Relative index of Tx queue within TC */ 238 u16 vsi_idx; /* VSI index that Tx queue belongs to */ 239 u8 tc; /* TC number that Tx queue belongs to */ 240 }; 241 242 struct ice_tc_info { 243 u16 qoffset; 244 u16 qcount_tx; 245 u16 qcount_rx; 246 u8 netdev_tc; 247 }; 248 249 struct ice_tc_cfg { 250 u8 numtc; /* Total number of enabled TCs */ 251 u16 ena_tc; /* Tx map */ 252 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS]; 253 }; 254 255 struct ice_qs_cfg { 256 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */ 257 unsigned long *pf_map; 258 unsigned long pf_map_size; 259 unsigned int q_count; 260 unsigned int scatter_count; 261 u16 *vsi_map; 262 u16 vsi_map_offset; 263 u8 mapping_mode; 264 }; 265 266 struct ice_sw { 267 struct ice_pf *pf; 268 u16 sw_id; /* switch ID for this switch */ 269 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */ 270 }; 271 272 enum ice_pf_state { 273 ICE_TESTING, 274 ICE_DOWN, 275 ICE_NEEDS_RESTART, 276 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */ 277 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */ 278 ICE_PFR_REQ, /* set by driver */ 279 ICE_CORER_REQ, /* set by driver */ 280 ICE_GLOBR_REQ, /* set by driver */ 281 ICE_CORER_RECV, /* set by OICR handler */ 282 ICE_GLOBR_RECV, /* set by OICR handler */ 283 ICE_EMPR_RECV, /* set by OICR handler */ 284 ICE_SUSPENDED, /* set on module remove path */ 285 ICE_RESET_FAILED, /* set by reset/rebuild */ 286 /* When checking for the PF to be in a nominal operating state, the 287 * bits that are grouped at the beginning of the list need to be 288 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will 289 * be checked. If you need to add a bit into consideration for nominal 290 * operating state, it must be added before 291 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position 292 * without appropriate consideration. 293 */ 294 ICE_STATE_NOMINAL_CHECK_BITS, 295 ICE_ADMINQ_EVENT_PENDING, 296 ICE_MAILBOXQ_EVENT_PENDING, 297 ICE_SIDEBANDQ_EVENT_PENDING, 298 ICE_MDD_EVENT_PENDING, 299 ICE_VFLR_EVENT_PENDING, 300 ICE_FLTR_OVERFLOW_PROMISC, 301 ICE_VF_DIS, 302 ICE_CFG_BUSY, 303 ICE_SERVICE_SCHED, 304 ICE_SERVICE_DIS, 305 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */ 306 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */ 307 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */ 308 ICE_LINK_DEFAULT_OVERRIDE_PENDING, 309 ICE_PHY_INIT_COMPLETE, 310 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */ 311 ICE_AUX_ERR_PENDING, 312 ICE_STATE_NBITS /* must be last */ 313 }; 314 315 enum ice_vsi_state { 316 ICE_VSI_DOWN, 317 ICE_VSI_NEEDS_RESTART, 318 ICE_VSI_NETDEV_ALLOCD, 319 ICE_VSI_NETDEV_REGISTERED, 320 ICE_VSI_UMAC_FLTR_CHANGED, 321 ICE_VSI_MMAC_FLTR_CHANGED, 322 ICE_VSI_PROMISC_CHANGED, 323 ICE_VSI_REBUILD_PENDING, 324 ICE_VSI_STATE_NBITS /* must be last */ 325 }; 326 327 struct ice_vsi_stats { 328 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */ 329 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */ 330 u16 tx_ring_stats_len; /* Length of the Tx ring stats array */ 331 u16 rx_ring_stats_len; /* Length of the Rx ring stats array */ 332 }; 333 334 /* struct that defines a VSI, associated with a dev */ 335 struct ice_vsi { 336 struct net_device *netdev; 337 struct ice_sw *vsw; /* switch this VSI is on */ 338 struct ice_pf *back; /* back pointer to PF */ 339 struct ice_rx_ring **rx_rings; /* Rx ring array */ 340 struct ice_tx_ring **tx_rings; /* Tx ring array */ 341 struct ice_q_vector **q_vectors; /* q_vector array */ 342 343 irqreturn_t (*irq_handler)(int irq, void *data); 344 345 u64 tx_linearize; 346 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS); 347 unsigned int current_netdev_flags; 348 u32 tx_restart; 349 u32 tx_busy; 350 u32 rx_buf_failed; 351 u32 rx_page_failed; 352 u16 num_q_vectors; 353 /* tell if only dynamic irq allocation is allowed */ 354 bool irq_dyn_alloc; 355 bool hsplit:1; 356 357 u16 vsi_num; /* HW (absolute) index of this VSI */ 358 u16 idx; /* software index in pf->vsi[] */ 359 360 u16 num_gfltr; 361 u16 num_bfltr; 362 363 /* RSS config */ 364 u16 rss_table_size; /* HW RSS table size */ 365 u16 rss_size; /* Allocated RSS queues */ 366 u8 rss_hfunc; /* User configured hash type */ 367 u8 *rss_hkey_user; /* User configured hash keys */ 368 u8 *rss_lut_user; /* User configured lookup table entries */ 369 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */ 370 371 /* aRFS members only allocated for the PF VSI */ 372 #define ICE_MAX_ARFS_LIST 1024 373 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1) 374 struct hlist_head *arfs_fltr_list; 375 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 376 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 377 atomic_t *arfs_last_fltr_id; 378 379 u16 max_frame; 380 381 struct ice_aqc_vsi_props info; /* VSI properties */ 382 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */ 383 384 /* VSI stats */ 385 struct rtnl_link_stats64 net_stats; 386 struct rtnl_link_stats64 net_stats_prev; 387 struct ice_eth_stats eth_stats; 388 struct ice_eth_stats eth_stats_prev; 389 390 struct list_head tmp_sync_list; /* MAC filters to be synced */ 391 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */ 392 393 u8 irqs_ready:1; 394 u8 current_isup:1; /* Sync 'link up' logging */ 395 u8 stat_offsets_loaded:1; 396 struct ice_vsi_vlan_ops inner_vlan_ops; 397 struct ice_vsi_vlan_ops outer_vlan_ops; 398 u16 num_vlan; 399 400 /* queue information */ 401 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 402 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 403 u16 *txq_map; /* index in pf->avail_txqs */ 404 u16 *rxq_map; /* index in pf->avail_rxqs */ 405 struct_group_tagged(ice_vsi_alloc_queues_params, alloc_txq_rxq, 406 u16 alloc_txq; /* Allocated Tx queues */ 407 u16 alloc_rxq; /* Allocated Rx queues */ 408 ); 409 u16 num_txq; /* Used Tx queues */ 410 u16 num_rxq; /* Used Rx queues */ 411 u16 req_txq; /* User requested Tx queues */ 412 u16 req_rxq; /* User requested Rx queues */ 413 u16 num_rx_desc; 414 u16 num_tx_desc; 415 struct ice_tc_cfg tc_cfg; 416 struct bpf_prog *xdp_prog; 417 struct ice_tx_ring **xdp_rings; /* XDP ring array */ 418 u16 num_xdp_txq; /* Used XDP queues */ 419 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */ 420 struct mutex xdp_state_lock; 421 422 struct net_device **target_netdevs; 423 424 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 425 426 /* Channel Specific Fields */ 427 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC]; 428 u16 cnt_q_avail; 429 u16 next_base_q; /* next queue to be used for channel setup */ 430 struct list_head ch_list; 431 u16 num_chnl_rxq; 432 u16 num_chnl_txq; 433 u16 ch_rss_size; 434 u16 num_chnl_fltr; 435 /* store away rss size info before configuring ADQ channels so that, 436 * it can be used after tc-qdisc delete, to get back RSS setting as 437 * they were before 438 */ 439 u16 orig_rss_size; 440 /* this keeps tracks of all enabled TC with and without DCB 441 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue 442 * information 443 */ 444 u8 all_numtc; 445 u16 all_enatc; 446 447 /* store away TC info, to be used for rebuild logic */ 448 u8 old_numtc; 449 u16 old_ena_tc; 450 451 /* setup back reference, to which aggregator node this VSI 452 * corresponds to 453 */ 454 struct ice_agg_node *agg_node; 455 456 struct_group_tagged(ice_vsi_cfg_params, params, 457 struct ice_port_info *port_info; /* back pointer to port_info */ 458 struct ice_channel *ch; /* VSI's channel structure, may be NULL */ 459 union { 460 /* VF associated with this VSI, may be NULL */ 461 struct ice_vf *vf; 462 /* SF associated with this VSI, may be NULL */ 463 struct ice_dynamic_port *sf; 464 }; 465 u32 flags; /* VSI flags used for rebuild and configuration */ 466 enum ice_vsi_type type; /* the type of the VSI */ 467 ); 468 } ____cacheline_internodealigned_in_smp; 469 470 /* struct that defines an interrupt vector */ 471 struct ice_q_vector { 472 struct ice_vsi *vsi; 473 474 u16 v_idx; /* index in the vsi->q_vector array. */ 475 u16 reg_idx; /* PF relative register index */ 476 u8 num_ring_rx; /* total number of Rx rings in vector */ 477 u8 num_ring_tx; /* total number of Tx rings in vector */ 478 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */ 479 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this 480 * value to the device 481 */ 482 u8 intrl; 483 484 struct napi_struct napi; 485 486 struct ice_ring_container rx; 487 struct ice_ring_container tx; 488 489 struct ice_channel *ch; 490 491 char name[ICE_INT_NAME_STR_LEN]; 492 493 u16 total_events; /* net_dim(): number of interrupts processed */ 494 u16 vf_reg_idx; /* VF relative register index */ 495 struct msi_map irq; 496 } ____cacheline_internodealigned_in_smp; 497 498 enum ice_pf_flags { 499 ICE_FLAG_FLTR_SYNC, 500 ICE_FLAG_RDMA_ENA, 501 ICE_FLAG_RSS_ENA, 502 ICE_FLAG_SRIOV_ENA, 503 ICE_FLAG_SRIOV_CAPABLE, 504 ICE_FLAG_DCB_CAPABLE, 505 ICE_FLAG_DCB_ENA, 506 ICE_FLAG_FD_ENA, 507 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */ 508 ICE_FLAG_ADV_FEATURES, 509 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */ 510 ICE_FLAG_CLS_FLOWER, 511 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA, 512 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 513 ICE_FLAG_NO_MEDIA, 514 ICE_FLAG_FW_LLDP_AGENT, 515 ICE_FLAG_MOD_POWER_UNSUPPORTED, 516 ICE_FLAG_PHY_FW_LOAD_FAILED, 517 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */ 518 ICE_FLAG_VF_TRUE_PROMISC_ENA, 519 ICE_FLAG_MDD_AUTO_RESET_VF, 520 ICE_FLAG_VF_VLAN_PRUNING, 521 ICE_FLAG_LINK_LENIENT_MODE_ENA, 522 ICE_FLAG_PLUG_AUX_DEV, 523 ICE_FLAG_UNPLUG_AUX_DEV, 524 ICE_FLAG_AUX_DEV_CREATED, 525 ICE_FLAG_MTU_CHANGED, 526 ICE_FLAG_GNSS, /* GNSS successfully initialized */ 527 ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */ 528 ICE_FLAG_LLDP_AQ_FLTR, 529 ICE_PF_FLAGS_NBITS /* must be last */ 530 }; 531 532 enum ice_misc_thread_tasks { 533 ICE_MISC_THREAD_TX_TSTAMP, 534 ICE_MISC_THREAD_NBITS /* must be last */ 535 }; 536 537 struct ice_eswitch { 538 struct ice_vsi *uplink_vsi; 539 struct ice_esw_br_offloads *br_offloads; 540 struct xarray reprs; 541 bool is_running; 542 }; 543 544 struct ice_agg_node { 545 u32 agg_id; 546 #define ICE_MAX_VSIS_IN_AGG_NODE 64 547 u32 num_vsis; 548 u8 valid; 549 }; 550 551 struct ice_pf_msix { 552 u32 cur; 553 u32 min; 554 u32 max; 555 u32 total; 556 u32 rest; 557 }; 558 559 struct ice_pf { 560 struct pci_dev *pdev; 561 struct ice_adapter *adapter; 562 563 struct devlink_region *nvm_region; 564 struct devlink_region *sram_region; 565 struct devlink_region *devcaps_region; 566 567 /* devlink port data */ 568 struct devlink_port devlink_port; 569 570 /* OS reserved IRQ details */ 571 struct ice_irq_tracker irq_tracker; 572 struct ice_virt_irq_tracker virt_irq_tracker; 573 574 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */ 575 576 struct ice_vsi **vsi; /* VSIs created by the driver */ 577 struct ice_vsi_stats **vsi_stats; 578 struct ice_sw *first_sw; /* first switch created by firmware */ 579 u16 eswitch_mode; /* current mode of eswitch */ 580 struct dentry *ice_debugfs_pf; 581 struct ice_vfs vfs; 582 DECLARE_BITMAP(features, ICE_F_MAX); 583 DECLARE_BITMAP(state, ICE_STATE_NBITS); 584 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS); 585 DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS); 586 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */ 587 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */ 588 unsigned long *txtime_txqs; /* bitmap to track PF Tx Time queue */ 589 unsigned long serv_tmr_period; 590 unsigned long serv_tmr_prev; 591 struct timer_list serv_tmr; 592 struct work_struct serv_task; 593 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */ 594 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */ 595 struct mutex tc_mutex; /* lock to protect TC changes */ 596 struct mutex adev_mutex; /* lock to protect aux device access */ 597 struct mutex lag_mutex; /* protect ice_lag struct in PF */ 598 u32 msg_enable; 599 struct ice_ptp ptp; 600 struct gnss_serial *gnss_serial; 601 struct gnss_device *gnss_dev; 602 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */ 603 604 /* spinlock to protect the AdminQ wait list */ 605 spinlock_t aq_wait_lock; 606 struct hlist_head aq_wait_list; 607 wait_queue_head_t aq_wait_queue; 608 bool fw_emp_reset_disabled; 609 610 wait_queue_head_t reset_wait_queue; 611 612 u32 hw_csum_rx_error; 613 u32 hw_rx_eipe_error; 614 u32 oicr_err_reg; 615 struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */ 616 struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */ 617 u16 max_pf_txqs; /* Total Tx queues PF wide */ 618 u16 max_pf_rxqs; /* Total Rx queues PF wide */ 619 struct ice_pf_msix msix; 620 u16 num_lan_tx; /* num LAN Tx queues setup */ 621 u16 num_lan_rx; /* num LAN Rx queues setup */ 622 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 623 u16 num_alloc_vsi; 624 u16 corer_count; /* Core reset count */ 625 u16 globr_count; /* Global reset count */ 626 u16 empr_count; /* EMP reset count */ 627 u16 pfr_count; /* PF reset count */ 628 u32 link_down_events; 629 630 u8 wol_ena : 1; /* software state of WoL */ 631 u32 wakeup_reason; /* last wakeup reason */ 632 struct ice_hw_port_stats stats; 633 struct ice_hw_port_stats stats_prev; 634 struct ice_hw hw; 635 u8 stat_prev_loaded:1; /* has previous stats been loaded */ 636 u16 dcbx_cap; 637 u32 tx_timeout_count; 638 unsigned long tx_timeout_last_recovery; 639 u32 tx_timeout_recovery_level; 640 char int_name[ICE_INT_NAME_STR_LEN]; 641 char int_name_ll_ts[ICE_INT_NAME_STR_LEN]; 642 int aux_idx; 643 u32 sw_int_count; 644 /* count of tc_flower filters specific to channel (aka where filter 645 * action is "hw_tc <tc_num>") 646 */ 647 u16 num_dmac_chnl_fltrs; 648 struct hlist_head tc_flower_fltr_list; 649 650 u64 supported_rxdids; 651 652 __le64 nvm_phy_type_lo; /* NVM PHY type low */ 653 __le64 nvm_phy_type_hi; /* NVM PHY type high */ 654 struct ice_link_default_override_tlv link_dflt_override; 655 struct ice_lag *lag; /* Link Aggregation information */ 656 657 struct ice_eswitch eswitch; 658 struct ice_esw_br_port *br_port; 659 660 struct xarray dyn_ports; 661 struct xarray sf_nums; 662 663 #define ICE_INVALID_AGG_NODE_ID 0 664 #define ICE_PF_AGG_NODE_ID_START 1 665 #define ICE_MAX_PF_AGG_NODES 32 666 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES]; 667 #define ICE_VF_AGG_NODE_ID_START 65 668 #define ICE_MAX_VF_AGG_NODES 32 669 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES]; 670 struct ice_dplls dplls; 671 struct device *hwmon_dev; 672 struct ice_health health_reporters; 673 struct iidc_rdma_core_dev_info *cdev_info; 674 675 u8 num_quanta_prof_used; 676 }; 677 678 extern struct workqueue_struct *ice_lag_wq; 679 680 struct ice_netdev_priv { 681 struct ice_vsi *vsi; 682 struct ice_repr *repr; 683 /* indirect block callbacks on registered higher level devices 684 * (e.g. tunnel devices) 685 * 686 * tc_indr_block_cb_priv_list is used to look up indirect callback 687 * private data 688 */ 689 struct list_head tc_indr_block_priv_list; 690 }; 691 692 /** 693 * ice_vector_ch_enabled 694 * @qv: pointer to q_vector, can be NULL 695 * 696 * This function returns true if vector is channel enabled otherwise false 697 */ 698 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv) 699 { 700 return !!qv->ch; /* Enable it to run with TC */ 701 } 702 703 /** 704 * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt 705 * @pf: Board private structure 706 * 707 * Return true if this PF should respond to the Tx timestamp interrupt 708 * indication in the miscellaneous OICR interrupt handler. 709 */ 710 static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf) 711 { 712 return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE; 713 } 714 715 /** 716 * ice_irq_dynamic_ena - Enable default interrupt generation settings 717 * @hw: pointer to HW struct 718 * @vsi: pointer to VSI struct, can be NULL 719 * @q_vector: pointer to q_vector, can be NULL 720 */ 721 static inline void 722 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi, 723 struct ice_q_vector *q_vector) 724 { 725 u32 vector = (vsi && q_vector) ? q_vector->reg_idx : 726 ((struct ice_pf *)hw->back)->oicr_irq.index; 727 int itr = ICE_ITR_NONE; 728 u32 val; 729 730 /* clear the PBA here, as this function is meant to clean out all 731 * previous interrupts and enable the interrupt 732 */ 733 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M | 734 (itr << GLINT_DYN_CTL_ITR_INDX_S); 735 if (vsi) 736 if (test_bit(ICE_VSI_DOWN, vsi->state)) 737 return; 738 wr32(hw, GLINT_DYN_CTL(vector), val); 739 } 740 741 /** 742 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev 743 * @netdev: pointer to the netdev struct 744 */ 745 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev) 746 { 747 struct ice_netdev_priv *np = netdev_priv(netdev); 748 749 return np->vsi->back; 750 } 751 752 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi) 753 { 754 return !!READ_ONCE(vsi->xdp_prog); 755 } 756 757 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring) 758 { 759 set_bit(ICE_TX_RING_FLAGS_XDP, ring->flags); 760 } 761 762 /** 763 * ice_is_txtime_ena - check if Tx Time is enabled on the Tx ring 764 * @ring: pointer to Tx ring 765 * 766 * Return: true if the Tx ring has Tx Time enabled, false otherwise. 767 */ 768 static inline bool ice_is_txtime_ena(const struct ice_tx_ring *ring) 769 { 770 struct ice_vsi *vsi = ring->vsi; 771 struct ice_pf *pf = vsi->back; 772 773 if (vsi->type != ICE_VSI_PF) 774 return false; 775 776 return test_bit(ring->q_index, pf->txtime_txqs); 777 } 778 779 /** 780 * ice_is_txtime_cfg - check if Tx Time is configured on the Tx ring 781 * @ring: pointer to Tx ring 782 * 783 * Return: true if the Tx ring is configured for Tx ring, false otherwise. 784 */ 785 static inline bool ice_is_txtime_cfg(const struct ice_tx_ring *ring) 786 { 787 return test_bit(ICE_TX_RING_FLAGS_TXTIME, ring->flags); 788 } 789 790 /** 791 * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID 792 * @vsi: pointer to VSI 793 * @qid: index of a queue to look at XSK buff pool presence 794 * 795 * Return: A pointer to xsk_buff_pool structure if there is a buffer pool 796 * attached and configured as zero-copy, NULL otherwise. 797 */ 798 static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi, 799 u16 qid) 800 { 801 struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid); 802 803 if (!ice_is_xdp_ena_vsi(vsi)) 804 return NULL; 805 806 return (pool && pool->dev) ? pool : NULL; 807 } 808 809 /** 810 * ice_rx_xsk_pool - assign XSK buff pool to Rx ring 811 * @ring: Rx ring to use 812 * 813 * Sets XSK buff pool pointer on Rx ring. 814 */ 815 static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring) 816 { 817 struct ice_vsi *vsi = ring->vsi; 818 u16 qid = ring->q_index; 819 820 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); 821 } 822 823 /** 824 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring 825 * @vsi: pointer to VSI 826 * @qid: index of a queue to look at XSK buff pool presence 827 * 828 * Sets XSK buff pool pointer on XDP ring. 829 * 830 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided 831 * queue id. Reason for doing so is that queue vectors might have assigned more 832 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring 833 * carries a pointer to one of these XDP rings for its own purposes, such as 834 * handling XDP_TX action, therefore we can piggyback here on the 835 * rx_ring->xdp_ring assignment that was done during XDP rings initialization. 836 */ 837 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) 838 { 839 struct ice_tx_ring *ring; 840 841 ring = vsi->rx_rings[qid]->xdp_ring; 842 if (!ring) 843 return; 844 845 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid)); 846 } 847 848 /** 849 * ice_get_max_txq - return the maximum number of Tx queues for in a PF 850 * @pf: PF structure 851 * 852 * Return: maximum number of Tx queues 853 */ 854 static inline int ice_get_max_txq(struct ice_pf *pf) 855 { 856 return min(num_online_cpus(), pf->hw.func_caps.common_cap.num_txq); 857 } 858 859 /** 860 * ice_get_max_rxq - return the maximum number of Rx queues for in a PF 861 * @pf: PF structure 862 * 863 * Return: maximum number of Rx queues 864 */ 865 static inline int ice_get_max_rxq(struct ice_pf *pf) 866 { 867 return min(num_online_cpus(), pf->hw.func_caps.common_cap.num_rxq); 868 } 869 870 /** 871 * ice_get_main_vsi - Get the PF VSI 872 * @pf: PF instance 873 * 874 * returns pf->vsi[0], which by definition is the PF VSI 875 */ 876 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 877 { 878 if (pf->vsi) 879 return pf->vsi[0]; 880 881 return NULL; 882 } 883 884 /** 885 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv. 886 * @np: private netdev structure 887 */ 888 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np) 889 { 890 /* In case of port representor return source port VSI. */ 891 if (np->repr) 892 return np->repr->src_vsi; 893 else 894 return np->vsi; 895 } 896 897 /** 898 * ice_get_ctrl_vsi - Get the control VSI 899 * @pf: PF instance 900 */ 901 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf) 902 { 903 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */ 904 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI) 905 return NULL; 906 907 return pf->vsi[pf->ctrl_vsi_idx]; 908 } 909 910 /** 911 * ice_find_vsi - Find the VSI from VSI ID 912 * @pf: The PF pointer to search in 913 * @vsi_num: The VSI ID to search for 914 */ 915 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num) 916 { 917 int i; 918 919 ice_for_each_vsi(pf, i) 920 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num) 921 return pf->vsi[i]; 922 return NULL; 923 } 924 925 /** 926 * ice_is_switchdev_running - check if switchdev is configured 927 * @pf: pointer to PF structure 928 * 929 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV 930 * and switchdev is configured, false otherwise. 931 */ 932 static inline bool ice_is_switchdev_running(struct ice_pf *pf) 933 { 934 return pf->eswitch.is_running; 935 } 936 937 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256 938 #define ICE_FD_STAT_PF_IDX(base_idx) \ 939 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT) 940 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx) 941 #define ICE_FD_STAT_CH 1 942 #define ICE_FD_CH_STAT_IDX(base_idx) \ 943 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH) 944 945 /** 946 * ice_is_adq_active - any active ADQs 947 * @pf: pointer to PF 948 * 949 * This function returns true if there are any ADQs configured (which is 950 * determined by looking at VSI type (which should be VSI_PF), numtc, and 951 * TC_MQPRIO flag) otherwise return false 952 */ 953 static inline bool ice_is_adq_active(struct ice_pf *pf) 954 { 955 struct ice_vsi *vsi; 956 957 vsi = ice_get_main_vsi(pf); 958 if (!vsi) 959 return false; 960 961 /* is ADQ configured */ 962 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC && 963 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags)) 964 return true; 965 966 return false; 967 } 968 969 int ice_debugfs_pf_init(struct ice_pf *pf); 970 void ice_debugfs_pf_deinit(struct ice_pf *pf); 971 void ice_debugfs_init(void); 972 void ice_debugfs_exit(void); 973 974 bool netif_is_ice(const struct net_device *dev); 975 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 976 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 977 int ice_vsi_open_ctrl(struct ice_vsi *vsi); 978 int ice_vsi_open(struct ice_vsi *vsi); 979 void ice_set_ethtool_ops(struct net_device *netdev); 980 void ice_set_ethtool_repr_ops(struct net_device *netdev); 981 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev); 982 void ice_set_ethtool_sf_ops(struct net_device *netdev); 983 u16 ice_get_avail_txq_count(struct ice_pf *pf); 984 u16 ice_get_avail_rxq_count(struct ice_pf *pf); 985 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked); 986 void ice_update_vsi_stats(struct ice_vsi *vsi); 987 void ice_update_pf_stats(struct ice_pf *pf); 988 int ice_up(struct ice_vsi *vsi); 989 int ice_down(struct ice_vsi *vsi); 990 int ice_down_up(struct ice_vsi *vsi); 991 int ice_vsi_cfg_lan(struct ice_vsi *vsi); 992 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi); 993 994 enum ice_xdp_cfg { 995 ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */ 996 ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */ 997 }; 998 999 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi); 1000 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog, 1001 enum ice_xdp_cfg cfg_type); 1002 int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type); 1003 void ice_map_xdp_rings(struct ice_vsi *vsi); 1004 int 1005 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames, 1006 u32 flags); 1007 int ice_get_rss(struct ice_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 1008 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 1009 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size); 1010 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed); 1011 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed); 1012 int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc); 1013 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size); 1014 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset); 1015 void ice_print_link_msg(struct ice_vsi *vsi, bool isup); 1016 int ice_plug_aux_dev(struct ice_pf *pf); 1017 void ice_unplug_aux_dev(struct ice_pf *pf); 1018 void ice_rdma_finalize_setup(struct ice_pf *pf); 1019 int ice_init_rdma(struct ice_pf *pf); 1020 void ice_deinit_rdma(struct ice_pf *pf); 1021 bool ice_is_wol_supported(struct ice_hw *hw); 1022 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi); 1023 int 1024 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_ntuple_fltr *input, bool add, 1025 bool is_tun); 1026 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena); 1027 int ice_add_ntuple_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 1028 int ice_del_ntuple_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd); 1029 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd); 1030 int 1031 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd, 1032 u32 *rule_locs); 1033 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx); 1034 void ice_fdir_release_flows(struct ice_hw *hw); 1035 void ice_fdir_replay_flows(struct ice_hw *hw); 1036 void ice_fdir_replay_fltrs(struct ice_pf *pf); 1037 int ice_fdir_create_dflt_rules(struct ice_pf *pf); 1038 1039 enum ice_aq_task_state { 1040 ICE_AQ_TASK_NOT_PREPARED, 1041 ICE_AQ_TASK_WAITING, 1042 ICE_AQ_TASK_COMPLETE, 1043 ICE_AQ_TASK_CANCELED, 1044 }; 1045 1046 struct ice_aq_task { 1047 struct hlist_node entry; 1048 struct ice_rq_event_info event; 1049 enum ice_aq_task_state state; 1050 u16 opcode; 1051 }; 1052 1053 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task, 1054 u16 opcode); 1055 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task, 1056 unsigned long timeout); 1057 int ice_open(struct net_device *netdev); 1058 int ice_open_internal(struct net_device *netdev); 1059 int ice_stop(struct net_device *netdev); 1060 void ice_service_task_schedule(struct ice_pf *pf); 1061 void ice_start_service_task(struct ice_pf *pf); 1062 int ice_load(struct ice_pf *pf); 1063 void ice_unload(struct ice_pf *pf); 1064 void ice_adv_lnk_speed_maps_init(void); 1065 void ice_init_dev_hw(struct ice_pf *pf); 1066 int ice_init_dev(struct ice_pf *pf); 1067 void ice_deinit_dev(struct ice_pf *pf); 1068 int ice_init_pf(struct ice_pf *pf); 1069 void ice_deinit_pf(struct ice_pf *pf); 1070 int ice_change_mtu(struct net_device *netdev, int new_mtu); 1071 void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue); 1072 int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp); 1073 void ice_set_netdev_features(struct net_device *netdev); 1074 int ice_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid); 1075 int ice_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid); 1076 void ice_get_stats64(struct net_device *netdev, 1077 struct rtnl_link_stats64 *stats); 1078 1079 /** 1080 * ice_set_rdma_cap - enable RDMA support 1081 * @pf: PF struct 1082 */ 1083 static inline void ice_set_rdma_cap(struct ice_pf *pf) 1084 { 1085 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) { 1086 set_bit(ICE_FLAG_RDMA_ENA, pf->flags); 1087 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 1088 } 1089 } 1090 1091 /** 1092 * ice_clear_rdma_cap - disable RDMA support 1093 * @pf: PF struct 1094 */ 1095 static inline void ice_clear_rdma_cap(struct ice_pf *pf) 1096 { 1097 /* defer unplug to service task to avoid RTNL lock and 1098 * clear PLUG bit so that pending plugs don't interfere 1099 */ 1100 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags); 1101 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags); 1102 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags); 1103 } 1104 1105 extern const struct xdp_metadata_ops ice_xdp_md_ops; 1106 1107 /** 1108 * ice_is_dual - Check if given config is multi-NAC 1109 * @hw: pointer to HW structure 1110 * 1111 * Return: true if the device is running in multi-NAC (Network 1112 * Acceleration Complex) configuration variant, false otherwise 1113 * (always false for non-E825 devices). 1114 */ 1115 static inline bool ice_is_dual(struct ice_hw *hw) 1116 { 1117 return hw->mac_type == ICE_MAC_GENERIC_3K_E825 && 1118 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_DUAL_M); 1119 } 1120 1121 /** 1122 * ice_is_primary - Check if given device belongs to the primary complex 1123 * @hw: pointer to HW structure 1124 * 1125 * Check if given PF/HW is running on primary complex in multi-NAC 1126 * configuration. 1127 * 1128 * Return: true if the device is dual, false otherwise (always true 1129 * for non-E825 devices). 1130 */ 1131 static inline bool ice_is_primary(struct ice_hw *hw) 1132 { 1133 return hw->mac_type != ICE_MAC_GENERIC_3K_E825 || 1134 !ice_is_dual(hw) || 1135 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M); 1136 } 1137 1138 /** 1139 * ice_pf_src_tmr_owned - Check if a primary timer is owned by PF 1140 * @pf: pointer to PF structure 1141 * 1142 * Return: true if PF owns primary timer, false otherwise. 1143 */ 1144 static inline bool ice_pf_src_tmr_owned(struct ice_pf *pf) 1145 { 1146 return pf->hw.func_caps.ts_func_info.src_tmr_owned && 1147 ice_is_primary(&pf->hw); 1148 } 1149 1150 /** 1151 * ice_get_primary_hw - Get pointer to primary ice_hw structure 1152 * @pf: pointer to PF structure 1153 * 1154 * Return: A pointer to ice_hw structure with access to timesync 1155 * register space. 1156 */ 1157 static inline struct ice_hw *ice_get_primary_hw(struct ice_pf *pf) 1158 { 1159 if (!pf->adapter->ctrl_pf) 1160 return &pf->hw; 1161 else 1162 return &pf->adapter->ctrl_pf->hw; 1163 } 1164 1165 /** 1166 * ice_get_ctrl_pf - Get pointer to Control PF of the adapter 1167 * @pf: pointer to the current PF structure 1168 * 1169 * Return: A pointer to ice_pf structure which is Control PF, 1170 * NULL if it's not initialized yet. 1171 */ 1172 static inline struct ice_pf *ice_get_ctrl_pf(struct ice_pf *pf) 1173 { 1174 return !pf->adapter ? NULL : pf->adapter->ctrl_pf; 1175 } 1176 #endif /* _ICE_H_ */ 1177