1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * STMicroelectronics st_lsm6dsx sensor driver
4 *
5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
7 * interface standard output.
8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
10 * +-125/+-245/+-500/+-1000/+-2000 dps
11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
12 * allowing dynamic batching of sensor data.
13 * LSM9DSx series is similar but includes an additional magnetometer, handled
14 * by a different driver.
15 *
16 * Supported sensors:
17 *
18 * - LSM6DS3
19 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
20 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
21 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
22 * - FIFO size: 8KB
23 *
24 * - ISM330DLC
25 * - LSM6DS3H
26 * - LSM6DS3TR-C
27 * - LSM6DSL
28 * - LSM6DSM
29 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
30 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
31 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
32 * - FIFO size: 4KB
33 *
34 * - ASM330LHH
35 * - ASM330LHHX
36 * - ASM330LHHXG1
37 * - ISM330DHCX
38 * - ISM330IS
39 * - LSM6DSO
40 * - LSM6DSO16IS
41 * - LSM6DSOP
42 * - LSM6DSOX
43 * - LSM6DSR
44 * - LSM6DST
45 * - LSM6DSTX
46 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
47 * 833
48 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
49 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
50 * - FIFO size: 3KB
51 *
52 * - LSM6DSV
53 * - LSM6DSV16X
54 * - Accelerometer/Gyroscope supported ODR [Hz]: 7.5, 15, 30, 60, 120, 240,
55 * 480, 960
56 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
57 * - Gyroscope supported full-scale [dps]: +-125/+-250/+-500/+-1000/+-2000
58 * - FIFO size: 3KB
59 *
60 * - LSM6DS0
61 * - LSM9DS1
62 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
63 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
64 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
65 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
66 * - FIFO size: 32
67 *
68 * Copyright 2016 STMicroelectronics Inc.
69 *
70 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
71 * Denis Ciocca <denis.ciocca@st.com>
72 */
73
74 #include <linux/kernel.h>
75 #include <linux/module.h>
76 #include <linux/acpi.h>
77 #include <linux/delay.h>
78 #include <linux/iio/events.h>
79 #include <linux/iio/iio.h>
80 #include <linux/iio/sysfs.h>
81 #include <linux/iio/triggered_buffer.h>
82 #include <linux/iio/trigger_consumer.h>
83 #include <linux/interrupt.h>
84 #include <linux/irq.h>
85 #include <linux/minmax.h>
86 #include <linux/pm.h>
87 #include <linux/property.h>
88 #include <linux/regmap.h>
89 #include <linux/bitfield.h>
90
91 #include <linux/platform_data/st_sensors_pdata.h>
92
93 #include "st_lsm6dsx.h"
94
95 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
96
97 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
98 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
99 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
100 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
101 IIO_CHAN_SOFT_TIMESTAMP(3),
102 };
103
104 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
105 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
106 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
107 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
108 IIO_CHAN_SOFT_TIMESTAMP(3),
109 };
110
111 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
112 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
113 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
114 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
115 IIO_CHAN_SOFT_TIMESTAMP(3),
116 };
117
118 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
119 {
120 .reset = {
121 .addr = 0x22,
122 .mask = BIT(0),
123 },
124 .boot = {
125 .addr = 0x22,
126 .mask = BIT(7),
127 },
128 .bdu = {
129 .addr = 0x22,
130 .mask = BIT(6),
131 },
132 .id = {
133 {
134 .hw_id = ST_LSM9DS1_ID,
135 .name = ST_LSM9DS1_DEV_NAME,
136 .wai = 0x68,
137 }, {
138 .hw_id = ST_LSM6DS0_ID,
139 .name = ST_LSM6DS0_DEV_NAME,
140 .wai = 0x68,
141 },
142 },
143 .channels = {
144 [ST_LSM6DSX_ID_ACC] = {
145 .chan = st_lsm6dsx_acc_channels,
146 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
147 },
148 [ST_LSM6DSX_ID_GYRO] = {
149 .chan = st_lsm6ds0_gyro_channels,
150 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
151 },
152 },
153 .odr_table = {
154 [ST_LSM6DSX_ID_ACC] = {
155 .reg = {
156 .addr = 0x20,
157 .mask = GENMASK(7, 5),
158 },
159 .odr_avl[0] = { 10000, 0x01 },
160 .odr_avl[1] = { 50000, 0x02 },
161 .odr_avl[2] = { 119000, 0x03 },
162 .odr_avl[3] = { 238000, 0x04 },
163 .odr_avl[4] = { 476000, 0x05 },
164 .odr_avl[5] = { 952000, 0x06 },
165 .odr_len = 6,
166 },
167 [ST_LSM6DSX_ID_GYRO] = {
168 .reg = {
169 .addr = 0x10,
170 .mask = GENMASK(7, 5),
171 },
172 .odr_avl[0] = { 14900, 0x01 },
173 .odr_avl[1] = { 59500, 0x02 },
174 .odr_avl[2] = { 119000, 0x03 },
175 .odr_avl[3] = { 238000, 0x04 },
176 .odr_avl[4] = { 476000, 0x05 },
177 .odr_avl[5] = { 952000, 0x06 },
178 .odr_len = 6,
179 },
180 },
181 .fs_table = {
182 [ST_LSM6DSX_ID_ACC] = {
183 .reg = {
184 .addr = 0x20,
185 .mask = GENMASK(4, 3),
186 },
187 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
188 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
189 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
190 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
191 .fs_len = 4,
192 },
193 [ST_LSM6DSX_ID_GYRO] = {
194 .reg = {
195 .addr = 0x10,
196 .mask = GENMASK(4, 3),
197 },
198
199 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
200 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
201 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
202 .fs_len = 3,
203 },
204 },
205 .irq_config = {
206 .irq1 = {
207 .addr = 0x0c,
208 .mask = BIT(3),
209 },
210 .irq2 = {
211 .addr = 0x0d,
212 .mask = BIT(3),
213 },
214 .hla = {
215 .addr = 0x22,
216 .mask = BIT(5),
217 },
218 .od = {
219 .addr = 0x22,
220 .mask = BIT(4),
221 },
222 },
223 .fifo_ops = {
224 .max_size = 32,
225 },
226 },
227 {
228 .reset = {
229 .addr = 0x12,
230 .mask = BIT(0),
231 },
232 .boot = {
233 .addr = 0x12,
234 .mask = BIT(7),
235 },
236 .bdu = {
237 .addr = 0x12,
238 .mask = BIT(6),
239 },
240 .id = {
241 {
242 .hw_id = ST_LSM6DS3_ID,
243 .name = ST_LSM6DS3_DEV_NAME,
244 .wai = 0x69,
245 },
246 },
247 .channels = {
248 [ST_LSM6DSX_ID_ACC] = {
249 .chan = st_lsm6dsx_acc_channels,
250 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
251 },
252 [ST_LSM6DSX_ID_GYRO] = {
253 .chan = st_lsm6dsx_gyro_channels,
254 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
255 },
256 },
257 .odr_table = {
258 [ST_LSM6DSX_ID_ACC] = {
259 .reg = {
260 .addr = 0x10,
261 .mask = GENMASK(7, 4),
262 },
263 .odr_avl[0] = { 12500, 0x01 },
264 .odr_avl[1] = { 26000, 0x02 },
265 .odr_avl[2] = { 52000, 0x03 },
266 .odr_avl[3] = { 104000, 0x04 },
267 .odr_avl[4] = { 208000, 0x05 },
268 .odr_avl[5] = { 416000, 0x06 },
269 .odr_len = 6,
270 },
271 [ST_LSM6DSX_ID_GYRO] = {
272 .reg = {
273 .addr = 0x11,
274 .mask = GENMASK(7, 4),
275 },
276 .odr_avl[0] = { 12500, 0x01 },
277 .odr_avl[1] = { 26000, 0x02 },
278 .odr_avl[2] = { 52000, 0x03 },
279 .odr_avl[3] = { 104000, 0x04 },
280 .odr_avl[4] = { 208000, 0x05 },
281 .odr_avl[5] = { 416000, 0x06 },
282 .odr_len = 6,
283 },
284 },
285 .fs_table = {
286 [ST_LSM6DSX_ID_ACC] = {
287 .reg = {
288 .addr = 0x10,
289 .mask = GENMASK(3, 2),
290 },
291 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
292 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
293 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
294 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
295 .fs_len = 4,
296 },
297 [ST_LSM6DSX_ID_GYRO] = {
298 .reg = {
299 .addr = 0x11,
300 .mask = GENMASK(3, 2),
301 },
302 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
303 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
304 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
305 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
306 .fs_len = 4,
307 },
308 },
309 .irq_config = {
310 .irq1 = {
311 .addr = 0x0d,
312 .mask = BIT(3),
313 },
314 .irq2 = {
315 .addr = 0x0e,
316 .mask = BIT(3),
317 },
318 .lir = {
319 .addr = 0x58,
320 .mask = BIT(0),
321 },
322 .irq1_func = {
323 .addr = 0x5e,
324 .mask = BIT(5),
325 },
326 .irq2_func = {
327 .addr = 0x5f,
328 .mask = BIT(5),
329 },
330 .hla = {
331 .addr = 0x12,
332 .mask = BIT(5),
333 },
334 .od = {
335 .addr = 0x12,
336 .mask = BIT(4),
337 },
338 },
339 .decimator = {
340 [ST_LSM6DSX_ID_ACC] = {
341 .addr = 0x08,
342 .mask = GENMASK(2, 0),
343 },
344 [ST_LSM6DSX_ID_GYRO] = {
345 .addr = 0x08,
346 .mask = GENMASK(5, 3),
347 },
348 },
349 .fifo_ops = {
350 .update_fifo = st_lsm6dsx_update_fifo,
351 .read_fifo = st_lsm6dsx_read_fifo,
352 .fifo_th = {
353 .addr = 0x06,
354 .mask = GENMASK(11, 0),
355 },
356 .fifo_diff = {
357 .addr = 0x3a,
358 .mask = GENMASK(11, 0),
359 },
360 .max_size = 1365,
361 .th_wl = 3, /* 1LSB = 2B */
362 },
363 .ts_settings = {
364 .timer_en = {
365 .addr = 0x58,
366 .mask = BIT(7),
367 },
368 .hr_timer = {
369 .addr = 0x5c,
370 .mask = BIT(4),
371 },
372 .fifo_en = {
373 .addr = 0x07,
374 .mask = BIT(7),
375 },
376 .decimator = {
377 .addr = 0x09,
378 .mask = GENMASK(5, 3),
379 },
380 },
381 .event_settings = {
382 .wakeup_reg = {
383 .addr = 0x5B,
384 .mask = GENMASK(5, 0),
385 },
386 .wakeup_src_reg = 0x1b,
387 .wakeup_src_status_mask = BIT(3),
388 .wakeup_src_z_mask = BIT(0),
389 .wakeup_src_y_mask = BIT(1),
390 .wakeup_src_x_mask = BIT(2),
391 },
392 },
393 {
394 .reset = {
395 .addr = 0x12,
396 .mask = BIT(0),
397 },
398 .boot = {
399 .addr = 0x12,
400 .mask = BIT(7),
401 },
402 .bdu = {
403 .addr = 0x12,
404 .mask = BIT(6),
405 },
406 .id = {
407 {
408 .hw_id = ST_LSM6DS3H_ID,
409 .name = ST_LSM6DS3H_DEV_NAME,
410 .wai = 0x69,
411 },
412 },
413 .channels = {
414 [ST_LSM6DSX_ID_ACC] = {
415 .chan = st_lsm6dsx_acc_channels,
416 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
417 },
418 [ST_LSM6DSX_ID_GYRO] = {
419 .chan = st_lsm6dsx_gyro_channels,
420 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
421 },
422 },
423 .odr_table = {
424 [ST_LSM6DSX_ID_ACC] = {
425 .reg = {
426 .addr = 0x10,
427 .mask = GENMASK(7, 4),
428 },
429 .odr_avl[0] = { 12500, 0x01 },
430 .odr_avl[1] = { 26000, 0x02 },
431 .odr_avl[2] = { 52000, 0x03 },
432 .odr_avl[3] = { 104000, 0x04 },
433 .odr_avl[4] = { 208000, 0x05 },
434 .odr_avl[5] = { 416000, 0x06 },
435 .odr_len = 6,
436 },
437 [ST_LSM6DSX_ID_GYRO] = {
438 .reg = {
439 .addr = 0x11,
440 .mask = GENMASK(7, 4),
441 },
442 .odr_avl[0] = { 12500, 0x01 },
443 .odr_avl[1] = { 26000, 0x02 },
444 .odr_avl[2] = { 52000, 0x03 },
445 .odr_avl[3] = { 104000, 0x04 },
446 .odr_avl[4] = { 208000, 0x05 },
447 .odr_avl[5] = { 416000, 0x06 },
448 .odr_len = 6,
449 },
450 },
451 .fs_table = {
452 [ST_LSM6DSX_ID_ACC] = {
453 .reg = {
454 .addr = 0x10,
455 .mask = GENMASK(3, 2),
456 },
457 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
458 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
459 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
460 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
461 .fs_len = 4,
462 },
463 [ST_LSM6DSX_ID_GYRO] = {
464 .reg = {
465 .addr = 0x11,
466 .mask = GENMASK(3, 2),
467 },
468 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
469 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
470 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
471 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
472 .fs_len = 4,
473 },
474 },
475 .irq_config = {
476 .irq1 = {
477 .addr = 0x0d,
478 .mask = BIT(3),
479 },
480 .irq2 = {
481 .addr = 0x0e,
482 .mask = BIT(3),
483 },
484 .lir = {
485 .addr = 0x58,
486 .mask = BIT(0),
487 },
488 .irq1_func = {
489 .addr = 0x5e,
490 .mask = BIT(5),
491 },
492 .irq2_func = {
493 .addr = 0x5f,
494 .mask = BIT(5),
495 },
496 .hla = {
497 .addr = 0x12,
498 .mask = BIT(5),
499 },
500 .od = {
501 .addr = 0x12,
502 .mask = BIT(4),
503 },
504 },
505 .decimator = {
506 [ST_LSM6DSX_ID_ACC] = {
507 .addr = 0x08,
508 .mask = GENMASK(2, 0),
509 },
510 [ST_LSM6DSX_ID_GYRO] = {
511 .addr = 0x08,
512 .mask = GENMASK(5, 3),
513 },
514 },
515 .fifo_ops = {
516 .update_fifo = st_lsm6dsx_update_fifo,
517 .read_fifo = st_lsm6dsx_read_fifo,
518 .fifo_th = {
519 .addr = 0x06,
520 .mask = GENMASK(11, 0),
521 },
522 .fifo_diff = {
523 .addr = 0x3a,
524 .mask = GENMASK(11, 0),
525 },
526 .max_size = 682,
527 .th_wl = 3, /* 1LSB = 2B */
528 },
529 .ts_settings = {
530 .timer_en = {
531 .addr = 0x58,
532 .mask = BIT(7),
533 },
534 .hr_timer = {
535 .addr = 0x5c,
536 .mask = BIT(4),
537 },
538 .fifo_en = {
539 .addr = 0x07,
540 .mask = BIT(7),
541 },
542 .decimator = {
543 .addr = 0x09,
544 .mask = GENMASK(5, 3),
545 },
546 },
547 .event_settings = {
548 .wakeup_reg = {
549 .addr = 0x5B,
550 .mask = GENMASK(5, 0),
551 },
552 .wakeup_src_reg = 0x1b,
553 .wakeup_src_status_mask = BIT(3),
554 .wakeup_src_z_mask = BIT(0),
555 .wakeup_src_y_mask = BIT(1),
556 .wakeup_src_x_mask = BIT(2),
557 },
558 },
559 {
560 .reset = {
561 .addr = 0x12,
562 .mask = BIT(0),
563 },
564 .boot = {
565 .addr = 0x12,
566 .mask = BIT(7),
567 },
568 .bdu = {
569 .addr = 0x12,
570 .mask = BIT(6),
571 },
572 .id = {
573 {
574 .hw_id = ST_LSM6DSL_ID,
575 .name = ST_LSM6DSL_DEV_NAME,
576 .wai = 0x6a,
577 }, {
578 .hw_id = ST_LSM6DSM_ID,
579 .name = ST_LSM6DSM_DEV_NAME,
580 .wai = 0x6a,
581 }, {
582 .hw_id = ST_ISM330DLC_ID,
583 .name = ST_ISM330DLC_DEV_NAME,
584 .wai = 0x6a,
585 }, {
586 .hw_id = ST_LSM6DS3TRC_ID,
587 .name = ST_LSM6DS3TRC_DEV_NAME,
588 .wai = 0x6a,
589 },
590 },
591 .channels = {
592 [ST_LSM6DSX_ID_ACC] = {
593 .chan = st_lsm6dsx_acc_channels,
594 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
595 },
596 [ST_LSM6DSX_ID_GYRO] = {
597 .chan = st_lsm6dsx_gyro_channels,
598 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
599 },
600 },
601 .odr_table = {
602 [ST_LSM6DSX_ID_ACC] = {
603 .reg = {
604 .addr = 0x10,
605 .mask = GENMASK(7, 4),
606 },
607 .odr_avl[0] = { 12500, 0x01 },
608 .odr_avl[1] = { 26000, 0x02 },
609 .odr_avl[2] = { 52000, 0x03 },
610 .odr_avl[3] = { 104000, 0x04 },
611 .odr_avl[4] = { 208000, 0x05 },
612 .odr_avl[5] = { 416000, 0x06 },
613 .odr_len = 6,
614 },
615 [ST_LSM6DSX_ID_GYRO] = {
616 .reg = {
617 .addr = 0x11,
618 .mask = GENMASK(7, 4),
619 },
620 .odr_avl[0] = { 12500, 0x01 },
621 .odr_avl[1] = { 26000, 0x02 },
622 .odr_avl[2] = { 52000, 0x03 },
623 .odr_avl[3] = { 104000, 0x04 },
624 .odr_avl[4] = { 208000, 0x05 },
625 .odr_avl[5] = { 416000, 0x06 },
626 .odr_len = 6,
627 },
628 },
629 .fs_table = {
630 [ST_LSM6DSX_ID_ACC] = {
631 .reg = {
632 .addr = 0x10,
633 .mask = GENMASK(3, 2),
634 },
635 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
636 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
637 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
638 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
639 .fs_len = 4,
640 },
641 [ST_LSM6DSX_ID_GYRO] = {
642 .reg = {
643 .addr = 0x11,
644 .mask = GENMASK(3, 2),
645 },
646 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
647 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
648 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
649 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
650 .fs_len = 4,
651 },
652 },
653 .samples_to_discard = {
654 [ST_LSM6DSX_ID_ACC] = {
655 .val[0] = { 12500, 1 },
656 .val[1] = { 26000, 1 },
657 .val[2] = { 52000, 1 },
658 .val[3] = { 104000, 2 },
659 .val[4] = { 208000, 2 },
660 .val[5] = { 416000, 2 },
661 },
662 [ST_LSM6DSX_ID_GYRO] = {
663 .val[0] = { 12500, 2 },
664 .val[1] = { 26000, 5 },
665 .val[2] = { 52000, 7 },
666 .val[3] = { 104000, 12 },
667 .val[4] = { 208000, 20 },
668 .val[5] = { 416000, 36 },
669 },
670 },
671 .irq_config = {
672 .irq1 = {
673 .addr = 0x0d,
674 .mask = BIT(3),
675 },
676 .irq2 = {
677 .addr = 0x0e,
678 .mask = BIT(3),
679 },
680 .lir = {
681 .addr = 0x58,
682 .mask = BIT(0),
683 },
684 .irq1_func = {
685 .addr = 0x5e,
686 .mask = BIT(5),
687 },
688 .irq2_func = {
689 .addr = 0x5f,
690 .mask = BIT(5),
691 },
692 .hla = {
693 .addr = 0x12,
694 .mask = BIT(5),
695 },
696 .od = {
697 .addr = 0x12,
698 .mask = BIT(4),
699 },
700 },
701 .decimator = {
702 [ST_LSM6DSX_ID_ACC] = {
703 .addr = 0x08,
704 .mask = GENMASK(2, 0),
705 },
706 [ST_LSM6DSX_ID_GYRO] = {
707 .addr = 0x08,
708 .mask = GENMASK(5, 3),
709 },
710 [ST_LSM6DSX_ID_EXT0] = {
711 .addr = 0x09,
712 .mask = GENMASK(2, 0),
713 },
714 },
715 .fifo_ops = {
716 .update_fifo = st_lsm6dsx_update_fifo,
717 .read_fifo = st_lsm6dsx_read_fifo,
718 .fifo_th = {
719 .addr = 0x06,
720 .mask = GENMASK(10, 0),
721 },
722 .fifo_diff = {
723 .addr = 0x3a,
724 .mask = GENMASK(10, 0),
725 },
726 .max_size = 682,
727 .th_wl = 3, /* 1LSB = 2B */
728 },
729 .ts_settings = {
730 .timer_en = {
731 .addr = 0x19,
732 .mask = BIT(5),
733 },
734 .hr_timer = {
735 .addr = 0x5c,
736 .mask = BIT(4),
737 },
738 .fifo_en = {
739 .addr = 0x07,
740 .mask = BIT(7),
741 },
742 .decimator = {
743 .addr = 0x09,
744 .mask = GENMASK(5, 3),
745 },
746 },
747 .shub_settings = {
748 .page_mux = {
749 .addr = 0x01,
750 .mask = BIT(7),
751 },
752 .master_en = {
753 .addr = 0x1a,
754 .mask = BIT(0),
755 },
756 .pullup_en = {
757 .addr = 0x1a,
758 .mask = BIT(3),
759 },
760 .aux_sens = {
761 .addr = 0x04,
762 .mask = GENMASK(5, 4),
763 },
764 .wr_once = {
765 .addr = 0x07,
766 .mask = BIT(5),
767 },
768 .emb_func = {
769 .addr = 0x19,
770 .mask = BIT(2),
771 },
772 .num_ext_dev = 1,
773 .shub_out = {
774 .addr = 0x2e,
775 },
776 .slv0_addr = 0x02,
777 .dw_slv0_addr = 0x0e,
778 .pause = 0x7,
779 },
780 .event_settings = {
781 .enable_reg = {
782 .addr = 0x58,
783 .mask = BIT(7),
784 },
785 .wakeup_reg = {
786 .addr = 0x5B,
787 .mask = GENMASK(5, 0),
788 },
789 .wakeup_src_reg = 0x1b,
790 .wakeup_src_status_mask = BIT(3),
791 .wakeup_src_z_mask = BIT(0),
792 .wakeup_src_y_mask = BIT(1),
793 .wakeup_src_x_mask = BIT(2),
794 },
795 },
796 {
797 .reset = {
798 .addr = 0x12,
799 .mask = BIT(0),
800 },
801 .boot = {
802 .addr = 0x12,
803 .mask = BIT(7),
804 },
805 .bdu = {
806 .addr = 0x12,
807 .mask = BIT(6),
808 },
809 .id = {
810 {
811 .hw_id = ST_LSM6DSR_ID,
812 .name = ST_LSM6DSR_DEV_NAME,
813 .wai = 0x6b,
814 }, {
815 .hw_id = ST_ISM330DHCX_ID,
816 .name = ST_ISM330DHCX_DEV_NAME,
817 .wai = 0x6b,
818 }, {
819 .hw_id = ST_LSM6DSRX_ID,
820 .name = ST_LSM6DSRX_DEV_NAME,
821 .wai = 0x6b,
822 }, {
823 .hw_id = ST_LSM6DSO_ID,
824 .name = ST_LSM6DSO_DEV_NAME,
825 .wai = 0x6c,
826 }, {
827 .hw_id = ST_LSM6DSOX_ID,
828 .name = ST_LSM6DSOX_DEV_NAME,
829 .wai = 0x6c,
830 }, {
831 .hw_id = ST_LSM6DST_ID,
832 .name = ST_LSM6DST_DEV_NAME,
833 .wai = 0x6d,
834 }, {
835 .hw_id = ST_ASM330LHHX_ID,
836 .name = ST_ASM330LHHX_DEV_NAME,
837 .wai = 0x6b,
838 }, {
839 .hw_id = ST_ASM330LHHXG1_ID,
840 .name = ST_ASM330LHHXG1_DEV_NAME,
841 .wai = 0x6b,
842 }, {
843 .hw_id = ST_LSM6DSTX_ID,
844 .name = ST_LSM6DSTX_DEV_NAME,
845 .wai = 0x6d,
846 },
847 },
848 .channels = {
849 [ST_LSM6DSX_ID_ACC] = {
850 .chan = st_lsm6dsx_acc_channels,
851 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
852 },
853 [ST_LSM6DSX_ID_GYRO] = {
854 .chan = st_lsm6dsx_gyro_channels,
855 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
856 },
857 },
858 .drdy_mask = {
859 .addr = 0x13,
860 .mask = BIT(3),
861 },
862 .odr_table = {
863 [ST_LSM6DSX_ID_ACC] = {
864 .reg = {
865 .addr = 0x10,
866 .mask = GENMASK(7, 4),
867 },
868 .odr_avl[0] = { 12500, 0x01 },
869 .odr_avl[1] = { 26000, 0x02 },
870 .odr_avl[2] = { 52000, 0x03 },
871 .odr_avl[3] = { 104000, 0x04 },
872 .odr_avl[4] = { 208000, 0x05 },
873 .odr_avl[5] = { 416000, 0x06 },
874 .odr_avl[6] = { 833000, 0x07 },
875 .odr_len = 7,
876 },
877 [ST_LSM6DSX_ID_GYRO] = {
878 .reg = {
879 .addr = 0x11,
880 .mask = GENMASK(7, 4),
881 },
882 .odr_avl[0] = { 12500, 0x01 },
883 .odr_avl[1] = { 26000, 0x02 },
884 .odr_avl[2] = { 52000, 0x03 },
885 .odr_avl[3] = { 104000, 0x04 },
886 .odr_avl[4] = { 208000, 0x05 },
887 .odr_avl[5] = { 416000, 0x06 },
888 .odr_avl[6] = { 833000, 0x07 },
889 .odr_len = 7,
890 },
891 },
892 .fs_table = {
893 [ST_LSM6DSX_ID_ACC] = {
894 .reg = {
895 .addr = 0x10,
896 .mask = GENMASK(3, 2),
897 },
898 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
899 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
900 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
901 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
902 .fs_len = 4,
903 },
904 [ST_LSM6DSX_ID_GYRO] = {
905 .reg = {
906 .addr = 0x11,
907 .mask = GENMASK(3, 2),
908 },
909 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
910 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
911 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
912 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
913 .fs_len = 4,
914 },
915 },
916 .irq_config = {
917 .irq1 = {
918 .addr = 0x0d,
919 .mask = BIT(3),
920 },
921 .irq2 = {
922 .addr = 0x0e,
923 .mask = BIT(3),
924 },
925 .lir = {
926 .addr = 0x56,
927 .mask = BIT(0),
928 },
929 .clear_on_read = {
930 .addr = 0x56,
931 .mask = BIT(6),
932 },
933 .irq1_func = {
934 .addr = 0x5e,
935 .mask = BIT(5),
936 },
937 .irq2_func = {
938 .addr = 0x5f,
939 .mask = BIT(5),
940 },
941 .hla = {
942 .addr = 0x12,
943 .mask = BIT(5),
944 },
945 .od = {
946 .addr = 0x12,
947 .mask = BIT(4),
948 },
949 },
950 .batch = {
951 [ST_LSM6DSX_ID_ACC] = {
952 .addr = 0x09,
953 .mask = GENMASK(3, 0),
954 },
955 [ST_LSM6DSX_ID_GYRO] = {
956 .addr = 0x09,
957 .mask = GENMASK(7, 4),
958 },
959 },
960 .fifo_ops = {
961 .update_fifo = st_lsm6dsx_update_fifo,
962 .read_fifo = st_lsm6dsx_read_tagged_fifo,
963 .fifo_th = {
964 .addr = 0x07,
965 .mask = GENMASK(8, 0),
966 },
967 .fifo_diff = {
968 .addr = 0x3a,
969 .mask = GENMASK(9, 0),
970 },
971 .max_size = 512,
972 .th_wl = 1,
973 },
974 .ts_settings = {
975 .timer_en = {
976 .addr = 0x19,
977 .mask = BIT(5),
978 },
979 .decimator = {
980 .addr = 0x0a,
981 .mask = GENMASK(7, 6),
982 },
983 .freq_fine = 0x63,
984 .ts_sensitivity = 25000,
985 .ts_trim_coeff = 37500,
986 },
987 .shub_settings = {
988 .page_mux = {
989 .addr = 0x01,
990 .mask = BIT(6),
991 },
992 .master_en = {
993 .sec_page = true,
994 .addr = 0x14,
995 .mask = BIT(2),
996 },
997 .pullup_en = {
998 .sec_page = true,
999 .addr = 0x14,
1000 .mask = BIT(3),
1001 },
1002 .aux_sens = {
1003 .addr = 0x14,
1004 .mask = GENMASK(1, 0),
1005 },
1006 .wr_once = {
1007 .addr = 0x14,
1008 .mask = BIT(6),
1009 },
1010 .num_ext_dev = 3,
1011 .shub_out = {
1012 .sec_page = true,
1013 .addr = 0x02,
1014 },
1015 .slv0_addr = 0x15,
1016 .dw_slv0_addr = 0x21,
1017 .batch_en = BIT(3),
1018 },
1019 .event_settings = {
1020 .enable_reg = {
1021 .addr = 0x58,
1022 .mask = BIT(7),
1023 },
1024 .wakeup_reg = {
1025 .addr = 0x5b,
1026 .mask = GENMASK(5, 0),
1027 },
1028 .wakeup_src_reg = 0x1b,
1029 .wakeup_src_status_mask = BIT(3),
1030 .wakeup_src_z_mask = BIT(0),
1031 .wakeup_src_y_mask = BIT(1),
1032 .wakeup_src_x_mask = BIT(2),
1033 },
1034 },
1035 {
1036 .reset = {
1037 .addr = 0x12,
1038 .mask = BIT(0),
1039 },
1040 .boot = {
1041 .addr = 0x12,
1042 .mask = BIT(7),
1043 },
1044 .bdu = {
1045 .addr = 0x12,
1046 .mask = BIT(6),
1047 },
1048 .id = {
1049 {
1050 .hw_id = ST_ASM330LHH_ID,
1051 .name = ST_ASM330LHH_DEV_NAME,
1052 .wai = 0x6b,
1053 }, {
1054 .hw_id = ST_LSM6DSOP_ID,
1055 .name = ST_LSM6DSOP_DEV_NAME,
1056 .wai = 0x6c,
1057 }, {
1058 .hw_id = ST_ASM330LHB_ID,
1059 .name = ST_ASM330LHB_DEV_NAME,
1060 .wai = 0x6b,
1061 },
1062 },
1063 .channels = {
1064 [ST_LSM6DSX_ID_ACC] = {
1065 .chan = st_lsm6dsx_acc_channels,
1066 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1067 },
1068 [ST_LSM6DSX_ID_GYRO] = {
1069 .chan = st_lsm6dsx_gyro_channels,
1070 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1071 },
1072 },
1073 .drdy_mask = {
1074 .addr = 0x13,
1075 .mask = BIT(3),
1076 },
1077 .odr_table = {
1078 [ST_LSM6DSX_ID_ACC] = {
1079 .reg = {
1080 .addr = 0x10,
1081 .mask = GENMASK(7, 4),
1082 },
1083 .odr_avl[0] = { 12500, 0x01 },
1084 .odr_avl[1] = { 26000, 0x02 },
1085 .odr_avl[2] = { 52000, 0x03 },
1086 .odr_avl[3] = { 104000, 0x04 },
1087 .odr_avl[4] = { 208000, 0x05 },
1088 .odr_avl[5] = { 416000, 0x06 },
1089 .odr_avl[6] = { 833000, 0x07 },
1090 .odr_len = 7,
1091 },
1092 [ST_LSM6DSX_ID_GYRO] = {
1093 .reg = {
1094 .addr = 0x11,
1095 .mask = GENMASK(7, 4),
1096 },
1097 .odr_avl[0] = { 12500, 0x01 },
1098 .odr_avl[1] = { 26000, 0x02 },
1099 .odr_avl[2] = { 52000, 0x03 },
1100 .odr_avl[3] = { 104000, 0x04 },
1101 .odr_avl[4] = { 208000, 0x05 },
1102 .odr_avl[5] = { 416000, 0x06 },
1103 .odr_avl[6] = { 833000, 0x07 },
1104 .odr_len = 7,
1105 },
1106 },
1107 .fs_table = {
1108 [ST_LSM6DSX_ID_ACC] = {
1109 .reg = {
1110 .addr = 0x10,
1111 .mask = GENMASK(3, 2),
1112 },
1113 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1114 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1115 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1116 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1117 .fs_len = 4,
1118 },
1119 [ST_LSM6DSX_ID_GYRO] = {
1120 .reg = {
1121 .addr = 0x11,
1122 .mask = GENMASK(3, 2),
1123 },
1124 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1125 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1126 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1127 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1128 .fs_len = 4,
1129 },
1130 },
1131 .irq_config = {
1132 .irq1 = {
1133 .addr = 0x0d,
1134 .mask = BIT(3),
1135 },
1136 .irq2 = {
1137 .addr = 0x0e,
1138 .mask = BIT(3),
1139 },
1140 .lir = {
1141 .addr = 0x56,
1142 .mask = BIT(0),
1143 },
1144 .clear_on_read = {
1145 .addr = 0x56,
1146 .mask = BIT(6),
1147 },
1148 .irq1_func = {
1149 .addr = 0x5e,
1150 .mask = BIT(5),
1151 },
1152 .irq2_func = {
1153 .addr = 0x5f,
1154 .mask = BIT(5),
1155 },
1156 .hla = {
1157 .addr = 0x12,
1158 .mask = BIT(5),
1159 },
1160 .od = {
1161 .addr = 0x12,
1162 .mask = BIT(4),
1163 },
1164 },
1165 .batch = {
1166 [ST_LSM6DSX_ID_ACC] = {
1167 .addr = 0x09,
1168 .mask = GENMASK(3, 0),
1169 },
1170 [ST_LSM6DSX_ID_GYRO] = {
1171 .addr = 0x09,
1172 .mask = GENMASK(7, 4),
1173 },
1174 },
1175 .fifo_ops = {
1176 .update_fifo = st_lsm6dsx_update_fifo,
1177 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1178 .fifo_th = {
1179 .addr = 0x07,
1180 .mask = GENMASK(8, 0),
1181 },
1182 .fifo_diff = {
1183 .addr = 0x3a,
1184 .mask = GENMASK(9, 0),
1185 },
1186 .max_size = 512,
1187 .th_wl = 1,
1188 },
1189 .ts_settings = {
1190 .timer_en = {
1191 .addr = 0x19,
1192 .mask = BIT(5),
1193 },
1194 .decimator = {
1195 .addr = 0x0a,
1196 .mask = GENMASK(7, 6),
1197 },
1198 .freq_fine = 0x63,
1199 .ts_sensitivity = 25000,
1200 .ts_trim_coeff = 37500,
1201 },
1202 .event_settings = {
1203 .enable_reg = {
1204 .addr = 0x58,
1205 .mask = BIT(7),
1206 },
1207 .wakeup_reg = {
1208 .addr = 0x5B,
1209 .mask = GENMASK(5, 0),
1210 },
1211 .wakeup_src_reg = 0x1b,
1212 .wakeup_src_status_mask = BIT(3),
1213 .wakeup_src_z_mask = BIT(0),
1214 .wakeup_src_y_mask = BIT(1),
1215 .wakeup_src_x_mask = BIT(2),
1216 },
1217 },
1218 {
1219 .reset = {
1220 .addr = 0x12,
1221 .mask = BIT(0),
1222 },
1223 .boot = {
1224 .addr = 0x12,
1225 .mask = BIT(7),
1226 },
1227 .bdu = {
1228 .addr = 0x12,
1229 .mask = BIT(6),
1230 },
1231 .id = {
1232 {
1233 .hw_id = ST_LSM6DSV_ID,
1234 .name = ST_LSM6DSV_DEV_NAME,
1235 .wai = 0x70,
1236 }, {
1237 .hw_id = ST_LSM6DSV16X_ID,
1238 .name = ST_LSM6DSV16X_DEV_NAME,
1239 .wai = 0x70,
1240 },
1241 },
1242 .channels = {
1243 [ST_LSM6DSX_ID_ACC] = {
1244 .chan = st_lsm6dsx_acc_channels,
1245 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1246 },
1247 [ST_LSM6DSX_ID_GYRO] = {
1248 .chan = st_lsm6dsx_gyro_channels,
1249 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1250 },
1251 },
1252 .drdy_mask = {
1253 .addr = 0x13,
1254 .mask = BIT(3),
1255 },
1256 .odr_table = {
1257 [ST_LSM6DSX_ID_ACC] = {
1258 .reg = {
1259 .addr = 0x10,
1260 .mask = GENMASK(3, 0),
1261 },
1262 .odr_avl[0] = { 7500, 0x02 },
1263 .odr_avl[1] = { 15000, 0x03 },
1264 .odr_avl[2] = { 30000, 0x04 },
1265 .odr_avl[3] = { 60000, 0x05 },
1266 .odr_avl[4] = { 120000, 0x06 },
1267 .odr_avl[5] = { 240000, 0x07 },
1268 .odr_avl[6] = { 480000, 0x08 },
1269 .odr_avl[7] = { 960000, 0x09 },
1270 .odr_len = 8,
1271 },
1272 [ST_LSM6DSX_ID_GYRO] = {
1273 .reg = {
1274 .addr = 0x11,
1275 .mask = GENMASK(3, 0),
1276 },
1277 .odr_avl[0] = { 7500, 0x02 },
1278 .odr_avl[1] = { 15000, 0x03 },
1279 .odr_avl[2] = { 30000, 0x04 },
1280 .odr_avl[3] = { 60000, 0x05 },
1281 .odr_avl[4] = { 120000, 0x06 },
1282 .odr_avl[5] = { 240000, 0x07 },
1283 .odr_avl[6] = { 480000, 0x08 },
1284 .odr_avl[7] = { 960000, 0x09 },
1285 .odr_len = 8,
1286 },
1287 },
1288 .fs_table = {
1289 [ST_LSM6DSX_ID_ACC] = {
1290 .reg = {
1291 .addr = 0x17,
1292 .mask = GENMASK(1, 0),
1293 },
1294 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1295 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x1 },
1296 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x2 },
1297 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x3 },
1298 .fs_len = 4,
1299 },
1300 [ST_LSM6DSX_ID_GYRO] = {
1301 .reg = {
1302 .addr = 0x15,
1303 .mask = GENMASK(3, 0),
1304 },
1305 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x1 },
1306 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x2 },
1307 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x3 },
1308 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x4 },
1309 .fs_len = 4,
1310 },
1311 },
1312 .irq_config = {
1313 .irq1 = {
1314 .addr = 0x0d,
1315 .mask = BIT(3),
1316 },
1317 .irq2 = {
1318 .addr = 0x0e,
1319 .mask = BIT(3),
1320 },
1321 .lir = {
1322 .addr = 0x56,
1323 .mask = BIT(0),
1324 },
1325 .irq1_func = {
1326 .addr = 0x5e,
1327 .mask = BIT(5),
1328 },
1329 .irq2_func = {
1330 .addr = 0x5f,
1331 .mask = BIT(5),
1332 },
1333 .hla = {
1334 .addr = 0x03,
1335 .mask = BIT(4),
1336 },
1337 .od = {
1338 .addr = 0x03,
1339 .mask = BIT(3),
1340 },
1341 },
1342 .batch = {
1343 [ST_LSM6DSX_ID_ACC] = {
1344 .addr = 0x09,
1345 .mask = GENMASK(3, 0),
1346 },
1347 [ST_LSM6DSX_ID_GYRO] = {
1348 .addr = 0x09,
1349 .mask = GENMASK(7, 4),
1350 },
1351 },
1352 .fifo_ops = {
1353 .update_fifo = st_lsm6dsx_update_fifo,
1354 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1355 .fifo_th = {
1356 .addr = 0x07,
1357 .mask = GENMASK(7, 0),
1358 },
1359 .fifo_diff = {
1360 .addr = 0x1b,
1361 .mask = GENMASK(8, 0),
1362 },
1363 .max_size = 512,
1364 .th_wl = 1,
1365 },
1366 .ts_settings = {
1367 .timer_en = {
1368 .addr = 0x50,
1369 .mask = BIT(6),
1370 },
1371 .decimator = {
1372 .addr = 0x0a,
1373 .mask = GENMASK(7, 6),
1374 },
1375 .freq_fine = 0x4f,
1376 .ts_sensitivity = 21701,
1377 .ts_trim_coeff = 28212,
1378 },
1379 .shub_settings = {
1380 .page_mux = {
1381 .addr = 0x01,
1382 .mask = BIT(6),
1383 },
1384 .master_en = {
1385 .sec_page = true,
1386 .addr = 0x14,
1387 .mask = BIT(2),
1388 },
1389 .pullup_en = {
1390 .addr = 0x03,
1391 .mask = BIT(6),
1392 },
1393 .aux_sens = {
1394 .addr = 0x14,
1395 .mask = GENMASK(1, 0),
1396 },
1397 .wr_once = {
1398 .addr = 0x14,
1399 .mask = BIT(6),
1400 },
1401 .num_ext_dev = 3,
1402 .shub_out = {
1403 .sec_page = true,
1404 .addr = 0x02,
1405 },
1406 .slv0_addr = 0x15,
1407 .dw_slv0_addr = 0x21,
1408 .batch_en = BIT(3),
1409 },
1410 .event_settings = {
1411 .enable_reg = {
1412 .addr = 0x50,
1413 .mask = BIT(7),
1414 },
1415 .wakeup_reg = {
1416 .addr = 0x5b,
1417 .mask = GENMASK(5, 0),
1418 },
1419 .wakeup_src_reg = 0x45,
1420 .wakeup_src_status_mask = BIT(3),
1421 .wakeup_src_z_mask = BIT(0),
1422 .wakeup_src_y_mask = BIT(1),
1423 .wakeup_src_x_mask = BIT(2),
1424 },
1425 },
1426 {
1427 .reset = {
1428 .addr = 0x12,
1429 .mask = BIT(0),
1430 },
1431 .boot = {
1432 .addr = 0x12,
1433 .mask = BIT(7),
1434 },
1435 .bdu = {
1436 .addr = 0x12,
1437 .mask = BIT(6),
1438 },
1439 .id = {
1440 {
1441 .hw_id = ST_LSM6DSO16IS_ID,
1442 .name = ST_LSM6DSO16IS_DEV_NAME,
1443 .wai = 0x22,
1444 }, {
1445 .hw_id = ST_ISM330IS_ID,
1446 .name = ST_ISM330IS_DEV_NAME,
1447 .wai = 0x22,
1448 }
1449 },
1450 .channels = {
1451 [ST_LSM6DSX_ID_ACC] = {
1452 .chan = st_lsm6dsx_acc_channels,
1453 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1454 },
1455 [ST_LSM6DSX_ID_GYRO] = {
1456 .chan = st_lsm6dsx_gyro_channels,
1457 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1458 },
1459 },
1460 .odr_table = {
1461 [ST_LSM6DSX_ID_ACC] = {
1462 .reg = {
1463 .addr = 0x10,
1464 .mask = GENMASK(7, 4),
1465 },
1466 .odr_avl[0] = { 12500, 0x01 },
1467 .odr_avl[1] = { 26000, 0x02 },
1468 .odr_avl[2] = { 52000, 0x03 },
1469 .odr_avl[3] = { 104000, 0x04 },
1470 .odr_avl[4] = { 208000, 0x05 },
1471 .odr_avl[5] = { 416000, 0x06 },
1472 .odr_avl[6] = { 833000, 0x07 },
1473 .odr_len = 7,
1474 },
1475 [ST_LSM6DSX_ID_GYRO] = {
1476 .reg = {
1477 .addr = 0x11,
1478 .mask = GENMASK(7, 4),
1479 },
1480 .odr_avl[0] = { 12500, 0x01 },
1481 .odr_avl[1] = { 26000, 0x02 },
1482 .odr_avl[2] = { 52000, 0x03 },
1483 .odr_avl[3] = { 104000, 0x04 },
1484 .odr_avl[4] = { 208000, 0x05 },
1485 .odr_avl[5] = { 416000, 0x06 },
1486 .odr_avl[6] = { 833000, 0x07 },
1487 .odr_len = 7,
1488 },
1489 },
1490 .fs_table = {
1491 [ST_LSM6DSX_ID_ACC] = {
1492 .reg = {
1493 .addr = 0x10,
1494 .mask = GENMASK(3, 2),
1495 },
1496 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1497 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1498 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1499 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1500 .fs_len = 4,
1501 },
1502 [ST_LSM6DSX_ID_GYRO] = {
1503 .reg = {
1504 .addr = 0x11,
1505 .mask = GENMASK(3, 2),
1506 },
1507 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1508 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1509 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1510 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1511 .fs_len = 4,
1512 },
1513 },
1514 .irq_config = {
1515 .hla = {
1516 .addr = 0x12,
1517 .mask = BIT(5),
1518 },
1519 .od = {
1520 .addr = 0x12,
1521 .mask = BIT(4),
1522 },
1523 },
1524 .shub_settings = {
1525 .page_mux = {
1526 .addr = 0x01,
1527 .mask = BIT(6),
1528 },
1529 .master_en = {
1530 .sec_page = true,
1531 .addr = 0x14,
1532 .mask = BIT(2),
1533 },
1534 .pullup_en = {
1535 .sec_page = true,
1536 .addr = 0x14,
1537 .mask = BIT(3),
1538 },
1539 .aux_sens = {
1540 .addr = 0x14,
1541 .mask = GENMASK(1, 0),
1542 },
1543 .wr_once = {
1544 .addr = 0x14,
1545 .mask = BIT(6),
1546 },
1547 .num_ext_dev = 3,
1548 .shub_out = {
1549 .sec_page = true,
1550 .addr = 0x02,
1551 },
1552 .slv0_addr = 0x15,
1553 .dw_slv0_addr = 0x21,
1554 },
1555 },
1556 };
1557
st_lsm6dsx_set_page(struct st_lsm6dsx_hw * hw,bool enable)1558 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1559 {
1560 const struct st_lsm6dsx_shub_settings *hub_settings;
1561 unsigned int data;
1562 int err;
1563
1564 hub_settings = &hw->settings->shub_settings;
1565 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1566 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1567 hub_settings->page_mux.mask, data);
1568 usleep_range(100, 150);
1569
1570 return err;
1571 }
1572
st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw * hw,int id,const char ** name)1573 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1574 const char **name)
1575 {
1576 int err, i, j, data;
1577
1578 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1579 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1580 if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1581 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1582 break;
1583 }
1584 if (j < ST_LSM6DSX_MAX_ID)
1585 break;
1586 }
1587
1588 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1589 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1590 return -ENODEV;
1591 }
1592
1593 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1594 if (err < 0) {
1595 dev_err(hw->dev, "failed to read whoami register\n");
1596 return err;
1597 }
1598
1599 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1600 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1601 return -ENODEV;
1602 }
1603
1604 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1605 hw->settings = &st_lsm6dsx_sensor_settings[i];
1606
1607 return 0;
1608 }
1609
st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor * sensor,u32 gain)1610 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1611 u32 gain)
1612 {
1613 const struct st_lsm6dsx_fs_table_entry *fs_table;
1614 unsigned int data;
1615 int i, err;
1616
1617 fs_table = &sensor->hw->settings->fs_table[sensor->id];
1618 for (i = 0; i < fs_table->fs_len; i++) {
1619 if (fs_table->fs_avl[i].gain == gain)
1620 break;
1621 }
1622
1623 if (i == fs_table->fs_len)
1624 return -EINVAL;
1625
1626 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1627 fs_table->reg.mask);
1628 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1629 fs_table->reg.mask, data);
1630 if (err < 0)
1631 return err;
1632
1633 sensor->gain = gain;
1634
1635 return 0;
1636 }
1637
st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor * sensor,u32 odr,u8 * val)1638 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1639 {
1640 const struct st_lsm6dsx_odr_table_entry *odr_table;
1641 int i;
1642
1643 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1644 for (i = 0; i < odr_table->odr_len; i++) {
1645 /*
1646 * ext devices can run at different odr respect to
1647 * accel sensor
1648 */
1649 if (odr_table->odr_avl[i].milli_hz >= odr)
1650 break;
1651 }
1652
1653 if (i == odr_table->odr_len)
1654 return -EINVAL;
1655
1656 *val = odr_table->odr_avl[i].val;
1657 return odr_table->odr_avl[i].milli_hz;
1658 }
1659
1660 static int
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw * hw,u32 odr,enum st_lsm6dsx_sensor_id id)1661 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1662 enum st_lsm6dsx_sensor_id id)
1663 {
1664 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1665
1666 if (odr > 0) {
1667 if (hw->enable_mask & BIT(id))
1668 return max_t(u32, ref->odr, odr);
1669 else
1670 return odr;
1671 } else {
1672 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1673 }
1674 }
1675
1676 static int
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor * sensor,u32 req_odr)1677 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1678 {
1679 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1680 struct st_lsm6dsx_hw *hw = sensor->hw;
1681 const struct st_lsm6dsx_reg *reg;
1682 unsigned int data;
1683 u8 val = 0;
1684 int err;
1685
1686 switch (sensor->id) {
1687 case ST_LSM6DSX_ID_GYRO:
1688 break;
1689 case ST_LSM6DSX_ID_EXT0:
1690 case ST_LSM6DSX_ID_EXT1:
1691 case ST_LSM6DSX_ID_EXT2:
1692 case ST_LSM6DSX_ID_ACC: {
1693 u32 odr;
1694 int i;
1695
1696 /*
1697 * i2c embedded controller relies on the accelerometer sensor as
1698 * bus read/write trigger so we need to enable accel device
1699 * at odr = max(accel_odr, ext_odr) in order to properly
1700 * communicate with i2c slave devices
1701 */
1702 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1703 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1704 if (!hw->iio_devs[i] || i == sensor->id)
1705 continue;
1706
1707 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1708 if (odr != req_odr)
1709 /* device already configured */
1710 return 0;
1711 }
1712 break;
1713 }
1714 default: /* should never occur */
1715 return -EINVAL;
1716 }
1717
1718 if (req_odr > 0) {
1719 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1720 if (err < 0)
1721 return err;
1722 }
1723
1724 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1725 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1726 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1727 }
1728
1729 static int
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1730 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1731 bool enable)
1732 {
1733 struct st_lsm6dsx_hw *hw = sensor->hw;
1734 u32 odr = enable ? sensor->odr : 0;
1735 int err;
1736
1737 err = st_lsm6dsx_set_odr(sensor, odr);
1738 if (err < 0)
1739 return err;
1740
1741 if (enable)
1742 hw->enable_mask |= BIT(sensor->id);
1743 else
1744 hw->enable_mask &= ~BIT(sensor->id);
1745
1746 return 0;
1747 }
1748
1749 static int
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor * sensor,bool enable)1750 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1751 {
1752 struct st_lsm6dsx_hw *hw = sensor->hw;
1753
1754 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1755 return 0;
1756
1757 return hw->enable_event;
1758 }
1759
st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1760 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1761 bool enable)
1762 {
1763 if (st_lsm6dsx_check_events(sensor, enable))
1764 return 0;
1765
1766 return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1767 }
1768
st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor * sensor,u8 addr,int * val)1769 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1770 u8 addr, int *val)
1771 {
1772 struct st_lsm6dsx_hw *hw = sensor->hw;
1773 int err, delay;
1774 __le16 data;
1775
1776 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1777 if (err < 0)
1778 return err;
1779
1780 /*
1781 * we need to wait for sensor settling time before
1782 * reading data in order to avoid corrupted samples
1783 */
1784 delay = 1000000000 / sensor->odr;
1785 usleep_range(3 * delay, 4 * delay);
1786
1787 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1788 if (err < 0)
1789 return err;
1790
1791 if (!hw->enable_event) {
1792 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1793 if (err < 0)
1794 return err;
1795 }
1796
1797 *val = (s16)le16_to_cpu(data);
1798
1799 return IIO_VAL_INT;
1800 }
1801
st_lsm6dsx_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)1802 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1803 struct iio_chan_spec const *ch,
1804 int *val, int *val2, long mask)
1805 {
1806 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1807 int ret;
1808
1809 switch (mask) {
1810 case IIO_CHAN_INFO_RAW:
1811 if (!iio_device_claim_direct(iio_dev))
1812 return -EBUSY;
1813
1814 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1815 iio_device_release_direct(iio_dev);
1816 break;
1817 case IIO_CHAN_INFO_SAMP_FREQ:
1818 *val = sensor->odr / 1000;
1819 *val2 = (sensor->odr % 1000) * 1000;
1820 ret = IIO_VAL_INT_PLUS_MICRO;
1821 break;
1822 case IIO_CHAN_INFO_SCALE:
1823 *val = 0;
1824 *val2 = sensor->gain;
1825 ret = IIO_VAL_INT_PLUS_NANO;
1826 break;
1827 default:
1828 ret = -EINVAL;
1829 break;
1830 }
1831
1832 return ret;
1833 }
1834
st_lsm6dsx_write_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1835 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1836 struct iio_chan_spec const *chan,
1837 int val, int val2, long mask)
1838 {
1839 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1840 int err = 0;
1841
1842 if (!iio_device_claim_direct(iio_dev))
1843 return -EBUSY;
1844
1845 switch (mask) {
1846 case IIO_CHAN_INFO_SCALE:
1847 err = st_lsm6dsx_set_full_scale(sensor, val2);
1848 break;
1849 case IIO_CHAN_INFO_SAMP_FREQ: {
1850 u8 data;
1851
1852 val = val * 1000 + val2 / 1000;
1853 val = st_lsm6dsx_check_odr(sensor, val, &data);
1854 if (val < 0) {
1855 err = val;
1856 } else {
1857 sensor->odr = val;
1858 sensor->hwfifo_odr_mHz = val;
1859 }
1860 break;
1861 }
1862 default:
1863 err = -EINVAL;
1864 break;
1865 }
1866
1867 iio_device_release_direct(iio_dev);
1868
1869 return err;
1870 }
1871
st_lsm6dsx_event_setup(struct st_lsm6dsx_hw * hw,bool state)1872 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state)
1873 {
1874 const struct st_lsm6dsx_reg *reg;
1875 unsigned int data;
1876 int err;
1877
1878 if (!hw->settings->irq_config.irq1_func.addr)
1879 return -ENOTSUPP;
1880
1881 reg = &hw->settings->event_settings.enable_reg;
1882 if (reg->addr) {
1883 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1884 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1885 reg->mask, data);
1886 if (err < 0)
1887 return err;
1888 }
1889
1890 /* Enable wakeup interrupt */
1891 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1892 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1893 hw->irq_routing->mask, data);
1894 }
1895
st_lsm6dsx_read_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1896 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1897 const struct iio_chan_spec *chan,
1898 enum iio_event_type type,
1899 enum iio_event_direction dir,
1900 enum iio_event_info info,
1901 int *val, int *val2)
1902 {
1903 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1904 struct st_lsm6dsx_hw *hw = sensor->hw;
1905
1906 if (type != IIO_EV_TYPE_THRESH)
1907 return -EINVAL;
1908
1909 *val2 = 0;
1910 *val = hw->event_threshold;
1911
1912 return IIO_VAL_INT;
1913 }
1914
1915 static int
st_lsm6dsx_write_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1916 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1917 const struct iio_chan_spec *chan,
1918 enum iio_event_type type,
1919 enum iio_event_direction dir,
1920 enum iio_event_info info,
1921 int val, int val2)
1922 {
1923 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1924 struct st_lsm6dsx_hw *hw = sensor->hw;
1925 const struct st_lsm6dsx_reg *reg;
1926 unsigned int data;
1927 int err;
1928
1929 if (type != IIO_EV_TYPE_THRESH)
1930 return -EINVAL;
1931
1932 if (val < 0 || val > 31)
1933 return -EINVAL;
1934
1935 reg = &hw->settings->event_settings.wakeup_reg;
1936 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1937 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1938 reg->mask, data);
1939 if (err < 0)
1940 return -EINVAL;
1941
1942 hw->event_threshold = val;
1943
1944 return 0;
1945 }
1946
1947 static int
st_lsm6dsx_read_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1948 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1949 const struct iio_chan_spec *chan,
1950 enum iio_event_type type,
1951 enum iio_event_direction dir)
1952 {
1953 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1954 struct st_lsm6dsx_hw *hw = sensor->hw;
1955
1956 if (type != IIO_EV_TYPE_THRESH)
1957 return -EINVAL;
1958
1959 return !!(hw->enable_event & BIT(chan->channel2));
1960 }
1961
1962 static int
st_lsm6dsx_write_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,bool state)1963 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1964 const struct iio_chan_spec *chan,
1965 enum iio_event_type type,
1966 enum iio_event_direction dir, bool state)
1967 {
1968 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1969 struct st_lsm6dsx_hw *hw = sensor->hw;
1970 u8 enable_event;
1971 int err;
1972
1973 if (type != IIO_EV_TYPE_THRESH)
1974 return -EINVAL;
1975
1976 if (state) {
1977 enable_event = hw->enable_event | BIT(chan->channel2);
1978
1979 /* do not enable events if they are already enabled */
1980 if (hw->enable_event)
1981 goto out;
1982 } else {
1983 enable_event = hw->enable_event & ~BIT(chan->channel2);
1984
1985 /* only turn off sensor if no events is enabled */
1986 if (enable_event)
1987 goto out;
1988 }
1989
1990 /* stop here if no changes have been made */
1991 if (hw->enable_event == enable_event)
1992 return 0;
1993
1994 err = st_lsm6dsx_event_setup(hw, state);
1995 if (err < 0)
1996 return err;
1997
1998 mutex_lock(&hw->conf_lock);
1999 if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
2000 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
2001 mutex_unlock(&hw->conf_lock);
2002 if (err < 0)
2003 return err;
2004
2005 out:
2006 hw->enable_event = enable_event;
2007
2008 return 0;
2009 }
2010
st_lsm6dsx_set_watermark(struct iio_dev * iio_dev,unsigned int val)2011 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
2012 {
2013 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2014 struct st_lsm6dsx_hw *hw = sensor->hw;
2015 int err;
2016
2017 val = clamp_val(val, 1, hw->settings->fifo_ops.max_size);
2018
2019 mutex_lock(&hw->conf_lock);
2020
2021 err = st_lsm6dsx_update_watermark(sensor, val);
2022
2023 mutex_unlock(&hw->conf_lock);
2024
2025 if (err < 0)
2026 return err;
2027
2028 sensor->watermark = val;
2029
2030 return 0;
2031 }
2032
2033 static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device * dev,struct device_attribute * attr,char * buf)2034 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
2035 struct device_attribute *attr,
2036 char *buf)
2037 {
2038 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2039 const struct st_lsm6dsx_odr_table_entry *odr_table;
2040 int i, len = 0;
2041
2042 odr_table = &sensor->hw->settings->odr_table[sensor->id];
2043 for (i = 0; i < odr_table->odr_len; i++)
2044 len += sysfs_emit_at(buf, len, "%d.%03d%c",
2045 odr_table->odr_avl[i].milli_hz / 1000,
2046 odr_table->odr_avl[i].milli_hz % 1000,
2047 (i == odr_table->odr_len - 1) ? '\n' : ' ');
2048
2049 return len;
2050 }
2051
st_lsm6dsx_sysfs_scale_avail(struct device * dev,struct device_attribute * attr,char * buf)2052 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
2053 struct device_attribute *attr,
2054 char *buf)
2055 {
2056 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev));
2057 const struct st_lsm6dsx_fs_table_entry *fs_table;
2058 struct st_lsm6dsx_hw *hw = sensor->hw;
2059 int i, len = 0;
2060
2061 fs_table = &hw->settings->fs_table[sensor->id];
2062 for (i = 0; i < fs_table->fs_len; i++)
2063 len += sysfs_emit_at(buf, len, "0.%09u%c",
2064 fs_table->fs_avl[i].gain,
2065 (i == fs_table->fs_len - 1) ? '\n' : ' ');
2066
2067 return len;
2068 }
2069
st_lsm6dsx_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)2070 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
2071 struct iio_chan_spec const *chan,
2072 long mask)
2073 {
2074 switch (mask) {
2075 case IIO_CHAN_INFO_SCALE:
2076 switch (chan->type) {
2077 case IIO_ANGL_VEL:
2078 case IIO_ACCEL:
2079 return IIO_VAL_INT_PLUS_NANO;
2080 default:
2081 return IIO_VAL_INT_PLUS_MICRO;
2082 }
2083 default:
2084 return IIO_VAL_INT_PLUS_MICRO;
2085 }
2086 }
2087
2088 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
2089 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
2090 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2091 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
2092 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
2093
2094 static struct attribute *st_lsm6dsx_acc_attributes[] = {
2095 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2096 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
2097 NULL,
2098 };
2099
2100 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
2101 .attrs = st_lsm6dsx_acc_attributes,
2102 };
2103
2104 static const struct iio_info st_lsm6dsx_acc_info = {
2105 .attrs = &st_lsm6dsx_acc_attribute_group,
2106 .read_raw = st_lsm6dsx_read_raw,
2107 .write_raw = st_lsm6dsx_write_raw,
2108 .read_event_value = st_lsm6dsx_read_event,
2109 .write_event_value = st_lsm6dsx_write_event,
2110 .read_event_config = st_lsm6dsx_read_event_config,
2111 .write_event_config = st_lsm6dsx_write_event_config,
2112 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2113 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2114 };
2115
2116 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
2117 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
2118 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
2119 NULL,
2120 };
2121
2122 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
2123 .attrs = st_lsm6dsx_gyro_attributes,
2124 };
2125
2126 static const struct iio_info st_lsm6dsx_gyro_info = {
2127 .attrs = &st_lsm6dsx_gyro_attribute_group,
2128 .read_raw = st_lsm6dsx_read_raw,
2129 .write_raw = st_lsm6dsx_write_raw,
2130 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
2131 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
2132 };
2133
2134 static int
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw * hw,const struct st_lsm6dsx_reg ** drdy_reg)2135 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
2136 const struct st_lsm6dsx_reg **drdy_reg)
2137 {
2138 struct device *dev = hw->dev;
2139 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2140 int err = 0, drdy_pin;
2141
2142 if (device_property_read_u32(dev, "st,drdy-int-pin", &drdy_pin) < 0)
2143 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
2144
2145 switch (drdy_pin) {
2146 case 1:
2147 hw->irq_routing = &hw->settings->irq_config.irq1_func;
2148 *drdy_reg = &hw->settings->irq_config.irq1;
2149 break;
2150 case 2:
2151 hw->irq_routing = &hw->settings->irq_config.irq2_func;
2152 *drdy_reg = &hw->settings->irq_config.irq2;
2153 break;
2154 default:
2155 dev_err(hw->dev, "unsupported data ready pin\n");
2156 err = -EINVAL;
2157 break;
2158 }
2159
2160 return err;
2161 }
2162
st_lsm6dsx_init_shub(struct st_lsm6dsx_hw * hw)2163 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
2164 {
2165 const struct st_lsm6dsx_shub_settings *hub_settings;
2166 struct device *dev = hw->dev;
2167 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2168 unsigned int data;
2169 int err = 0;
2170
2171 hub_settings = &hw->settings->shub_settings;
2172
2173 if (device_property_read_bool(dev, "st,pullups") ||
2174 (pdata && pdata->pullups)) {
2175 if (hub_settings->pullup_en.sec_page) {
2176 err = st_lsm6dsx_set_page(hw, true);
2177 if (err < 0)
2178 return err;
2179 }
2180
2181 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
2182 err = regmap_update_bits(hw->regmap,
2183 hub_settings->pullup_en.addr,
2184 hub_settings->pullup_en.mask, data);
2185
2186 if (hub_settings->pullup_en.sec_page)
2187 st_lsm6dsx_set_page(hw, false);
2188
2189 if (err < 0)
2190 return err;
2191 }
2192
2193 if (hub_settings->aux_sens.addr) {
2194 /* configure aux sensors */
2195 err = st_lsm6dsx_set_page(hw, true);
2196 if (err < 0)
2197 return err;
2198
2199 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
2200 err = regmap_update_bits(hw->regmap,
2201 hub_settings->aux_sens.addr,
2202 hub_settings->aux_sens.mask, data);
2203
2204 st_lsm6dsx_set_page(hw, false);
2205
2206 if (err < 0)
2207 return err;
2208 }
2209
2210 if (hub_settings->emb_func.addr) {
2211 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
2212 err = regmap_update_bits(hw->regmap,
2213 hub_settings->emb_func.addr,
2214 hub_settings->emb_func.mask, data);
2215 }
2216
2217 return err;
2218 }
2219
st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw * hw)2220 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
2221 {
2222 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
2223 int err, val;
2224
2225 ts_settings = &hw->settings->ts_settings;
2226 /* enable hw timestamp generation if necessary */
2227 if (ts_settings->timer_en.addr) {
2228 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
2229 err = regmap_update_bits(hw->regmap,
2230 ts_settings->timer_en.addr,
2231 ts_settings->timer_en.mask, val);
2232 if (err < 0)
2233 return err;
2234 }
2235
2236 /* enable high resolution for hw ts timer if necessary */
2237 if (ts_settings->hr_timer.addr) {
2238 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
2239 err = regmap_update_bits(hw->regmap,
2240 ts_settings->hr_timer.addr,
2241 ts_settings->hr_timer.mask, val);
2242 if (err < 0)
2243 return err;
2244 }
2245
2246 /* enable ts queueing in FIFO if necessary */
2247 if (ts_settings->fifo_en.addr) {
2248 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
2249 err = regmap_update_bits(hw->regmap,
2250 ts_settings->fifo_en.addr,
2251 ts_settings->fifo_en.mask, val);
2252 if (err < 0)
2253 return err;
2254 }
2255
2256 /* calibrate timestamp sensitivity */
2257 hw->ts_gain = ts_settings->ts_sensitivity;
2258 if (ts_settings->freq_fine) {
2259 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
2260 if (err < 0)
2261 return err;
2262
2263 hw->ts_gain -= ((s8)val * ts_settings->ts_trim_coeff) / 1000;
2264 }
2265
2266 return 0;
2267 }
2268
st_lsm6dsx_reset_device(struct st_lsm6dsx_hw * hw)2269 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
2270 {
2271 const struct st_lsm6dsx_reg *reg;
2272 int err;
2273
2274 /*
2275 * flush hw FIFO before device reset in order to avoid
2276 * possible races on interrupt line 1. If the first interrupt
2277 * line is asserted during hw reset the device will work in
2278 * I3C-only mode (if it is supported)
2279 */
2280 err = st_lsm6dsx_flush_fifo(hw);
2281 if (err < 0 && err != -ENOTSUPP)
2282 return err;
2283
2284 /* device sw reset */
2285 reg = &hw->settings->reset;
2286 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2287 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2288 if (err < 0)
2289 return err;
2290
2291 msleep(50);
2292
2293 /* reload trimming parameter */
2294 reg = &hw->settings->boot;
2295 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2296 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2297 if (err < 0)
2298 return err;
2299
2300 msleep(50);
2301
2302 return 0;
2303 }
2304
st_lsm6dsx_init_device(struct st_lsm6dsx_hw * hw)2305 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
2306 {
2307 const struct st_lsm6dsx_reg *reg;
2308 int err;
2309
2310 err = st_lsm6dsx_reset_device(hw);
2311 if (err < 0)
2312 return err;
2313
2314 /* enable Block Data Update */
2315 reg = &hw->settings->bdu;
2316 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2317 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2318 if (err < 0)
2319 return err;
2320
2321 /* enable FIFO watermak interrupt */
2322 err = st_lsm6dsx_get_drdy_reg(hw, ®);
2323 if (err < 0)
2324 return err;
2325
2326 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2327 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2328 if (err < 0)
2329 return err;
2330
2331 /* enable Latched interrupts for device events */
2332 if (hw->settings->irq_config.lir.addr) {
2333 reg = &hw->settings->irq_config.lir;
2334 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2335 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2336 if (err < 0)
2337 return err;
2338
2339 /* enable clear on read for latched interrupts */
2340 if (hw->settings->irq_config.clear_on_read.addr) {
2341 reg = &hw->settings->irq_config.clear_on_read;
2342 err = regmap_update_bits(hw->regmap,
2343 reg->addr, reg->mask,
2344 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2345 if (err < 0)
2346 return err;
2347 }
2348 }
2349
2350 /* enable drdy-mas if available */
2351 if (hw->settings->drdy_mask.addr) {
2352 reg = &hw->settings->drdy_mask;
2353 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2354 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2355 if (err < 0)
2356 return err;
2357 }
2358
2359 err = st_lsm6dsx_init_shub(hw);
2360 if (err < 0)
2361 return err;
2362
2363 return st_lsm6dsx_init_hw_timer(hw);
2364 }
2365
st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_sensor_id id,const char * name)2366 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
2367 enum st_lsm6dsx_sensor_id id,
2368 const char *name)
2369 {
2370 struct st_lsm6dsx_sensor *sensor;
2371 struct iio_dev *iio_dev;
2372
2373 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
2374 if (!iio_dev)
2375 return NULL;
2376
2377 iio_dev->modes = INDIO_DIRECT_MODE;
2378 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
2379 iio_dev->channels = hw->settings->channels[id].chan;
2380 iio_dev->num_channels = hw->settings->channels[id].len;
2381
2382 sensor = iio_priv(iio_dev);
2383 sensor->id = id;
2384 sensor->hw = hw;
2385 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2386 sensor->hwfifo_odr_mHz = sensor->odr;
2387 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2388 sensor->watermark = 1;
2389
2390 switch (id) {
2391 case ST_LSM6DSX_ID_ACC:
2392 iio_dev->info = &st_lsm6dsx_acc_info;
2393 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2394 name);
2395 break;
2396 case ST_LSM6DSX_ID_GYRO:
2397 iio_dev->info = &st_lsm6dsx_gyro_info;
2398 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2399 name);
2400 break;
2401 default:
2402 return NULL;
2403 }
2404 iio_dev->name = sensor->name;
2405
2406 return iio_dev;
2407 }
2408
2409 static bool
st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw * hw)2410 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2411 {
2412 const struct st_lsm6dsx_event_settings *event_settings;
2413 int err, data;
2414 s64 timestamp;
2415
2416 if (!hw->enable_event)
2417 return false;
2418
2419 event_settings = &hw->settings->event_settings;
2420 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2421 &data, sizeof(data));
2422 if (err < 0)
2423 return false;
2424
2425 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2426 if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2427 (hw->enable_event & BIT(IIO_MOD_Z)))
2428 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2429 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2430 0,
2431 IIO_MOD_Z,
2432 IIO_EV_TYPE_THRESH,
2433 IIO_EV_DIR_EITHER),
2434 timestamp);
2435
2436 if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2437 (hw->enable_event & BIT(IIO_MOD_Y)))
2438 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2439 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2440 0,
2441 IIO_MOD_Y,
2442 IIO_EV_TYPE_THRESH,
2443 IIO_EV_DIR_EITHER),
2444 timestamp);
2445
2446 if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2447 (hw->enable_event & BIT(IIO_MOD_X)))
2448 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2449 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2450 0,
2451 IIO_MOD_X,
2452 IIO_EV_TYPE_THRESH,
2453 IIO_EV_DIR_EITHER),
2454 timestamp);
2455
2456 return data & event_settings->wakeup_src_status_mask;
2457 }
2458
st_lsm6dsx_handler_thread(int irq,void * private)2459 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2460 {
2461 struct st_lsm6dsx_hw *hw = private;
2462 int fifo_len = 0, len;
2463 bool event;
2464
2465 event = st_lsm6dsx_report_motion_event(hw);
2466
2467 if (!hw->settings->fifo_ops.read_fifo)
2468 return event ? IRQ_HANDLED : IRQ_NONE;
2469
2470 /*
2471 * If we are using edge IRQs, new samples can arrive while
2472 * processing current interrupt since there are no hw
2473 * guarantees the irq line stays "low" long enough to properly
2474 * detect the new interrupt. In this case the new sample will
2475 * be missed.
2476 * Polling FIFO status register allow us to read new
2477 * samples even if the interrupt arrives while processing
2478 * previous data and the timeslot where the line is "low" is
2479 * too short to be properly detected.
2480 */
2481 do {
2482 mutex_lock(&hw->fifo_lock);
2483 len = hw->settings->fifo_ops.read_fifo(hw);
2484 mutex_unlock(&hw->fifo_lock);
2485
2486 if (len > 0)
2487 fifo_len += len;
2488 } while (len > 0);
2489
2490 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2491 }
2492
st_lsm6dsx_sw_trigger_handler_thread(int irq,void * private)2493 static irqreturn_t st_lsm6dsx_sw_trigger_handler_thread(int irq,
2494 void *private)
2495 {
2496 struct iio_poll_func *pf = private;
2497 struct iio_dev *iio_dev = pf->indio_dev;
2498 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2499 struct st_lsm6dsx_hw *hw = sensor->hw;
2500
2501 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2502 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2503 sensor->id == ST_LSM6DSX_ID_EXT2)
2504 st_lsm6dsx_shub_read_output(hw,
2505 (u8 *)hw->scan[sensor->id].channels,
2506 sizeof(hw->scan[sensor->id].channels));
2507 else
2508 st_lsm6dsx_read_locked(hw, iio_dev->channels[0].address,
2509 hw->scan[sensor->id].channels,
2510 sizeof(hw->scan[sensor->id].channels));
2511
2512 iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan[sensor->id],
2513 iio_get_time_ns(iio_dev));
2514 iio_trigger_notify_done(iio_dev->trig);
2515
2516 return IRQ_HANDLED;
2517 }
2518
st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw * hw)2519 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2520 {
2521 const struct st_lsm6dsx_reg *reg;
2522 struct device *dev = hw->dev;
2523 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2524 unsigned long irq_type;
2525 bool irq_active_low;
2526 int err;
2527
2528 irq_type = irq_get_trigger_type(hw->irq);
2529 switch (irq_type) {
2530 case IRQF_TRIGGER_HIGH:
2531 case IRQF_TRIGGER_RISING:
2532 irq_active_low = false;
2533 break;
2534 case IRQF_TRIGGER_LOW:
2535 case IRQF_TRIGGER_FALLING:
2536 irq_active_low = true;
2537 break;
2538 default:
2539 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2540 return -EINVAL;
2541 }
2542
2543 reg = &hw->settings->irq_config.hla;
2544 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2545 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2546 reg->mask));
2547 if (err < 0)
2548 return err;
2549
2550 if (device_property_read_bool(dev, "drive-open-drain") ||
2551 (pdata && pdata->open_drain)) {
2552 reg = &hw->settings->irq_config.od;
2553 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2554 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2555 if (err < 0)
2556 return err;
2557
2558 irq_type |= IRQF_SHARED;
2559 }
2560
2561 err = devm_request_threaded_irq(hw->dev, hw->irq,
2562 NULL,
2563 st_lsm6dsx_handler_thread,
2564 irq_type | IRQF_ONESHOT,
2565 "lsm6dsx", hw);
2566 if (err) {
2567 dev_err(hw->dev, "failed to request trigger irq %d\n",
2568 hw->irq);
2569 return err;
2570 }
2571
2572 return 0;
2573 }
2574
st_lsm6dsx_sw_buffer_preenable(struct iio_dev * iio_dev)2575 static int st_lsm6dsx_sw_buffer_preenable(struct iio_dev *iio_dev)
2576 {
2577 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2578
2579 return st_lsm6dsx_device_set_enable(sensor, true);
2580 }
2581
st_lsm6dsx_sw_buffer_postdisable(struct iio_dev * iio_dev)2582 static int st_lsm6dsx_sw_buffer_postdisable(struct iio_dev *iio_dev)
2583 {
2584 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
2585
2586 return st_lsm6dsx_device_set_enable(sensor, false);
2587 }
2588
2589 static const struct iio_buffer_setup_ops st_lsm6dsx_sw_buffer_ops = {
2590 .preenable = st_lsm6dsx_sw_buffer_preenable,
2591 .postdisable = st_lsm6dsx_sw_buffer_postdisable,
2592 };
2593
st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw * hw)2594 static int st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw *hw)
2595 {
2596 int i;
2597
2598 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2599 int err;
2600
2601 if (!hw->iio_devs[i])
2602 continue;
2603
2604 err = devm_iio_triggered_buffer_setup(hw->dev,
2605 hw->iio_devs[i], NULL,
2606 st_lsm6dsx_sw_trigger_handler_thread,
2607 &st_lsm6dsx_sw_buffer_ops);
2608 if (err)
2609 return err;
2610 }
2611
2612 return 0;
2613 }
2614
st_lsm6dsx_init_regulators(struct device * dev)2615 static int st_lsm6dsx_init_regulators(struct device *dev)
2616 {
2617 /* vdd-vddio power regulators */
2618 static const char * const regulators[] = { "vdd", "vddio" };
2619 int err;
2620
2621 err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators),
2622 regulators);
2623 if (err)
2624 return dev_err_probe(dev, err, "failed to enable regulators\n");
2625
2626 msleep(50);
2627
2628 return 0;
2629 }
2630
st_lsm6dsx_probe(struct device * dev,int irq,int hw_id,struct regmap * regmap)2631 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2632 struct regmap *regmap)
2633 {
2634 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev);
2635 const struct st_lsm6dsx_shub_settings *hub_settings;
2636 struct st_lsm6dsx_hw *hw;
2637 const char *name = NULL;
2638 int i, err;
2639
2640 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2641 if (!hw)
2642 return -ENOMEM;
2643
2644 dev_set_drvdata(dev, hw);
2645
2646 mutex_init(&hw->fifo_lock);
2647 mutex_init(&hw->conf_lock);
2648 mutex_init(&hw->page_lock);
2649
2650 err = st_lsm6dsx_init_regulators(dev);
2651 if (err)
2652 return err;
2653
2654 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2655 if (!hw->buff)
2656 return -ENOMEM;
2657
2658 hw->dev = dev;
2659 hw->irq = irq;
2660 hw->regmap = regmap;
2661
2662 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2663 if (err < 0)
2664 return err;
2665
2666 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2667 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2668 if (!hw->iio_devs[i])
2669 return -ENOMEM;
2670 }
2671
2672 err = st_lsm6dsx_init_device(hw);
2673 if (err < 0)
2674 return err;
2675
2676 hub_settings = &hw->settings->shub_settings;
2677 if (hub_settings->master_en.addr &&
2678 !device_property_read_bool(dev, "st,disable-sensor-hub")) {
2679 err = st_lsm6dsx_shub_probe(hw, name);
2680 if (err < 0)
2681 return err;
2682 }
2683
2684 if (hw->irq > 0) {
2685 err = st_lsm6dsx_irq_setup(hw);
2686 if (err < 0)
2687 return err;
2688
2689 err = st_lsm6dsx_fifo_setup(hw);
2690 if (err < 0)
2691 return err;
2692 }
2693
2694 if (!hw->irq || !hw->settings->fifo_ops.read_fifo) {
2695 /*
2696 * Rely on sw triggers (e.g. hr-timers) if irq pin is not
2697 * connected of if the device does not support HW FIFO
2698 */
2699 err = st_lsm6dsx_sw_buffers_setup(hw);
2700 if (err)
2701 return err;
2702 }
2703
2704 if (!iio_read_acpi_mount_matrix(hw->dev, &hw->orientation, "ROTM")) {
2705 err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2706 if (err)
2707 return err;
2708 }
2709
2710 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2711 if (!hw->iio_devs[i])
2712 continue;
2713
2714 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2715 if (err)
2716 return err;
2717 }
2718
2719 if (device_property_read_bool(dev, "wakeup-source") ||
2720 (pdata && pdata->wakeup_source)) {
2721 err = devm_device_init_wakeup(dev);
2722 if (err)
2723 return dev_err_probe(dev, err, "Failed to init wakeup\n");
2724 }
2725
2726 return 0;
2727 }
2728 EXPORT_SYMBOL_NS(st_lsm6dsx_probe, "IIO_LSM6DSX");
2729
st_lsm6dsx_suspend(struct device * dev)2730 static int st_lsm6dsx_suspend(struct device *dev)
2731 {
2732 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2733 struct st_lsm6dsx_sensor *sensor;
2734 int i, err = 0;
2735
2736 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2737 if (!hw->iio_devs[i])
2738 continue;
2739
2740 sensor = iio_priv(hw->iio_devs[i]);
2741 if (!(hw->enable_mask & BIT(sensor->id)))
2742 continue;
2743
2744 if (device_may_wakeup(dev) &&
2745 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2746 /* Enable wake from IRQ */
2747 enable_irq_wake(hw->irq);
2748 continue;
2749 }
2750
2751 err = st_lsm6dsx_device_set_enable(sensor, false);
2752 if (err < 0)
2753 return err;
2754
2755 hw->suspend_mask |= BIT(sensor->id);
2756 }
2757
2758 if (hw->fifo_mask)
2759 err = st_lsm6dsx_flush_fifo(hw);
2760
2761 return err;
2762 }
2763
st_lsm6dsx_resume(struct device * dev)2764 static int st_lsm6dsx_resume(struct device *dev)
2765 {
2766 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2767 struct st_lsm6dsx_sensor *sensor;
2768 int i, err = 0;
2769
2770 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2771 if (!hw->iio_devs[i])
2772 continue;
2773
2774 sensor = iio_priv(hw->iio_devs[i]);
2775 if (device_may_wakeup(dev) &&
2776 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2777 disable_irq_wake(hw->irq);
2778
2779 if (!(hw->suspend_mask & BIT(sensor->id)))
2780 continue;
2781
2782 err = st_lsm6dsx_device_set_enable(sensor, true);
2783 if (err < 0)
2784 return err;
2785
2786 hw->suspend_mask &= ~BIT(sensor->id);
2787 }
2788
2789 if (hw->fifo_mask)
2790 err = st_lsm6dsx_resume_fifo(hw);
2791
2792 return err;
2793 }
2794
2795 EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend,
2796 st_lsm6dsx_resume, IIO_LSM6DSX);
2797
2798 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2799 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2800 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2801 MODULE_LICENSE("GPL v2");
2802