1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2017 Free Electrons
4 */
5
6 #include <linux/delay.h>
7 #include <linux/gpio/consumer.h>
8 #include <linux/module.h>
9 #include <linux/regulator/consumer.h>
10 #include <linux/spi/spi.h>
11
12 #include <video/mipi_display.h>
13 #include <linux/media-bus-format.h>
14
15 #include <drm/drm_device.h>
16 #include <drm/drm_modes.h>
17 #include <drm/drm_panel.h>
18
19 #define ST7789V_RAMCTRL_CMD 0xb0
20 #define ST7789V_RAMCTRL_RM_RGB BIT(4)
21 #define ST7789V_RAMCTRL_DM_RGB BIT(0)
22 #define ST7789V_RAMCTRL_MAGIC (3 << 6)
23 #define ST7789V_RAMCTRL_EPF(n) (((n) & 3) << 4)
24
25 #define ST7789V_RGBCTRL_CMD 0xb1
26 #define ST7789V_RGBCTRL_WO BIT(7)
27 #define ST7789V_RGBCTRL_RCM(n) (((n) & 3) << 5)
28 #define ST7789V_RGBCTRL_VSYNC_HIGH BIT(3)
29 #define ST7789V_RGBCTRL_HSYNC_HIGH BIT(2)
30 #define ST7789V_RGBCTRL_PCLK_FALLING BIT(1)
31 #define ST7789V_RGBCTRL_DE_LOW BIT(0)
32 #define ST7789V_RGBCTRL_VBP(n) ((n) & 0x7f)
33 #define ST7789V_RGBCTRL_HBP(n) ((n) & 0x1f)
34
35 #define ST7789V_PORCTRL_CMD 0xb2
36 #define ST7789V_PORCTRL_IDLE_BP(n) (((n) & 0xf) << 4)
37 #define ST7789V_PORCTRL_IDLE_FP(n) ((n) & 0xf)
38 #define ST7789V_PORCTRL_PARTIAL_BP(n) (((n) & 0xf) << 4)
39 #define ST7789V_PORCTRL_PARTIAL_FP(n) ((n) & 0xf)
40
41 #define ST7789V_GCTRL_CMD 0xb7
42 #define ST7789V_GCTRL_VGHS(n) (((n) & 7) << 4)
43 #define ST7789V_GCTRL_VGLS(n) ((n) & 7)
44
45 #define ST7789V_VCOMS_CMD 0xbb
46
47 #define ST7789V_LCMCTRL_CMD 0xc0
48 #define ST7789V_LCMCTRL_XBGR BIT(5)
49 #define ST7789V_LCMCTRL_XMX BIT(3)
50 #define ST7789V_LCMCTRL_XMH BIT(2)
51
52 #define ST7789V_VDVVRHEN_CMD 0xc2
53 #define ST7789V_VDVVRHEN_CMDEN BIT(0)
54
55 #define ST7789V_VRHS_CMD 0xc3
56
57 #define ST7789V_VDVS_CMD 0xc4
58
59 #define ST7789V_FRCTRL2_CMD 0xc6
60
61 #define ST7789V_PWCTRL1_CMD 0xd0
62 #define ST7789V_PWCTRL1_MAGIC 0xa4
63 #define ST7789V_PWCTRL1_AVDD(n) (((n) & 3) << 6)
64 #define ST7789V_PWCTRL1_AVCL(n) (((n) & 3) << 4)
65 #define ST7789V_PWCTRL1_VDS(n) ((n) & 3)
66
67 #define ST7789V_PVGAMCTRL_CMD 0xe0
68 #define ST7789V_PVGAMCTRL_JP0(n) (((n) & 3) << 4)
69 #define ST7789V_PVGAMCTRL_JP1(n) (((n) & 3) << 4)
70 #define ST7789V_PVGAMCTRL_VP0(n) ((n) & 0xf)
71 #define ST7789V_PVGAMCTRL_VP1(n) ((n) & 0x3f)
72 #define ST7789V_PVGAMCTRL_VP2(n) ((n) & 0x3f)
73 #define ST7789V_PVGAMCTRL_VP4(n) ((n) & 0x1f)
74 #define ST7789V_PVGAMCTRL_VP6(n) ((n) & 0x1f)
75 #define ST7789V_PVGAMCTRL_VP13(n) ((n) & 0xf)
76 #define ST7789V_PVGAMCTRL_VP20(n) ((n) & 0x7f)
77 #define ST7789V_PVGAMCTRL_VP27(n) ((n) & 7)
78 #define ST7789V_PVGAMCTRL_VP36(n) (((n) & 7) << 4)
79 #define ST7789V_PVGAMCTRL_VP43(n) ((n) & 0x7f)
80 #define ST7789V_PVGAMCTRL_VP50(n) ((n) & 0xf)
81 #define ST7789V_PVGAMCTRL_VP57(n) ((n) & 0x1f)
82 #define ST7789V_PVGAMCTRL_VP59(n) ((n) & 0x1f)
83 #define ST7789V_PVGAMCTRL_VP61(n) ((n) & 0x3f)
84 #define ST7789V_PVGAMCTRL_VP62(n) ((n) & 0x3f)
85 #define ST7789V_PVGAMCTRL_VP63(n) (((n) & 0xf) << 4)
86
87 #define ST7789V_NVGAMCTRL_CMD 0xe1
88 #define ST7789V_NVGAMCTRL_JN0(n) (((n) & 3) << 4)
89 #define ST7789V_NVGAMCTRL_JN1(n) (((n) & 3) << 4)
90 #define ST7789V_NVGAMCTRL_VN0(n) ((n) & 0xf)
91 #define ST7789V_NVGAMCTRL_VN1(n) ((n) & 0x3f)
92 #define ST7789V_NVGAMCTRL_VN2(n) ((n) & 0x3f)
93 #define ST7789V_NVGAMCTRL_VN4(n) ((n) & 0x1f)
94 #define ST7789V_NVGAMCTRL_VN6(n) ((n) & 0x1f)
95 #define ST7789V_NVGAMCTRL_VN13(n) ((n) & 0xf)
96 #define ST7789V_NVGAMCTRL_VN20(n) ((n) & 0x7f)
97 #define ST7789V_NVGAMCTRL_VN27(n) ((n) & 7)
98 #define ST7789V_NVGAMCTRL_VN36(n) (((n) & 7) << 4)
99 #define ST7789V_NVGAMCTRL_VN43(n) ((n) & 0x7f)
100 #define ST7789V_NVGAMCTRL_VN50(n) ((n) & 0xf)
101 #define ST7789V_NVGAMCTRL_VN57(n) ((n) & 0x1f)
102 #define ST7789V_NVGAMCTRL_VN59(n) ((n) & 0x1f)
103 #define ST7789V_NVGAMCTRL_VN61(n) ((n) & 0x3f)
104 #define ST7789V_NVGAMCTRL_VN62(n) ((n) & 0x3f)
105 #define ST7789V_NVGAMCTRL_VN63(n) (((n) & 0xf) << 4)
106
107 #define ST7789V_TEST(val, func) \
108 do { \
109 if ((val = (func))) \
110 return val; \
111 } while (0)
112
113 #define ST7789V_IDS { 0x85, 0x85, 0x52 }
114 #define ST7789V_IDS_SIZE 3
115
116 struct st7789_panel_info {
117 const struct drm_display_mode *mode;
118 u32 bus_format;
119 u32 bus_flags;
120 bool invert_mode;
121 bool partial_mode;
122 u16 partial_start;
123 u16 partial_end;
124 };
125
126 struct st7789v {
127 struct drm_panel panel;
128 const struct st7789_panel_info *info;
129 struct spi_device *spi;
130 struct gpio_desc *reset;
131 struct regulator *power;
132 enum drm_panel_orientation orientation;
133 };
134
135 enum st7789v_prefix {
136 ST7789V_COMMAND = 0,
137 ST7789V_DATA = 1,
138 };
139
panel_to_st7789v(struct drm_panel * panel)140 static inline struct st7789v *panel_to_st7789v(struct drm_panel *panel)
141 {
142 return container_of(panel, struct st7789v, panel);
143 }
144
st7789v_spi_write(struct st7789v * ctx,enum st7789v_prefix prefix,u8 data)145 static int st7789v_spi_write(struct st7789v *ctx, enum st7789v_prefix prefix,
146 u8 data)
147 {
148 struct spi_transfer xfer = { };
149 u16 txbuf = ((prefix & 1) << 8) | data;
150
151 xfer.tx_buf = &txbuf;
152 xfer.len = sizeof(txbuf);
153
154 return spi_sync_transfer(ctx->spi, &xfer, 1);
155 }
156
st7789v_write_command(struct st7789v * ctx,u8 cmd)157 static int st7789v_write_command(struct st7789v *ctx, u8 cmd)
158 {
159 return st7789v_spi_write(ctx, ST7789V_COMMAND, cmd);
160 }
161
st7789v_write_data(struct st7789v * ctx,u8 cmd)162 static int st7789v_write_data(struct st7789v *ctx, u8 cmd)
163 {
164 return st7789v_spi_write(ctx, ST7789V_DATA, cmd);
165 }
166
st7789v_read_data(struct st7789v * ctx,u8 cmd,u8 * buf,unsigned int len)167 static int st7789v_read_data(struct st7789v *ctx, u8 cmd, u8 *buf,
168 unsigned int len)
169 {
170 struct spi_transfer xfer[2] = { };
171 struct spi_message msg;
172 u16 txbuf = ((ST7789V_COMMAND & 1) << 8) | cmd;
173 u16 rxbuf[4] = {};
174 u8 bit9 = 0;
175 int ret, i;
176
177 switch (len) {
178 case 1:
179 case 3:
180 case 4:
181 break;
182 default:
183 return -EOPNOTSUPP;
184 }
185
186 spi_message_init(&msg);
187
188 xfer[0].tx_buf = &txbuf;
189 xfer[0].len = sizeof(txbuf);
190 spi_message_add_tail(&xfer[0], &msg);
191
192 xfer[1].rx_buf = rxbuf;
193 xfer[1].len = len * 2;
194 spi_message_add_tail(&xfer[1], &msg);
195
196 ret = spi_sync(ctx->spi, &msg);
197 if (ret)
198 return ret;
199
200 for (i = 0; i < len; i++) {
201 buf[i] = rxbuf[i] >> i | (bit9 << (9 - i));
202 if (i)
203 bit9 = rxbuf[i] & GENMASK(i - 1, 0);
204 }
205
206 return 0;
207 }
208
st7789v_check_id(struct drm_panel * panel)209 static int st7789v_check_id(struct drm_panel *panel)
210 {
211 const u8 st7789v_ids[ST7789V_IDS_SIZE] = ST7789V_IDS;
212 struct st7789v *ctx = panel_to_st7789v(panel);
213 bool invalid_ids = false;
214 int ret, i;
215 u8 ids[3];
216
217 if (ctx->spi->mode & SPI_NO_RX)
218 return 0;
219
220 ret = st7789v_read_data(ctx, MIPI_DCS_GET_DISPLAY_ID, ids, ST7789V_IDS_SIZE);
221 if (ret)
222 return ret;
223
224 for (i = 0; i < ST7789V_IDS_SIZE; i++) {
225 if (ids[i] != st7789v_ids[i]) {
226 invalid_ids = true;
227 break;
228 }
229 }
230
231 if (invalid_ids)
232 return -EIO;
233
234 return 0;
235 }
236
237 static const struct drm_display_mode default_mode = {
238 .clock = 7000,
239 .hdisplay = 240,
240 .hsync_start = 240 + 38,
241 .hsync_end = 240 + 38 + 10,
242 .htotal = 240 + 38 + 10 + 10,
243 .vdisplay = 320,
244 .vsync_start = 320 + 8,
245 .vsync_end = 320 + 8 + 4,
246 .vtotal = 320 + 8 + 4 + 4,
247 .width_mm = 61,
248 .height_mm = 103,
249 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
250 };
251
252 /*
253 * The mode data for this panel has been reverse engineered without access
254 * to the panel datasheet / manual. Using DRM_MODE_FLAG_PHSYNC like all
255 * other panels results in garbage data on the display.
256 */
257 static const struct drm_display_mode t28cp45tn89_mode = {
258 .clock = 6008,
259 .hdisplay = 240,
260 .hsync_start = 240 + 38,
261 .hsync_end = 240 + 38 + 10,
262 .htotal = 240 + 38 + 10 + 10,
263 .vdisplay = 320,
264 .vsync_start = 320 + 8,
265 .vsync_end = 320 + 8 + 4,
266 .vtotal = 320 + 8 + 4 + 4,
267 .width_mm = 43,
268 .height_mm = 57,
269 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC,
270 };
271
272 static const struct drm_display_mode et028013dma_mode = {
273 .clock = 3000,
274 .hdisplay = 240,
275 .hsync_start = 240 + 38,
276 .hsync_end = 240 + 38 + 10,
277 .htotal = 240 + 38 + 10 + 10,
278 .vdisplay = 320,
279 .vsync_start = 320 + 8,
280 .vsync_end = 320 + 8 + 4,
281 .vtotal = 320 + 8 + 4 + 4,
282 .width_mm = 43,
283 .height_mm = 58,
284 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
285 };
286
287 static const struct drm_display_mode jt240mhqs_hwt_ek_e3_mode = {
288 .clock = 6000,
289 .hdisplay = 240,
290 .hsync_start = 240 + 38,
291 .hsync_end = 240 + 38 + 10,
292 .htotal = 240 + 38 + 10 + 10,
293 .vdisplay = 280,
294 .vsync_start = 280 + 48,
295 .vsync_end = 280 + 48 + 4,
296 .vtotal = 280 + 48 + 4 + 4,
297 .width_mm = 37,
298 .height_mm = 43,
299 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
300 };
301
302 static const struct st7789_panel_info default_panel = {
303 .mode = &default_mode,
304 .invert_mode = true,
305 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
306 .bus_flags = DRM_BUS_FLAG_DE_HIGH |
307 DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
308 };
309
310 static const struct st7789_panel_info t28cp45tn89_panel = {
311 .mode = &t28cp45tn89_mode,
312 .invert_mode = false,
313 .bus_format = MEDIA_BUS_FMT_RGB565_1X16,
314 .bus_flags = DRM_BUS_FLAG_DE_HIGH |
315 DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
316 };
317
318 static const struct st7789_panel_info et028013dma_panel = {
319 .mode = &et028013dma_mode,
320 .invert_mode = true,
321 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
322 .bus_flags = DRM_BUS_FLAG_DE_HIGH |
323 DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
324 };
325
326 static const struct st7789_panel_info jt240mhqs_hwt_ek_e3_panel = {
327 .mode = &jt240mhqs_hwt_ek_e3_mode,
328 .invert_mode = true,
329 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
330 .bus_flags = DRM_BUS_FLAG_DE_HIGH |
331 DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
332 .partial_mode = true,
333 .partial_start = 38,
334 .partial_end = 318,
335 };
336
st7789v_get_modes(struct drm_panel * panel,struct drm_connector * connector)337 static int st7789v_get_modes(struct drm_panel *panel,
338 struct drm_connector *connector)
339 {
340 struct st7789v *ctx = panel_to_st7789v(panel);
341 struct drm_display_mode *mode;
342
343 mode = drm_mode_duplicate(connector->dev, ctx->info->mode);
344 if (!mode) {
345 dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
346 ctx->info->mode->hdisplay, ctx->info->mode->vdisplay,
347 drm_mode_vrefresh(ctx->info->mode));
348 return -ENOMEM;
349 }
350
351 drm_mode_set_name(mode);
352
353 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
354 drm_mode_probed_add(connector, mode);
355
356 connector->display_info.bpc = 6;
357 connector->display_info.width_mm = ctx->info->mode->width_mm;
358 connector->display_info.height_mm = ctx->info->mode->height_mm;
359 connector->display_info.bus_flags = ctx->info->bus_flags;
360 drm_display_info_set_bus_formats(&connector->display_info,
361 &ctx->info->bus_format, 1);
362
363 /*
364 * TODO: Remove once all drm drivers call
365 * drm_connector_set_orientation_from_panel()
366 */
367 drm_connector_set_panel_orientation(connector, ctx->orientation);
368
369 return 1;
370 }
371
st7789v_get_orientation(struct drm_panel * p)372 static enum drm_panel_orientation st7789v_get_orientation(struct drm_panel *p)
373 {
374 struct st7789v *ctx = panel_to_st7789v(p);
375
376 return ctx->orientation;
377 }
378
st7789v_prepare(struct drm_panel * panel)379 static int st7789v_prepare(struct drm_panel *panel)
380 {
381 struct st7789v *ctx = panel_to_st7789v(panel);
382 u8 mode, pixel_fmt, polarity;
383 int ret;
384
385 if (!ctx->info->partial_mode)
386 mode = ST7789V_RGBCTRL_WO;
387 else
388 mode = 0;
389
390 switch (ctx->info->bus_format) {
391 case MEDIA_BUS_FMT_RGB666_1X18:
392 pixel_fmt = MIPI_DCS_PIXEL_FMT_18BIT;
393 break;
394 case MEDIA_BUS_FMT_RGB565_1X16:
395 pixel_fmt = MIPI_DCS_PIXEL_FMT_16BIT;
396 break;
397 default:
398 dev_err(panel->dev, "unsupported bus format: %d\n",
399 ctx->info->bus_format);
400 return -EINVAL;
401 }
402
403 pixel_fmt = (pixel_fmt << 4) | pixel_fmt;
404
405 polarity = 0;
406 if (ctx->info->mode->flags & DRM_MODE_FLAG_PVSYNC)
407 polarity |= ST7789V_RGBCTRL_VSYNC_HIGH;
408 if (ctx->info->mode->flags & DRM_MODE_FLAG_PHSYNC)
409 polarity |= ST7789V_RGBCTRL_HSYNC_HIGH;
410 if (ctx->info->bus_flags & DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE)
411 polarity |= ST7789V_RGBCTRL_PCLK_FALLING;
412 if (ctx->info->bus_flags & DRM_BUS_FLAG_DE_LOW)
413 polarity |= ST7789V_RGBCTRL_DE_LOW;
414
415 ret = regulator_enable(ctx->power);
416 if (ret)
417 return ret;
418
419 gpiod_set_value(ctx->reset, 1);
420 msleep(30);
421 gpiod_set_value(ctx->reset, 0);
422 msleep(120);
423
424 /*
425 * Avoid failing if the IDs are invalid in case the Rx bus width
426 * description is missing.
427 */
428 ret = st7789v_check_id(panel);
429 if (ret)
430 dev_warn(panel->dev, "Unrecognized panel IDs");
431
432 ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_EXIT_SLEEP_MODE));
433
434 /* We need to wait 120ms after a sleep out command */
435 msleep(120);
436
437 ST7789V_TEST(ret, st7789v_write_command(ctx,
438 MIPI_DCS_SET_ADDRESS_MODE));
439 ST7789V_TEST(ret, st7789v_write_data(ctx, 0));
440
441 ST7789V_TEST(ret, st7789v_write_command(ctx,
442 MIPI_DCS_SET_PIXEL_FORMAT));
443 ST7789V_TEST(ret, st7789v_write_data(ctx, pixel_fmt));
444
445 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PORCTRL_CMD));
446 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc));
447 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xc));
448 ST7789V_TEST(ret, st7789v_write_data(ctx, 0));
449 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PORCTRL_IDLE_BP(3) |
450 ST7789V_PORCTRL_IDLE_FP(3)));
451 ST7789V_TEST(ret, st7789v_write_data(ctx,
452 ST7789V_PORCTRL_PARTIAL_BP(3) |
453 ST7789V_PORCTRL_PARTIAL_FP(3)));
454
455 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_GCTRL_CMD));
456 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_GCTRL_VGLS(5) |
457 ST7789V_GCTRL_VGHS(3)));
458
459 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VCOMS_CMD));
460 ST7789V_TEST(ret, st7789v_write_data(ctx, 0x2b));
461
462 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_LCMCTRL_CMD));
463 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_LCMCTRL_XMH |
464 ST7789V_LCMCTRL_XMX |
465 ST7789V_LCMCTRL_XBGR));
466
467 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVVRHEN_CMD));
468 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_VDVVRHEN_CMDEN));
469
470 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VRHS_CMD));
471 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf));
472
473 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_VDVS_CMD));
474 ST7789V_TEST(ret, st7789v_write_data(ctx, 0x20));
475
476 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_FRCTRL2_CMD));
477 ST7789V_TEST(ret, st7789v_write_data(ctx, 0xf));
478
479 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PWCTRL1_CMD));
480 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_MAGIC));
481 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PWCTRL1_AVDD(2) |
482 ST7789V_PWCTRL1_AVCL(2) |
483 ST7789V_PWCTRL1_VDS(1)));
484
485 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_PVGAMCTRL_CMD));
486 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP63(0xd)));
487 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP1(0xca)));
488 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP2(0xe)));
489 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP4(8)));
490 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP6(9)));
491 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP13(7)));
492 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP20(0x2d)));
493 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP27(0xb) |
494 ST7789V_PVGAMCTRL_VP36(3)));
495 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP43(0x3d)));
496 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_JP1(3) |
497 ST7789V_PVGAMCTRL_VP50(4)));
498 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP57(0xa)));
499 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP59(0xa)));
500 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP61(0x1b)));
501 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_PVGAMCTRL_VP62(0x28)));
502
503 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_NVGAMCTRL_CMD));
504 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN63(0xd)));
505 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN1(0xca)));
506 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN2(0xf)));
507 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN4(8)));
508 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN6(8)));
509 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN13(7)));
510 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN20(0x2e)));
511 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN27(0xc) |
512 ST7789V_NVGAMCTRL_VN36(5)));
513 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN43(0x40)));
514 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_JN1(3) |
515 ST7789V_NVGAMCTRL_VN50(4)));
516 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN57(9)));
517 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN59(0xb)));
518 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN61(0x1b)));
519 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_NVGAMCTRL_VN62(0x28)));
520
521 if (ctx->info->invert_mode) {
522 ST7789V_TEST(ret, st7789v_write_command(ctx,
523 MIPI_DCS_ENTER_INVERT_MODE));
524 } else {
525 ST7789V_TEST(ret, st7789v_write_command(ctx,
526 MIPI_DCS_EXIT_INVERT_MODE));
527 }
528
529 if (ctx->info->partial_mode) {
530 u8 area_data[4] = {
531 (ctx->info->partial_start >> 8) & 0xff,
532 (ctx->info->partial_start >> 0) & 0xff,
533 ((ctx->info->partial_end - 1) >> 8) & 0xff,
534 ((ctx->info->partial_end - 1) >> 0) & 0xff,
535 };
536
537 /* Caution: if userspace ever pushes a mode different from the
538 * expected one (i.e., the one advertised by get_modes), we'll
539 * add margins.
540 */
541
542 ST7789V_TEST(ret, st7789v_write_command(
543 ctx, MIPI_DCS_ENTER_PARTIAL_MODE));
544
545 ST7789V_TEST(ret, st7789v_write_command(
546 ctx, MIPI_DCS_SET_PAGE_ADDRESS));
547 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0]));
548 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1]));
549 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2]));
550 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3]));
551
552 ST7789V_TEST(ret, st7789v_write_command(
553 ctx, MIPI_DCS_SET_PARTIAL_ROWS));
554 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[0]));
555 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[1]));
556 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[2]));
557 ST7789V_TEST(ret, st7789v_write_data(ctx, area_data[3]));
558 }
559
560 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RAMCTRL_CMD));
561 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_DM_RGB |
562 ST7789V_RAMCTRL_RM_RGB));
563 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RAMCTRL_EPF(3) |
564 ST7789V_RAMCTRL_MAGIC));
565
566 ST7789V_TEST(ret, st7789v_write_command(ctx, ST7789V_RGBCTRL_CMD));
567 ST7789V_TEST(ret, st7789v_write_data(ctx, mode |
568 ST7789V_RGBCTRL_RCM(2) |
569 polarity));
570 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_VBP(8)));
571 ST7789V_TEST(ret, st7789v_write_data(ctx, ST7789V_RGBCTRL_HBP(20)));
572
573 return 0;
574 }
575
st7789v_enable(struct drm_panel * panel)576 static int st7789v_enable(struct drm_panel *panel)
577 {
578 struct st7789v *ctx = panel_to_st7789v(panel);
579
580 return st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_ON);
581 }
582
st7789v_disable(struct drm_panel * panel)583 static int st7789v_disable(struct drm_panel *panel)
584 {
585 struct st7789v *ctx = panel_to_st7789v(panel);
586 int ret;
587
588 ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_SET_DISPLAY_OFF));
589
590 return 0;
591 }
592
st7789v_unprepare(struct drm_panel * panel)593 static int st7789v_unprepare(struct drm_panel *panel)
594 {
595 struct st7789v *ctx = panel_to_st7789v(panel);
596 int ret;
597
598 ST7789V_TEST(ret, st7789v_write_command(ctx, MIPI_DCS_ENTER_SLEEP_MODE));
599
600 regulator_disable(ctx->power);
601
602 return 0;
603 }
604
605 static const struct drm_panel_funcs st7789v_drm_funcs = {
606 .disable = st7789v_disable,
607 .enable = st7789v_enable,
608 .get_modes = st7789v_get_modes,
609 .get_orientation = st7789v_get_orientation,
610 .prepare = st7789v_prepare,
611 .unprepare = st7789v_unprepare,
612 };
613
st7789v_probe(struct spi_device * spi)614 static int st7789v_probe(struct spi_device *spi)
615 {
616 struct device *dev = &spi->dev;
617 struct st7789v *ctx;
618 int ret;
619
620 ctx = devm_drm_panel_alloc(dev, struct st7789v, panel,
621 &st7789v_drm_funcs, DRM_MODE_CONNECTOR_DPI);
622 if (IS_ERR(ctx))
623 return PTR_ERR(ctx);
624
625 spi_set_drvdata(spi, ctx);
626 ctx->spi = spi;
627
628 spi->bits_per_word = 9;
629 ret = spi_setup(spi);
630 if (ret < 0)
631 return dev_err_probe(&spi->dev, ret, "Failed to setup spi\n");
632
633 ctx->info = device_get_match_data(&spi->dev);
634
635 ctx->power = devm_regulator_get(dev, "power");
636 ret = PTR_ERR_OR_ZERO(ctx->power);
637 if (ret)
638 return dev_err_probe(dev, ret, "Failed to get regulator\n");
639
640 ctx->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
641 ret = PTR_ERR_OR_ZERO(ctx->reset);
642 if (ret)
643 return dev_err_probe(dev, ret, "Failed to get reset line\n");
644
645 ret = drm_panel_of_backlight(&ctx->panel);
646 if (ret)
647 return dev_err_probe(dev, ret, "Failed to get backlight\n");
648
649 ret = of_drm_get_panel_orientation(spi->dev.of_node, &ctx->orientation);
650 if (ret)
651 return dev_err_probe(&spi->dev, ret, "Failed to get orientation\n");
652
653 drm_panel_add(&ctx->panel);
654
655 return 0;
656 }
657
st7789v_remove(struct spi_device * spi)658 static void st7789v_remove(struct spi_device *spi)
659 {
660 struct st7789v *ctx = spi_get_drvdata(spi);
661
662 drm_panel_remove(&ctx->panel);
663 }
664
665 static const struct spi_device_id st7789v_spi_id[] = {
666 { "st7789v", (unsigned long) &default_panel },
667 { "t28cp45tn89-v17", (unsigned long) &t28cp45tn89_panel },
668 { "et028013dma", (unsigned long) &et028013dma_panel },
669 { "jt240mhqs-hwt-ek-e3", (unsigned long) &jt240mhqs_hwt_ek_e3_panel },
670 { }
671 };
672 MODULE_DEVICE_TABLE(spi, st7789v_spi_id);
673
674 static const struct of_device_id st7789v_of_match[] = {
675 { .compatible = "sitronix,st7789v", .data = &default_panel },
676 { .compatible = "inanbo,t28cp45tn89-v17", .data = &t28cp45tn89_panel },
677 { .compatible = "edt,et028013dma", .data = &et028013dma_panel },
678 { .compatible = "jasonic,jt240mhqs-hwt-ek-e3",
679 .data = &jt240mhqs_hwt_ek_e3_panel },
680 { }
681 };
682 MODULE_DEVICE_TABLE(of, st7789v_of_match);
683
684 static struct spi_driver st7789v_driver = {
685 .probe = st7789v_probe,
686 .remove = st7789v_remove,
687 .id_table = st7789v_spi_id,
688 .driver = {
689 .name = "st7789v",
690 .of_match_table = st7789v_of_match,
691 },
692 };
693 module_spi_driver(st7789v_driver);
694
695 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
696 MODULE_DESCRIPTION("Sitronix st7789v LCD Driver");
697 MODULE_LICENSE("GPL v2");
698