1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * OMAP SmartReflex Voltage Control
4 *
5 * Author: Thara Gopinath <thara@ti.com>
6 *
7 * Copyright (C) 2012 Texas Instruments, Inc.
8 * Thara Gopinath <thara@ti.com>
9 *
10 * Copyright (C) 2008 Nokia Corporation
11 * Kalle Jokiniemi
12 *
13 * Copyright (C) 2007 Texas Instruments, Inc.
14 * Lesly A M <x0080970@ti.com>
15 */
16
17 #include <linux/module.h>
18 #include <linux/interrupt.h>
19 #include <linux/clk.h>
20 #include <linux/io.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/slab.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/power/smartreflex.h>
26
27 #define DRIVER_NAME "smartreflex"
28 #define SMARTREFLEX_NAME_LEN 32
29 #define NVALUE_NAME_LEN 40
30 #define SR_DISABLE_TIMEOUT 200
31
32 /* sr_list contains all the instances of smartreflex module */
33 static LIST_HEAD(sr_list);
34
35 static struct omap_sr_class_data *sr_class;
36 static struct dentry *sr_dbg_dir;
37
sr_write_reg(struct omap_sr * sr,unsigned offset,u32 value)38 static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
39 {
40 __raw_writel(value, (sr->base + offset));
41 }
42
sr_modify_reg(struct omap_sr * sr,unsigned offset,u32 mask,u32 value)43 static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
44 u32 value)
45 {
46 u32 reg_val;
47
48 /*
49 * Smartreflex error config register is special as it contains
50 * certain status bits which if written a 1 into means a clear
51 * of those bits. So in order to make sure no accidental write of
52 * 1 happens to those status bits, do a clear of them in the read
53 * value. This mean this API doesn't rewrite values in these bits
54 * if they are currently set, but does allow the caller to write
55 * those bits.
56 */
57 if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
58 mask |= ERRCONFIG_STATUS_V1_MASK;
59 else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
60 mask |= ERRCONFIG_VPBOUNDINTST_V2;
61
62 reg_val = __raw_readl(sr->base + offset);
63 reg_val &= ~mask;
64
65 value &= mask;
66
67 reg_val |= value;
68
69 __raw_writel(reg_val, (sr->base + offset));
70 }
71
sr_read_reg(struct omap_sr * sr,unsigned offset)72 static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
73 {
74 return __raw_readl(sr->base + offset);
75 }
76
_sr_lookup(struct voltagedomain * voltdm)77 static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
78 {
79 struct omap_sr *sr_info;
80
81 if (!voltdm) {
82 pr_err("%s: Null voltage domain passed!\n", __func__);
83 return ERR_PTR(-EINVAL);
84 }
85
86 list_for_each_entry(sr_info, &sr_list, node) {
87 if (voltdm == sr_info->voltdm)
88 return sr_info;
89 }
90
91 return ERR_PTR(-ENODATA);
92 }
93
sr_interrupt(int irq,void * data)94 static irqreturn_t sr_interrupt(int irq, void *data)
95 {
96 struct omap_sr *sr_info = data;
97 u32 status = 0;
98
99 switch (sr_info->ip_type) {
100 case SR_TYPE_V1:
101 /* Read the status bits */
102 status = sr_read_reg(sr_info, ERRCONFIG_V1);
103
104 /* Clear them by writing back */
105 sr_write_reg(sr_info, ERRCONFIG_V1, status);
106 break;
107 case SR_TYPE_V2:
108 /* Read the status bits */
109 status = sr_read_reg(sr_info, IRQSTATUS);
110
111 /* Clear them by writing back */
112 sr_write_reg(sr_info, IRQSTATUS, status);
113 break;
114 default:
115 dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
116 sr_info->ip_type);
117 return IRQ_NONE;
118 }
119
120 if (sr_class->notify)
121 sr_class->notify(sr_info, status);
122
123 return IRQ_HANDLED;
124 }
125
sr_set_clk_length(struct omap_sr * sr)126 static void sr_set_clk_length(struct omap_sr *sr)
127 {
128 u32 fclk_speed;
129
130 /* Try interconnect target module fck first if it already exists */
131 if (IS_ERR(sr->fck))
132 return;
133
134 fclk_speed = clk_get_rate(sr->fck);
135
136 switch (fclk_speed) {
137 case 12000000:
138 sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
139 break;
140 case 13000000:
141 sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
142 break;
143 case 19200000:
144 sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
145 break;
146 case 26000000:
147 sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
148 break;
149 case 38400000:
150 sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
151 break;
152 default:
153 dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
154 __func__, fclk_speed);
155 break;
156 }
157 }
158
sr_start_vddautocomp(struct omap_sr * sr)159 static void sr_start_vddautocomp(struct omap_sr *sr)
160 {
161 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
162 dev_warn(&sr->pdev->dev,
163 "%s: smartreflex class driver not registered\n",
164 __func__);
165 return;
166 }
167
168 if (!sr_class->enable(sr))
169 sr->autocomp_active = true;
170 }
171
sr_stop_vddautocomp(struct omap_sr * sr)172 static void sr_stop_vddautocomp(struct omap_sr *sr)
173 {
174 if (!sr_class || !(sr_class->disable)) {
175 dev_warn(&sr->pdev->dev,
176 "%s: smartreflex class driver not registered\n",
177 __func__);
178 return;
179 }
180
181 if (sr->autocomp_active) {
182 sr_class->disable(sr, 1);
183 sr->autocomp_active = false;
184 }
185 }
186
187 /*
188 * This function handles the initializations which have to be done
189 * only when both sr device and class driver regiter has
190 * completed. This will be attempted to be called from both sr class
191 * driver register and sr device intializtion API's. Only one call
192 * will ultimately succeed.
193 *
194 * Currently this function registers interrupt handler for a particular SR
195 * if smartreflex class driver is already registered and has
196 * requested for interrupts and the SR interrupt line in present.
197 */
sr_late_init(struct omap_sr * sr_info)198 static int sr_late_init(struct omap_sr *sr_info)
199 {
200 int ret = 0;
201
202 if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
203 ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq,
204 sr_interrupt, IRQF_NO_AUTOEN,
205 sr_info->name, sr_info);
206 if (ret)
207 goto error;
208 }
209
210 return ret;
211
212 error:
213 list_del(&sr_info->node);
214 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering interrupt handler. Smartreflex will not function as desired\n",
215 __func__);
216
217 return ret;
218 }
219
sr_v1_disable(struct omap_sr * sr)220 static void sr_v1_disable(struct omap_sr *sr)
221 {
222 int timeout = 0;
223 int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
224 ERRCONFIG_MCUBOUNDINTST;
225
226 /* Enable MCUDisableAcknowledge interrupt */
227 sr_modify_reg(sr, ERRCONFIG_V1,
228 ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
229
230 /* SRCONFIG - disable SR */
231 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
232
233 /* Disable all other SR interrupts and clear the status as needed */
234 if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
235 errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
236 sr_modify_reg(sr, ERRCONFIG_V1,
237 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
238 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
239 errconf_val);
240
241 /*
242 * Wait for SR to be disabled.
243 * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
244 */
245 sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
246 ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
247 timeout);
248
249 if (timeout >= SR_DISABLE_TIMEOUT)
250 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
251 __func__);
252
253 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
254 sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
255 ERRCONFIG_MCUDISACKINTST);
256 }
257
sr_v2_disable(struct omap_sr * sr)258 static void sr_v2_disable(struct omap_sr *sr)
259 {
260 int timeout = 0;
261
262 /* Enable MCUDisableAcknowledge interrupt */
263 sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
264
265 /* SRCONFIG - disable SR */
266 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
267
268 /*
269 * Disable all other SR interrupts and clear the status
270 * write to status register ONLY on need basis - only if status
271 * is set.
272 */
273 if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
274 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
275 ERRCONFIG_VPBOUNDINTST_V2);
276 else
277 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
278 0x0);
279 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
280 IRQENABLE_MCUVALIDINT |
281 IRQENABLE_MCUBOUNDSINT));
282 sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
283 IRQSTATUS_MCVALIDINT |
284 IRQSTATUS_MCBOUNDSINT));
285
286 /*
287 * Wait for SR to be disabled.
288 * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
289 */
290 sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
291 IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
292 timeout);
293
294 if (timeout >= SR_DISABLE_TIMEOUT)
295 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
296 __func__);
297
298 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
299 sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
300 sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
301 }
302
sr_retrieve_nvalue_row(struct omap_sr * sr,u32 efuse_offs)303 static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
304 struct omap_sr *sr, u32 efuse_offs)
305 {
306 int i;
307
308 if (!sr->nvalue_table) {
309 dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
310 __func__);
311 return NULL;
312 }
313
314 for (i = 0; i < sr->nvalue_count; i++) {
315 if (sr->nvalue_table[i].efuse_offs == efuse_offs)
316 return &sr->nvalue_table[i];
317 }
318
319 return NULL;
320 }
321
322 /* Public Functions */
323
324 /**
325 * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
326 * error generator module.
327 * @sr: SR module to be configured.
328 *
329 * This API is to be called from the smartreflex class driver to
330 * configure the error generator module inside the smartreflex module.
331 * SR settings if using the ERROR module inside Smartreflex.
332 * SR CLASS 3 by default uses only the ERROR module where as
333 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
334 * module. Returns 0 on success and error value in case of failure.
335 */
sr_configure_errgen(struct omap_sr * sr)336 int sr_configure_errgen(struct omap_sr *sr)
337 {
338 u32 sr_config, sr_errconfig, errconfig_offs;
339 u32 vpboundint_en, vpboundint_st;
340 u32 senp_en = 0, senn_en = 0;
341 u8 senp_shift, senn_shift;
342
343 if (!sr) {
344 pr_warn("%s: NULL omap_sr from %pS\n",
345 __func__, (void *)_RET_IP_);
346 return -EINVAL;
347 }
348
349 if (!sr->clk_length)
350 sr_set_clk_length(sr);
351
352 senp_en = sr->senp_mod;
353 senn_en = sr->senn_mod;
354
355 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
356 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
357
358 switch (sr->ip_type) {
359 case SR_TYPE_V1:
360 sr_config |= SRCONFIG_DELAYCTRL;
361 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
362 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
363 errconfig_offs = ERRCONFIG_V1;
364 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
365 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
366 break;
367 case SR_TYPE_V2:
368 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
369 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
370 errconfig_offs = ERRCONFIG_V2;
371 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
372 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
373 break;
374 default:
375 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
376 __func__);
377 return -EINVAL;
378 }
379
380 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
381 sr_write_reg(sr, SRCONFIG, sr_config);
382 sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
383 (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
384 (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
385 sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
386 SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
387 sr_errconfig);
388
389 /* Enabling the interrupts if the ERROR module is used */
390 sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
391 vpboundint_en);
392
393 return 0;
394 }
395
396 /**
397 * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
398 * @sr: SR module to be configured.
399 *
400 * This API is to be called from the smartreflex class driver to
401 * disable the error generator module inside the smartreflex module.
402 *
403 * Returns 0 on success and error value in case of failure.
404 */
sr_disable_errgen(struct omap_sr * sr)405 int sr_disable_errgen(struct omap_sr *sr)
406 {
407 u32 errconfig_offs;
408 u32 vpboundint_en, vpboundint_st;
409
410 if (!sr) {
411 pr_warn("%s: NULL omap_sr from %pS\n",
412 __func__, (void *)_RET_IP_);
413 return -EINVAL;
414 }
415
416 switch (sr->ip_type) {
417 case SR_TYPE_V1:
418 errconfig_offs = ERRCONFIG_V1;
419 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
420 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
421 break;
422 case SR_TYPE_V2:
423 errconfig_offs = ERRCONFIG_V2;
424 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
425 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
426 break;
427 default:
428 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
429 __func__);
430 return -EINVAL;
431 }
432
433 /* Disable the Sensor and errorgen */
434 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
435
436 /*
437 * Disable the interrupts of ERROR module
438 * NOTE: modify is a read, modify,write - an implicit OCP barrier
439 * which is required is present here - sequencing is critical
440 * at this point (after errgen is disabled, vpboundint disable)
441 */
442 sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
443
444 return 0;
445 }
446
447 /**
448 * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
449 * minmaxavg module.
450 * @sr: SR module to be configured.
451 *
452 * This API is to be called from the smartreflex class driver to
453 * configure the minmaxavg module inside the smartreflex module.
454 * SR settings if using the ERROR module inside Smartreflex.
455 * SR CLASS 3 by default uses only the ERROR module where as
456 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
457 * module. Returns 0 on success and error value in case of failure.
458 */
sr_configure_minmax(struct omap_sr * sr)459 int sr_configure_minmax(struct omap_sr *sr)
460 {
461 u32 sr_config, sr_avgwt;
462 u32 senp_en = 0, senn_en = 0;
463 u8 senp_shift, senn_shift;
464
465 if (!sr) {
466 pr_warn("%s: NULL omap_sr from %pS\n",
467 __func__, (void *)_RET_IP_);
468 return -EINVAL;
469 }
470
471 if (!sr->clk_length)
472 sr_set_clk_length(sr);
473
474 senp_en = sr->senp_mod;
475 senn_en = sr->senn_mod;
476
477 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
478 SRCONFIG_SENENABLE |
479 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
480
481 switch (sr->ip_type) {
482 case SR_TYPE_V1:
483 sr_config |= SRCONFIG_DELAYCTRL;
484 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
485 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
486 break;
487 case SR_TYPE_V2:
488 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
489 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
490 break;
491 default:
492 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
493 __func__);
494 return -EINVAL;
495 }
496
497 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
498 sr_write_reg(sr, SRCONFIG, sr_config);
499 sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
500 (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
501 sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
502
503 /*
504 * Enabling the interrupts if MINMAXAVG module is used.
505 * TODO: check if all the interrupts are mandatory
506 */
507 switch (sr->ip_type) {
508 case SR_TYPE_V1:
509 sr_modify_reg(sr, ERRCONFIG_V1,
510 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
511 ERRCONFIG_MCUBOUNDINTEN),
512 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
513 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
514 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
515 break;
516 case SR_TYPE_V2:
517 sr_write_reg(sr, IRQSTATUS,
518 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
519 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
520 sr_write_reg(sr, IRQENABLE_SET,
521 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
522 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
523 break;
524 default:
525 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex module without specifying the ip\n",
526 __func__);
527 return -EINVAL;
528 }
529
530 return 0;
531 }
532
533 /**
534 * sr_enable() - Enables the smartreflex module.
535 * @sr: pointer to which the SR module to be configured belongs to.
536 * @volt: The voltage at which the Voltage domain associated with
537 * the smartreflex module is operating at.
538 * This is required only to program the correct Ntarget value.
539 *
540 * This API is to be called from the smartreflex class driver to
541 * enable a smartreflex module. Returns 0 on success. Returns error
542 * value if the voltage passed is wrong or if ntarget value is wrong.
543 */
sr_enable(struct omap_sr * sr,unsigned long volt)544 int sr_enable(struct omap_sr *sr, unsigned long volt)
545 {
546 struct omap_volt_data *volt_data;
547 struct omap_sr_nvalue_table *nvalue_row;
548 int ret;
549
550 if (!sr) {
551 pr_warn("%s: NULL omap_sr from %pS\n",
552 __func__, (void *)_RET_IP_);
553 return -EINVAL;
554 }
555
556 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
557
558 if (IS_ERR(volt_data)) {
559 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table for nominal voltage %ld\n",
560 __func__, volt);
561 return PTR_ERR(volt_data);
562 }
563
564 nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
565
566 if (!nvalue_row) {
567 dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
568 __func__, volt);
569 return -ENODATA;
570 }
571
572 /* errminlimit is opp dependent and hence linked to voltage */
573 sr->err_minlimit = nvalue_row->errminlimit;
574
575 clk_enable(sr->fck);
576
577 /* Check if SR is already enabled. If yes do nothing */
578 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
579 goto out_enabled;
580
581 /* Configure SR */
582 ret = sr_class->configure(sr);
583 if (ret)
584 goto out_enabled;
585
586 sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
587
588 /* SRCONFIG - enable SR */
589 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
590
591 out_enabled:
592 sr->enabled = 1;
593
594 return 0;
595 }
596
597 /**
598 * sr_disable() - Disables the smartreflex module.
599 * @sr: pointer to which the SR module to be configured belongs to.
600 *
601 * This API is to be called from the smartreflex class driver to
602 * disable a smartreflex module.
603 */
sr_disable(struct omap_sr * sr)604 void sr_disable(struct omap_sr *sr)
605 {
606 if (!sr) {
607 pr_warn("%s: NULL omap_sr from %pS\n",
608 __func__, (void *)_RET_IP_);
609 return;
610 }
611
612 /* Check if SR clocks are already disabled. If yes do nothing */
613 if (!sr->enabled)
614 return;
615
616 /*
617 * Disable SR if only it is indeed enabled. Else just
618 * disable the clocks.
619 */
620 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
621 switch (sr->ip_type) {
622 case SR_TYPE_V1:
623 sr_v1_disable(sr);
624 break;
625 case SR_TYPE_V2:
626 sr_v2_disable(sr);
627 break;
628 default:
629 dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
630 sr->ip_type);
631 }
632 }
633
634 clk_disable(sr->fck);
635 sr->enabled = 0;
636 }
637
638 /**
639 * sr_register_class() - API to register a smartreflex class parameters.
640 * @class_data: The structure containing various sr class specific data.
641 *
642 * This API is to be called by the smartreflex class driver to register itself
643 * with the smartreflex driver during init. Returns 0 on success else the
644 * error value.
645 */
sr_register_class(struct omap_sr_class_data * class_data)646 int sr_register_class(struct omap_sr_class_data *class_data)
647 {
648 struct omap_sr *sr_info;
649
650 if (!class_data) {
651 pr_warn("%s:, Smartreflex class data passed is NULL\n",
652 __func__);
653 return -EINVAL;
654 }
655
656 if (sr_class) {
657 pr_warn("%s: Smartreflex class driver already registered\n",
658 __func__);
659 return -EBUSY;
660 }
661
662 sr_class = class_data;
663
664 /*
665 * Call into late init to do initializations that require
666 * both sr driver and sr class driver to be initiallized.
667 */
668 list_for_each_entry(sr_info, &sr_list, node)
669 sr_late_init(sr_info);
670
671 return 0;
672 }
673
674 /**
675 * omap_sr_enable() - API to enable SR clocks and to call into the
676 * registered smartreflex class enable API.
677 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
678 *
679 * This API is to be called from the kernel in order to enable
680 * a particular smartreflex module. This API will do the initial
681 * configurations to turn on the smartreflex module and in turn call
682 * into the registered smartreflex class enable API.
683 */
omap_sr_enable(struct voltagedomain * voltdm)684 void omap_sr_enable(struct voltagedomain *voltdm)
685 {
686 struct omap_sr *sr = _sr_lookup(voltdm);
687
688 if (IS_ERR(sr)) {
689 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
690 return;
691 }
692
693 if (!sr->autocomp_active)
694 return;
695
696 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
697 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
698 __func__);
699 return;
700 }
701
702 sr_class->enable(sr);
703 }
704
705 /**
706 * omap_sr_disable() - API to disable SR without resetting the voltage
707 * processor voltage
708 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
709 *
710 * This API is to be called from the kernel in order to disable
711 * a particular smartreflex module. This API will in turn call
712 * into the registered smartreflex class disable API. This API will tell
713 * the smartreflex class disable not to reset the VP voltage after
714 * disabling smartreflex.
715 */
omap_sr_disable(struct voltagedomain * voltdm)716 void omap_sr_disable(struct voltagedomain *voltdm)
717 {
718 struct omap_sr *sr = _sr_lookup(voltdm);
719
720 if (IS_ERR(sr)) {
721 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
722 return;
723 }
724
725 if (!sr->autocomp_active)
726 return;
727
728 if (!sr_class || !(sr_class->disable)) {
729 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
730 __func__);
731 return;
732 }
733
734 sr_class->disable(sr, 0);
735 }
736
737 /**
738 * omap_sr_disable_reset_volt() - API to disable SR and reset the
739 * voltage processor voltage
740 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
741 *
742 * This API is to be called from the kernel in order to disable
743 * a particular smartreflex module. This API will in turn call
744 * into the registered smartreflex class disable API. This API will tell
745 * the smartreflex class disable to reset the VP voltage after
746 * disabling smartreflex.
747 */
omap_sr_disable_reset_volt(struct voltagedomain * voltdm)748 void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
749 {
750 struct omap_sr *sr = _sr_lookup(voltdm);
751
752 if (IS_ERR(sr)) {
753 pr_warn("%s: omap_sr struct for voltdm not found\n", __func__);
754 return;
755 }
756
757 if (!sr->autocomp_active)
758 return;
759
760 if (!sr_class || !(sr_class->disable)) {
761 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not registered\n",
762 __func__);
763 return;
764 }
765
766 sr_class->disable(sr, 1);
767 }
768
769 /* PM Debug FS entries to enable and disable smartreflex. */
omap_sr_autocomp_show(void * data,u64 * val)770 static int omap_sr_autocomp_show(void *data, u64 *val)
771 {
772 struct omap_sr *sr_info = data;
773
774 if (!sr_info) {
775 pr_warn("%s: omap_sr struct not found\n", __func__);
776 return -EINVAL;
777 }
778
779 *val = sr_info->autocomp_active;
780
781 return 0;
782 }
783
omap_sr_autocomp_store(void * data,u64 val)784 static int omap_sr_autocomp_store(void *data, u64 val)
785 {
786 struct omap_sr *sr_info = data;
787
788 if (!sr_info) {
789 pr_warn("%s: omap_sr struct not found\n", __func__);
790 return -EINVAL;
791 }
792
793 /* Sanity check */
794 if (val > 1) {
795 pr_warn("%s: Invalid argument %lld\n", __func__, val);
796 return -EINVAL;
797 }
798
799 /* control enable/disable only if there is a delta in value */
800 if (sr_info->autocomp_active != val) {
801 if (!val)
802 sr_stop_vddautocomp(sr_info);
803 else
804 sr_start_vddautocomp(sr_info);
805 }
806
807 return 0;
808 }
809
810 DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
811 omap_sr_autocomp_store, "%llu\n");
812
omap_sr_probe(struct platform_device * pdev)813 static int omap_sr_probe(struct platform_device *pdev)
814 {
815 struct omap_sr *sr_info;
816 struct omap_sr_data *pdata = pdev->dev.platform_data;
817 struct dentry *nvalue_dir;
818 int i, ret = 0;
819
820 sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL);
821 if (!sr_info)
822 return -ENOMEM;
823
824 sr_info->name = devm_kzalloc(&pdev->dev,
825 SMARTREFLEX_NAME_LEN, GFP_KERNEL);
826 if (!sr_info->name)
827 return -ENOMEM;
828
829 platform_set_drvdata(pdev, sr_info);
830
831 if (!pdata) {
832 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
833 return -EINVAL;
834 }
835
836 sr_info->base = devm_platform_ioremap_resource(pdev, 0);
837 if (IS_ERR(sr_info->base))
838 return PTR_ERR(sr_info->base);
839
840 ret = platform_get_irq_optional(pdev, 0);
841 if (ret < 0 && ret != -ENXIO)
842 return dev_err_probe(&pdev->dev, ret, "failed to get IRQ resource\n");
843 if (ret > 0)
844 sr_info->irq = ret;
845
846 sr_info->fck = devm_clk_get(pdev->dev.parent, "fck");
847 if (IS_ERR(sr_info->fck))
848 return PTR_ERR(sr_info->fck);
849 clk_prepare(sr_info->fck);
850
851 pm_runtime_enable(&pdev->dev);
852
853 snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
854
855 sr_info->pdev = pdev;
856 sr_info->srid = pdev->id;
857 sr_info->voltdm = pdata->voltdm;
858 sr_info->nvalue_table = pdata->nvalue_table;
859 sr_info->nvalue_count = pdata->nvalue_count;
860 sr_info->senn_mod = pdata->senn_mod;
861 sr_info->senp_mod = pdata->senp_mod;
862 sr_info->err_weight = pdata->err_weight;
863 sr_info->err_maxlimit = pdata->err_maxlimit;
864 sr_info->accum_data = pdata->accum_data;
865 sr_info->senn_avgweight = pdata->senn_avgweight;
866 sr_info->senp_avgweight = pdata->senp_avgweight;
867 sr_info->autocomp_active = false;
868 sr_info->ip_type = pdata->ip_type;
869
870 sr_set_clk_length(sr_info);
871
872 list_add(&sr_info->node, &sr_list);
873
874 /*
875 * Call into late init to do initializations that require
876 * both sr driver and sr class driver to be initiallized.
877 */
878 if (sr_class) {
879 ret = sr_late_init(sr_info);
880 if (ret) {
881 pr_warn("%s: Error in SR late init\n", __func__);
882 goto err_list_del;
883 }
884 }
885
886 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
887 if (!sr_dbg_dir)
888 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
889
890 sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
891
892 debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, sr_info->dbg_dir,
893 sr_info, &pm_sr_fops);
894 debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
895 &sr_info->err_weight);
896 debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
897 &sr_info->err_maxlimit);
898
899 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
900
901 if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
902 dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
903 __func__, sr_info->name);
904
905 ret = -ENODATA;
906 goto err_debugfs;
907 }
908
909 for (i = 0; i < sr_info->nvalue_count; i++) {
910 char name[NVALUE_NAME_LEN + 1];
911
912 snprintf(name, sizeof(name), "volt_%lu",
913 sr_info->nvalue_table[i].volt_nominal);
914 debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
915 &(sr_info->nvalue_table[i].nvalue));
916 snprintf(name, sizeof(name), "errminlimit_%lu",
917 sr_info->nvalue_table[i].volt_nominal);
918 debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
919 &(sr_info->nvalue_table[i].errminlimit));
920
921 }
922
923 return 0;
924
925 err_debugfs:
926 debugfs_remove_recursive(sr_info->dbg_dir);
927 err_list_del:
928 pm_runtime_disable(&pdev->dev);
929 list_del(&sr_info->node);
930 clk_unprepare(sr_info->fck);
931
932 return ret;
933 }
934
omap_sr_remove(struct platform_device * pdev)935 static void omap_sr_remove(struct platform_device *pdev)
936 {
937 struct device *dev = &pdev->dev;
938 struct omap_sr *sr_info = platform_get_drvdata(pdev);
939
940 if (sr_info->autocomp_active)
941 sr_stop_vddautocomp(sr_info);
942 debugfs_remove_recursive(sr_info->dbg_dir);
943
944 pm_runtime_disable(dev);
945 clk_unprepare(sr_info->fck);
946 list_del(&sr_info->node);
947 }
948
omap_sr_shutdown(struct platform_device * pdev)949 static void omap_sr_shutdown(struct platform_device *pdev)
950 {
951 struct omap_sr *sr_info = platform_get_drvdata(pdev);
952
953 if (sr_info->autocomp_active)
954 sr_stop_vddautocomp(sr_info);
955
956 return;
957 }
958
959 static const struct of_device_id omap_sr_match[] = {
960 { .compatible = "ti,omap3-smartreflex-core", },
961 { .compatible = "ti,omap3-smartreflex-mpu-iva", },
962 { .compatible = "ti,omap4-smartreflex-core", },
963 { .compatible = "ti,omap4-smartreflex-mpu", },
964 { .compatible = "ti,omap4-smartreflex-iva", },
965 { },
966 };
967 MODULE_DEVICE_TABLE(of, omap_sr_match);
968
969 static struct platform_driver smartreflex_driver = {
970 .probe = omap_sr_probe,
971 .remove = omap_sr_remove,
972 .shutdown = omap_sr_shutdown,
973 .driver = {
974 .name = DRIVER_NAME,
975 .of_match_table = omap_sr_match,
976 },
977 };
978
sr_init(void)979 static int __init sr_init(void)
980 {
981 int ret = 0;
982
983 ret = platform_driver_register(&smartreflex_driver);
984 if (ret) {
985 pr_err("%s: platform driver register failed for SR\n",
986 __func__);
987 return ret;
988 }
989
990 return 0;
991 }
992 late_initcall(sr_init);
993
sr_exit(void)994 static void __exit sr_exit(void)
995 {
996 platform_driver_unregister(&smartreflex_driver);
997 }
998 module_exit(sr_exit);
999
1000 MODULE_DESCRIPTION("OMAP Smartreflex Driver");
1001 MODULE_LICENSE("GPL");
1002 MODULE_ALIAS("platform:" DRIVER_NAME);
1003 MODULE_AUTHOR("Texas Instruments Inc");
1004