1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * I2C client/driver for the ST M41T80 family of i2c rtc chips.
4 *
5 * Author: Alexander Bigga <ab@mycable.de>
6 *
7 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com>
8 *
9 * 2006 (c) mycable GmbH
10 */
11
12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
14 #include <linux/bcd.h>
15 #include <linux/clk-provider.h>
16 #include <linux/i2c.h>
17 #include <linux/init.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/rtc.h>
22 #include <linux/slab.h>
23 #include <linux/mutex.h>
24 #include <linux/string.h>
25 #include <linux/delay.h>
26 #ifdef CONFIG_RTC_DRV_M41T80_WDT
27 #include <linux/fs.h>
28 #include <linux/ioctl.h>
29 #include <linux/miscdevice.h>
30 #include <linux/reboot.h>
31 #include <linux/watchdog.h>
32 #endif
33
34 #define M41T80_REG_SSEC 0x00
35 #define M41T80_REG_SEC 0x01
36 #define M41T80_REG_MIN 0x02
37 #define M41T80_REG_HOUR 0x03
38 #define M41T80_REG_WDAY 0x04
39 #define M41T80_REG_DAY 0x05
40 #define M41T80_REG_MON 0x06
41 #define M41T80_REG_YEAR 0x07
42 #define M41T80_REG_ALARM_MON 0x0a
43 #define M41T80_REG_ALARM_DAY 0x0b
44 #define M41T80_REG_ALARM_HOUR 0x0c
45 #define M41T80_REG_ALARM_MIN 0x0d
46 #define M41T80_REG_ALARM_SEC 0x0e
47 #define M41T80_REG_FLAGS 0x0f
48 #define M41T80_REG_SQW 0x13
49
50 #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1)
51 #define M41T80_ALARM_REG_SIZE \
52 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON)
53
54 #define M41T80_SQW_MAX_FREQ 32768
55
56 #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */
57 #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */
58 #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */
59 #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */
60 #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */
61 #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */
62 #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */
63 #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */
64 #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */
65 #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */
66
67 #define M41T80_FEATURE_HT BIT(0) /* Halt feature */
68 #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */
69 #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */
70 #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */
71 #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */
72
73 static const struct i2c_device_id m41t80_id[] = {
74 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT },
75 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD },
76 { "m41t80", M41T80_FEATURE_SQ },
77 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ},
78 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
79 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
80 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
81 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
82 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
83 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ },
84 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT },
85 { }
86 };
87 MODULE_DEVICE_TABLE(i2c, m41t80_id);
88
89 static const __maybe_unused struct of_device_id m41t80_of_match[] = {
90 {
91 .compatible = "st,m41t62",
92 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT)
93 },
94 {
95 .compatible = "st,m41t65",
96 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD)
97 },
98 {
99 .compatible = "st,m41t80",
100 .data = (void *)(M41T80_FEATURE_SQ)
101 },
102 {
103 .compatible = "st,m41t81",
104 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ)
105 },
106 {
107 .compatible = "st,m41t81s",
108 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
109 },
110 {
111 .compatible = "st,m41t82",
112 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
113 },
114 {
115 .compatible = "st,m41t83",
116 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
117 },
118 {
119 .compatible = "st,m41t84",
120 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
121 },
122 {
123 .compatible = "st,m41t85",
124 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
125 },
126 {
127 .compatible = "st,m41t87",
128 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ)
129 },
130 {
131 .compatible = "microcrystal,rv4162",
132 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
133 },
134 /* DT compatibility only, do not use compatibles below: */
135 {
136 .compatible = "st,rv4162",
137 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
138 },
139 {
140 .compatible = "rv4162",
141 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT)
142 },
143 { }
144 };
145 MODULE_DEVICE_TABLE(of, m41t80_of_match);
146
147 struct m41t80_data {
148 unsigned long features;
149 struct i2c_client *client;
150 struct rtc_device *rtc;
151 #ifdef CONFIG_COMMON_CLK
152 struct clk_hw sqw;
153 unsigned long freq;
154 unsigned int sqwe;
155 #endif
156 };
157
m41t80_handle_irq(int irq,void * dev_id)158 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id)
159 {
160 struct i2c_client *client = dev_id;
161 struct m41t80_data *m41t80 = i2c_get_clientdata(client);
162 unsigned long events = 0;
163 int flags, flags_afe;
164
165 rtc_lock(m41t80->rtc);
166
167 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
168 if (flags_afe < 0) {
169 rtc_unlock(m41t80->rtc);
170 return IRQ_NONE;
171 }
172
173 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
174 if (flags <= 0) {
175 rtc_unlock(m41t80->rtc);
176 return IRQ_NONE;
177 }
178
179 if (flags & M41T80_FLAGS_AF) {
180 flags &= ~M41T80_FLAGS_AF;
181 flags_afe &= ~M41T80_ALMON_AFE;
182 events |= RTC_AF;
183 }
184
185 if (events) {
186 rtc_update_irq(m41t80->rtc, 1, events);
187 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags);
188 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
189 flags_afe);
190 }
191
192 rtc_unlock(m41t80->rtc);
193
194 return IRQ_HANDLED;
195 }
196
m41t80_rtc_read_time(struct device * dev,struct rtc_time * tm)197 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm)
198 {
199 struct i2c_client *client = to_i2c_client(dev);
200 unsigned char buf[8];
201 int err, flags;
202
203 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
204 if (flags < 0)
205 return flags;
206
207 if (flags & M41T80_FLAGS_OF) {
208 dev_err(&client->dev, "Oscillator failure, time may not be accurate, write time to RTC to fix it.\n");
209 return -EINVAL;
210 }
211
212 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC,
213 sizeof(buf), buf);
214 if (err < 0) {
215 dev_dbg(&client->dev, "Unable to read date\n");
216 return err;
217 }
218
219 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f);
220 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f);
221 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f);
222 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f);
223 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07;
224 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1;
225
226 /* assume 20YY not 19YY, and ignore the Century Bit */
227 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100;
228 return 0;
229 }
230
m41t80_rtc_set_time(struct device * dev,struct rtc_time * in_tm)231 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *in_tm)
232 {
233 struct i2c_client *client = to_i2c_client(dev);
234 struct m41t80_data *clientdata = i2c_get_clientdata(client);
235 struct rtc_time tm = *in_tm;
236 unsigned char buf[8];
237 int err, flags;
238 time64_t time = 0;
239
240 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
241 if (flags < 0)
242 return flags;
243 if (flags & M41T80_FLAGS_OF) {
244 /* add 4sec of oscillator stablize time otherwise we are behind 4sec */
245 time = rtc_tm_to_time64(&tm);
246 rtc_time64_to_tm(time + 4, &tm);
247 }
248 buf[M41T80_REG_SSEC] = 0;
249 buf[M41T80_REG_SEC] = bin2bcd(tm.tm_sec);
250 buf[M41T80_REG_MIN] = bin2bcd(tm.tm_min);
251 buf[M41T80_REG_HOUR] = bin2bcd(tm.tm_hour);
252 buf[M41T80_REG_DAY] = bin2bcd(tm.tm_mday);
253 buf[M41T80_REG_MON] = bin2bcd(tm.tm_mon + 1);
254 buf[M41T80_REG_YEAR] = bin2bcd(tm.tm_year - 100);
255 buf[M41T80_REG_WDAY] = tm.tm_wday;
256
257 /* If the square wave output is controlled in the weekday register */
258 if (clientdata->features & M41T80_FEATURE_SQ_ALT) {
259 int val;
260
261 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY);
262 if (val < 0)
263 return val;
264
265 buf[M41T80_REG_WDAY] |= (val & 0xf0);
266 }
267
268 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC,
269 sizeof(buf), buf);
270 if (err < 0) {
271 dev_dbg(&client->dev, "Unable to write to date registers\n");
272 return err;
273 }
274 if (flags & M41T80_FLAGS_OF) {
275 /* OF cannot be immediately reset: oscillator has to be restarted. */
276 dev_warn(&client->dev, "OF bit is still set, kickstarting clock.\n");
277 err = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, M41T80_SEC_ST);
278 if (err < 0) {
279 dev_dbg(&client->dev, "Can't set ST bit\n");
280 return err;
281 }
282 err = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, flags & ~M41T80_SEC_ST);
283 if (err < 0) {
284 dev_dbg(&client->dev, "Can't clear ST bit\n");
285 return err;
286 }
287 /* oscillator must run for 4sec before we attempt to reset OF bit */
288 msleep(4000);
289 /* Clear the OF bit of Flags Register */
290 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags & ~M41T80_FLAGS_OF);
291 if (err < 0) {
292 dev_dbg(&client->dev, "Unable to write flags register\n");
293 return err;
294 }
295 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
296 if (flags < 0) {
297 return flags;
298 } else if (flags & M41T80_FLAGS_OF) {
299 dev_dbg(&client->dev, "Can't clear the OF bit check battery\n");
300 return err;
301 }
302 }
303
304 return err;
305 }
306
m41t80_rtc_proc(struct device * dev,struct seq_file * seq)307 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq)
308 {
309 struct i2c_client *client = to_i2c_client(dev);
310 struct m41t80_data *clientdata = i2c_get_clientdata(client);
311 int reg;
312
313 if (clientdata->features & M41T80_FEATURE_BL) {
314 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
315 if (reg < 0)
316 return reg;
317 seq_printf(seq, "battery\t\t: %s\n",
318 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok");
319 }
320 return 0;
321 }
322
m41t80_alarm_irq_enable(struct device * dev,unsigned int enabled)323 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled)
324 {
325 struct i2c_client *client = to_i2c_client(dev);
326 int flags, retval;
327
328 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
329 if (flags < 0)
330 return flags;
331
332 if (enabled)
333 flags |= M41T80_ALMON_AFE;
334 else
335 flags &= ~M41T80_ALMON_AFE;
336
337 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags);
338 if (retval < 0) {
339 dev_dbg(dev, "Unable to enable alarm IRQ %d\n", retval);
340 return retval;
341 }
342 return 0;
343 }
344
m41t80_set_alarm(struct device * dev,struct rtc_wkalrm * alrm)345 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
346 {
347 struct i2c_client *client = to_i2c_client(dev);
348 u8 alarmvals[5];
349 int ret, err;
350
351 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1);
352 alarmvals[1] = bin2bcd(alrm->time.tm_mday);
353 alarmvals[2] = bin2bcd(alrm->time.tm_hour);
354 alarmvals[3] = bin2bcd(alrm->time.tm_min);
355 alarmvals[4] = bin2bcd(alrm->time.tm_sec);
356
357 /* Clear AF and AFE flags */
358 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
359 if (ret < 0)
360 return ret;
361 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
362 ret & ~(M41T80_ALMON_AFE));
363 if (err < 0) {
364 dev_dbg(dev, "Unable to clear AFE bit\n");
365 return err;
366 }
367
368 /* Keep SQWE bit value */
369 alarmvals[0] |= (ret & M41T80_ALMON_SQWE);
370
371 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
372 if (ret < 0)
373 return ret;
374
375 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS,
376 ret & ~(M41T80_FLAGS_AF));
377 if (err < 0) {
378 dev_dbg(dev, "Unable to clear AF bit\n");
379 return err;
380 }
381
382 /* Write the alarm */
383 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON,
384 5, alarmvals);
385 if (err)
386 return err;
387
388 /* Enable the alarm interrupt */
389 if (alrm->enabled) {
390 alarmvals[0] |= M41T80_ALMON_AFE;
391 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
392 alarmvals[0]);
393 if (err)
394 return err;
395 }
396
397 return 0;
398 }
399
m41t80_read_alarm(struct device * dev,struct rtc_wkalrm * alrm)400 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
401 {
402 struct i2c_client *client = to_i2c_client(dev);
403 u8 alarmvals[5];
404 int flags, ret;
405
406 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON,
407 5, alarmvals);
408 if (ret != 5)
409 return ret < 0 ? ret : -EIO;
410
411 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS);
412 if (flags < 0)
413 return flags;
414
415 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f);
416 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f);
417 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f);
418 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f);
419 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1;
420
421 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE);
422 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled;
423
424 return 0;
425 }
426
427 static const struct rtc_class_ops m41t80_rtc_ops = {
428 .read_time = m41t80_rtc_read_time,
429 .set_time = m41t80_rtc_set_time,
430 .proc = m41t80_rtc_proc,
431 .read_alarm = m41t80_read_alarm,
432 .set_alarm = m41t80_set_alarm,
433 .alarm_irq_enable = m41t80_alarm_irq_enable,
434 };
435
436 #ifdef CONFIG_PM_SLEEP
m41t80_suspend(struct device * dev)437 static int m41t80_suspend(struct device *dev)
438 {
439 struct i2c_client *client = to_i2c_client(dev);
440
441 if (client->irq >= 0 && device_may_wakeup(dev))
442 enable_irq_wake(client->irq);
443
444 return 0;
445 }
446
m41t80_resume(struct device * dev)447 static int m41t80_resume(struct device *dev)
448 {
449 struct i2c_client *client = to_i2c_client(dev);
450
451 if (client->irq >= 0 && device_may_wakeup(dev))
452 disable_irq_wake(client->irq);
453
454 return 0;
455 }
456 #endif
457
458 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume);
459
460 #ifdef CONFIG_COMMON_CLK
461 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw)
462
m41t80_decode_freq(int setting)463 static unsigned long m41t80_decode_freq(int setting)
464 {
465 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ :
466 M41T80_SQW_MAX_FREQ >> setting;
467 }
468
m41t80_get_freq(struct m41t80_data * m41t80)469 static unsigned long m41t80_get_freq(struct m41t80_data *m41t80)
470 {
471 struct i2c_client *client = m41t80->client;
472 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
473 M41T80_REG_WDAY : M41T80_REG_SQW;
474 int ret = i2c_smbus_read_byte_data(client, reg_sqw);
475
476 if (ret < 0)
477 return 0;
478 return m41t80_decode_freq(ret >> 4);
479 }
480
m41t80_sqw_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)481 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw,
482 unsigned long parent_rate)
483 {
484 return sqw_to_m41t80_data(hw)->freq;
485 }
486
m41t80_sqw_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)487 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
488 unsigned long *prate)
489 {
490 if (rate >= M41T80_SQW_MAX_FREQ)
491 return M41T80_SQW_MAX_FREQ;
492 if (rate >= M41T80_SQW_MAX_FREQ / 4)
493 return M41T80_SQW_MAX_FREQ / 4;
494 if (!rate)
495 return 0;
496 return 1 << ilog2(rate);
497 }
498
m41t80_sqw_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)499 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
500 unsigned long parent_rate)
501 {
502 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
503 struct i2c_client *client = m41t80->client;
504 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ?
505 M41T80_REG_WDAY : M41T80_REG_SQW;
506 int reg, ret, val = 0;
507
508 if (rate >= M41T80_SQW_MAX_FREQ)
509 val = 1;
510 else if (rate >= M41T80_SQW_MAX_FREQ / 4)
511 val = 2;
512 else if (rate)
513 val = 15 - ilog2(rate);
514
515 reg = i2c_smbus_read_byte_data(client, reg_sqw);
516 if (reg < 0)
517 return reg;
518
519 reg = (reg & 0x0f) | (val << 4);
520
521 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg);
522 if (!ret)
523 m41t80->freq = m41t80_decode_freq(val);
524 return ret;
525 }
526
m41t80_sqw_control(struct clk_hw * hw,bool enable)527 static int m41t80_sqw_control(struct clk_hw *hw, bool enable)
528 {
529 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw);
530 struct i2c_client *client = m41t80->client;
531 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
532
533 if (ret < 0)
534 return ret;
535
536 if (enable)
537 ret |= M41T80_ALMON_SQWE;
538 else
539 ret &= ~M41T80_ALMON_SQWE;
540
541 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret);
542 if (!ret)
543 m41t80->sqwe = enable;
544 return ret;
545 }
546
m41t80_sqw_prepare(struct clk_hw * hw)547 static int m41t80_sqw_prepare(struct clk_hw *hw)
548 {
549 return m41t80_sqw_control(hw, 1);
550 }
551
m41t80_sqw_unprepare(struct clk_hw * hw)552 static void m41t80_sqw_unprepare(struct clk_hw *hw)
553 {
554 m41t80_sqw_control(hw, 0);
555 }
556
m41t80_sqw_is_prepared(struct clk_hw * hw)557 static int m41t80_sqw_is_prepared(struct clk_hw *hw)
558 {
559 return sqw_to_m41t80_data(hw)->sqwe;
560 }
561
562 static const struct clk_ops m41t80_sqw_ops = {
563 .prepare = m41t80_sqw_prepare,
564 .unprepare = m41t80_sqw_unprepare,
565 .is_prepared = m41t80_sqw_is_prepared,
566 .recalc_rate = m41t80_sqw_recalc_rate,
567 .round_rate = m41t80_sqw_round_rate,
568 .set_rate = m41t80_sqw_set_rate,
569 };
570
m41t80_sqw_register_clk(struct m41t80_data * m41t80)571 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80)
572 {
573 struct i2c_client *client = m41t80->client;
574 struct device_node *node = client->dev.of_node;
575 struct device_node *fixed_clock;
576 struct clk *clk;
577 struct clk_init_data init;
578 int ret;
579
580 fixed_clock = of_get_child_by_name(node, "clock");
581 if (fixed_clock) {
582 /*
583 * skip registering square wave clock when a fixed
584 * clock has been registered. The fixed clock is
585 * registered automatically when being referenced.
586 */
587 of_node_put(fixed_clock);
588 return NULL;
589 }
590
591 /* First disable the clock */
592 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON);
593 if (ret < 0)
594 return ERR_PTR(ret);
595 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON,
596 ret & ~(M41T80_ALMON_SQWE));
597 if (ret < 0)
598 return ERR_PTR(ret);
599
600 init.name = "m41t80-sqw";
601 init.ops = &m41t80_sqw_ops;
602 init.flags = 0;
603 init.parent_names = NULL;
604 init.num_parents = 0;
605 m41t80->sqw.init = &init;
606 m41t80->freq = m41t80_get_freq(m41t80);
607
608 /* optional override of the clockname */
609 of_property_read_string(node, "clock-output-names", &init.name);
610
611 /* register the clock */
612 clk = clk_register(&client->dev, &m41t80->sqw);
613 if (!IS_ERR(clk))
614 of_clk_add_provider(node, of_clk_src_simple_get, clk);
615
616 return clk;
617 }
618 #endif
619
620 #ifdef CONFIG_RTC_DRV_M41T80_WDT
621 /*
622 *****************************************************************************
623 *
624 * Watchdog Driver
625 *
626 *****************************************************************************
627 */
628 static DEFINE_MUTEX(m41t80_rtc_mutex);
629 static struct i2c_client *save_client;
630
631 /* Default margin */
632 #define WD_TIMO 60 /* 1..31 seconds */
633
634 static int wdt_margin = WD_TIMO;
635 module_param(wdt_margin, int, 0);
636 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)");
637
638 static unsigned long wdt_is_open;
639 static int boot_flag;
640
641 /**
642 * wdt_ping - Reload counter one with the watchdog timeout.
643 * We don't bother reloading the cascade counter.
644 */
wdt_ping(void)645 static void wdt_ping(void)
646 {
647 unsigned char i2c_data[2];
648 struct i2c_msg msgs1[1] = {
649 {
650 .addr = save_client->addr,
651 .flags = 0,
652 .len = 2,
653 .buf = i2c_data,
654 },
655 };
656 struct m41t80_data *clientdata = i2c_get_clientdata(save_client);
657
658 i2c_data[0] = 0x09; /* watchdog register */
659
660 if (wdt_margin > 31)
661 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */
662 else
663 /*
664 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02)
665 */
666 i2c_data[1] = wdt_margin << 2 | 0x82;
667
668 /*
669 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as
670 * that would be an invalid resolution.
671 */
672 if (clientdata->features & M41T80_FEATURE_WD)
673 i2c_data[1] &= ~M41T80_WATCHDOG_RB2;
674
675 i2c_transfer(save_client->adapter, msgs1, 1);
676 }
677
678 /**
679 * wdt_disable - disables watchdog.
680 */
wdt_disable(void)681 static void wdt_disable(void)
682 {
683 unsigned char i2c_data[2], i2c_buf[0x10];
684 struct i2c_msg msgs0[2] = {
685 {
686 .addr = save_client->addr,
687 .flags = 0,
688 .len = 1,
689 .buf = i2c_data,
690 },
691 {
692 .addr = save_client->addr,
693 .flags = I2C_M_RD,
694 .len = 1,
695 .buf = i2c_buf,
696 },
697 };
698 struct i2c_msg msgs1[1] = {
699 {
700 .addr = save_client->addr,
701 .flags = 0,
702 .len = 2,
703 .buf = i2c_data,
704 },
705 };
706
707 i2c_data[0] = 0x09;
708 i2c_transfer(save_client->adapter, msgs0, 2);
709
710 i2c_data[0] = 0x09;
711 i2c_data[1] = 0x00;
712 i2c_transfer(save_client->adapter, msgs1, 1);
713 }
714
715 /**
716 * wdt_write - write to watchdog.
717 * @file: file handle to the watchdog
718 * @buf: buffer to write (unused as data does not matter here
719 * @count: count of bytes
720 * @ppos: pointer to the position to write. No seeks allowed
721 *
722 * A write to a watchdog device is defined as a keepalive signal. Any
723 * write of data will do, as we don't define content meaning.
724 */
wdt_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)725 static ssize_t wdt_write(struct file *file, const char __user *buf,
726 size_t count, loff_t *ppos)
727 {
728 if (count) {
729 wdt_ping();
730 return 1;
731 }
732 return 0;
733 }
734
wdt_read(struct file * file,char __user * buf,size_t count,loff_t * ppos)735 static ssize_t wdt_read(struct file *file, char __user *buf,
736 size_t count, loff_t *ppos)
737 {
738 return 0;
739 }
740
741 /**
742 * wdt_ioctl - ioctl handler to set watchdog.
743 * @file: file handle to the device
744 * @cmd: watchdog command
745 * @arg: argument pointer
746 *
747 * The watchdog API defines a common set of functions for all watchdogs
748 * according to their available features. We only actually usefully support
749 * querying capabilities and current status.
750 */
wdt_ioctl(struct file * file,unsigned int cmd,unsigned long arg)751 static int wdt_ioctl(struct file *file, unsigned int cmd,
752 unsigned long arg)
753 {
754 int new_margin, rv;
755 static struct watchdog_info ident = {
756 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING |
757 WDIOF_SETTIMEOUT,
758 .firmware_version = 1,
759 .identity = "M41T80 WTD"
760 };
761
762 switch (cmd) {
763 case WDIOC_GETSUPPORT:
764 return copy_to_user((struct watchdog_info __user *)arg, &ident,
765 sizeof(ident)) ? -EFAULT : 0;
766
767 case WDIOC_GETSTATUS:
768 case WDIOC_GETBOOTSTATUS:
769 return put_user(boot_flag, (int __user *)arg);
770 case WDIOC_KEEPALIVE:
771 wdt_ping();
772 return 0;
773 case WDIOC_SETTIMEOUT:
774 if (get_user(new_margin, (int __user *)arg))
775 return -EFAULT;
776 /* Arbitrary, can't find the card's limits */
777 if (new_margin < 1 || new_margin > 124)
778 return -EINVAL;
779 wdt_margin = new_margin;
780 wdt_ping();
781 fallthrough;
782 case WDIOC_GETTIMEOUT:
783 return put_user(wdt_margin, (int __user *)arg);
784
785 case WDIOC_SETOPTIONS:
786 if (copy_from_user(&rv, (int __user *)arg, sizeof(int)))
787 return -EFAULT;
788
789 if (rv & WDIOS_DISABLECARD) {
790 pr_info("disable watchdog\n");
791 wdt_disable();
792 }
793
794 if (rv & WDIOS_ENABLECARD) {
795 pr_info("enable watchdog\n");
796 wdt_ping();
797 }
798
799 return -EINVAL;
800 }
801 return -ENOTTY;
802 }
803
wdt_unlocked_ioctl(struct file * file,unsigned int cmd,unsigned long arg)804 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd,
805 unsigned long arg)
806 {
807 int ret;
808
809 mutex_lock(&m41t80_rtc_mutex);
810 ret = wdt_ioctl(file, cmd, arg);
811 mutex_unlock(&m41t80_rtc_mutex);
812
813 return ret;
814 }
815
816 /**
817 * wdt_open - open a watchdog.
818 * @inode: inode of device
819 * @file: file handle to device
820 *
821 */
wdt_open(struct inode * inode,struct file * file)822 static int wdt_open(struct inode *inode, struct file *file)
823 {
824 if (iminor(inode) == WATCHDOG_MINOR) {
825 mutex_lock(&m41t80_rtc_mutex);
826 if (test_and_set_bit(0, &wdt_is_open)) {
827 mutex_unlock(&m41t80_rtc_mutex);
828 return -EBUSY;
829 }
830 /*
831 * Activate
832 */
833 wdt_is_open = 1;
834 mutex_unlock(&m41t80_rtc_mutex);
835 return stream_open(inode, file);
836 }
837 return -ENODEV;
838 }
839
840 /**
841 * wdt_release - release a watchdog.
842 * @inode: inode to board
843 * @file: file handle to board
844 *
845 */
wdt_release(struct inode * inode,struct file * file)846 static int wdt_release(struct inode *inode, struct file *file)
847 {
848 if (iminor(inode) == WATCHDOG_MINOR)
849 clear_bit(0, &wdt_is_open);
850 return 0;
851 }
852
853 /**
854 * wdt_notify_sys - notify to watchdog.
855 * @this: our notifier block
856 * @code: the event being reported
857 * @unused: unused
858 *
859 * Our notifier is called on system shutdowns. We want to turn the card
860 * off at reboot otherwise the machine will reboot again during memory
861 * test or worse yet during the following fsck. This would suck, in fact
862 * trust me - if it happens it does suck.
863 */
wdt_notify_sys(struct notifier_block * this,unsigned long code,void * unused)864 static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
865 void *unused)
866 {
867 if (code == SYS_DOWN || code == SYS_HALT)
868 /* Disable Watchdog */
869 wdt_disable();
870 return NOTIFY_DONE;
871 }
872
873 static const struct file_operations wdt_fops = {
874 .owner = THIS_MODULE,
875 .read = wdt_read,
876 .unlocked_ioctl = wdt_unlocked_ioctl,
877 .compat_ioctl = compat_ptr_ioctl,
878 .write = wdt_write,
879 .open = wdt_open,
880 .release = wdt_release,
881 };
882
883 static struct miscdevice wdt_dev = {
884 .minor = WATCHDOG_MINOR,
885 .name = "watchdog",
886 .fops = &wdt_fops,
887 };
888
889 /*
890 * The WDT card needs to learn about soft shutdowns in order to
891 * turn the timebomb registers off.
892 */
893 static struct notifier_block wdt_notifier = {
894 .notifier_call = wdt_notify_sys,
895 };
896 #endif /* CONFIG_RTC_DRV_M41T80_WDT */
897
898 /*
899 *****************************************************************************
900 *
901 * Driver Interface
902 *
903 *****************************************************************************
904 */
905
m41t80_probe(struct i2c_client * client)906 static int m41t80_probe(struct i2c_client *client)
907 {
908 struct i2c_adapter *adapter = client->adapter;
909 int rc = 0;
910 struct rtc_time tm;
911 struct m41t80_data *m41t80_data = NULL;
912 bool wakeup_source = false;
913
914 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
915 I2C_FUNC_SMBUS_BYTE_DATA)) {
916 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n");
917 return -ENODEV;
918 }
919
920 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data),
921 GFP_KERNEL);
922 if (!m41t80_data)
923 return -ENOMEM;
924
925 m41t80_data->client = client;
926 if (client->dev.of_node) {
927 m41t80_data->features = (unsigned long)
928 of_device_get_match_data(&client->dev);
929 } else {
930 const struct i2c_device_id *id = i2c_match_id(m41t80_id, client);
931 m41t80_data->features = id->driver_data;
932 }
933 i2c_set_clientdata(client, m41t80_data);
934
935 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev);
936 if (IS_ERR(m41t80_data->rtc))
937 return PTR_ERR(m41t80_data->rtc);
938
939 wakeup_source = device_property_read_bool(&client->dev, "wakeup-source");
940 if (client->irq > 0) {
941 unsigned long irqflags = IRQF_TRIGGER_LOW;
942
943 if (dev_fwnode(&client->dev))
944 irqflags = 0;
945
946 rc = devm_request_threaded_irq(&client->dev, client->irq,
947 NULL, m41t80_handle_irq,
948 irqflags | IRQF_ONESHOT,
949 "m41t80", client);
950 if (rc) {
951 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n");
952 client->irq = 0;
953 wakeup_source = false;
954 }
955 }
956 if (client->irq > 0 || wakeup_source)
957 device_init_wakeup(&client->dev, true);
958 else
959 clear_bit(RTC_FEATURE_ALARM, m41t80_data->rtc->features);
960
961 m41t80_data->rtc->ops = &m41t80_rtc_ops;
962 m41t80_data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
963 m41t80_data->rtc->range_max = RTC_TIMESTAMP_END_2099;
964
965 if (client->irq <= 0)
966 clear_bit(RTC_FEATURE_UPDATE_INTERRUPT, m41t80_data->rtc->features);
967
968 /* Make sure HT (Halt Update) bit is cleared */
969 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR);
970
971 if (rc >= 0 && rc & M41T80_ALHOUR_HT) {
972 if (m41t80_data->features & M41T80_FEATURE_HT) {
973 m41t80_rtc_read_time(&client->dev, &tm);
974 dev_info(&client->dev, "HT bit was set!\n");
975 dev_info(&client->dev, "Power Down at %ptR\n", &tm);
976 }
977 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR,
978 rc & ~M41T80_ALHOUR_HT);
979 }
980
981 if (rc < 0) {
982 dev_err(&client->dev, "Can't clear HT bit\n");
983 return rc;
984 }
985
986 /* Make sure ST (stop) bit is cleared */
987 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC);
988
989 if (rc >= 0 && rc & M41T80_SEC_ST)
990 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC,
991 rc & ~M41T80_SEC_ST);
992 if (rc < 0) {
993 dev_err(&client->dev, "Can't clear ST bit\n");
994 return rc;
995 }
996
997 #ifdef CONFIG_RTC_DRV_M41T80_WDT
998 if (m41t80_data->features & M41T80_FEATURE_HT) {
999 save_client = client;
1000 rc = misc_register(&wdt_dev);
1001 if (rc)
1002 return rc;
1003 rc = register_reboot_notifier(&wdt_notifier);
1004 if (rc) {
1005 misc_deregister(&wdt_dev);
1006 return rc;
1007 }
1008 }
1009 #endif
1010 #ifdef CONFIG_COMMON_CLK
1011 if (m41t80_data->features & M41T80_FEATURE_SQ)
1012 m41t80_sqw_register_clk(m41t80_data);
1013 #endif
1014
1015 rc = devm_rtc_register_device(m41t80_data->rtc);
1016 if (rc)
1017 return rc;
1018
1019 return 0;
1020 }
1021
m41t80_remove(struct i2c_client * client)1022 static void m41t80_remove(struct i2c_client *client)
1023 {
1024 #ifdef CONFIG_RTC_DRV_M41T80_WDT
1025 struct m41t80_data *clientdata = i2c_get_clientdata(client);
1026
1027 if (clientdata->features & M41T80_FEATURE_HT) {
1028 misc_deregister(&wdt_dev);
1029 unregister_reboot_notifier(&wdt_notifier);
1030 }
1031 #endif
1032 }
1033
1034 static struct i2c_driver m41t80_driver = {
1035 .driver = {
1036 .name = "rtc-m41t80",
1037 .of_match_table = of_match_ptr(m41t80_of_match),
1038 .pm = &m41t80_pm,
1039 },
1040 .probe = m41t80_probe,
1041 .remove = m41t80_remove,
1042 .id_table = m41t80_id,
1043 };
1044
1045 module_i2c_driver(m41t80_driver);
1046
1047 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>");
1048 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver");
1049 MODULE_LICENSE("GPL");
1050