xref: /linux/drivers/spi/spi-gpio.c (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * SPI host driver using generic bitbanged GPIO
4  *
5  * Copyright (C) 2006,2008 David Brownell
6  * Copyright (C) 2017 Linus Walleij
7  */
8 #include <linux/gpio/consumer.h>
9 #include <linux/kernel.h>
10 #include <linux/mod_devicetable.h>
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/property.h>
14 
15 #include <linux/spi/spi.h>
16 #include <linux/spi/spi_bitbang.h>
17 #include <linux/spi/spi_gpio.h>
18 
19 /*
20  * This bitbanging SPI host driver should help make systems usable
21  * when a native hardware SPI engine is not available, perhaps because
22  * its driver isn't yet working or because the I/O pins it requires
23  * are used for other purposes.
24  *
25  * platform_device->driver_data ... points to spi_gpio
26  *
27  * spi->controller_state ... reserved for bitbang framework code
28  *
29  * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
30  */
31 
32 struct spi_gpio {
33 	struct spi_bitbang		bitbang;
34 	struct gpio_desc		*sck;
35 	struct gpio_desc		*miso;
36 	struct gpio_desc		*mosi;
37 	struct gpio_desc		**cs_gpios;
38 };
39 
40 /*----------------------------------------------------------------------*/
41 
42 /*
43  * Because the overhead of going through four GPIO procedure calls
44  * per transferred bit can make performance a problem, this code
45  * is set up so that you can use it in either of two ways:
46  *
47  *   - The slow generic way:  set up platform_data to hold the GPIO
48  *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
49  *     each of them.  This driver can handle several such busses.
50  *
51  *   - The quicker inlined way:  only helps with platform GPIO code
52  *     that inlines operations for constant GPIOs.  This can give
53  *     you tight (fast!) inner loops, but each such bus needs a
54  *     new driver.  You'll define a new C file, with Makefile and
55  *     Kconfig support; the C code can be a total of six lines:
56  *
57  *		#define DRIVER_NAME	"myboard_spi2"
58  *		#define	SPI_MISO_GPIO	119
59  *		#define	SPI_MOSI_GPIO	120
60  *		#define	SPI_SCK_GPIO	121
61  *		#define	SPI_N_CHIPSEL	4
62  *		#include "spi-gpio.c"
63  */
64 
65 #ifndef DRIVER_NAME
66 #define DRIVER_NAME	"spi_gpio"
67 
68 #define GENERIC_BITBANG	/* vs tight inlines */
69 
70 #endif
71 
72 /*----------------------------------------------------------------------*/
73 
74 static inline struct spi_gpio *__pure
spi_to_spi_gpio(const struct spi_device * spi)75 spi_to_spi_gpio(const struct spi_device *spi)
76 {
77 	const struct spi_bitbang	*bang;
78 	struct spi_gpio			*spi_gpio;
79 
80 	bang = spi_controller_get_devdata(spi->controller);
81 	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
82 	return spi_gpio;
83 }
84 
85 /* These helpers are in turn called by the bitbang inlines */
setsck(const struct spi_device * spi,int is_on)86 static inline void setsck(const struct spi_device *spi, int is_on)
87 {
88 	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
89 
90 	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
91 }
92 
setmosi(const struct spi_device * spi,int is_on)93 static inline void setmosi(const struct spi_device *spi, int is_on)
94 {
95 	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
96 
97 	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
98 }
99 
getmiso(const struct spi_device * spi)100 static inline int getmiso(const struct spi_device *spi)
101 {
102 	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
103 
104 	if (spi->mode & SPI_3WIRE)
105 		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
106 	else
107 		return !!gpiod_get_value_cansleep(spi_gpio->miso);
108 }
109 
110 /*
111  * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
112  * requested device clock.  Software overhead means we usually have trouble
113  * reaching even one Mbit/sec (except when we can inline bitops), so for now
114  * we'll just assume we never need additional per-bit slowdowns.
115  */
116 #define spidelay(nsecs)	do {} while (0)
117 
118 #include "spi-bitbang-txrx.h"
119 
120 /*
121  * These functions can leverage inline expansion of GPIO calls to shrink
122  * costs for a txrx bit, often by factors of around ten (by instruction
123  * count).  That is particularly visible for larger word sizes, but helps
124  * even with default 8-bit words.
125  *
126  * REVISIT overheads calling these functions for each word also have
127  * significant performance costs.  Having txrx_bufs() calls that inline
128  * the txrx_word() logic would help performance, e.g. on larger blocks
129  * used with flash storage or MMC/SD.  There should also be ways to make
130  * GCC be less stupid about reloading registers inside the I/O loops,
131  * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
132  */
133 
spi_gpio_txrx_word_mode0(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)134 static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
135 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
136 {
137 	if (unlikely(spi->mode & SPI_LSB_FIRST))
138 		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
139 	else
140 		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
141 }
142 
spi_gpio_txrx_word_mode1(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)143 static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
144 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
145 {
146 	if (unlikely(spi->mode & SPI_LSB_FIRST))
147 		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
148 	else
149 		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
150 }
151 
spi_gpio_txrx_word_mode2(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)152 static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
153 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
154 {
155 	if (unlikely(spi->mode & SPI_LSB_FIRST))
156 		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
157 	else
158 		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
159 }
160 
spi_gpio_txrx_word_mode3(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)161 static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
162 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
163 {
164 	if (unlikely(spi->mode & SPI_LSB_FIRST))
165 		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
166 	else
167 		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
168 }
169 
170 /*
171  * These functions do not call setmosi or getmiso if respective flag
172  * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
173  * call when such pin is not present or defined in the controller.
174  * A separate set of callbacks is defined to get highest possible
175  * speed in the generic case (when both MISO and MOSI lines are
176  * available), as optimiser will remove the checks when argument is
177  * constant.
178  */
179 
spi_gpio_spec_txrx_word_mode0(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)180 static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
181 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
182 {
183 	flags = spi->controller->flags;
184 	if (unlikely(spi->mode & SPI_LSB_FIRST))
185 		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
186 	else
187 		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
188 }
189 
spi_gpio_spec_txrx_word_mode1(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)190 static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
191 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
192 {
193 	flags = spi->controller->flags;
194 	if (unlikely(spi->mode & SPI_LSB_FIRST))
195 		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
196 	else
197 		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
198 }
199 
spi_gpio_spec_txrx_word_mode2(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)200 static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
201 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
202 {
203 	flags = spi->controller->flags;
204 	if (unlikely(spi->mode & SPI_LSB_FIRST))
205 		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
206 	else
207 		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
208 }
209 
spi_gpio_spec_txrx_word_mode3(struct spi_device * spi,unsigned nsecs,u32 word,u8 bits,unsigned flags)210 static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
211 		unsigned nsecs, u32 word, u8 bits, unsigned flags)
212 {
213 	flags = spi->controller->flags;
214 	if (unlikely(spi->mode & SPI_LSB_FIRST))
215 		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
216 	else
217 		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
218 }
219 
220 /*----------------------------------------------------------------------*/
221 
spi_gpio_chipselect(struct spi_device * spi,int is_active)222 static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
223 {
224 	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
225 
226 	/* set initial clock line level */
227 	if (is_active)
228 		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
229 
230 	/* Drive chip select line, if we have one */
231 	if (spi_gpio->cs_gpios) {
232 		struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
233 
234 		/* SPI chip selects are normally active-low */
235 		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
236 	}
237 }
238 
spi_gpio_set_mosi_idle(struct spi_device * spi)239 static void spi_gpio_set_mosi_idle(struct spi_device *spi)
240 {
241 	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
242 
243 	gpiod_set_value_cansleep(spi_gpio->mosi,
244 				 !!(spi->mode & SPI_MOSI_IDLE_HIGH));
245 }
246 
spi_gpio_setup(struct spi_device * spi)247 static int spi_gpio_setup(struct spi_device *spi)
248 {
249 	struct gpio_desc	*cs;
250 	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
251 	int ret;
252 
253 	/*
254 	 * The CS GPIOs have already been
255 	 * initialized from the descriptor lookup.
256 	 */
257 	if (spi_gpio->cs_gpios) {
258 		cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
259 		if (!spi->controller_state && cs) {
260 			ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH));
261 			if (ret)
262 				return ret;
263 		}
264 	}
265 
266 	return spi_bitbang_setup(spi);
267 }
268 
spi_gpio_set_direction(struct spi_device * spi,bool output)269 static int spi_gpio_set_direction(struct spi_device *spi, bool output)
270 {
271 	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
272 	int ret;
273 
274 	if (output)
275 		return gpiod_direction_output(spi_gpio->mosi, 1);
276 
277 	/*
278 	 * Only change MOSI to an input if using 3WIRE mode.
279 	 * Otherwise, MOSI could be left floating if there is
280 	 * no pull resistor connected to the I/O pin, or could
281 	 * be left logic high if there is a pull-up. Transmitting
282 	 * logic high when only clocking MISO data in can put some
283 	 * SPI devices in to a bad state.
284 	 */
285 	if (spi->mode & SPI_3WIRE) {
286 		ret = gpiod_direction_input(spi_gpio->mosi);
287 		if (ret)
288 			return ret;
289 	}
290 	/*
291 	 * Send a turnaround high impedance cycle when switching
292 	 * from output to input. Theoretically there should be
293 	 * a clock delay here, but as has been noted above, the
294 	 * nsec delay function for bit-banged GPIO is simply
295 	 * {} because bit-banging just doesn't get fast enough
296 	 * anyway.
297 	 */
298 	if (spi->mode & SPI_3WIRE_HIZ) {
299 		gpiod_set_value_cansleep(spi_gpio->sck,
300 					 !(spi->mode & SPI_CPOL));
301 		gpiod_set_value_cansleep(spi_gpio->sck,
302 					 !!(spi->mode & SPI_CPOL));
303 	}
304 	return 0;
305 }
306 
spi_gpio_cleanup(struct spi_device * spi)307 static void spi_gpio_cleanup(struct spi_device *spi)
308 {
309 	spi_bitbang_cleanup(spi);
310 }
311 
312 /*
313  * It can be convenient to use this driver with pins that have alternate
314  * functions associated with a "native" SPI controller if a driver for that
315  * controller is not available, or is missing important functionality.
316  *
317  * On platforms which can do so, configure MISO with a weak pullup unless
318  * there's an external pullup on that signal.  That saves power by avoiding
319  * floating signals.  (A weak pulldown would save power too, but many
320  * drivers expect to see all-ones data as the no target "response".)
321  */
spi_gpio_request(struct device * dev,struct spi_gpio * spi_gpio)322 static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
323 {
324 	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
325 	if (IS_ERR(spi_gpio->mosi))
326 		return PTR_ERR(spi_gpio->mosi);
327 
328 	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
329 	if (IS_ERR(spi_gpio->miso))
330 		return PTR_ERR(spi_gpio->miso);
331 
332 	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
333 	return PTR_ERR_OR_ZERO(spi_gpio->sck);
334 }
335 
spi_gpio_probe_pdata(struct platform_device * pdev,struct spi_controller * host)336 static int spi_gpio_probe_pdata(struct platform_device *pdev,
337 				struct spi_controller *host)
338 {
339 	struct device *dev = &pdev->dev;
340 	struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
341 	struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
342 	int i;
343 
344 #ifdef GENERIC_BITBANG
345 	if (!pdata || !pdata->num_chipselect)
346 		return -ENODEV;
347 #endif
348 	/*
349 	 * The host needs to think there is a chipselect even if not
350 	 * connected
351 	 */
352 	host->num_chipselect = pdata->num_chipselect ?: 1;
353 
354 	spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
355 					  sizeof(*spi_gpio->cs_gpios),
356 					  GFP_KERNEL);
357 	if (!spi_gpio->cs_gpios)
358 		return -ENOMEM;
359 
360 	for (i = 0; i < host->num_chipselect; i++) {
361 		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
362 							     GPIOD_OUT_HIGH);
363 		if (IS_ERR(spi_gpio->cs_gpios[i]))
364 			return PTR_ERR(spi_gpio->cs_gpios[i]);
365 	}
366 
367 	return 0;
368 }
369 
spi_gpio_probe(struct platform_device * pdev)370 static int spi_gpio_probe(struct platform_device *pdev)
371 {
372 	int				status;
373 	struct spi_controller		*host;
374 	struct spi_gpio			*spi_gpio;
375 	struct device			*dev = &pdev->dev;
376 	struct fwnode_handle		*fwnode = dev_fwnode(dev);
377 	struct spi_bitbang		*bb;
378 
379 	host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
380 	if (!host)
381 		return -ENOMEM;
382 
383 	if (fwnode) {
384 		device_set_node(&host->dev, fwnode);
385 		host->use_gpio_descriptors = true;
386 	} else {
387 		status = spi_gpio_probe_pdata(pdev, host);
388 		if (status)
389 			return status;
390 	}
391 
392 	spi_gpio = spi_controller_get_devdata(host);
393 
394 	status = spi_gpio_request(dev, spi_gpio);
395 	if (status)
396 		return status;
397 
398 	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
399 	host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
400 			  SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW |
401 			  SPI_MOSI_IDLE_HIGH;
402 	if (!spi_gpio->mosi) {
403 		/* HW configuration without MOSI pin
404 		 *
405 		 * No setting SPI_CONTROLLER_NO_RX here - if there is only
406 		 * a MOSI pin connected the host can still do RX by
407 		 * changing the direction of the line.
408 		 */
409 		host->flags = SPI_CONTROLLER_NO_TX;
410 	}
411 
412 	host->bus_num = pdev->id;
413 	host->setup = spi_gpio_setup;
414 	host->cleanup = spi_gpio_cleanup;
415 
416 	bb = &spi_gpio->bitbang;
417 	bb->ctlr = host;
418 	/*
419 	 * There is some additional business, apart from driving the CS GPIO
420 	 * line, that we need to do on selection. This makes the local
421 	 * callback for chipselect always get called.
422 	 */
423 	host->flags |= SPI_CONTROLLER_GPIO_SS;
424 	bb->chipselect = spi_gpio_chipselect;
425 	bb->set_line_direction = spi_gpio_set_direction;
426 	bb->set_mosi_idle = spi_gpio_set_mosi_idle;
427 
428 	if (host->flags & SPI_CONTROLLER_NO_TX) {
429 		bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
430 		bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
431 		bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
432 		bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
433 	} else {
434 		bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
435 		bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
436 		bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
437 		bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
438 	}
439 	bb->setup_transfer = spi_bitbang_setup_transfer;
440 
441 	status = spi_bitbang_init(&spi_gpio->bitbang);
442 	if (status)
443 		return status;
444 
445 	return devm_spi_register_controller(&pdev->dev, host);
446 }
447 
448 MODULE_ALIAS("platform:" DRIVER_NAME);
449 
450 static const struct of_device_id spi_gpio_dt_ids[] = {
451 	{ .compatible = "spi-gpio" },
452 	{}
453 };
454 MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
455 
456 static struct platform_driver spi_gpio_driver = {
457 	.driver = {
458 		.name	= DRIVER_NAME,
459 		.of_match_table = spi_gpio_dt_ids,
460 	},
461 	.probe		= spi_gpio_probe,
462 };
463 module_platform_driver(spi_gpio_driver);
464 
465 MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
466 MODULE_AUTHOR("David Brownell");
467 MODULE_LICENSE("GPL");
468