1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk> 4 * Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit 5 * Version: 0.0.25 6 * 7 * FEATURES currently supported: 8 * Front, Rear and Center/LFE. 9 * Surround40 and Surround51. 10 * Capture from MIC an LINE IN input. 11 * SPDIF digital playback of PCM stereo and AC3/DTS works. 12 * (One can use a standard mono mini-jack to one RCA plugs cable. 13 * or one can use a standard stereo mini-jack to two RCA plugs cable. 14 * Plug one of the RCA plugs into the Coax input of the external decoder/receiver.) 15 * ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. ) 16 * Notes on how to capture sound: 17 * The AC97 is used in the PLAYBACK direction. 18 * The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC. 19 * So, to record from the MIC, set the MIC Playback volume to max, 20 * unmute the MIC and turn up the MASTER Playback volume. 21 * So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume. 22 * 23 * The only playback controls that currently do anything are: - 24 * Analog Front 25 * Analog Rear 26 * Analog Center/LFE 27 * SPDIF Front 28 * SPDIF Rear 29 * SPDIF Center/LFE 30 * 31 * For capture from Mic in or Line in. 32 * Digital/Analog ( switch must be in Analog mode for CAPTURE. ) 33 * 34 * CAPTURE feedback into PLAYBACK 35 * 36 * Changelog: 37 * Support interrupts per period. 38 * Removed noise from Center/LFE channel when in Analog mode. 39 * Rename and remove mixer controls. 40 * 0.0.6 41 * Use separate card based DMA buffer for periods table list. 42 * 0.0.7 43 * Change remove and rename ctrls into lists. 44 * 0.0.8 45 * Try to fix capture sources. 46 * 0.0.9 47 * Fix AC3 output. 48 * Enable S32_LE format support. 49 * 0.0.10 50 * Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".) 51 * 0.0.11 52 * Add Model name recognition. 53 * 0.0.12 54 * Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period. 55 * Remove redundent "voice" handling. 56 * 0.0.13 57 * Single trigger call for multi channels. 58 * 0.0.14 59 * Set limits based on what the sound card hardware can do. 60 * playback periods_min=2, periods_max=8 61 * capture hw constraints require period_size = n * 64 bytes. 62 * playback hw constraints require period_size = n * 64 bytes. 63 * 0.0.15 64 * Minor updates. 65 * 0.0.16 66 * Implement 192000 sample rate. 67 * 0.0.17 68 * Add support for SB0410 and SB0413. 69 * 0.0.18 70 * Modified Copyright message. 71 * 0.0.19 72 * Finally fix support for SB Live 24 bit. SB0410 and SB0413. 73 * The output codec needs resetting, otherwise all output is muted. 74 * 0.0.20 75 * Merge "pci_disable_device(pci);" fixes. 76 * 0.0.21 77 * Add 4 capture channels. (SPDIF only comes in on channel 0. ) 78 * Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.) 79 * 0.0.22 80 * Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901 81 * 0.0.23 82 * Implement support for Line-in capture on SB Live 24bit. 83 * 0.0.24 84 * Add support for mute control on SB Live 24bit (cards w/ SPI DAC) 85 * 0.0.25 86 * Powerdown SPI DAC channels when not in use 87 * 88 * BUGS: 89 * Some stability problems when unloading the snd-ca0106 kernel module. 90 * -- 91 * 92 * TODO: 93 * 4 Capture channels, only one implemented so far. 94 * Other capture rates apart from 48khz not implemented. 95 * MIDI 96 * -- 97 * GENERAL INFO: 98 * Model: SB0310 99 * P17 Chip: CA0106-DAT 100 * AC97 Codec: STAC 9721 101 * ADC: Philips 1361T (Stereo 24bit) 102 * DAC: WM8746EDS (6-channel, 24bit, 192Khz) 103 * 104 * GENERAL INFO: 105 * Model: SB0410 106 * P17 Chip: CA0106-DAT 107 * AC97 Codec: None 108 * ADC: WM8775EDS (4 Channel) 109 * DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support) 110 * SPDIF Out control switches between Mic in and SPDIF out. 111 * No sound out or mic input working yet. 112 * 113 * GENERAL INFO: 114 * Model: SB0413 115 * P17 Chip: CA0106-DAT 116 * AC97 Codec: None. 117 * ADC: Unknown 118 * DAC: Unknown 119 * Trying to handle it like the SB0410. 120 * 121 * This code was initially based on code from ALSA's emu10k1x.c which is: 122 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com> 123 */ 124 #include <linux/delay.h> 125 #include <linux/init.h> 126 #include <linux/interrupt.h> 127 #include <linux/pci.h> 128 #include <linux/slab.h> 129 #include <linux/module.h> 130 #include <linux/dma-mapping.h> 131 #include <sound/core.h> 132 #include <sound/initval.h> 133 #include <sound/pcm.h> 134 #include <sound/ac97_codec.h> 135 #include <sound/info.h> 136 137 MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>"); 138 MODULE_DESCRIPTION("CA0106"); 139 MODULE_LICENSE("GPL"); 140 141 // module parameters (see "Module Parameters") 142 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 143 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 144 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 145 static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */ 146 147 module_param_array(index, int, NULL, 0444); 148 MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard."); 149 module_param_array(id, charp, NULL, 0444); 150 MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard."); 151 module_param_array(enable, bool, NULL, 0444); 152 MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard."); 153 module_param_array(subsystem, uint, NULL, 0444); 154 MODULE_PARM_DESC(subsystem, "Force card subsystem model."); 155 156 #include "ca0106.h" 157 158 static const struct snd_ca0106_details ca0106_chip_details[] = { 159 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */ 160 /* It is really just a normal SB Live 24bit. */ 161 /* Tested: 162 * See ALSA bug#3251 163 */ 164 { .serial = 0x10131102, 165 .name = "X-Fi Extreme Audio [SBxxxx]", 166 .gpio_type = 1, 167 .i2c_adc = 1 } , 168 /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */ 169 /* It is really just a normal SB Live 24bit. */ 170 /* 171 * CTRL:CA0111-WTLF 172 * ADC: WM8775SEDS 173 * DAC: CS4382-KQZ 174 */ 175 /* Tested: 176 * Playback on front, rear, center/lfe speakers 177 * Capture from Mic in. 178 * Not-Tested: 179 * Capture from Line in. 180 * Playback to digital out. 181 */ 182 { .serial = 0x10121102, 183 .name = "X-Fi Extreme Audio [SB0790]", 184 .gpio_type = 1, 185 .i2c_adc = 1 } , 186 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */ 187 /* AudigyLS[SB0310] */ 188 { .serial = 0x10021102, 189 .name = "AudigyLS [SB0310]", 190 .ac97 = 1 } , 191 /* Unknown AudigyLS that also says SB0310 on it */ 192 { .serial = 0x10051102, 193 .name = "AudigyLS [SB0310b]", 194 .ac97 = 1 } , 195 /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */ 196 { .serial = 0x10061102, 197 .name = "Live! 7.1 24bit [SB0410]", 198 .gpio_type = 1, 199 .i2c_adc = 1 } , 200 /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */ 201 { .serial = 0x10071102, 202 .name = "Live! 7.1 24bit [SB0413]", 203 .gpio_type = 1, 204 .i2c_adc = 1 } , 205 /* New Audigy SE. Has a different DAC. */ 206 /* SB0570: 207 * CTRL:CA0106-DAT 208 * ADC: WM8775EDS 209 * DAC: WM8768GEDS 210 */ 211 { .serial = 0x100a1102, 212 .name = "Audigy SE [SB0570]", 213 .gpio_type = 1, 214 .i2c_adc = 1, 215 .spi_dac = 0x4021 } , 216 /* New Audigy LS. Has a different DAC. */ 217 /* SB0570: 218 * CTRL:CA0106-DAT 219 * ADC: WM8775EDS 220 * DAC: WM8768GEDS 221 */ 222 { .serial = 0x10111102, 223 .name = "Audigy SE OEM [SB0570a]", 224 .gpio_type = 1, 225 .i2c_adc = 1, 226 .spi_dac = 0x4021 } , 227 /* Sound Blaster 5.1vx 228 * Tested: Playback on front, rear, center/lfe speakers 229 * Not-Tested: Capture 230 */ 231 { .serial = 0x10041102, 232 .name = "Sound Blaster 5.1vx [SB1070]", 233 .gpio_type = 1, 234 .i2c_adc = 0, 235 .spi_dac = 0x0124 236 } , 237 /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */ 238 /* SB0438 239 * CTRL:CA0106-DAT 240 * ADC: WM8775SEDS 241 * DAC: CS4382-KQZ 242 */ 243 { .serial = 0x10091462, 244 .name = "MSI K8N Diamond MB [SB0438]", 245 .gpio_type = 2, 246 .i2c_adc = 1 } , 247 /* MSI K8N Diamond PLUS MB */ 248 { .serial = 0x10091102, 249 .name = "MSI K8N Diamond MB", 250 .gpio_type = 2, 251 .i2c_adc = 1, 252 .spi_dac = 0x4021 } , 253 /* Giga-byte GA-G1975X mobo 254 * Novell bnc#395807 255 */ 256 /* FIXME: the GPIO and I2C setting aren't tested well */ 257 { .serial = 0x1458a006, 258 .name = "Giga-byte GA-G1975X", 259 .gpio_type = 1, 260 .i2c_adc = 1 }, 261 /* Shuttle XPC SD31P which has an onboard Creative Labs 262 * Sound Blaster Live! 24-bit EAX 263 * high-definition 7.1 audio processor". 264 * Added using info from andrewvegan in alsa bug #1298 265 */ 266 { .serial = 0x30381297, 267 .name = "Shuttle XPC SD31P [SD31P]", 268 .gpio_type = 1, 269 .i2c_adc = 1 } , 270 /* Shuttle XPC SD11G5 which has an onboard Creative Labs 271 * Sound Blaster Live! 24-bit EAX 272 * high-definition 7.1 audio processor". 273 * Fixes ALSA bug#1600 274 */ 275 { .serial = 0x30411297, 276 .name = "Shuttle XPC SD11G5 [SD11G5]", 277 .gpio_type = 1, 278 .i2c_adc = 1 } , 279 { .serial = 0, 280 .name = "AudigyLS [Unknown]" } 281 }; 282 283 /* hardware definition */ 284 static const struct snd_pcm_hardware snd_ca0106_playback_hw = { 285 .info = SNDRV_PCM_INFO_MMAP | 286 SNDRV_PCM_INFO_INTERLEAVED | 287 SNDRV_PCM_INFO_BLOCK_TRANSFER | 288 SNDRV_PCM_INFO_MMAP_VALID | 289 SNDRV_PCM_INFO_SYNC_START, 290 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 291 .rates = (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | 292 SNDRV_PCM_RATE_192000), 293 .rate_min = 48000, 294 .rate_max = 192000, 295 .channels_min = 2, //1, 296 .channels_max = 2, //6, 297 .buffer_bytes_max = ((65536 - 64) * 8), 298 .period_bytes_min = 64, 299 .period_bytes_max = (65536 - 64), 300 .periods_min = 2, 301 .periods_max = 8, 302 .fifo_size = 0, 303 }; 304 305 static const struct snd_pcm_hardware snd_ca0106_capture_hw = { 306 .info = (SNDRV_PCM_INFO_MMAP | 307 SNDRV_PCM_INFO_INTERLEAVED | 308 SNDRV_PCM_INFO_BLOCK_TRANSFER | 309 SNDRV_PCM_INFO_MMAP_VALID), 310 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, 311 #if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */ 312 .rates = (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | 313 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000), 314 .rate_min = 44100, 315 #else 316 .rates = (SNDRV_PCM_RATE_48000 | 317 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000), 318 .rate_min = 48000, 319 #endif /* FIXME */ 320 .rate_max = 192000, 321 .channels_min = 2, 322 .channels_max = 2, 323 .buffer_bytes_max = 65536 - 128, 324 .period_bytes_min = 64, 325 .period_bytes_max = 32768 - 64, 326 .periods_min = 2, 327 .periods_max = 2, 328 .fifo_size = 0, 329 }; 330 331 unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu, 332 unsigned int reg, 333 unsigned int chn) 334 { 335 unsigned int regptr; 336 337 regptr = (reg << 16) | chn; 338 339 guard(spinlock_irqsave)(&emu->emu_lock); 340 outl(regptr, emu->port + CA0106_PTR); 341 return inl(emu->port + CA0106_DATA); 342 } 343 344 void snd_ca0106_ptr_write(struct snd_ca0106 *emu, 345 unsigned int reg, 346 unsigned int chn, 347 unsigned int data) 348 { 349 unsigned int regptr; 350 351 regptr = (reg << 16) | chn; 352 353 guard(spinlock_irqsave)(&emu->emu_lock); 354 outl(regptr, emu->port + CA0106_PTR); 355 outl(data, emu->port + CA0106_DATA); 356 } 357 358 int snd_ca0106_spi_write(struct snd_ca0106 * emu, 359 unsigned int data) 360 { 361 unsigned int reset, set; 362 unsigned int reg, tmp; 363 int n, result; 364 reg = SPI; 365 if (data > 0xffff) /* Only 16bit values allowed */ 366 return 1; 367 tmp = snd_ca0106_ptr_read(emu, reg, 0); 368 reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */ 369 set = reset | 0x10000; /* Set xxx1xxxx */ 370 snd_ca0106_ptr_write(emu, reg, 0, reset | data); 371 tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */ 372 snd_ca0106_ptr_write(emu, reg, 0, set | data); 373 result = 1; 374 /* Wait for status bit to return to 0 */ 375 for (n = 0; n < 100; n++) { 376 udelay(10); 377 tmp = snd_ca0106_ptr_read(emu, reg, 0); 378 if (!(tmp & 0x10000)) { 379 result = 0; 380 break; 381 } 382 } 383 if (result) /* Timed out */ 384 return 1; 385 snd_ca0106_ptr_write(emu, reg, 0, reset | data); 386 tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */ 387 return 0; 388 } 389 390 /* The ADC does not support i2c read, so only write is implemented */ 391 int snd_ca0106_i2c_write(struct snd_ca0106 *emu, 392 u32 reg, 393 u32 value) 394 { 395 u32 tmp; 396 int timeout = 0; 397 int status; 398 int retry; 399 if ((reg > 0x7f) || (value > 0x1ff)) { 400 dev_err(emu->card->dev, "i2c_write: invalid values.\n"); 401 return -EINVAL; 402 } 403 404 tmp = reg << 25 | value << 16; 405 /* 406 dev_dbg(emu->card->dev, "I2C-write:reg=0x%x, value=0x%x\n", reg, value); 407 */ 408 /* Not sure what this I2C channel controls. */ 409 /* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */ 410 411 /* This controls the I2C connected to the WM8775 ADC Codec */ 412 snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp); 413 414 for (retry = 0; retry < 10; retry++) { 415 /* Send the data to i2c */ 416 //tmp = snd_ca0106_ptr_read(emu, I2C_A, 0); 417 //tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK); 418 tmp = 0; 419 tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD); 420 snd_ca0106_ptr_write(emu, I2C_A, 0, tmp); 421 422 /* Wait till the transaction ends */ 423 while (1) { 424 status = snd_ca0106_ptr_read(emu, I2C_A, 0); 425 /*dev_dbg(emu->card->dev, "I2C:status=0x%x\n", status);*/ 426 timeout++; 427 if ((status & I2C_A_ADC_START) == 0) 428 break; 429 430 if (timeout > 1000) 431 break; 432 } 433 //Read back and see if the transaction is successful 434 if ((status & I2C_A_ADC_ABORT) == 0) 435 break; 436 } 437 438 if (retry == 10) { 439 dev_err(emu->card->dev, "Writing to ADC failed!\n"); 440 return -EINVAL; 441 } 442 443 return 0; 444 } 445 446 447 static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb) 448 { 449 unsigned int intr_enable; 450 451 guard(spinlock_irqsave)(&emu->emu_lock); 452 intr_enable = inl(emu->port + CA0106_INTE) | intrenb; 453 outl(intr_enable, emu->port + CA0106_INTE); 454 } 455 456 static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb) 457 { 458 unsigned int intr_enable; 459 460 guard(spinlock_irqsave)(&emu->emu_lock); 461 intr_enable = inl(emu->port + CA0106_INTE) & ~intrenb; 462 outl(intr_enable, emu->port + CA0106_INTE); 463 } 464 465 466 static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime) 467 { 468 kfree(runtime->private_data); 469 } 470 471 static const int spi_dacd_reg[] = { 472 SPI_DACD0_REG, 473 SPI_DACD1_REG, 474 SPI_DACD2_REG, 475 0, 476 SPI_DACD4_REG, 477 }; 478 static const int spi_dacd_bit[] = { 479 SPI_DACD0_BIT, 480 SPI_DACD1_BIT, 481 SPI_DACD2_BIT, 482 0, 483 SPI_DACD4_BIT, 484 }; 485 486 static void restore_spdif_bits(struct snd_ca0106 *chip, int idx) 487 { 488 if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) { 489 chip->spdif_str_bits[idx] = chip->spdif_bits[idx]; 490 snd_ca0106_ptr_write(chip, SPCS0 + idx, 0, 491 chip->spdif_str_bits[idx]); 492 } 493 } 494 495 static int snd_ca0106_channel_dac(struct snd_ca0106 *chip, 496 const struct snd_ca0106_details *details, 497 int channel_id) 498 { 499 switch (channel_id) { 500 case PCM_FRONT_CHANNEL: 501 return (details->spi_dac & 0xf000) >> (4 * 3); 502 case PCM_REAR_CHANNEL: 503 return (details->spi_dac & 0x0f00) >> (4 * 2); 504 case PCM_CENTER_LFE_CHANNEL: 505 return (details->spi_dac & 0x00f0) >> (4 * 1); 506 case PCM_UNKNOWN_CHANNEL: 507 return (details->spi_dac & 0x000f) >> (4 * 0); 508 default: 509 dev_dbg(chip->card->dev, "ca0106: unknown channel_id %d\n", 510 channel_id); 511 } 512 return 0; 513 } 514 515 static int snd_ca0106_pcm_power_dac(struct snd_ca0106 *chip, int channel_id, 516 int power) 517 { 518 if (chip->details->spi_dac) { 519 const int dac = snd_ca0106_channel_dac(chip, chip->details, 520 channel_id); 521 const int reg = spi_dacd_reg[dac]; 522 const int bit = spi_dacd_bit[dac]; 523 524 if (power) 525 /* Power up */ 526 chip->spi_dac_reg[reg] &= ~bit; 527 else 528 /* Power down */ 529 chip->spi_dac_reg[reg] |= bit; 530 if (snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]) != 0) 531 return -ENXIO; 532 } 533 return 0; 534 } 535 536 /* open_playback callback */ 537 static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream, 538 int channel_id) 539 { 540 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream); 541 struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]); 542 struct snd_ca0106_pcm *epcm; 543 struct snd_pcm_runtime *runtime = substream->runtime; 544 int err; 545 546 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL); 547 548 if (epcm == NULL) 549 return -ENOMEM; 550 epcm->emu = chip; 551 epcm->substream = substream; 552 epcm->channel_id=channel_id; 553 554 runtime->private_data = epcm; 555 runtime->private_free = snd_ca0106_pcm_free_substream; 556 557 runtime->hw = snd_ca0106_playback_hw; 558 559 channel->emu = chip; 560 channel->number = channel_id; 561 562 channel->use = 1; 563 /* 564 dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n", 565 channel_id, chip, channel); 566 */ 567 //channel->interrupt = snd_ca0106_pcm_channel_interrupt; 568 channel->epcm = epcm; 569 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 570 if (err < 0) 571 return err; 572 err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64); 573 if (err < 0) 574 return err; 575 snd_pcm_set_sync(substream); 576 577 /* Front channel dac should already be on */ 578 if (channel_id != PCM_FRONT_CHANNEL) { 579 err = snd_ca0106_pcm_power_dac(chip, channel_id, 1); 580 if (err < 0) 581 return err; 582 } 583 584 restore_spdif_bits(chip, channel_id); 585 586 return 0; 587 } 588 589 /* close callback */ 590 static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream) 591 { 592 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream); 593 struct snd_pcm_runtime *runtime = substream->runtime; 594 struct snd_ca0106_pcm *epcm = runtime->private_data; 595 chip->playback_channels[epcm->channel_id].use = 0; 596 597 restore_spdif_bits(chip, epcm->channel_id); 598 599 /* Front channel dac should stay on */ 600 if (epcm->channel_id != PCM_FRONT_CHANNEL) { 601 int err; 602 err = snd_ca0106_pcm_power_dac(chip, epcm->channel_id, 0); 603 if (err < 0) 604 return err; 605 } 606 607 /* FIXME: maybe zero others */ 608 return 0; 609 } 610 611 static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream) 612 { 613 return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL); 614 } 615 616 static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream) 617 { 618 return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL); 619 } 620 621 static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream) 622 { 623 return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL); 624 } 625 626 static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream) 627 { 628 return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL); 629 } 630 631 /* open_capture callback */ 632 static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream, 633 int channel_id) 634 { 635 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream); 636 struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]); 637 struct snd_ca0106_pcm *epcm; 638 struct snd_pcm_runtime *runtime = substream->runtime; 639 int err; 640 641 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL); 642 if (!epcm) 643 return -ENOMEM; 644 645 epcm->emu = chip; 646 epcm->substream = substream; 647 epcm->channel_id=channel_id; 648 649 runtime->private_data = epcm; 650 runtime->private_free = snd_ca0106_pcm_free_substream; 651 652 runtime->hw = snd_ca0106_capture_hw; 653 654 channel->emu = chip; 655 channel->number = channel_id; 656 657 channel->use = 1; 658 /* 659 dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n", 660 channel_id, chip, channel); 661 */ 662 //channel->interrupt = snd_ca0106_pcm_channel_interrupt; 663 channel->epcm = epcm; 664 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 665 if (err < 0) 666 return err; 667 //snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes); 668 err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64); 669 if (err < 0) 670 return err; 671 return 0; 672 } 673 674 /* close callback */ 675 static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream) 676 { 677 struct snd_ca0106 *chip = snd_pcm_substream_chip(substream); 678 struct snd_pcm_runtime *runtime = substream->runtime; 679 struct snd_ca0106_pcm *epcm = runtime->private_data; 680 chip->capture_channels[epcm->channel_id].use = 0; 681 /* FIXME: maybe zero others */ 682 return 0; 683 } 684 685 static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream) 686 { 687 return snd_ca0106_pcm_open_capture_channel(substream, 0); 688 } 689 690 static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream) 691 { 692 return snd_ca0106_pcm_open_capture_channel(substream, 1); 693 } 694 695 static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream) 696 { 697 return snd_ca0106_pcm_open_capture_channel(substream, 2); 698 } 699 700 static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream) 701 { 702 return snd_ca0106_pcm_open_capture_channel(substream, 3); 703 } 704 705 /* prepare playback callback */ 706 static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream) 707 { 708 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream); 709 struct snd_pcm_runtime *runtime = substream->runtime; 710 struct snd_ca0106_pcm *epcm = runtime->private_data; 711 int channel = epcm->channel_id; 712 u32 *table_base = (u32 *)(emu->buffer->area+(8*16*channel)); 713 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size); 714 u32 hcfg_mask = HCFG_PLAYBACK_S32_LE; 715 u32 hcfg_set = 0x00000000; 716 u32 hcfg; 717 u32 reg40_mask = 0x30000 << (channel<<1); 718 u32 reg40_set = 0; 719 u32 reg40; 720 /* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */ 721 u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */ 722 u32 reg71_set = 0; 723 u32 reg71; 724 int i; 725 726 #if 0 /* debug */ 727 dev_dbg(emu->card->dev, 728 "prepare:channel_number=%d, rate=%d, format=0x%x, " 729 "channels=%d, buffer_size=%ld, period_size=%ld, " 730 "periods=%u, frames_to_bytes=%d\n", 731 channel, runtime->rate, runtime->format, 732 runtime->channels, runtime->buffer_size, 733 runtime->period_size, runtime->periods, 734 frames_to_bytes(runtime, 1)); 735 dev_dbg(emu->card->dev, 736 "dma_addr=%x, dma_area=%p, table_base=%p\n", 737 runtime->dma_addr, runtime->dma_area, table_base); 738 dev_dbg(emu->card->dev, 739 "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n", 740 emu->buffer->addr, emu->buffer->area, emu->buffer->bytes); 741 #endif /* debug */ 742 /* Rate can be set per channel. */ 743 /* reg40 control host to fifo */ 744 /* reg71 controls DAC rate. */ 745 switch (runtime->rate) { 746 case 44100: 747 reg40_set = 0x10000 << (channel<<1); 748 reg71_set = 0x01010000; 749 break; 750 case 48000: 751 reg40_set = 0; 752 reg71_set = 0; 753 break; 754 case 96000: 755 reg40_set = 0x20000 << (channel<<1); 756 reg71_set = 0x02020000; 757 break; 758 case 192000: 759 reg40_set = 0x30000 << (channel<<1); 760 reg71_set = 0x03030000; 761 break; 762 default: 763 reg40_set = 0; 764 reg71_set = 0; 765 break; 766 } 767 /* Format is a global setting */ 768 /* FIXME: Only let the first channel accessed set this. */ 769 switch (runtime->format) { 770 case SNDRV_PCM_FORMAT_S16_LE: 771 hcfg_set = 0; 772 break; 773 case SNDRV_PCM_FORMAT_S32_LE: 774 hcfg_set = HCFG_PLAYBACK_S32_LE; 775 break; 776 default: 777 hcfg_set = 0; 778 break; 779 } 780 hcfg = inl(emu->port + CA0106_HCFG) ; 781 hcfg = (hcfg & ~hcfg_mask) | hcfg_set; 782 outl(hcfg, emu->port + CA0106_HCFG); 783 reg40 = snd_ca0106_ptr_read(emu, 0x40, 0); 784 reg40 = (reg40 & ~reg40_mask) | reg40_set; 785 snd_ca0106_ptr_write(emu, 0x40, 0, reg40); 786 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0); 787 reg71 = (reg71 & ~reg71_mask) | reg71_set; 788 snd_ca0106_ptr_write(emu, 0x71, 0, reg71); 789 790 /* FIXME: Check emu->buffer->size before actually writing to it. */ 791 for(i=0; i < runtime->periods; i++) { 792 table_base[i*2] = runtime->dma_addr + (i * period_size_bytes); 793 table_base[i*2+1] = period_size_bytes << 16; 794 } 795 796 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer->addr+(8*16*channel)); 797 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19); 798 snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0); 799 snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr); 800 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes 801 /* FIXME test what 0 bytes does. */ 802 snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes 803 snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0); 804 snd_ca0106_ptr_write(emu, 0x07, channel, 0x0); 805 snd_ca0106_ptr_write(emu, 0x08, channel, 0); 806 snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */ 807 #if 0 808 snd_ca0106_ptr_write(emu, SPCS0, 0, 809 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 810 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 811 SPCS_GENERATIONSTATUS | 0x00001200 | 812 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT ); 813 #endif 814 815 return 0; 816 } 817 818 /* prepare capture callback */ 819 static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream) 820 { 821 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream); 822 struct snd_pcm_runtime *runtime = substream->runtime; 823 struct snd_ca0106_pcm *epcm = runtime->private_data; 824 int channel = epcm->channel_id; 825 u32 hcfg_mask = HCFG_CAPTURE_S32_LE; 826 u32 hcfg_set = 0x00000000; 827 u32 hcfg; 828 u32 over_sampling=0x2; 829 u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */ 830 u32 reg71_set = 0; 831 u32 reg71; 832 833 #if 0 /* debug */ 834 dev_dbg(emu->card->dev, 835 "prepare:channel_number=%d, rate=%d, format=0x%x, " 836 "channels=%d, buffer_size=%ld, period_size=%ld, " 837 "periods=%u, frames_to_bytes=%d\n", 838 channel, runtime->rate, runtime->format, 839 runtime->channels, runtime->buffer_size, 840 runtime->period_size, runtime->periods, 841 frames_to_bytes(runtime, 1)); 842 dev_dbg(emu->card->dev, 843 "dma_addr=%x, dma_area=%p, table_base=%p\n", 844 runtime->dma_addr, runtime->dma_area, table_base); 845 dev_dbg(emu->card->dev, 846 "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n", 847 emu->buffer->addr, emu->buffer->area, emu->buffer->bytes); 848 #endif /* debug */ 849 /* reg71 controls ADC rate. */ 850 switch (runtime->rate) { 851 case 44100: 852 reg71_set = 0x00004000; 853 break; 854 case 48000: 855 reg71_set = 0; 856 break; 857 case 96000: 858 reg71_set = 0x00008000; 859 over_sampling=0xa; 860 break; 861 case 192000: 862 reg71_set = 0x0000c000; 863 over_sampling=0xa; 864 break; 865 default: 866 reg71_set = 0; 867 break; 868 } 869 /* Format is a global setting */ 870 /* FIXME: Only let the first channel accessed set this. */ 871 switch (runtime->format) { 872 case SNDRV_PCM_FORMAT_S16_LE: 873 hcfg_set = 0; 874 break; 875 case SNDRV_PCM_FORMAT_S32_LE: 876 hcfg_set = HCFG_CAPTURE_S32_LE; 877 break; 878 default: 879 hcfg_set = 0; 880 break; 881 } 882 hcfg = inl(emu->port + CA0106_HCFG) ; 883 hcfg = (hcfg & ~hcfg_mask) | hcfg_set; 884 outl(hcfg, emu->port + CA0106_HCFG); 885 reg71 = snd_ca0106_ptr_read(emu, 0x71, 0); 886 reg71 = (reg71 & ~reg71_mask) | reg71_set; 887 snd_ca0106_ptr_write(emu, 0x71, 0, reg71); 888 if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */ 889 snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */ 890 } 891 892 893 /* 894 dev_dbg(emu->card->dev, 895 "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, " 896 "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n", 897 channel, runtime->rate, runtime->format, runtime->channels, 898 runtime->buffer_size, runtime->period_size, 899 frames_to_bytes(runtime, 1)); 900 */ 901 snd_ca0106_ptr_write(emu, 0x13, channel, 0); 902 snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr); 903 snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes 904 snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0); 905 906 return 0; 907 } 908 909 /* trigger_playback callback */ 910 static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream, 911 int cmd) 912 { 913 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream); 914 struct snd_pcm_runtime *runtime; 915 struct snd_ca0106_pcm *epcm; 916 int channel; 917 int result = 0; 918 struct snd_pcm_substream *s; 919 u32 basic = 0; 920 u32 extended = 0; 921 u32 bits; 922 int running = 0; 923 924 switch (cmd) { 925 case SNDRV_PCM_TRIGGER_START: 926 case SNDRV_PCM_TRIGGER_RESUME: 927 running = 1; 928 break; 929 case SNDRV_PCM_TRIGGER_STOP: 930 case SNDRV_PCM_TRIGGER_SUSPEND: 931 default: 932 running = 0; 933 break; 934 } 935 snd_pcm_group_for_each_entry(s, substream) { 936 if (snd_pcm_substream_chip(s) != emu || 937 s->stream != SNDRV_PCM_STREAM_PLAYBACK) 938 continue; 939 runtime = s->runtime; 940 epcm = runtime->private_data; 941 channel = epcm->channel_id; 942 /* dev_dbg(emu->card->dev, "channel=%d\n", channel); */ 943 epcm->running = running; 944 basic |= (0x1 << channel); 945 extended |= (0x10 << channel); 946 snd_pcm_trigger_done(s, substream); 947 } 948 /* dev_dbg(emu->card->dev, "basic=0x%x, extended=0x%x\n",basic, extended); */ 949 950 switch (cmd) { 951 case SNDRV_PCM_TRIGGER_START: 952 case SNDRV_PCM_TRIGGER_RESUME: 953 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0); 954 bits |= extended; 955 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits); 956 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0); 957 bits |= basic; 958 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits); 959 break; 960 case SNDRV_PCM_TRIGGER_STOP: 961 case SNDRV_PCM_TRIGGER_SUSPEND: 962 bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0); 963 bits &= ~basic; 964 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits); 965 bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0); 966 bits &= ~extended; 967 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits); 968 break; 969 default: 970 result = -EINVAL; 971 break; 972 } 973 return result; 974 } 975 976 /* trigger_capture callback */ 977 static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream, 978 int cmd) 979 { 980 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream); 981 struct snd_pcm_runtime *runtime = substream->runtime; 982 struct snd_ca0106_pcm *epcm = runtime->private_data; 983 int channel = epcm->channel_id; 984 int result = 0; 985 986 switch (cmd) { 987 case SNDRV_PCM_TRIGGER_START: 988 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel)); 989 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel)); 990 epcm->running = 1; 991 break; 992 case SNDRV_PCM_TRIGGER_STOP: 993 snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel)); 994 snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel)); 995 epcm->running = 0; 996 break; 997 default: 998 result = -EINVAL; 999 break; 1000 } 1001 return result; 1002 } 1003 1004 /* pointer_playback callback */ 1005 static snd_pcm_uframes_t 1006 snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream) 1007 { 1008 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream); 1009 struct snd_pcm_runtime *runtime = substream->runtime; 1010 struct snd_ca0106_pcm *epcm = runtime->private_data; 1011 unsigned int ptr, prev_ptr; 1012 int channel = epcm->channel_id; 1013 int timeout = 10; 1014 1015 if (!epcm->running) 1016 return 0; 1017 1018 prev_ptr = -1; 1019 do { 1020 ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel); 1021 ptr = (ptr >> 3) * runtime->period_size; 1022 ptr += bytes_to_frames(runtime, 1023 snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel)); 1024 if (ptr >= runtime->buffer_size) 1025 ptr -= runtime->buffer_size; 1026 if (prev_ptr == ptr) 1027 return ptr; 1028 prev_ptr = ptr; 1029 } while (--timeout); 1030 dev_warn(emu->card->dev, "ca0106: unstable DMA pointer!\n"); 1031 return 0; 1032 } 1033 1034 /* pointer_capture callback */ 1035 static snd_pcm_uframes_t 1036 snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream) 1037 { 1038 struct snd_ca0106 *emu = snd_pcm_substream_chip(substream); 1039 struct snd_pcm_runtime *runtime = substream->runtime; 1040 struct snd_ca0106_pcm *epcm = runtime->private_data; 1041 snd_pcm_uframes_t ptr, ptr1, ptr2 = 0; 1042 int channel = epcm->channel_id; 1043 1044 if (!epcm->running) 1045 return 0; 1046 1047 ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel); 1048 ptr2 = bytes_to_frames(runtime, ptr1); 1049 ptr=ptr2; 1050 if (ptr >= runtime->buffer_size) 1051 ptr -= runtime->buffer_size; 1052 /* 1053 dev_dbg(emu->card->dev, "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, " 1054 "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n", 1055 ptr1, ptr2, ptr, (int)runtime->buffer_size, 1056 (int)runtime->period_size, (int)runtime->frame_bits, 1057 (int)runtime->rate); 1058 */ 1059 return ptr; 1060 } 1061 1062 /* operators */ 1063 static const struct snd_pcm_ops snd_ca0106_playback_front_ops = { 1064 .open = snd_ca0106_pcm_open_playback_front, 1065 .close = snd_ca0106_pcm_close_playback, 1066 .prepare = snd_ca0106_pcm_prepare_playback, 1067 .trigger = snd_ca0106_pcm_trigger_playback, 1068 .pointer = snd_ca0106_pcm_pointer_playback, 1069 }; 1070 1071 static const struct snd_pcm_ops snd_ca0106_capture_0_ops = { 1072 .open = snd_ca0106_pcm_open_0_capture, 1073 .close = snd_ca0106_pcm_close_capture, 1074 .prepare = snd_ca0106_pcm_prepare_capture, 1075 .trigger = snd_ca0106_pcm_trigger_capture, 1076 .pointer = snd_ca0106_pcm_pointer_capture, 1077 }; 1078 1079 static const struct snd_pcm_ops snd_ca0106_capture_1_ops = { 1080 .open = snd_ca0106_pcm_open_1_capture, 1081 .close = snd_ca0106_pcm_close_capture, 1082 .prepare = snd_ca0106_pcm_prepare_capture, 1083 .trigger = snd_ca0106_pcm_trigger_capture, 1084 .pointer = snd_ca0106_pcm_pointer_capture, 1085 }; 1086 1087 static const struct snd_pcm_ops snd_ca0106_capture_2_ops = { 1088 .open = snd_ca0106_pcm_open_2_capture, 1089 .close = snd_ca0106_pcm_close_capture, 1090 .prepare = snd_ca0106_pcm_prepare_capture, 1091 .trigger = snd_ca0106_pcm_trigger_capture, 1092 .pointer = snd_ca0106_pcm_pointer_capture, 1093 }; 1094 1095 static const struct snd_pcm_ops snd_ca0106_capture_3_ops = { 1096 .open = snd_ca0106_pcm_open_3_capture, 1097 .close = snd_ca0106_pcm_close_capture, 1098 .prepare = snd_ca0106_pcm_prepare_capture, 1099 .trigger = snd_ca0106_pcm_trigger_capture, 1100 .pointer = snd_ca0106_pcm_pointer_capture, 1101 }; 1102 1103 static const struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = { 1104 .open = snd_ca0106_pcm_open_playback_center_lfe, 1105 .close = snd_ca0106_pcm_close_playback, 1106 .prepare = snd_ca0106_pcm_prepare_playback, 1107 .trigger = snd_ca0106_pcm_trigger_playback, 1108 .pointer = snd_ca0106_pcm_pointer_playback, 1109 }; 1110 1111 static const struct snd_pcm_ops snd_ca0106_playback_unknown_ops = { 1112 .open = snd_ca0106_pcm_open_playback_unknown, 1113 .close = snd_ca0106_pcm_close_playback, 1114 .prepare = snd_ca0106_pcm_prepare_playback, 1115 .trigger = snd_ca0106_pcm_trigger_playback, 1116 .pointer = snd_ca0106_pcm_pointer_playback, 1117 }; 1118 1119 static const struct snd_pcm_ops snd_ca0106_playback_rear_ops = { 1120 .open = snd_ca0106_pcm_open_playback_rear, 1121 .close = snd_ca0106_pcm_close_playback, 1122 .prepare = snd_ca0106_pcm_prepare_playback, 1123 .trigger = snd_ca0106_pcm_trigger_playback, 1124 .pointer = snd_ca0106_pcm_pointer_playback, 1125 }; 1126 1127 1128 static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97, 1129 unsigned short reg) 1130 { 1131 struct snd_ca0106 *emu = ac97->private_data; 1132 1133 guard(spinlock_irqsave)(&emu->emu_lock); 1134 outb(reg, emu->port + CA0106_AC97ADDRESS); 1135 return inw(emu->port + CA0106_AC97DATA); 1136 } 1137 1138 static void snd_ca0106_ac97_write(struct snd_ac97 *ac97, 1139 unsigned short reg, unsigned short val) 1140 { 1141 struct snd_ca0106 *emu = ac97->private_data; 1142 1143 guard(spinlock_irqsave)(&emu->emu_lock); 1144 outb(reg, emu->port + CA0106_AC97ADDRESS); 1145 outw(val, emu->port + CA0106_AC97DATA); 1146 } 1147 1148 static int snd_ca0106_ac97(struct snd_ca0106 *chip) 1149 { 1150 struct snd_ac97_bus *pbus; 1151 struct snd_ac97_template ac97; 1152 int err; 1153 static const struct snd_ac97_bus_ops ops = { 1154 .write = snd_ca0106_ac97_write, 1155 .read = snd_ca0106_ac97_read, 1156 }; 1157 1158 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus); 1159 if (err < 0) 1160 return err; 1161 pbus->no_vra = 1; /* we don't need VRA */ 1162 1163 memset(&ac97, 0, sizeof(ac97)); 1164 ac97.private_data = chip; 1165 ac97.scaps = AC97_SCAP_NO_SPDIF; 1166 return snd_ac97_mixer(pbus, &ac97, &chip->ac97); 1167 } 1168 1169 static void ca0106_stop_chip(struct snd_ca0106 *chip); 1170 1171 static void snd_ca0106_free(struct snd_card *card) 1172 { 1173 struct snd_ca0106 *chip = card->private_data; 1174 1175 ca0106_stop_chip(chip); 1176 } 1177 1178 static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id) 1179 { 1180 unsigned int status; 1181 1182 struct snd_ca0106 *chip = dev_id; 1183 int i; 1184 int mask; 1185 unsigned int stat76; 1186 struct snd_ca0106_channel *pchannel; 1187 1188 status = inl(chip->port + CA0106_IPR); 1189 if (! status) 1190 return IRQ_NONE; 1191 1192 stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0); 1193 /* 1194 dev_dbg(emu->card->dev, "interrupt status = 0x%08x, stat76=0x%08x\n", 1195 status, stat76); 1196 dev_dbg(emu->card->dev, "ptr=0x%08x\n", 1197 snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0)); 1198 */ 1199 mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */ 1200 for(i = 0; i < 4; i++) { 1201 pchannel = &(chip->playback_channels[i]); 1202 if (stat76 & mask) { 1203 /* FIXME: Select the correct substream for period elapsed */ 1204 if(pchannel->use) { 1205 snd_pcm_period_elapsed(pchannel->epcm->substream); 1206 /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */ 1207 } 1208 } 1209 /* 1210 dev_dbg(emu->card->dev, "channel=%p\n", pchannel); 1211 dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number); 1212 */ 1213 mask <<= 1; 1214 } 1215 mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */ 1216 for(i = 0; i < 4; i++) { 1217 pchannel = &(chip->capture_channels[i]); 1218 if (stat76 & mask) { 1219 /* FIXME: Select the correct substream for period elapsed */ 1220 if(pchannel->use) { 1221 snd_pcm_period_elapsed(pchannel->epcm->substream); 1222 /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */ 1223 } 1224 } 1225 /* 1226 dev_dbg(emu->card->dev, "channel=%p\n", pchannel); 1227 dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number); 1228 */ 1229 mask <<= 1; 1230 } 1231 1232 snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76); 1233 1234 if (chip->midi.dev_id && 1235 (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) { 1236 if (chip->midi.interrupt) 1237 chip->midi.interrupt(&chip->midi, status); 1238 else 1239 chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable); 1240 } 1241 1242 // acknowledge the interrupt if necessary 1243 outl(status, chip->port + CA0106_IPR); 1244 1245 return IRQ_HANDLED; 1246 } 1247 1248 static const struct snd_pcm_chmap_elem surround_map[] = { 1249 { .channels = 2, 1250 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 1251 { } 1252 }; 1253 1254 static const struct snd_pcm_chmap_elem clfe_map[] = { 1255 { .channels = 2, 1256 .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } }, 1257 { } 1258 }; 1259 1260 static const struct snd_pcm_chmap_elem side_map[] = { 1261 { .channels = 2, 1262 .map = { SNDRV_CHMAP_SL, SNDRV_CHMAP_SR } }, 1263 { } 1264 }; 1265 1266 static int snd_ca0106_pcm(struct snd_ca0106 *emu, int device) 1267 { 1268 struct snd_pcm *pcm; 1269 struct snd_pcm_substream *substream; 1270 const struct snd_pcm_chmap_elem *map = NULL; 1271 int err; 1272 1273 err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm); 1274 if (err < 0) 1275 return err; 1276 1277 pcm->private_data = emu; 1278 1279 switch (device) { 1280 case 0: 1281 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops); 1282 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops); 1283 map = snd_pcm_std_chmaps; 1284 break; 1285 case 1: 1286 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops); 1287 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops); 1288 map = surround_map; 1289 break; 1290 case 2: 1291 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops); 1292 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops); 1293 map = clfe_map; 1294 break; 1295 case 3: 1296 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops); 1297 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops); 1298 map = side_map; 1299 break; 1300 } 1301 1302 pcm->info_flags = 0; 1303 strscpy(pcm->name, "CA0106"); 1304 1305 for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1306 substream; 1307 substream = substream->next) { 1308 snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV, 1309 &emu->pci->dev, 1310 64*1024, 64*1024); 1311 } 1312 1313 for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream; 1314 substream; 1315 substream = substream->next) { 1316 snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV, 1317 &emu->pci->dev, 1318 64*1024, 64*1024); 1319 } 1320 1321 err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2, 1322 1 << 2, NULL); 1323 if (err < 0) 1324 return err; 1325 1326 emu->pcm[device] = pcm; 1327 1328 return 0; 1329 } 1330 1331 #define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value)) 1332 static const unsigned int spi_dac_init[] = { 1333 SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */ 1334 SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB), 1335 SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT), 1336 SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24), 1337 SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB), 1338 SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB), 1339 SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB), 1340 SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB), 1341 SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB), 1342 SPI_REG(9, 0x00), 1343 SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT), 1344 SPI_REG(12, 0x00), 1345 SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB), 1346 SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE), 1347 SPI_REG(SPI_DACD4_REG, SPI_DACD4_BIT), 1348 }; 1349 1350 static const unsigned int i2c_adc_init[][2] = { 1351 { 0x17, 0x00 }, /* Reset */ 1352 { 0x07, 0x00 }, /* Timeout */ 1353 { 0x0b, 0x22 }, /* Interface control */ 1354 { 0x0c, 0x22 }, /* Master mode control */ 1355 { 0x0d, 0x08 }, /* Powerdown control */ 1356 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 1357 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 1358 { 0x10, 0x7b }, /* ALC Control 1 */ 1359 { 0x11, 0x00 }, /* ALC Control 2 */ 1360 { 0x12, 0x32 }, /* ALC Control 3 */ 1361 { 0x13, 0x00 }, /* Noise gate control */ 1362 { 0x14, 0xa6 }, /* Limiter control */ 1363 { 0x15, ADC_MUX_LINEIN }, /* ADC Mixer control */ 1364 }; 1365 1366 static void ca0106_init_chip(struct snd_ca0106 *chip, int resume) 1367 { 1368 int ch; 1369 unsigned int def_bits; 1370 1371 outl(0, chip->port + CA0106_INTE); 1372 1373 /* 1374 * Init to 0x02109204 : 1375 * Clock accuracy = 0 (1000ppm) 1376 * Sample Rate = 2 (48kHz) 1377 * Audio Channel = 1 (Left of 2) 1378 * Source Number = 0 (Unspecified) 1379 * Generation Status = 1 (Original for Cat Code 12) 1380 * Cat Code = 12 (Digital Signal Mixer) 1381 * Mode = 0 (Mode 0) 1382 * Emphasis = 0 (None) 1383 * CP = 1 (Copyright unasserted) 1384 * AN = 0 (Audio data) 1385 * P = 0 (Consumer) 1386 */ 1387 def_bits = 1388 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1389 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1390 SPCS_GENERATIONSTATUS | 0x00001200 | 1391 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1392 if (!resume) { 1393 chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits; 1394 chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits; 1395 chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits; 1396 chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits; 1397 } 1398 /* Only SPCS1 has been tested */ 1399 snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]); 1400 snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]); 1401 snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]); 1402 snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]); 1403 1404 snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000); 1405 snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000); 1406 1407 /* Write 0x8000 to AC97_REC_GAIN to mute it. */ 1408 outb(AC97_REC_GAIN, chip->port + CA0106_AC97ADDRESS); 1409 outw(0x8000, chip->port + CA0106_AC97DATA); 1410 #if 0 /* FIXME: what are these? */ 1411 snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006); 1412 snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006); 1413 snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006); 1414 snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006); 1415 #endif 1416 1417 /* OSS drivers set this. */ 1418 /* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */ 1419 1420 /* Analog or Digital output */ 1421 snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf); 1422 /* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers. 1423 * Use 0x000f0000 for surround71 1424 */ 1425 snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000); 1426 1427 chip->spdif_enable = 0; /* Set digital SPDIF output off */ 1428 /*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */ 1429 /*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */ 1430 1431 /* goes to 0x40c80000 when doing SPDIF IN/OUT */ 1432 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000); 1433 /* (Mute) CAPTURE feedback into PLAYBACK volume. 1434 * Only lower 16 bits matter. 1435 */ 1436 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff); 1437 /* SPDIF IN Volume */ 1438 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000); 1439 /* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */ 1440 snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000); 1441 1442 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410); 1443 snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676); 1444 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410); 1445 snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676); 1446 1447 for (ch = 0; ch < 4; ch++) { 1448 /* Only high 16 bits matter */ 1449 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030); 1450 snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030); 1451 #if 0 /* Mute */ 1452 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040); 1453 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040); 1454 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff); 1455 snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff); 1456 #endif 1457 } 1458 if (chip->details->i2c_adc == 1) { 1459 /* Select MIC, Line in, TAD in, AUX in */ 1460 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4); 1461 /* Default to CAPTURE_SOURCE to i2s in */ 1462 if (!resume) 1463 chip->capture_source = 3; 1464 } else if (chip->details->ac97 == 1) { 1465 /* Default to AC97 in */ 1466 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4); 1467 /* Default to CAPTURE_SOURCE to AC97 in */ 1468 if (!resume) 1469 chip->capture_source = 4; 1470 } else { 1471 /* Select MIC, Line in, TAD in, AUX in */ 1472 snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4); 1473 /* Default to Set CAPTURE_SOURCE to i2s in */ 1474 if (!resume) 1475 chip->capture_source = 3; 1476 } 1477 1478 if (chip->details->gpio_type == 2) { 1479 /* The SB0438 use GPIO differently. */ 1480 /* FIXME: Still need to find out what the other GPIO bits do. 1481 * E.g. For digital spdif out. 1482 */ 1483 outl(0x0, chip->port + CA0106_GPIO); 1484 /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */ 1485 outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */ 1486 } else if (chip->details->gpio_type == 1) { 1487 /* The SB0410 and SB0413 use GPIO differently. */ 1488 /* FIXME: Still need to find out what the other GPIO bits do. 1489 * E.g. For digital spdif out. 1490 */ 1491 outl(0x0, chip->port + CA0106_GPIO); 1492 /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */ 1493 outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */ 1494 } else { 1495 outl(0x0, chip->port + CA0106_GPIO); 1496 outl(0x005f03a3, chip->port + CA0106_GPIO); /* Analog */ 1497 /* outl(0x005f02a2, chip->port + CA0106_GPIO); */ /* SPDIF */ 1498 } 1499 snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */ 1500 1501 /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */ 1502 /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */ 1503 /* outl(0x00001409, chip->port + CA0106_HCFG); */ 1504 /* outl(0x00000009, chip->port + CA0106_HCFG); */ 1505 /* AC97 2.0, Enable outputs. */ 1506 outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port + CA0106_HCFG); 1507 1508 if (chip->details->i2c_adc == 1) { 1509 /* The SB0410 and SB0413 use I2C to control ADC. */ 1510 int size, n; 1511 1512 size = ARRAY_SIZE(i2c_adc_init); 1513 /* dev_dbg(emu->card->dev, "I2C:array size=0x%x\n", size); */ 1514 for (n = 0; n < size; n++) 1515 snd_ca0106_i2c_write(chip, i2c_adc_init[n][0], 1516 i2c_adc_init[n][1]); 1517 for (n = 0; n < 4; n++) { 1518 chip->i2c_capture_volume[n][0] = 0xcf; 1519 chip->i2c_capture_volume[n][1] = 0xcf; 1520 } 1521 chip->i2c_capture_source = 2; /* Line in */ 1522 /* Enable Line-in capture. MIC in currently untested. */ 1523 /* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */ 1524 } 1525 1526 if (chip->details->spi_dac) { 1527 /* The SB0570 use SPI to control DAC. */ 1528 int size, n; 1529 1530 size = ARRAY_SIZE(spi_dac_init); 1531 for (n = 0; n < size; n++) { 1532 int reg = spi_dac_init[n] >> SPI_REG_SHIFT; 1533 1534 snd_ca0106_spi_write(chip, spi_dac_init[n]); 1535 if (reg < ARRAY_SIZE(chip->spi_dac_reg)) 1536 chip->spi_dac_reg[reg] = spi_dac_init[n]; 1537 } 1538 1539 /* Enable front dac only */ 1540 snd_ca0106_pcm_power_dac(chip, PCM_FRONT_CHANNEL, 1); 1541 } 1542 } 1543 1544 static void ca0106_stop_chip(struct snd_ca0106 *chip) 1545 { 1546 /* disable interrupts */ 1547 snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0); 1548 outl(0, chip->port + CA0106_INTE); 1549 snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0); 1550 udelay(1000); 1551 /* disable audio */ 1552 /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */ 1553 outl(0, chip->port + CA0106_HCFG); 1554 /* FIXME: We need to stop and DMA transfers here. 1555 * But as I am not sure how yet, we cannot from the dma pages. 1556 * So we can fix: snd-malloc: Memory leak? pages not freed = 8 1557 */ 1558 } 1559 1560 static int snd_ca0106_create(int dev, struct snd_card *card, 1561 struct pci_dev *pci) 1562 { 1563 struct snd_ca0106 *chip = card->private_data; 1564 const struct snd_ca0106_details *c; 1565 int err; 1566 1567 err = pcim_enable_device(pci); 1568 if (err < 0) 1569 return err; 1570 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) { 1571 dev_err(card->dev, "error to set 32bit mask DMA\n"); 1572 return -ENXIO; 1573 } 1574 1575 chip->card = card; 1576 chip->pci = pci; 1577 chip->irq = -1; 1578 1579 spin_lock_init(&chip->emu_lock); 1580 1581 err = pcim_request_all_regions(pci, "snd_ca0106"); 1582 if (err < 0) 1583 return err; 1584 chip->port = pci_resource_start(pci, 0); 1585 1586 if (devm_request_irq(&pci->dev, pci->irq, snd_ca0106_interrupt, 1587 IRQF_SHARED, KBUILD_MODNAME, chip)) { 1588 dev_err(card->dev, "cannot grab irq\n"); 1589 return -EBUSY; 1590 } 1591 chip->irq = pci->irq; 1592 card->sync_irq = chip->irq; 1593 1594 /* This stores the periods table. */ 1595 chip->buffer = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 1024); 1596 if (!chip->buffer) 1597 return -ENOMEM; 1598 1599 pci_set_master(pci); 1600 /* read serial */ 1601 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial); 1602 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model); 1603 dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", 1604 chip->model, pci->revision, chip->serial); 1605 strscpy(card->driver, "CA0106"); 1606 strscpy(card->shortname, "CA0106"); 1607 1608 for (c = ca0106_chip_details; c->serial; c++) { 1609 if (subsystem[dev]) { 1610 if (c->serial == subsystem[dev]) 1611 break; 1612 } else if (c->serial == chip->serial) 1613 break; 1614 } 1615 chip->details = c; 1616 if (subsystem[dev]) { 1617 dev_info(card->dev, "Sound card name=%s, " 1618 "subsystem=0x%x. Forced to subsystem=0x%x\n", 1619 c->name, chip->serial, subsystem[dev]); 1620 } 1621 1622 sprintf(card->longname, "%s at 0x%lx irq %i", 1623 c->name, chip->port, chip->irq); 1624 1625 ca0106_init_chip(chip, 0); 1626 return 0; 1627 } 1628 1629 1630 static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr) 1631 { 1632 snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr); 1633 } 1634 1635 static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr) 1636 { 1637 snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr); 1638 } 1639 1640 static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx) 1641 { 1642 return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id), 1643 midi->port + idx, 0); 1644 } 1645 1646 static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx) 1647 { 1648 snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data); 1649 } 1650 1651 static struct snd_card *ca0106_dev_id_card(void *dev_id) 1652 { 1653 return ((struct snd_ca0106 *)dev_id)->card; 1654 } 1655 1656 static int ca0106_dev_id_port(void *dev_id) 1657 { 1658 return ((struct snd_ca0106 *)dev_id)->port; 1659 } 1660 1661 static int snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel) 1662 { 1663 struct snd_ca_midi *midi; 1664 char *name; 1665 int err; 1666 1667 if (channel == CA0106_MIDI_CHAN_B) { 1668 name = "CA0106 MPU-401 (UART) B"; 1669 midi = &chip->midi2; 1670 midi->tx_enable = INTE_MIDI_TX_B; 1671 midi->rx_enable = INTE_MIDI_RX_B; 1672 midi->ipr_tx = IPR_MIDI_TX_B; 1673 midi->ipr_rx = IPR_MIDI_RX_B; 1674 midi->port = MIDI_UART_B_DATA; 1675 } else { 1676 name = "CA0106 MPU-401 (UART)"; 1677 midi = &chip->midi; 1678 midi->tx_enable = INTE_MIDI_TX_A; 1679 midi->rx_enable = INTE_MIDI_TX_B; 1680 midi->ipr_tx = IPR_MIDI_TX_A; 1681 midi->ipr_rx = IPR_MIDI_RX_A; 1682 midi->port = MIDI_UART_A_DATA; 1683 } 1684 1685 midi->reset = CA0106_MPU401_RESET; 1686 midi->enter_uart = CA0106_MPU401_ENTER_UART; 1687 midi->ack = CA0106_MPU401_ACK; 1688 1689 midi->input_avail = CA0106_MIDI_INPUT_AVAIL; 1690 midi->output_ready = CA0106_MIDI_OUTPUT_READY; 1691 1692 midi->channel = channel; 1693 1694 midi->interrupt_enable = ca0106_midi_interrupt_enable; 1695 midi->interrupt_disable = ca0106_midi_interrupt_disable; 1696 1697 midi->read = ca0106_midi_read; 1698 midi->write = ca0106_midi_write; 1699 1700 midi->get_dev_id_card = ca0106_dev_id_card; 1701 midi->get_dev_id_port = ca0106_dev_id_port; 1702 1703 midi->dev_id = chip; 1704 1705 err = ca_midi_init(chip, midi, 0, name); 1706 if (err < 0) 1707 return err; 1708 1709 return 0; 1710 } 1711 1712 1713 static int __snd_ca0106_probe(struct pci_dev *pci, 1714 const struct pci_device_id *pci_id) 1715 { 1716 static int dev; 1717 struct snd_card *card; 1718 struct snd_ca0106 *chip; 1719 int i, err; 1720 1721 if (dev >= SNDRV_CARDS) 1722 return -ENODEV; 1723 if (!enable[dev]) { 1724 dev++; 1725 return -ENOENT; 1726 } 1727 1728 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 1729 sizeof(*chip), &card); 1730 if (err < 0) 1731 return err; 1732 chip = card->private_data; 1733 1734 err = snd_ca0106_create(dev, card, pci); 1735 if (err < 0) 1736 return err; 1737 card->private_free = snd_ca0106_free; 1738 1739 for (i = 0; i < 4; i++) { 1740 err = snd_ca0106_pcm(chip, i); 1741 if (err < 0) 1742 return err; 1743 } 1744 1745 if (chip->details->ac97 == 1) { 1746 /* The SB0410 and SB0413 do not have an AC97 chip. */ 1747 err = snd_ca0106_ac97(chip); 1748 if (err < 0) 1749 return err; 1750 } 1751 err = snd_ca0106_mixer(chip); 1752 if (err < 0) 1753 return err; 1754 1755 dev_dbg(card->dev, "probe for MIDI channel A ..."); 1756 err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A); 1757 if (err < 0) 1758 return err; 1759 dev_dbg(card->dev, " done.\n"); 1760 1761 #ifdef CONFIG_SND_PROC_FS 1762 snd_ca0106_proc_init(chip); 1763 #endif 1764 1765 err = snd_card_register(card); 1766 if (err < 0) 1767 return err; 1768 1769 pci_set_drvdata(pci, card); 1770 dev++; 1771 return 0; 1772 } 1773 1774 static int snd_ca0106_probe(struct pci_dev *pci, 1775 const struct pci_device_id *pci_id) 1776 { 1777 return snd_card_free_on_error(&pci->dev, __snd_ca0106_probe(pci, pci_id)); 1778 } 1779 1780 #ifdef CONFIG_PM_SLEEP 1781 static int snd_ca0106_suspend(struct device *dev) 1782 { 1783 struct snd_card *card = dev_get_drvdata(dev); 1784 struct snd_ca0106 *chip = card->private_data; 1785 1786 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1787 if (chip->details->ac97) 1788 snd_ac97_suspend(chip->ac97); 1789 snd_ca0106_mixer_suspend(chip); 1790 1791 ca0106_stop_chip(chip); 1792 return 0; 1793 } 1794 1795 static int snd_ca0106_resume(struct device *dev) 1796 { 1797 struct snd_card *card = dev_get_drvdata(dev); 1798 struct snd_ca0106 *chip = card->private_data; 1799 int i; 1800 1801 ca0106_init_chip(chip, 1); 1802 1803 if (chip->details->ac97) 1804 snd_ac97_resume(chip->ac97); 1805 snd_ca0106_mixer_resume(chip); 1806 if (chip->details->spi_dac) { 1807 for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++) 1808 snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]); 1809 } 1810 1811 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1812 return 0; 1813 } 1814 1815 static SIMPLE_DEV_PM_OPS(snd_ca0106_pm, snd_ca0106_suspend, snd_ca0106_resume); 1816 #define SND_CA0106_PM_OPS &snd_ca0106_pm 1817 #else 1818 #define SND_CA0106_PM_OPS NULL 1819 #endif 1820 1821 // PCI IDs 1822 static const struct pci_device_id snd_ca0106_ids[] = { 1823 { PCI_VDEVICE(CREATIVE, 0x0007), 0 }, /* Audigy LS or Live 24bit */ 1824 { 0, } 1825 }; 1826 MODULE_DEVICE_TABLE(pci, snd_ca0106_ids); 1827 1828 // pci_driver definition 1829 static struct pci_driver ca0106_driver = { 1830 .name = KBUILD_MODNAME, 1831 .id_table = snd_ca0106_ids, 1832 .probe = snd_ca0106_probe, 1833 .driver = { 1834 .pm = SND_CA0106_PM_OPS, 1835 }, 1836 }; 1837 1838 module_pci_driver(ca0106_driver); 1839