1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018 Exceet Electronics GmbH
4 * Copyright (C) 2018 Bootlin
5 *
6 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
7 */
8 #include <linux/dmaengine.h>
9 #include <linux/iopoll.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/spi/spi.h>
12 #include <linux/spi/spi-mem.h>
13 #include <linux/sched/task_stack.h>
14
15 #include "internals.h"
16
17 #define SPI_MEM_MAX_BUSWIDTH 8
18
19 /**
20 * spi_controller_dma_map_mem_op_data() - DMA-map the buffer attached to a
21 * memory operation
22 * @ctlr: the SPI controller requesting this dma_map()
23 * @op: the memory operation containing the buffer to map
24 * @sgt: a pointer to a non-initialized sg_table that will be filled by this
25 * function
26 *
27 * Some controllers might want to do DMA on the data buffer embedded in @op.
28 * This helper prepares everything for you and provides a ready-to-use
29 * sg_table. This function is not intended to be called from spi drivers.
30 * Only SPI controller drivers should use it.
31 * Note that the caller must ensure the memory region pointed by
32 * op->data.buf.{in,out} is DMA-able before calling this function.
33 *
34 * Return: 0 in case of success, a negative error code otherwise.
35 */
spi_controller_dma_map_mem_op_data(struct spi_controller * ctlr,const struct spi_mem_op * op,struct sg_table * sgt)36 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
37 const struct spi_mem_op *op,
38 struct sg_table *sgt)
39 {
40 struct device *dmadev;
41
42 if (!op->data.nbytes)
43 return -EINVAL;
44
45 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
46 dmadev = ctlr->dma_tx->device->dev;
47 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
48 dmadev = ctlr->dma_rx->device->dev;
49 else
50 dmadev = ctlr->dev.parent;
51
52 if (!dmadev)
53 return -EINVAL;
54
55 return spi_map_buf(ctlr, dmadev, sgt, op->data.buf.in, op->data.nbytes,
56 op->data.dir == SPI_MEM_DATA_IN ?
57 DMA_FROM_DEVICE : DMA_TO_DEVICE);
58 }
59 EXPORT_SYMBOL_GPL(spi_controller_dma_map_mem_op_data);
60
61 /**
62 * spi_controller_dma_unmap_mem_op_data() - DMA-unmap the buffer attached to a
63 * memory operation
64 * @ctlr: the SPI controller requesting this dma_unmap()
65 * @op: the memory operation containing the buffer to unmap
66 * @sgt: a pointer to an sg_table previously initialized by
67 * spi_controller_dma_map_mem_op_data()
68 *
69 * Some controllers might want to do DMA on the data buffer embedded in @op.
70 * This helper prepares things so that the CPU can access the
71 * op->data.buf.{in,out} buffer again.
72 *
73 * This function is not intended to be called from SPI drivers. Only SPI
74 * controller drivers should use it.
75 *
76 * This function should be called after the DMA operation has finished and is
77 * only valid if the previous spi_controller_dma_map_mem_op_data() call
78 * returned 0.
79 *
80 * Return: 0 in case of success, a negative error code otherwise.
81 */
spi_controller_dma_unmap_mem_op_data(struct spi_controller * ctlr,const struct spi_mem_op * op,struct sg_table * sgt)82 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
83 const struct spi_mem_op *op,
84 struct sg_table *sgt)
85 {
86 struct device *dmadev;
87
88 if (!op->data.nbytes)
89 return;
90
91 if (op->data.dir == SPI_MEM_DATA_OUT && ctlr->dma_tx)
92 dmadev = ctlr->dma_tx->device->dev;
93 else if (op->data.dir == SPI_MEM_DATA_IN && ctlr->dma_rx)
94 dmadev = ctlr->dma_rx->device->dev;
95 else
96 dmadev = ctlr->dev.parent;
97
98 spi_unmap_buf(ctlr, dmadev, sgt,
99 op->data.dir == SPI_MEM_DATA_IN ?
100 DMA_FROM_DEVICE : DMA_TO_DEVICE);
101 }
102 EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
103
spi_check_buswidth_req(struct spi_mem * mem,u8 buswidth,bool tx)104 static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
105 {
106 u32 mode = mem->spi->mode;
107
108 switch (buswidth) {
109 case 1:
110 return 0;
111
112 case 2:
113 if ((tx &&
114 (mode & (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL))) ||
115 (!tx &&
116 (mode & (SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL))))
117 return 0;
118
119 break;
120
121 case 4:
122 if ((tx && (mode & (SPI_TX_QUAD | SPI_TX_OCTAL))) ||
123 (!tx && (mode & (SPI_RX_QUAD | SPI_RX_OCTAL))))
124 return 0;
125
126 break;
127
128 case 8:
129 if ((tx && (mode & SPI_TX_OCTAL)) ||
130 (!tx && (mode & SPI_RX_OCTAL)))
131 return 0;
132
133 break;
134
135 default:
136 break;
137 }
138
139 return -ENOTSUPP;
140 }
141
spi_mem_check_buswidth(struct spi_mem * mem,const struct spi_mem_op * op)142 static bool spi_mem_check_buswidth(struct spi_mem *mem,
143 const struct spi_mem_op *op)
144 {
145 if (spi_check_buswidth_req(mem, op->cmd.buswidth, true))
146 return false;
147
148 if (op->addr.nbytes &&
149 spi_check_buswidth_req(mem, op->addr.buswidth, true))
150 return false;
151
152 if (op->dummy.nbytes &&
153 spi_check_buswidth_req(mem, op->dummy.buswidth, true))
154 return false;
155
156 if (op->data.dir != SPI_MEM_NO_DATA &&
157 spi_check_buswidth_req(mem, op->data.buswidth,
158 op->data.dir == SPI_MEM_DATA_OUT))
159 return false;
160
161 return true;
162 }
163
spi_mem_default_supports_op(struct spi_mem * mem,const struct spi_mem_op * op)164 bool spi_mem_default_supports_op(struct spi_mem *mem,
165 const struct spi_mem_op *op)
166 {
167 struct spi_controller *ctlr = mem->spi->controller;
168 bool op_is_dtr =
169 op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr;
170
171 if (op_is_dtr) {
172 if (!spi_mem_controller_is_capable(ctlr, dtr))
173 return false;
174
175 if (op->data.swap16 && !spi_mem_controller_is_capable(ctlr, swap16))
176 return false;
177
178 if (op->cmd.nbytes != 2)
179 return false;
180 } else {
181 if (op->cmd.nbytes != 1)
182 return false;
183 }
184
185 if (op->data.ecc) {
186 if (!spi_mem_controller_is_capable(ctlr, ecc))
187 return false;
188 }
189
190 if (op->max_freq && mem->spi->controller->min_speed_hz &&
191 op->max_freq < mem->spi->controller->min_speed_hz)
192 return false;
193
194 if (op->max_freq &&
195 op->max_freq < mem->spi->max_speed_hz) {
196 if (!spi_mem_controller_is_capable(ctlr, per_op_freq))
197 return false;
198 }
199
200 return spi_mem_check_buswidth(mem, op);
201 }
202 EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
203
spi_mem_buswidth_is_valid(u8 buswidth)204 static bool spi_mem_buswidth_is_valid(u8 buswidth)
205 {
206 if (hweight8(buswidth) > 1 || buswidth > SPI_MEM_MAX_BUSWIDTH)
207 return false;
208
209 return true;
210 }
211
spi_mem_check_op(const struct spi_mem_op * op)212 static int spi_mem_check_op(const struct spi_mem_op *op)
213 {
214 if (!op->cmd.buswidth || !op->cmd.nbytes)
215 return -EINVAL;
216
217 if ((op->addr.nbytes && !op->addr.buswidth) ||
218 (op->dummy.nbytes && !op->dummy.buswidth) ||
219 (op->data.nbytes && !op->data.buswidth))
220 return -EINVAL;
221
222 if (!spi_mem_buswidth_is_valid(op->cmd.buswidth) ||
223 !spi_mem_buswidth_is_valid(op->addr.buswidth) ||
224 !spi_mem_buswidth_is_valid(op->dummy.buswidth) ||
225 !spi_mem_buswidth_is_valid(op->data.buswidth))
226 return -EINVAL;
227
228 /* Buffers must be DMA-able. */
229 if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_IN &&
230 object_is_on_stack(op->data.buf.in)))
231 return -EINVAL;
232
233 if (WARN_ON_ONCE(op->data.dir == SPI_MEM_DATA_OUT &&
234 object_is_on_stack(op->data.buf.out)))
235 return -EINVAL;
236
237 return 0;
238 }
239
spi_mem_internal_supports_op(struct spi_mem * mem,const struct spi_mem_op * op)240 static bool spi_mem_internal_supports_op(struct spi_mem *mem,
241 const struct spi_mem_op *op)
242 {
243 struct spi_controller *ctlr = mem->spi->controller;
244
245 if (ctlr->mem_ops && ctlr->mem_ops->supports_op)
246 return ctlr->mem_ops->supports_op(mem, op);
247
248 return spi_mem_default_supports_op(mem, op);
249 }
250
251 /**
252 * spi_mem_supports_op() - Check if a memory device and the controller it is
253 * connected to support a specific memory operation
254 * @mem: the SPI memory
255 * @op: the memory operation to check
256 *
257 * Some controllers are only supporting Single or Dual IOs, others might only
258 * support specific opcodes, or it can even be that the controller and device
259 * both support Quad IOs but the hardware prevents you from using it because
260 * only 2 IO lines are connected.
261 *
262 * This function checks whether a specific operation is supported.
263 *
264 * Return: true if @op is supported, false otherwise.
265 */
spi_mem_supports_op(struct spi_mem * mem,const struct spi_mem_op * op)266 bool spi_mem_supports_op(struct spi_mem *mem, const struct spi_mem_op *op)
267 {
268 /* Make sure the operation frequency is correct before going futher */
269 spi_mem_adjust_op_freq(mem, (struct spi_mem_op *)op);
270
271 if (spi_mem_check_op(op))
272 return false;
273
274 return spi_mem_internal_supports_op(mem, op);
275 }
276 EXPORT_SYMBOL_GPL(spi_mem_supports_op);
277
spi_mem_access_start(struct spi_mem * mem)278 static int spi_mem_access_start(struct spi_mem *mem)
279 {
280 struct spi_controller *ctlr = mem->spi->controller;
281
282 /*
283 * Flush the message queue before executing our SPI memory
284 * operation to prevent preemption of regular SPI transfers.
285 */
286 spi_flush_queue(ctlr);
287
288 if (ctlr->auto_runtime_pm) {
289 int ret;
290
291 ret = pm_runtime_resume_and_get(ctlr->dev.parent);
292 if (ret < 0) {
293 dev_err(&ctlr->dev, "Failed to power device: %d\n",
294 ret);
295 return ret;
296 }
297 }
298
299 mutex_lock(&ctlr->bus_lock_mutex);
300 mutex_lock(&ctlr->io_mutex);
301
302 return 0;
303 }
304
spi_mem_access_end(struct spi_mem * mem)305 static void spi_mem_access_end(struct spi_mem *mem)
306 {
307 struct spi_controller *ctlr = mem->spi->controller;
308
309 mutex_unlock(&ctlr->io_mutex);
310 mutex_unlock(&ctlr->bus_lock_mutex);
311
312 if (ctlr->auto_runtime_pm)
313 pm_runtime_put(ctlr->dev.parent);
314 }
315
spi_mem_add_op_stats(struct spi_statistics __percpu * pcpu_stats,const struct spi_mem_op * op,int exec_op_ret)316 static void spi_mem_add_op_stats(struct spi_statistics __percpu *pcpu_stats,
317 const struct spi_mem_op *op, int exec_op_ret)
318 {
319 struct spi_statistics *stats;
320 u64 len, l2len;
321
322 get_cpu();
323 stats = this_cpu_ptr(pcpu_stats);
324 u64_stats_update_begin(&stats->syncp);
325
326 /*
327 * We do not have the concept of messages or transfers. Let's consider
328 * that one operation is equivalent to one message and one transfer.
329 */
330 u64_stats_inc(&stats->messages);
331 u64_stats_inc(&stats->transfers);
332
333 /* Use the sum of all lengths as bytes count and histogram value. */
334 len = op->cmd.nbytes + op->addr.nbytes;
335 len += op->dummy.nbytes + op->data.nbytes;
336 u64_stats_add(&stats->bytes, len);
337 l2len = min(fls(len), SPI_STATISTICS_HISTO_SIZE) - 1;
338 u64_stats_inc(&stats->transfer_bytes_histo[l2len]);
339
340 /* Only account for data bytes as transferred bytes. */
341 if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT)
342 u64_stats_add(&stats->bytes_tx, op->data.nbytes);
343 if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_IN)
344 u64_stats_add(&stats->bytes_rx, op->data.nbytes);
345
346 /*
347 * A timeout is not an error, following the same behavior as
348 * spi_transfer_one_message().
349 */
350 if (exec_op_ret == -ETIMEDOUT)
351 u64_stats_inc(&stats->timedout);
352 else if (exec_op_ret)
353 u64_stats_inc(&stats->errors);
354
355 u64_stats_update_end(&stats->syncp);
356 put_cpu();
357 }
358
359 /**
360 * spi_mem_exec_op() - Execute a memory operation
361 * @mem: the SPI memory
362 * @op: the memory operation to execute
363 *
364 * Executes a memory operation.
365 *
366 * This function first checks that @op is supported and then tries to execute
367 * it.
368 *
369 * Return: 0 in case of success, a negative error code otherwise.
370 */
spi_mem_exec_op(struct spi_mem * mem,const struct spi_mem_op * op)371 int spi_mem_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
372 {
373 unsigned int tmpbufsize, xferpos = 0, totalxferlen = 0;
374 struct spi_controller *ctlr = mem->spi->controller;
375 struct spi_transfer xfers[4] = { };
376 struct spi_message msg;
377 u8 *tmpbuf;
378 int ret;
379
380 /* Make sure the operation frequency is correct before going futher */
381 spi_mem_adjust_op_freq(mem, (struct spi_mem_op *)op);
382
383 dev_vdbg(&mem->spi->dev, "[cmd: 0x%02x][%dB addr: %#8llx][%2dB dummy][%4dB data %s] %d%c-%d%c-%d%c-%d%c @ %uHz\n",
384 op->cmd.opcode,
385 op->addr.nbytes, (op->addr.nbytes ? op->addr.val : 0),
386 op->dummy.nbytes,
387 op->data.nbytes, (op->data.nbytes ? (op->data.dir == SPI_MEM_DATA_IN ? " read" : "write") : " "),
388 op->cmd.buswidth, op->cmd.dtr ? 'D' : 'S',
389 op->addr.buswidth, op->addr.dtr ? 'D' : 'S',
390 op->dummy.buswidth, op->dummy.dtr ? 'D' : 'S',
391 op->data.buswidth, op->data.dtr ? 'D' : 'S',
392 op->max_freq ? op->max_freq : mem->spi->max_speed_hz);
393
394 ret = spi_mem_check_op(op);
395 if (ret)
396 return ret;
397
398 if (!spi_mem_internal_supports_op(mem, op))
399 return -EOPNOTSUPP;
400
401 if (ctlr->mem_ops && ctlr->mem_ops->exec_op && !spi_get_csgpiod(mem->spi, 0)) {
402 ret = spi_mem_access_start(mem);
403 if (ret)
404 return ret;
405
406 ret = ctlr->mem_ops->exec_op(mem, op);
407
408 spi_mem_access_end(mem);
409
410 /*
411 * Some controllers only optimize specific paths (typically the
412 * read path) and expect the core to use the regular SPI
413 * interface in other cases.
414 */
415 if (!ret || (ret != -ENOTSUPP && ret != -EOPNOTSUPP)) {
416 spi_mem_add_op_stats(ctlr->pcpu_statistics, op, ret);
417 spi_mem_add_op_stats(mem->spi->pcpu_statistics, op, ret);
418
419 return ret;
420 }
421 }
422
423 tmpbufsize = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
424
425 /*
426 * Allocate a buffer to transmit the CMD, ADDR cycles with kmalloc() so
427 * we're guaranteed that this buffer is DMA-able, as required by the
428 * SPI layer.
429 */
430 tmpbuf = kzalloc(tmpbufsize, GFP_KERNEL | GFP_DMA);
431 if (!tmpbuf)
432 return -ENOMEM;
433
434 spi_message_init(&msg);
435
436 tmpbuf[0] = op->cmd.opcode;
437 xfers[xferpos].tx_buf = tmpbuf;
438 xfers[xferpos].len = op->cmd.nbytes;
439 xfers[xferpos].tx_nbits = op->cmd.buswidth;
440 xfers[xferpos].speed_hz = op->max_freq;
441 spi_message_add_tail(&xfers[xferpos], &msg);
442 xferpos++;
443 totalxferlen++;
444
445 if (op->addr.nbytes) {
446 int i;
447
448 for (i = 0; i < op->addr.nbytes; i++)
449 tmpbuf[i + 1] = op->addr.val >>
450 (8 * (op->addr.nbytes - i - 1));
451
452 xfers[xferpos].tx_buf = tmpbuf + 1;
453 xfers[xferpos].len = op->addr.nbytes;
454 xfers[xferpos].tx_nbits = op->addr.buswidth;
455 xfers[xferpos].speed_hz = op->max_freq;
456 spi_message_add_tail(&xfers[xferpos], &msg);
457 xferpos++;
458 totalxferlen += op->addr.nbytes;
459 }
460
461 if (op->dummy.nbytes) {
462 memset(tmpbuf + op->addr.nbytes + 1, 0xff, op->dummy.nbytes);
463 xfers[xferpos].tx_buf = tmpbuf + op->addr.nbytes + 1;
464 xfers[xferpos].len = op->dummy.nbytes;
465 xfers[xferpos].tx_nbits = op->dummy.buswidth;
466 xfers[xferpos].dummy_data = 1;
467 xfers[xferpos].speed_hz = op->max_freq;
468 spi_message_add_tail(&xfers[xferpos], &msg);
469 xferpos++;
470 totalxferlen += op->dummy.nbytes;
471 }
472
473 if (op->data.nbytes) {
474 if (op->data.dir == SPI_MEM_DATA_IN) {
475 xfers[xferpos].rx_buf = op->data.buf.in;
476 xfers[xferpos].rx_nbits = op->data.buswidth;
477 } else {
478 xfers[xferpos].tx_buf = op->data.buf.out;
479 xfers[xferpos].tx_nbits = op->data.buswidth;
480 }
481
482 xfers[xferpos].len = op->data.nbytes;
483 xfers[xferpos].speed_hz = op->max_freq;
484 spi_message_add_tail(&xfers[xferpos], &msg);
485 xferpos++;
486 totalxferlen += op->data.nbytes;
487 }
488
489 ret = spi_sync(mem->spi, &msg);
490
491 kfree(tmpbuf);
492
493 if (ret)
494 return ret;
495
496 if (msg.actual_length != totalxferlen)
497 return -EIO;
498
499 return 0;
500 }
501 EXPORT_SYMBOL_GPL(spi_mem_exec_op);
502
503 /**
504 * spi_mem_get_name() - Return the SPI mem device name to be used by the
505 * upper layer if necessary
506 * @mem: the SPI memory
507 *
508 * This function allows SPI mem users to retrieve the SPI mem device name.
509 * It is useful if the upper layer needs to expose a custom name for
510 * compatibility reasons.
511 *
512 * Return: a string containing the name of the memory device to be used
513 * by the SPI mem user
514 */
spi_mem_get_name(struct spi_mem * mem)515 const char *spi_mem_get_name(struct spi_mem *mem)
516 {
517 return mem->name;
518 }
519 EXPORT_SYMBOL_GPL(spi_mem_get_name);
520
521 /**
522 * spi_mem_adjust_op_size() - Adjust the data size of a SPI mem operation to
523 * match controller limitations
524 * @mem: the SPI memory
525 * @op: the operation to adjust
526 *
527 * Some controllers have FIFO limitations and must split a data transfer
528 * operation into multiple ones, others require a specific alignment for
529 * optimized accesses. This function allows SPI mem drivers to split a single
530 * operation into multiple sub-operations when required.
531 *
532 * Return: a negative error code if the controller can't properly adjust @op,
533 * 0 otherwise. Note that @op->data.nbytes will be updated if @op
534 * can't be handled in a single step.
535 */
spi_mem_adjust_op_size(struct spi_mem * mem,struct spi_mem_op * op)536 int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
537 {
538 struct spi_controller *ctlr = mem->spi->controller;
539 size_t len;
540
541 if (ctlr->mem_ops && ctlr->mem_ops->adjust_op_size)
542 return ctlr->mem_ops->adjust_op_size(mem, op);
543
544 if (!ctlr->mem_ops || !ctlr->mem_ops->exec_op) {
545 len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
546
547 if (len > spi_max_transfer_size(mem->spi))
548 return -EINVAL;
549
550 op->data.nbytes = min3((size_t)op->data.nbytes,
551 spi_max_transfer_size(mem->spi),
552 spi_max_message_size(mem->spi) -
553 len);
554 if (!op->data.nbytes)
555 return -EINVAL;
556 }
557
558 return 0;
559 }
560 EXPORT_SYMBOL_GPL(spi_mem_adjust_op_size);
561
562 /**
563 * spi_mem_adjust_op_freq() - Adjust the frequency of a SPI mem operation to
564 * match controller, PCB and chip limitations
565 * @mem: the SPI memory
566 * @op: the operation to adjust
567 *
568 * Some chips have per-op frequency limitations and must adapt the maximum
569 * speed. This function allows SPI mem drivers to set @op->max_freq to the
570 * maximum supported value.
571 */
spi_mem_adjust_op_freq(struct spi_mem * mem,struct spi_mem_op * op)572 void spi_mem_adjust_op_freq(struct spi_mem *mem, struct spi_mem_op *op)
573 {
574 if (!op->max_freq || op->max_freq > mem->spi->max_speed_hz)
575 op->max_freq = mem->spi->max_speed_hz;
576 }
577 EXPORT_SYMBOL_GPL(spi_mem_adjust_op_freq);
578
579 /**
580 * spi_mem_calc_op_duration() - Derives the theoretical length (in ns) of an
581 * operation. This helps finding the best variant
582 * among a list of possible choices.
583 * @mem: the SPI memory
584 * @op: the operation to benchmark
585 *
586 * Some chips have per-op frequency limitations, PCBs usually have their own
587 * limitations as well, and controllers can support dual, quad or even octal
588 * modes, sometimes in DTR. All these combinations make it impossible to
589 * statically list the best combination for all situations. If we want something
590 * accurate, all these combinations should be rated (eg. with a time estimate)
591 * and the best pick should be taken based on these calculations.
592 *
593 * Returns a ns estimate for the time this op would take, except if no
594 * frequency limit has been set, in this case we return the number of
595 * cycles nevertheless to allow callers to distinguish which operation
596 * would be the fastest at iso-frequency.
597 */
spi_mem_calc_op_duration(struct spi_mem * mem,struct spi_mem_op * op)598 u64 spi_mem_calc_op_duration(struct spi_mem *mem, struct spi_mem_op *op)
599 {
600 u64 ncycles = 0;
601 u64 ps_per_cycles, duration;
602
603 spi_mem_adjust_op_freq(mem, op);
604
605 if (op->max_freq) {
606 ps_per_cycles = 1000000000000ULL;
607 do_div(ps_per_cycles, op->max_freq);
608 } else {
609 /* In this case, the unit is no longer a time unit */
610 ps_per_cycles = 1;
611 }
612
613 ncycles += ((op->cmd.nbytes * 8) / op->cmd.buswidth) / (op->cmd.dtr ? 2 : 1);
614 ncycles += ((op->addr.nbytes * 8) / op->addr.buswidth) / (op->addr.dtr ? 2 : 1);
615
616 /* Dummy bytes are optional for some SPI flash memory operations */
617 if (op->dummy.nbytes)
618 ncycles += ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1);
619
620 ncycles += ((op->data.nbytes * 8) / op->data.buswidth) / (op->data.dtr ? 2 : 1);
621
622 /* Derive the duration in ps */
623 duration = ncycles * ps_per_cycles;
624 /* Convert into ns */
625 do_div(duration, 1000);
626
627 return duration;
628 }
629 EXPORT_SYMBOL_GPL(spi_mem_calc_op_duration);
630
spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,void * buf)631 static ssize_t spi_mem_no_dirmap_read(struct spi_mem_dirmap_desc *desc,
632 u64 offs, size_t len, void *buf)
633 {
634 struct spi_mem_op op = desc->info.op_tmpl;
635 int ret;
636
637 op.addr.val = desc->info.offset + offs;
638 op.data.buf.in = buf;
639 op.data.nbytes = len;
640 ret = spi_mem_adjust_op_size(desc->mem, &op);
641 if (ret)
642 return ret;
643
644 ret = spi_mem_exec_op(desc->mem, &op);
645 if (ret)
646 return ret;
647
648 return op.data.nbytes;
649 }
650
spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,const void * buf)651 static ssize_t spi_mem_no_dirmap_write(struct spi_mem_dirmap_desc *desc,
652 u64 offs, size_t len, const void *buf)
653 {
654 struct spi_mem_op op = desc->info.op_tmpl;
655 int ret;
656
657 op.addr.val = desc->info.offset + offs;
658 op.data.buf.out = buf;
659 op.data.nbytes = len;
660 ret = spi_mem_adjust_op_size(desc->mem, &op);
661 if (ret)
662 return ret;
663
664 ret = spi_mem_exec_op(desc->mem, &op);
665 if (ret)
666 return ret;
667
668 return op.data.nbytes;
669 }
670
671 /**
672 * spi_mem_dirmap_create() - Create a direct mapping descriptor
673 * @mem: SPI mem device this direct mapping should be created for
674 * @info: direct mapping information
675 *
676 * This function is creating a direct mapping descriptor which can then be used
677 * to access the memory using spi_mem_dirmap_read() or spi_mem_dirmap_write().
678 * If the SPI controller driver does not support direct mapping, this function
679 * falls back to an implementation using spi_mem_exec_op(), so that the caller
680 * doesn't have to bother implementing a fallback on his own.
681 *
682 * Return: a valid pointer in case of success, and ERR_PTR() otherwise.
683 */
684 struct spi_mem_dirmap_desc *
spi_mem_dirmap_create(struct spi_mem * mem,const struct spi_mem_dirmap_info * info)685 spi_mem_dirmap_create(struct spi_mem *mem,
686 const struct spi_mem_dirmap_info *info)
687 {
688 struct spi_controller *ctlr = mem->spi->controller;
689 struct spi_mem_dirmap_desc *desc;
690 int ret = -ENOTSUPP;
691
692 /* Make sure the number of address cycles is between 1 and 8 bytes. */
693 if (!info->op_tmpl.addr.nbytes || info->op_tmpl.addr.nbytes > 8)
694 return ERR_PTR(-EINVAL);
695
696 /* data.dir should either be SPI_MEM_DATA_IN or SPI_MEM_DATA_OUT. */
697 if (info->op_tmpl.data.dir == SPI_MEM_NO_DATA)
698 return ERR_PTR(-EINVAL);
699
700 desc = kzalloc(sizeof(*desc), GFP_KERNEL);
701 if (!desc)
702 return ERR_PTR(-ENOMEM);
703
704 desc->mem = mem;
705 desc->info = *info;
706 if (ctlr->mem_ops && ctlr->mem_ops->dirmap_create)
707 ret = ctlr->mem_ops->dirmap_create(desc);
708
709 if (ret) {
710 desc->nodirmap = true;
711 if (!spi_mem_supports_op(desc->mem, &desc->info.op_tmpl))
712 ret = -EOPNOTSUPP;
713 else
714 ret = 0;
715 }
716
717 if (ret) {
718 kfree(desc);
719 return ERR_PTR(ret);
720 }
721
722 return desc;
723 }
724 EXPORT_SYMBOL_GPL(spi_mem_dirmap_create);
725
726 /**
727 * spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor
728 * @desc: the direct mapping descriptor to destroy
729 *
730 * This function destroys a direct mapping descriptor previously created by
731 * spi_mem_dirmap_create().
732 */
spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc * desc)733 void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc)
734 {
735 struct spi_controller *ctlr = desc->mem->spi->controller;
736
737 if (!desc->nodirmap && ctlr->mem_ops && ctlr->mem_ops->dirmap_destroy)
738 ctlr->mem_ops->dirmap_destroy(desc);
739
740 kfree(desc);
741 }
742 EXPORT_SYMBOL_GPL(spi_mem_dirmap_destroy);
743
devm_spi_mem_dirmap_release(struct device * dev,void * res)744 static void devm_spi_mem_dirmap_release(struct device *dev, void *res)
745 {
746 struct spi_mem_dirmap_desc *desc = *(struct spi_mem_dirmap_desc **)res;
747
748 spi_mem_dirmap_destroy(desc);
749 }
750
751 /**
752 * devm_spi_mem_dirmap_create() - Create a direct mapping descriptor and attach
753 * it to a device
754 * @dev: device the dirmap desc will be attached to
755 * @mem: SPI mem device this direct mapping should be created for
756 * @info: direct mapping information
757 *
758 * devm_ variant of the spi_mem_dirmap_create() function. See
759 * spi_mem_dirmap_create() for more details.
760 *
761 * Return: a valid pointer in case of success, and ERR_PTR() otherwise.
762 */
763 struct spi_mem_dirmap_desc *
devm_spi_mem_dirmap_create(struct device * dev,struct spi_mem * mem,const struct spi_mem_dirmap_info * info)764 devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem,
765 const struct spi_mem_dirmap_info *info)
766 {
767 struct spi_mem_dirmap_desc **ptr, *desc;
768
769 ptr = devres_alloc(devm_spi_mem_dirmap_release, sizeof(*ptr),
770 GFP_KERNEL);
771 if (!ptr)
772 return ERR_PTR(-ENOMEM);
773
774 desc = spi_mem_dirmap_create(mem, info);
775 if (IS_ERR(desc)) {
776 devres_free(ptr);
777 } else {
778 *ptr = desc;
779 devres_add(dev, ptr);
780 }
781
782 return desc;
783 }
784 EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_create);
785
devm_spi_mem_dirmap_match(struct device * dev,void * res,void * data)786 static int devm_spi_mem_dirmap_match(struct device *dev, void *res, void *data)
787 {
788 struct spi_mem_dirmap_desc **ptr = res;
789
790 if (WARN_ON(!ptr || !*ptr))
791 return 0;
792
793 return *ptr == data;
794 }
795
796 /**
797 * devm_spi_mem_dirmap_destroy() - Destroy a direct mapping descriptor attached
798 * to a device
799 * @dev: device the dirmap desc is attached to
800 * @desc: the direct mapping descriptor to destroy
801 *
802 * devm_ variant of the spi_mem_dirmap_destroy() function. See
803 * spi_mem_dirmap_destroy() for more details.
804 */
devm_spi_mem_dirmap_destroy(struct device * dev,struct spi_mem_dirmap_desc * desc)805 void devm_spi_mem_dirmap_destroy(struct device *dev,
806 struct spi_mem_dirmap_desc *desc)
807 {
808 devres_release(dev, devm_spi_mem_dirmap_release,
809 devm_spi_mem_dirmap_match, desc);
810 }
811 EXPORT_SYMBOL_GPL(devm_spi_mem_dirmap_destroy);
812
813 /**
814 * spi_mem_dirmap_read() - Read data through a direct mapping
815 * @desc: direct mapping descriptor
816 * @offs: offset to start reading from. Note that this is not an absolute
817 * offset, but the offset within the direct mapping which already has
818 * its own offset
819 * @len: length in bytes
820 * @buf: destination buffer. This buffer must be DMA-able
821 *
822 * This function reads data from a memory device using a direct mapping
823 * previously instantiated with spi_mem_dirmap_create().
824 *
825 * Return: the amount of data read from the memory device or a negative error
826 * code. Note that the returned size might be smaller than @len, and the caller
827 * is responsible for calling spi_mem_dirmap_read() again when that happens.
828 */
spi_mem_dirmap_read(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,void * buf)829 ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
830 u64 offs, size_t len, void *buf)
831 {
832 struct spi_controller *ctlr = desc->mem->spi->controller;
833 ssize_t ret;
834
835 if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_IN)
836 return -EINVAL;
837
838 if (!len)
839 return 0;
840
841 if (desc->nodirmap) {
842 ret = spi_mem_no_dirmap_read(desc, offs, len, buf);
843 } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_read) {
844 ret = spi_mem_access_start(desc->mem);
845 if (ret)
846 return ret;
847
848 ret = ctlr->mem_ops->dirmap_read(desc, offs, len, buf);
849
850 spi_mem_access_end(desc->mem);
851 } else {
852 ret = -ENOTSUPP;
853 }
854
855 return ret;
856 }
857 EXPORT_SYMBOL_GPL(spi_mem_dirmap_read);
858
859 /**
860 * spi_mem_dirmap_write() - Write data through a direct mapping
861 * @desc: direct mapping descriptor
862 * @offs: offset to start writing from. Note that this is not an absolute
863 * offset, but the offset within the direct mapping which already has
864 * its own offset
865 * @len: length in bytes
866 * @buf: source buffer. This buffer must be DMA-able
867 *
868 * This function writes data to a memory device using a direct mapping
869 * previously instantiated with spi_mem_dirmap_create().
870 *
871 * Return: the amount of data written to the memory device or a negative error
872 * code. Note that the returned size might be smaller than @len, and the caller
873 * is responsible for calling spi_mem_dirmap_write() again when that happens.
874 */
spi_mem_dirmap_write(struct spi_mem_dirmap_desc * desc,u64 offs,size_t len,const void * buf)875 ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
876 u64 offs, size_t len, const void *buf)
877 {
878 struct spi_controller *ctlr = desc->mem->spi->controller;
879 ssize_t ret;
880
881 if (desc->info.op_tmpl.data.dir != SPI_MEM_DATA_OUT)
882 return -EINVAL;
883
884 if (!len)
885 return 0;
886
887 if (desc->nodirmap) {
888 ret = spi_mem_no_dirmap_write(desc, offs, len, buf);
889 } else if (ctlr->mem_ops && ctlr->mem_ops->dirmap_write) {
890 ret = spi_mem_access_start(desc->mem);
891 if (ret)
892 return ret;
893
894 ret = ctlr->mem_ops->dirmap_write(desc, offs, len, buf);
895
896 spi_mem_access_end(desc->mem);
897 } else {
898 ret = -ENOTSUPP;
899 }
900
901 return ret;
902 }
903 EXPORT_SYMBOL_GPL(spi_mem_dirmap_write);
904
to_spi_mem_drv(struct device_driver * drv)905 static inline struct spi_mem_driver *to_spi_mem_drv(struct device_driver *drv)
906 {
907 return container_of(drv, struct spi_mem_driver, spidrv.driver);
908 }
909
spi_mem_read_status(struct spi_mem * mem,const struct spi_mem_op * op,u16 * status)910 static int spi_mem_read_status(struct spi_mem *mem,
911 const struct spi_mem_op *op,
912 u16 *status)
913 {
914 const u8 *bytes = (u8 *)op->data.buf.in;
915 int ret;
916
917 ret = spi_mem_exec_op(mem, op);
918 if (ret)
919 return ret;
920
921 if (op->data.nbytes > 1)
922 *status = ((u16)bytes[0] << 8) | bytes[1];
923 else
924 *status = bytes[0];
925
926 return 0;
927 }
928
929 /**
930 * spi_mem_poll_status() - Poll memory device status
931 * @mem: SPI memory device
932 * @op: the memory operation to execute
933 * @mask: status bitmask to ckeck
934 * @match: (status & mask) expected value
935 * @initial_delay_us: delay in us before starting to poll
936 * @polling_delay_us: time to sleep between reads in us
937 * @timeout_ms: timeout in milliseconds
938 *
939 * This function polls a status register and returns when
940 * (status & mask) == match or when the timeout has expired.
941 *
942 * Return: 0 in case of success, -ETIMEDOUT in case of error,
943 * -EOPNOTSUPP if not supported.
944 */
spi_mem_poll_status(struct spi_mem * mem,const struct spi_mem_op * op,u16 mask,u16 match,unsigned long initial_delay_us,unsigned long polling_delay_us,u16 timeout_ms)945 int spi_mem_poll_status(struct spi_mem *mem,
946 const struct spi_mem_op *op,
947 u16 mask, u16 match,
948 unsigned long initial_delay_us,
949 unsigned long polling_delay_us,
950 u16 timeout_ms)
951 {
952 struct spi_controller *ctlr = mem->spi->controller;
953 int ret = -EOPNOTSUPP;
954 int read_status_ret;
955 u16 status;
956
957 if (op->data.nbytes < 1 || op->data.nbytes > 2 ||
958 op->data.dir != SPI_MEM_DATA_IN)
959 return -EINVAL;
960
961 if (ctlr->mem_ops && ctlr->mem_ops->poll_status && !spi_get_csgpiod(mem->spi, 0)) {
962 ret = spi_mem_access_start(mem);
963 if (ret)
964 return ret;
965
966 ret = ctlr->mem_ops->poll_status(mem, op, mask, match,
967 initial_delay_us, polling_delay_us,
968 timeout_ms);
969
970 spi_mem_access_end(mem);
971 }
972
973 if (ret == -EOPNOTSUPP) {
974 if (!spi_mem_supports_op(mem, op))
975 return ret;
976
977 if (initial_delay_us < 10)
978 udelay(initial_delay_us);
979 else
980 usleep_range((initial_delay_us >> 2) + 1,
981 initial_delay_us);
982
983 ret = read_poll_timeout(spi_mem_read_status, read_status_ret,
984 (read_status_ret || ((status) & mask) == match),
985 polling_delay_us, timeout_ms * 1000, false, mem,
986 op, &status);
987 if (read_status_ret)
988 return read_status_ret;
989 }
990
991 return ret;
992 }
993 EXPORT_SYMBOL_GPL(spi_mem_poll_status);
994
spi_mem_probe(struct spi_device * spi)995 static int spi_mem_probe(struct spi_device *spi)
996 {
997 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
998 struct spi_controller *ctlr = spi->controller;
999 struct spi_mem *mem;
1000
1001 mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
1002 if (!mem)
1003 return -ENOMEM;
1004
1005 mem->spi = spi;
1006
1007 if (ctlr->mem_ops && ctlr->mem_ops->get_name)
1008 mem->name = ctlr->mem_ops->get_name(mem);
1009 else
1010 mem->name = dev_name(&spi->dev);
1011
1012 if (IS_ERR_OR_NULL(mem->name))
1013 return PTR_ERR_OR_ZERO(mem->name);
1014
1015 spi_set_drvdata(spi, mem);
1016
1017 return memdrv->probe(mem);
1018 }
1019
spi_mem_remove(struct spi_device * spi)1020 static void spi_mem_remove(struct spi_device *spi)
1021 {
1022 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
1023 struct spi_mem *mem = spi_get_drvdata(spi);
1024
1025 if (memdrv->remove)
1026 memdrv->remove(mem);
1027 }
1028
spi_mem_shutdown(struct spi_device * spi)1029 static void spi_mem_shutdown(struct spi_device *spi)
1030 {
1031 struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
1032 struct spi_mem *mem = spi_get_drvdata(spi);
1033
1034 if (memdrv->shutdown)
1035 memdrv->shutdown(mem);
1036 }
1037
1038 /**
1039 * spi_mem_driver_register_with_owner() - Register a SPI memory driver
1040 * @memdrv: the SPI memory driver to register
1041 * @owner: the owner of this driver
1042 *
1043 * Registers a SPI memory driver.
1044 *
1045 * Return: 0 in case of success, a negative error core otherwise.
1046 */
1047
spi_mem_driver_register_with_owner(struct spi_mem_driver * memdrv,struct module * owner)1048 int spi_mem_driver_register_with_owner(struct spi_mem_driver *memdrv,
1049 struct module *owner)
1050 {
1051 memdrv->spidrv.probe = spi_mem_probe;
1052 memdrv->spidrv.remove = spi_mem_remove;
1053 memdrv->spidrv.shutdown = spi_mem_shutdown;
1054
1055 return __spi_register_driver(owner, &memdrv->spidrv);
1056 }
1057 EXPORT_SYMBOL_GPL(spi_mem_driver_register_with_owner);
1058
1059 /**
1060 * spi_mem_driver_unregister() - Unregister a SPI memory driver
1061 * @memdrv: the SPI memory driver to unregister
1062 *
1063 * Unregisters a SPI memory driver.
1064 */
spi_mem_driver_unregister(struct spi_mem_driver * memdrv)1065 void spi_mem_driver_unregister(struct spi_mem_driver *memdrv)
1066 {
1067 spi_unregister_driver(&memdrv->spidrv);
1068 }
1069 EXPORT_SYMBOL_GPL(spi_mem_driver_unregister);
1070