xref: /linux/arch/powerpc/platforms/44x/ppc476.c (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * PowerPC 476FPE board specific routines
4  *
5  * Copyright © 2013 Tony Breeds IBM Corporation
6  * Copyright © 2013 Alistair Popple IBM Corporation
7  *
8  * Based on earlier code:
9  *    Matt Porter <mporter@kernel.crashing.org>
10  *    Copyright 2002-2005 MontaVista Software Inc.
11  *
12  *    Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
13  *    Copyright (c) 2003-2005 Zultys Technologies
14  *
15  *    Rewritten and ported to the merged powerpc tree:
16  *    Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
17  *    Copyright © 2011 David Kliekamp IBM Corporation
18  */
19 
20 #include <linux/init.h>
21 #include <linux/of.h>
22 #include <linux/of_address.h>
23 #include <linux/of_platform.h>
24 #include <linux/rtc.h>
25 
26 #include <asm/machdep.h>
27 #include <asm/udbg.h>
28 #include <asm/time.h>
29 #include <asm/uic.h>
30 #include <asm/ppc4xx.h>
31 #include <asm/mpic.h>
32 #include <asm/mmu.h>
33 #include <asm/swiotlb.h>
34 
35 #include <linux/pci.h>
36 #include <linux/i2c.h>
37 
38 static const struct of_device_id ppc47x_of_bus[] __initconst = {
39 	{ .compatible = "ibm,plb4", },
40 	{ .compatible = "ibm,plb6", },
41 	{ .compatible = "ibm,opb", },
42 	{ .compatible = "ibm,ebc", },
43 	{},
44 };
45 
46 /* The EEPROM is missing and the default values are bogus.  This forces USB in
47  * to EHCI mode */
quirk_ppc_currituck_usb_fixup(struct pci_dev * dev)48 static void quirk_ppc_currituck_usb_fixup(struct pci_dev *dev)
49 {
50 	if (of_machine_is_compatible("ibm,currituck")) {
51 		pci_write_config_dword(dev, 0xe0, 0x0114231f);
52 		pci_write_config_dword(dev, 0xe4, 0x00006c40);
53 	}
54 }
55 DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup);
56 
57 /* Akebono has an AVR microcontroller attached to the I2C bus
58  * which is used to power off/reset the system. */
59 
60 /* AVR I2C Commands */
61 #define AVR_PWRCTL_CMD (0x26)
62 
63 /* Flags for the power control I2C commands */
64 #define AVR_PWRCTL_PWROFF (0x01)
65 #define AVR_PWRCTL_RESET (0x02)
66 
67 static struct i2c_client *avr_i2c_client;
avr_halt_system(int pwrctl_flags)68 static void __noreturn avr_halt_system(int pwrctl_flags)
69 {
70 	/* Request the AVR to reset the system */
71 	i2c_smbus_write_byte_data(avr_i2c_client,
72 				  AVR_PWRCTL_CMD, pwrctl_flags);
73 
74 	/* Wait for system to be reset */
75 	while (1)
76 		;
77 }
78 
avr_power_off_system(void)79 static void avr_power_off_system(void)
80 {
81 	avr_halt_system(AVR_PWRCTL_PWROFF);
82 }
83 
avr_reset_system(char * cmd)84 static void __noreturn avr_reset_system(char *cmd)
85 {
86 	avr_halt_system(AVR_PWRCTL_RESET);
87 }
88 
avr_probe(struct i2c_client * client)89 static int avr_probe(struct i2c_client *client)
90 {
91 	avr_i2c_client = client;
92 	ppc_md.restart = avr_reset_system;
93 	pm_power_off = avr_power_off_system;
94 	return 0;
95 }
96 
97 static const struct i2c_device_id avr_id[] = {
98 	{ "akebono-avr" },
99 	{ }
100 };
101 
102 static struct i2c_driver avr_driver = {
103 	.driver = {
104 		.name = "akebono-avr",
105 	},
106 	.probe = avr_probe,
107 	.id_table = avr_id,
108 };
109 
ppc47x_device_probe(void)110 static int __init ppc47x_device_probe(void)
111 {
112 	i2c_add_driver(&avr_driver);
113 	of_platform_bus_probe(NULL, ppc47x_of_bus, NULL);
114 
115 	return 0;
116 }
117 machine_device_initcall(ppc47x_akebono, ppc47x_device_probe);
118 machine_device_initcall(ppc47x_currituck, ppc47x_device_probe);
119 
ppc47x_init_irq(void)120 static void __init ppc47x_init_irq(void)
121 {
122 	struct device_node *np;
123 
124 	/* Find top level interrupt controller */
125 	for_each_node_with_property(np, "interrupt-controller") {
126 		if (!of_property_present(np, "interrupts"))
127 			break;
128 	}
129 	if (np == NULL)
130 		panic("Can't find top level interrupt controller");
131 
132 	/* Check type and do appropriate initialization */
133 	if (of_device_is_compatible(np, "chrp,open-pic")) {
134 		/* The MPIC driver will get everything it needs from the
135 		 * device-tree, just pass 0 to all arguments
136 		 */
137 		struct mpic *mpic =
138 			mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC     ");
139 		BUG_ON(mpic == NULL);
140 		mpic_init(mpic);
141 		ppc_md.get_irq = mpic_get_irq;
142 	} else
143 		panic("Unrecognized top level interrupt controller");
144 
145 	of_node_put(np);
146 }
147 
148 #ifdef CONFIG_SMP
smp_ppc47x_setup_cpu(int cpu)149 static void smp_ppc47x_setup_cpu(int cpu)
150 {
151 	mpic_setup_this_cpu();
152 }
153 
smp_ppc47x_kick_cpu(int cpu)154 static int smp_ppc47x_kick_cpu(int cpu)
155 {
156 	struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
157 	const u64 *spin_table_addr_prop;
158 	u32 *spin_table;
159 	extern void start_secondary_47x(void);
160 
161 	BUG_ON(cpunode == NULL);
162 
163 	/* Assume spin table. We could test for the enable-method in
164 	 * the device-tree but currently there's little point as it's
165 	 * our only supported method
166 	 */
167 	spin_table_addr_prop =
168 		of_get_property(cpunode, "cpu-release-addr", NULL);
169 
170 	if (spin_table_addr_prop == NULL) {
171 		pr_err("CPU%d: Can't start, missing cpu-release-addr !\n",
172 		       cpu);
173 		return 1;
174 	}
175 
176 	/* Assume it's mapped as part of the linear mapping. This is a bit
177 	 * fishy but will work fine for now
178 	 *
179 	 * XXX: Is there any reason to assume differently?
180 	 */
181 	spin_table = (u32 *)__va(*spin_table_addr_prop);
182 	pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
183 
184 	spin_table[3] = cpu;
185 	smp_wmb();
186 	spin_table[1] = __pa(start_secondary_47x);
187 	mb();
188 
189 	return 0;
190 }
191 
192 static struct smp_ops_t ppc47x_smp_ops = {
193 	.probe		= smp_mpic_probe,
194 	.message_pass	= smp_mpic_message_pass,
195 	.setup_cpu	= smp_ppc47x_setup_cpu,
196 	.kick_cpu	= smp_ppc47x_kick_cpu,
197 	.give_timebase	= smp_generic_give_timebase,
198 	.take_timebase	= smp_generic_take_timebase,
199 };
200 
ppc47x_smp_init(void)201 static void __init ppc47x_smp_init(void)
202 {
203 	if (mmu_has_feature(MMU_FTR_TYPE_47x))
204 		smp_ops = &ppc47x_smp_ops;
205 }
206 
207 #else /* CONFIG_SMP */
ppc47x_smp_init(void)208 static void __init ppc47x_smp_init(void) { }
209 #endif /* CONFIG_SMP */
210 
ppc47x_setup_arch(void)211 static void __init ppc47x_setup_arch(void)
212 {
213 
214 	/* No need to check the DMA config as we /know/ our windows are all of
215 	 * RAM.  Lets hope that doesn't change */
216 	swiotlb_detect_4g();
217 
218 	ppc47x_smp_init();
219 }
220 
221 static int board_rev = -1;
ppc47x_get_board_rev(void)222 static int __init ppc47x_get_board_rev(void)
223 {
224 	int reg;
225 	u8 __iomem *fpga;
226 	struct device_node *np = NULL;
227 
228 	if (of_machine_is_compatible("ibm,currituck")) {
229 		np = of_find_compatible_node(NULL, NULL, "ibm,currituck-fpga");
230 		reg = 0;
231 	} else if (of_machine_is_compatible("ibm,akebono")) {
232 		np = of_find_compatible_node(NULL, NULL, "ibm,akebono-fpga");
233 		reg = 2;
234 	}
235 
236 	if (!np)
237 		goto fail;
238 
239 	fpga = of_iomap(np, 0);
240 	of_node_put(np);
241 	if (!fpga)
242 		goto fail;
243 
244 	board_rev = ioread8(fpga + reg) & 0x03;
245 	pr_info("%s: Found board revision %d\n", __func__, board_rev);
246 	iounmap(fpga);
247 	return 0;
248 
249 fail:
250 	pr_info("%s: Unable to find board revision\n", __func__);
251 	return 0;
252 }
253 machine_arch_initcall(ppc47x_akebono, ppc47x_get_board_rev);
254 machine_arch_initcall(ppc47x_currituck, ppc47x_get_board_rev);
255 
256 /* Use USB controller should have been hardware swizzled but it wasn't :( */
ppc47x_pci_irq_fixup(struct pci_dev * dev)257 static void ppc47x_pci_irq_fixup(struct pci_dev *dev)
258 {
259 	if (dev->vendor == 0x1033 && (dev->device == 0x0035 ||
260 				      dev->device == 0x00e0)) {
261 		if (board_rev == 0) {
262 			dev->irq = irq_create_mapping(NULL, 47);
263 			pr_info("%s: Mapping irq %d\n", __func__, dev->irq);
264 		} else if (board_rev == 2) {
265 			dev->irq = irq_create_mapping(NULL, 49);
266 			pr_info("%s: Mapping irq %d\n", __func__, dev->irq);
267 		} else {
268 			pr_alert("%s: Unknown board revision\n", __func__);
269 		}
270 	}
271 }
272 
define_machine(ppc47x_akebono)273 define_machine(ppc47x_akebono) {
274 	.name			= "PowerPC 47x (akebono)",
275 	.compatible		= "ibm,akebono",
276 	.progress		= udbg_progress,
277 	.init_IRQ		= ppc47x_init_irq,
278 	.setup_arch		= ppc47x_setup_arch,
279 	.restart		= ppc4xx_reset_system,
280 };
281 
define_machine(ppc47x_currituck)282 define_machine(ppc47x_currituck) {
283 	.name			= "PowerPC 47x (currituck)",
284 	.compatible		= "ibm,currituck",
285 	.progress		= udbg_progress,
286 	.init_IRQ		= ppc47x_init_irq,
287 	.pci_irq_fixup		= ppc47x_pci_irq_fixup,
288 	.setup_arch		= ppc47x_setup_arch,
289 	.restart		= ppc4xx_reset_system,
290 };
291