1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2022-2023 Linaro Ltd. 4 */ 5 6 #include <linux/gpio/driver.h> 7 #include <linux/module.h> 8 #include <linux/platform_device.h> 9 #include <linux/pm_clock.h> 10 #include <linux/pm_runtime.h> 11 12 #include "pinctrl-lpass-lpi.h" 13 14 enum lpass_lpi_functions { 15 LPI_MUX_dmic1_clk, 16 LPI_MUX_dmic1_data, 17 LPI_MUX_dmic2_clk, 18 LPI_MUX_dmic2_data, 19 LPI_MUX_dmic3_clk, 20 LPI_MUX_dmic3_data, 21 LPI_MUX_dmic4_clk, 22 LPI_MUX_dmic4_data, 23 LPI_MUX_i2s0_clk, 24 LPI_MUX_i2s0_data, 25 LPI_MUX_i2s0_ws, 26 LPI_MUX_i2s1_clk, 27 LPI_MUX_i2s1_data, 28 LPI_MUX_i2s1_ws, 29 LPI_MUX_i2s2_clk, 30 LPI_MUX_i2s2_data, 31 LPI_MUX_i2s2_ws, 32 LPI_MUX_i2s3_clk, 33 LPI_MUX_i2s3_data, 34 LPI_MUX_i2s3_ws, 35 LPI_MUX_i2s4_clk, 36 LPI_MUX_i2s4_data, 37 LPI_MUX_i2s4_ws, 38 LPI_MUX_qca_swr_clk, 39 LPI_MUX_qca_swr_data, 40 LPI_MUX_slimbus_clk, 41 LPI_MUX_slimbus_data, 42 LPI_MUX_swr_rx_clk, 43 LPI_MUX_swr_rx_data, 44 LPI_MUX_swr_tx_clk, 45 LPI_MUX_swr_tx_data, 46 LPI_MUX_wsa_swr_clk, 47 LPI_MUX_wsa_swr_data, 48 LPI_MUX_wsa2_swr_clk, 49 LPI_MUX_wsa2_swr_data, 50 LPI_MUX_ext_mclk1_a, 51 LPI_MUX_ext_mclk1_b, 52 LPI_MUX_ext_mclk1_c, 53 LPI_MUX_ext_mclk1_d, 54 LPI_MUX_ext_mclk1_e, 55 LPI_MUX_gpio, 56 LPI_MUX__, 57 }; 58 59 static const struct pinctrl_pin_desc sm8650_lpi_pins[] = { 60 PINCTRL_PIN(0, "gpio0"), 61 PINCTRL_PIN(1, "gpio1"), 62 PINCTRL_PIN(2, "gpio2"), 63 PINCTRL_PIN(3, "gpio3"), 64 PINCTRL_PIN(4, "gpio4"), 65 PINCTRL_PIN(5, "gpio5"), 66 PINCTRL_PIN(6, "gpio6"), 67 PINCTRL_PIN(7, "gpio7"), 68 PINCTRL_PIN(8, "gpio8"), 69 PINCTRL_PIN(9, "gpio9"), 70 PINCTRL_PIN(10, "gpio10"), 71 PINCTRL_PIN(11, "gpio11"), 72 PINCTRL_PIN(12, "gpio12"), 73 PINCTRL_PIN(13, "gpio13"), 74 PINCTRL_PIN(14, "gpio14"), 75 PINCTRL_PIN(15, "gpio15"), 76 PINCTRL_PIN(16, "gpio16"), 77 PINCTRL_PIN(17, "gpio17"), 78 PINCTRL_PIN(18, "gpio18"), 79 PINCTRL_PIN(19, "gpio19"), 80 PINCTRL_PIN(20, "gpio20"), 81 PINCTRL_PIN(21, "gpio21"), 82 PINCTRL_PIN(22, "gpio22"), 83 }; 84 85 static const char * const gpio_groups[] = { 86 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", 87 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", 88 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", 89 "gpio22", 90 }; 91 92 static const char * const dmic1_clk_groups[] = { "gpio6" }; 93 static const char * const dmic1_data_groups[] = { "gpio7" }; 94 static const char * const dmic2_clk_groups[] = { "gpio8" }; 95 static const char * const dmic2_data_groups[] = { "gpio9" }; 96 static const char * const dmic3_clk_groups[] = { "gpio12" }; 97 static const char * const dmic3_data_groups[] = { "gpio13" }; 98 static const char * const dmic4_clk_groups[] = { "gpio17" }; 99 static const char * const dmic4_data_groups[] = { "gpio18" }; 100 static const char * const i2s0_clk_groups[] = { "gpio0" }; 101 static const char * const i2s0_ws_groups[] = { "gpio1" }; 102 static const char * const i2s0_data_groups[] = { "gpio2", "gpio3", "gpio4", "gpio5" }; 103 static const char * const i2s1_clk_groups[] = { "gpio6" }; 104 static const char * const i2s1_ws_groups[] = { "gpio7" }; 105 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" }; 106 static const char * const i2s2_clk_groups[] = { "gpio10" }; 107 static const char * const i2s2_ws_groups[] = { "gpio11" }; 108 static const char * const i2s2_data_groups[] = { "gpio15", "gpio16" }; 109 static const char * const i2s3_clk_groups[] = { "gpio12" }; 110 static const char * const i2s3_ws_groups[] = { "gpio13" }; 111 static const char * const i2s3_data_groups[] = { "gpio17", "gpio18" }; 112 static const char * const i2s4_clk_groups[] = { "gpio19"}; 113 static const char * const i2s4_ws_groups[] = { "gpio20"}; 114 static const char * const i2s4_data_groups[] = { "gpio21", "gpio22"}; 115 static const char * const qca_swr_clk_groups[] = { "gpio19" }; 116 static const char * const qca_swr_data_groups[] = { "gpio20" }; 117 static const char * const slimbus_clk_groups[] = { "gpio19"}; 118 static const char * const slimbus_data_groups[] = { "gpio20"}; 119 static const char * const swr_tx_clk_groups[] = { "gpio0" }; 120 static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio14" }; 121 static const char * const swr_rx_clk_groups[] = { "gpio3" }; 122 static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5", "gpio15" }; 123 static const char * const wsa_swr_clk_groups[] = { "gpio10" }; 124 static const char * const wsa_swr_data_groups[] = { "gpio11" }; 125 static const char * const wsa2_swr_clk_groups[] = { "gpio15" }; 126 static const char * const wsa2_swr_data_groups[] = { "gpio16" }; 127 static const char * const ext_mclk1_c_groups[] = { "gpio5" }; 128 static const char * const ext_mclk1_b_groups[] = { "gpio9" }; 129 static const char * const ext_mclk1_a_groups[] = { "gpio13" }; 130 static const char * const ext_mclk1_d_groups[] = { "gpio14" }; 131 static const char * const ext_mclk1_e_groups[] = { "gpio22" }; 132 133 static const struct lpi_pingroup sm8650_groups[] = { 134 LPI_PINGROUP(0, 11, swr_tx_clk, i2s0_clk, _, _), 135 LPI_PINGROUP(1, 11, swr_tx_data, i2s0_ws, _, _), 136 LPI_PINGROUP(2, 11, swr_tx_data, i2s0_data, _, _), 137 LPI_PINGROUP(3, 11, swr_rx_clk, i2s0_data, _, _), 138 LPI_PINGROUP(4, 11, swr_rx_data, i2s0_data, _, _), 139 LPI_PINGROUP(5, 11, swr_rx_data, ext_mclk1_c, i2s0_data, _), 140 LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _, _), 141 LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _), 142 LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _), 143 LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, ext_mclk1_b, _), 144 LPI_PINGROUP(10, 11, i2s2_clk, wsa_swr_clk, _, _), 145 LPI_PINGROUP(11, 11, i2s2_ws, wsa_swr_data, _, _), 146 LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s3_clk, _, _), 147 LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s3_ws, ext_mclk1_a, _), 148 LPI_PINGROUP(14, 11, swr_tx_data, ext_mclk1_d, _, _), 149 LPI_PINGROUP(15, 11, i2s2_data, wsa2_swr_clk, _, _), 150 LPI_PINGROUP(16, 11, i2s2_data, wsa2_swr_data, _, _), 151 LPI_PINGROUP(17, LPI_NO_SLEW, dmic4_clk, i2s3_data, _, _), 152 LPI_PINGROUP(18, LPI_NO_SLEW, dmic4_data, i2s3_data, _, _), 153 LPI_PINGROUP(19, 11, i2s4_clk, slimbus_clk, qca_swr_clk, _), 154 LPI_PINGROUP(20, 11, i2s4_ws, slimbus_data, qca_swr_data, _), 155 LPI_PINGROUP(21, LPI_NO_SLEW, i2s4_data, _, _, _), 156 LPI_PINGROUP(22, LPI_NO_SLEW, i2s4_data, ext_mclk1_e, _, _), 157 }; 158 159 static const struct lpi_function sm8650_functions[] = { 160 LPI_FUNCTION(gpio), 161 LPI_FUNCTION(dmic1_clk), 162 LPI_FUNCTION(dmic1_data), 163 LPI_FUNCTION(dmic2_clk), 164 LPI_FUNCTION(dmic2_data), 165 LPI_FUNCTION(dmic3_clk), 166 LPI_FUNCTION(dmic3_data), 167 LPI_FUNCTION(dmic4_clk), 168 LPI_FUNCTION(dmic4_data), 169 LPI_FUNCTION(i2s0_clk), 170 LPI_FUNCTION(i2s0_data), 171 LPI_FUNCTION(i2s0_ws), 172 LPI_FUNCTION(i2s1_clk), 173 LPI_FUNCTION(i2s1_data), 174 LPI_FUNCTION(i2s1_ws), 175 LPI_FUNCTION(i2s2_clk), 176 LPI_FUNCTION(i2s2_data), 177 LPI_FUNCTION(i2s2_ws), 178 LPI_FUNCTION(i2s3_clk), 179 LPI_FUNCTION(i2s3_data), 180 LPI_FUNCTION(i2s3_ws), 181 LPI_FUNCTION(i2s4_clk), 182 LPI_FUNCTION(i2s4_data), 183 LPI_FUNCTION(i2s4_ws), 184 LPI_FUNCTION(qca_swr_clk), 185 LPI_FUNCTION(qca_swr_data), 186 LPI_FUNCTION(slimbus_clk), 187 LPI_FUNCTION(slimbus_data), 188 LPI_FUNCTION(swr_rx_clk), 189 LPI_FUNCTION(swr_rx_data), 190 LPI_FUNCTION(swr_tx_clk), 191 LPI_FUNCTION(swr_tx_data), 192 LPI_FUNCTION(wsa_swr_clk), 193 LPI_FUNCTION(wsa_swr_data), 194 LPI_FUNCTION(wsa2_swr_clk), 195 LPI_FUNCTION(wsa2_swr_data), 196 LPI_FUNCTION(ext_mclk1_a), 197 LPI_FUNCTION(ext_mclk1_b), 198 LPI_FUNCTION(ext_mclk1_c), 199 LPI_FUNCTION(ext_mclk1_d), 200 LPI_FUNCTION(ext_mclk1_e), 201 }; 202 203 static const struct lpi_pinctrl_variant_data sm8650_lpi_data = { 204 .pins = sm8650_lpi_pins, 205 .npins = ARRAY_SIZE(sm8650_lpi_pins), 206 .groups = sm8650_groups, 207 .ngroups = ARRAY_SIZE(sm8650_groups), 208 .functions = sm8650_functions, 209 .nfunctions = ARRAY_SIZE(sm8650_functions), 210 .flags = LPI_FLAG_SLEW_RATE_SAME_REG, 211 }; 212 213 static const struct of_device_id lpi_pinctrl_of_match[] = { 214 { 215 .compatible = "qcom,sm8650-lpass-lpi-pinctrl", 216 .data = &sm8650_lpi_data, 217 }, 218 { } 219 }; 220 MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); 221 222 static const struct dev_pm_ops lpi_pinctrl_pm_ops = { 223 RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL) 224 }; 225 226 static struct platform_driver lpi_pinctrl_driver = { 227 .driver = { 228 .name = "qcom-sm8650-lpass-lpi-pinctrl", 229 .of_match_table = lpi_pinctrl_of_match, 230 .pm = pm_ptr(&lpi_pinctrl_pm_ops), 231 }, 232 .probe = lpi_pinctrl_probe, 233 .remove = lpi_pinctrl_remove, 234 }; 235 236 module_platform_driver(lpi_pinctrl_driver); 237 MODULE_DESCRIPTION("Qualcomm SM8650 LPI GPIO pin control driver"); 238 MODULE_LICENSE("GPL"); 239