1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020, 2023 Linaro Ltd. 5 */ 6 7 #include <linux/gpio/driver.h> 8 #include <linux/module.h> 9 #include <linux/platform_device.h> 10 #include <linux/pm_clock.h> 11 #include <linux/pm_runtime.h> 12 13 #include "pinctrl-lpass-lpi.h" 14 15 enum lpass_lpi_functions { 16 LPI_MUX_dmic01_clk, 17 LPI_MUX_dmic01_data, 18 LPI_MUX_dmic23_clk, 19 LPI_MUX_dmic23_data, 20 LPI_MUX_i2s1_clk, 21 LPI_MUX_i2s1_data, 22 LPI_MUX_i2s1_ws, 23 LPI_MUX_i2s2_clk, 24 LPI_MUX_i2s2_data, 25 LPI_MUX_i2s2_ws, 26 LPI_MUX_i2s3_clk, 27 LPI_MUX_i2s3_data, 28 LPI_MUX_i2s3_ws, 29 LPI_MUX_qua_mi2s_data, 30 LPI_MUX_qua_mi2s_sclk, 31 LPI_MUX_qua_mi2s_ws, 32 LPI_MUX_swr_rx_clk, 33 LPI_MUX_swr_rx_data, 34 LPI_MUX_swr_tx_clk, 35 LPI_MUX_swr_tx_data, 36 LPI_MUX_wsa_mclk, 37 LPI_MUX_gpio, 38 LPI_MUX__, 39 }; 40 41 static const struct pinctrl_pin_desc sm6115_lpi_pins[] = { 42 PINCTRL_PIN(0, "gpio0"), 43 PINCTRL_PIN(1, "gpio1"), 44 PINCTRL_PIN(2, "gpio2"), 45 PINCTRL_PIN(3, "gpio3"), 46 PINCTRL_PIN(4, "gpio4"), 47 PINCTRL_PIN(5, "gpio5"), 48 PINCTRL_PIN(6, "gpio6"), 49 PINCTRL_PIN(7, "gpio7"), 50 PINCTRL_PIN(8, "gpio8"), 51 PINCTRL_PIN(9, "gpio9"), 52 PINCTRL_PIN(10, "gpio10"), 53 PINCTRL_PIN(11, "gpio11"), 54 PINCTRL_PIN(12, "gpio12"), 55 PINCTRL_PIN(13, "gpio13"), 56 PINCTRL_PIN(14, "gpio14"), 57 PINCTRL_PIN(15, "gpio15"), 58 PINCTRL_PIN(16, "gpio16"), 59 PINCTRL_PIN(17, "gpio17"), 60 PINCTRL_PIN(18, "gpio18"), 61 }; 62 63 static const char * const dmic01_clk_groups[] = { "gpio6" }; 64 static const char * const dmic01_data_groups[] = { "gpio7" }; 65 static const char * const dmic23_clk_groups[] = { "gpio8" }; 66 static const char * const dmic23_data_groups[] = { "gpio9" }; 67 static const char * const i2s1_clk_groups[] = { "gpio6" }; 68 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" }; 69 static const char * const i2s1_ws_groups[] = { "gpio7" }; 70 static const char * const i2s2_clk_groups[] = { "gpio10" }; 71 static const char * const i2s2_data_groups[] = { "gpio12", "gpio13" }; 72 static const char * const i2s2_ws_groups[] = { "gpio11" }; 73 static const char * const i2s3_clk_groups[] = { "gpio14" }; 74 static const char * const i2s3_data_groups[] = { "gpio16", "gpio17" }; 75 static const char * const i2s3_ws_groups[] = { "gpio15" }; 76 static const char * const qua_mi2s_data_groups[] = { "gpio2", "gpio3", "gpio4", "gpio5" }; 77 static const char * const qua_mi2s_sclk_groups[] = { "gpio0" }; 78 static const char * const qua_mi2s_ws_groups[] = { "gpio1" }; 79 static const char * const swr_rx_clk_groups[] = { "gpio3" }; 80 static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" }; 81 static const char * const swr_tx_clk_groups[] = { "gpio0" }; 82 static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2" }; 83 static const char * const wsa_mclk_groups[] = { "gpio18" }; 84 85 static const struct lpi_pingroup sm6115_groups[] = { 86 LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), 87 LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _), 88 LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _), 89 LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _), 90 LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _), 91 LPI_PINGROUP(5, 12, swr_rx_data, _, qua_mi2s_data, _), 92 LPI_PINGROUP(6, LPI_NO_SLEW, dmic01_clk, i2s1_clk, _, _), 93 LPI_PINGROUP(7, LPI_NO_SLEW, dmic01_data, i2s1_ws, _, _), 94 LPI_PINGROUP(8, LPI_NO_SLEW, dmic23_clk, i2s1_data, _, _), 95 LPI_PINGROUP(9, LPI_NO_SLEW, dmic23_data, i2s1_data, _, _), 96 LPI_PINGROUP(10, LPI_NO_SLEW, i2s2_clk, _, _, _), 97 LPI_PINGROUP(11, LPI_NO_SLEW, i2s2_ws, _, _, _), 98 LPI_PINGROUP(12, LPI_NO_SLEW, _, i2s2_data, _, _), 99 LPI_PINGROUP(13, LPI_NO_SLEW, _, i2s2_data, _, _), 100 LPI_PINGROUP(14, LPI_NO_SLEW, i2s3_clk, _, _, _), 101 LPI_PINGROUP(15, LPI_NO_SLEW, i2s3_ws, _, _, _), 102 LPI_PINGROUP(16, LPI_NO_SLEW, i2s3_data, _, _, _), 103 LPI_PINGROUP(17, LPI_NO_SLEW, i2s3_data, _, _, _), 104 LPI_PINGROUP(18, 14, wsa_mclk, _, _, _), 105 }; 106 107 static const struct lpi_function sm6115_functions[] = { 108 LPI_FUNCTION(dmic01_clk), 109 LPI_FUNCTION(dmic01_data), 110 LPI_FUNCTION(dmic23_clk), 111 LPI_FUNCTION(dmic23_data), 112 LPI_FUNCTION(i2s1_clk), 113 LPI_FUNCTION(i2s1_data), 114 LPI_FUNCTION(i2s1_ws), 115 LPI_FUNCTION(i2s2_clk), 116 LPI_FUNCTION(i2s2_data), 117 LPI_FUNCTION(i2s2_ws), 118 LPI_FUNCTION(i2s3_clk), 119 LPI_FUNCTION(i2s3_data), 120 LPI_FUNCTION(i2s3_ws), 121 LPI_FUNCTION(qua_mi2s_data), 122 LPI_FUNCTION(qua_mi2s_sclk), 123 LPI_FUNCTION(qua_mi2s_ws), 124 LPI_FUNCTION(swr_rx_clk), 125 LPI_FUNCTION(swr_rx_data), 126 LPI_FUNCTION(swr_tx_clk), 127 LPI_FUNCTION(swr_tx_data), 128 LPI_FUNCTION(wsa_mclk), 129 }; 130 131 static const struct lpi_pinctrl_variant_data sm6115_lpi_data = { 132 .pins = sm6115_lpi_pins, 133 .npins = ARRAY_SIZE(sm6115_lpi_pins), 134 .groups = sm6115_groups, 135 .ngroups = ARRAY_SIZE(sm6115_groups), 136 .functions = sm6115_functions, 137 .nfunctions = ARRAY_SIZE(sm6115_functions), 138 }; 139 140 static const struct of_device_id lpi_pinctrl_of_match[] = { 141 { .compatible = "qcom,sm6115-lpass-lpi-pinctrl", .data = &sm6115_lpi_data }, 142 { } 143 }; 144 MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match); 145 146 static const struct dev_pm_ops lpi_pinctrl_pm_ops = { 147 RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL) 148 }; 149 150 static struct platform_driver lpi_pinctrl_driver = { 151 .driver = { 152 .name = "qcom-sm6115-lpass-lpi-pinctrl", 153 .of_match_table = lpi_pinctrl_of_match, 154 .pm = pm_ptr(&lpi_pinctrl_pm_ops), 155 }, 156 .probe = lpi_pinctrl_probe, 157 .remove = lpi_pinctrl_remove, 158 }; 159 160 module_platform_driver(lpi_pinctrl_driver); 161 MODULE_DESCRIPTION("QTI SM6115 LPI GPIO pin control driver"); 162 MODULE_LICENSE("GPL"); 163