1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AD7266/65 SPI ADC driver
4 *
5 * Copyright 2012 Analog Devices Inc.
6 */
7
8 #include <linux/device.h>
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/spi/spi.h>
12 #include <linux/regulator/consumer.h>
13 #include <linux/err.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/module.h>
16
17 #include <linux/interrupt.h>
18
19 #include <linux/iio/iio.h>
20 #include <linux/iio/buffer.h>
21 #include <linux/iio/trigger_consumer.h>
22 #include <linux/iio/triggered_buffer.h>
23
24 #include <linux/platform_data/ad7266.h>
25
26 #define AD7266_INTERNAL_REF_MV 2500
27
28 struct ad7266_state {
29 struct spi_device *spi;
30 unsigned long vref_mv;
31
32 struct spi_transfer single_xfer[3];
33 struct spi_message single_msg;
34
35 enum ad7266_range range;
36 enum ad7266_mode mode;
37 bool fixed_addr;
38 struct gpio_desc *gpios[3];
39
40 /*
41 * DMA (thus cache coherency maintenance) may require the
42 * transfer buffers to live in their own cache lines.
43 * The buffer needs to be large enough to hold two samples (4 bytes) and
44 * the naturally aligned timestamp (8 bytes).
45 */
46 struct {
47 __be16 sample[2];
48 aligned_s64 timestamp;
49 } data __aligned(IIO_DMA_MINALIGN);
50 };
51
ad7266_wakeup(struct ad7266_state * st)52 static int ad7266_wakeup(struct ad7266_state *st)
53 {
54 /* Any read with >= 2 bytes will wake the device */
55 return spi_read(st->spi, &st->data.sample[0], 2);
56 }
57
ad7266_powerdown(struct ad7266_state * st)58 static int ad7266_powerdown(struct ad7266_state *st)
59 {
60 /* Any read with < 2 bytes will powerdown the device */
61 return spi_read(st->spi, &st->data.sample[0], 1);
62 }
63
ad7266_preenable(struct iio_dev * indio_dev)64 static int ad7266_preenable(struct iio_dev *indio_dev)
65 {
66 struct ad7266_state *st = iio_priv(indio_dev);
67 return ad7266_wakeup(st);
68 }
69
ad7266_postdisable(struct iio_dev * indio_dev)70 static int ad7266_postdisable(struct iio_dev *indio_dev)
71 {
72 struct ad7266_state *st = iio_priv(indio_dev);
73 return ad7266_powerdown(st);
74 }
75
76 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
77 .preenable = &ad7266_preenable,
78 .postdisable = &ad7266_postdisable,
79 };
80
ad7266_trigger_handler(int irq,void * p)81 static irqreturn_t ad7266_trigger_handler(int irq, void *p)
82 {
83 struct iio_poll_func *pf = p;
84 struct iio_dev *indio_dev = pf->indio_dev;
85 struct ad7266_state *st = iio_priv(indio_dev);
86 int ret;
87
88 ret = spi_read(st->spi, st->data.sample, 4);
89 if (ret == 0)
90 iio_push_to_buffers_with_ts(indio_dev, &st->data, sizeof(st->data),
91 pf->timestamp);
92
93 iio_trigger_notify_done(indio_dev->trig);
94
95 return IRQ_HANDLED;
96 }
97
ad7266_select_input(struct ad7266_state * st,unsigned int nr)98 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
99 {
100 unsigned int i;
101
102 if (st->fixed_addr)
103 return;
104
105 switch (st->mode) {
106 case AD7266_MODE_SINGLE_ENDED:
107 nr >>= 1;
108 break;
109 case AD7266_MODE_PSEUDO_DIFF:
110 nr |= 1;
111 break;
112 case AD7266_MODE_DIFF:
113 nr &= ~1;
114 break;
115 }
116
117 for (i = 0; i < 3; ++i)
118 gpiod_set_value(st->gpios[i], (bool)(nr & BIT(i)));
119 }
120
ad7266_update_scan_mode(struct iio_dev * indio_dev,const unsigned long * scan_mask)121 static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
122 const unsigned long *scan_mask)
123 {
124 struct ad7266_state *st = iio_priv(indio_dev);
125 unsigned int nr = find_first_bit(scan_mask,
126 iio_get_masklength(indio_dev));
127
128 ad7266_select_input(st, nr);
129
130 return 0;
131 }
132
ad7266_read_single(struct ad7266_state * st,int * val,unsigned int address)133 static int ad7266_read_single(struct ad7266_state *st, int *val,
134 unsigned int address)
135 {
136 int ret;
137
138 ad7266_select_input(st, address);
139
140 ret = spi_sync(st->spi, &st->single_msg);
141 *val = be16_to_cpu(st->data.sample[address % 2]);
142
143 return ret;
144 }
145
ad7266_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)146 static int ad7266_read_raw(struct iio_dev *indio_dev,
147 struct iio_chan_spec const *chan, int *val, int *val2, long m)
148 {
149 struct ad7266_state *st = iio_priv(indio_dev);
150 unsigned long scale_mv;
151 int ret;
152
153 switch (m) {
154 case IIO_CHAN_INFO_RAW:
155 if (!iio_device_claim_direct(indio_dev))
156 return -EBUSY;
157 ret = ad7266_read_single(st, val, chan->address);
158 iio_device_release_direct(indio_dev);
159
160 if (ret < 0)
161 return ret;
162 *val = (*val >> 2) & 0xfff;
163 if (chan->scan_type.sign == 's')
164 *val = sign_extend32(*val,
165 chan->scan_type.realbits - 1);
166
167 return IIO_VAL_INT;
168 case IIO_CHAN_INFO_SCALE:
169 scale_mv = st->vref_mv;
170 if (st->mode == AD7266_MODE_DIFF)
171 scale_mv *= 2;
172 if (st->range == AD7266_RANGE_2VREF)
173 scale_mv *= 2;
174
175 *val = scale_mv;
176 *val2 = chan->scan_type.realbits;
177 return IIO_VAL_FRACTIONAL_LOG2;
178 case IIO_CHAN_INFO_OFFSET:
179 if (st->range == AD7266_RANGE_2VREF &&
180 st->mode != AD7266_MODE_DIFF)
181 *val = 2048;
182 else
183 *val = 0;
184 return IIO_VAL_INT;
185 }
186 return -EINVAL;
187 }
188
189 #define AD7266_CHAN(_chan, _sign) { \
190 .type = IIO_VOLTAGE, \
191 .indexed = 1, \
192 .channel = (_chan), \
193 .address = (_chan), \
194 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
195 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
196 | BIT(IIO_CHAN_INFO_OFFSET), \
197 .scan_index = (_chan), \
198 .scan_type = { \
199 .sign = (_sign), \
200 .realbits = 12, \
201 .storagebits = 16, \
202 .shift = 2, \
203 .endianness = IIO_BE, \
204 }, \
205 }
206
207 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
208 const struct iio_chan_spec ad7266_channels_##_name[] = { \
209 AD7266_CHAN(0, (_sign)), \
210 AD7266_CHAN(1, (_sign)), \
211 AD7266_CHAN(2, (_sign)), \
212 AD7266_CHAN(3, (_sign)), \
213 AD7266_CHAN(4, (_sign)), \
214 AD7266_CHAN(5, (_sign)), \
215 AD7266_CHAN(6, (_sign)), \
216 AD7266_CHAN(7, (_sign)), \
217 AD7266_CHAN(8, (_sign)), \
218 AD7266_CHAN(9, (_sign)), \
219 AD7266_CHAN(10, (_sign)), \
220 AD7266_CHAN(11, (_sign)), \
221 IIO_CHAN_SOFT_TIMESTAMP(13), \
222 }
223
224 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
225 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
226 AD7266_CHAN(0, (_sign)), \
227 AD7266_CHAN(1, (_sign)), \
228 IIO_CHAN_SOFT_TIMESTAMP(2), \
229 }
230
231 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
232 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
233 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
234 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
235
236 #define AD7266_CHAN_DIFF(_chan, _sign) { \
237 .type = IIO_VOLTAGE, \
238 .indexed = 1, \
239 .channel = (_chan) * 2, \
240 .channel2 = (_chan) * 2 + 1, \
241 .address = (_chan), \
242 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
243 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
244 | BIT(IIO_CHAN_INFO_OFFSET), \
245 .scan_index = (_chan), \
246 .scan_type = { \
247 .sign = _sign, \
248 .realbits = 12, \
249 .storagebits = 16, \
250 .shift = 2, \
251 .endianness = IIO_BE, \
252 }, \
253 .differential = 1, \
254 }
255
256 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
257 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
258 AD7266_CHAN_DIFF(0, (_sign)), \
259 AD7266_CHAN_DIFF(1, (_sign)), \
260 AD7266_CHAN_DIFF(2, (_sign)), \
261 AD7266_CHAN_DIFF(3, (_sign)), \
262 AD7266_CHAN_DIFF(4, (_sign)), \
263 AD7266_CHAN_DIFF(5, (_sign)), \
264 IIO_CHAN_SOFT_TIMESTAMP(6), \
265 }
266
267 static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
268 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
269
270 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
271 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
272 AD7266_CHAN_DIFF(0, (_sign)), \
273 AD7266_CHAN_DIFF(1, (_sign)), \
274 IIO_CHAN_SOFT_TIMESTAMP(2), \
275 }
276
277 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
278 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
279
280 static const struct iio_info ad7266_info = {
281 .read_raw = &ad7266_read_raw,
282 .update_scan_mode = &ad7266_update_scan_mode,
283 };
284
285 static const unsigned long ad7266_available_scan_masks[] = {
286 0x003,
287 0x00c,
288 0x030,
289 0x0c0,
290 0x300,
291 0xc00,
292 0x000,
293 };
294
295 static const unsigned long ad7266_available_scan_masks_diff[] = {
296 0x003,
297 0x00c,
298 0x030,
299 0x000,
300 };
301
302 static const unsigned long ad7266_available_scan_masks_fixed[] = {
303 0x003,
304 0x000,
305 };
306
307 struct ad7266_chan_info {
308 const struct iio_chan_spec *channels;
309 unsigned int num_channels;
310 const unsigned long *scan_masks;
311 };
312
313 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
314 (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
315
316 static const struct ad7266_chan_info ad7266_chan_infos[] = {
317 [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
318 .channels = ad7266_channels_u,
319 .num_channels = ARRAY_SIZE(ad7266_channels_u),
320 .scan_masks = ad7266_available_scan_masks,
321 },
322 [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
323 .channels = ad7266_channels_u_fixed,
324 .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
325 .scan_masks = ad7266_available_scan_masks_fixed,
326 },
327 [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
328 .channels = ad7266_channels_s,
329 .num_channels = ARRAY_SIZE(ad7266_channels_s),
330 .scan_masks = ad7266_available_scan_masks,
331 },
332 [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
333 .channels = ad7266_channels_s_fixed,
334 .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
335 .scan_masks = ad7266_available_scan_masks_fixed,
336 },
337 [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
338 .channels = ad7266_channels_diff_u,
339 .num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
340 .scan_masks = ad7266_available_scan_masks_diff,
341 },
342 [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
343 .channels = ad7266_channels_diff_fixed_u,
344 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
345 .scan_masks = ad7266_available_scan_masks_fixed,
346 },
347 [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
348 .channels = ad7266_channels_diff_s,
349 .num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
350 .scan_masks = ad7266_available_scan_masks_diff,
351 },
352 [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
353 .channels = ad7266_channels_diff_fixed_s,
354 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
355 .scan_masks = ad7266_available_scan_masks_fixed,
356 },
357 };
358
ad7266_init_channels(struct iio_dev * indio_dev)359 static void ad7266_init_channels(struct iio_dev *indio_dev)
360 {
361 struct ad7266_state *st = iio_priv(indio_dev);
362 bool is_differential, is_signed;
363 const struct ad7266_chan_info *chan_info;
364 int i;
365
366 is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
367 is_signed = (st->range == AD7266_RANGE_2VREF) |
368 (st->mode == AD7266_MODE_DIFF);
369
370 i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
371 chan_info = &ad7266_chan_infos[i];
372
373 indio_dev->channels = chan_info->channels;
374 indio_dev->num_channels = chan_info->num_channels;
375 indio_dev->available_scan_masks = chan_info->scan_masks;
376 }
377
378 static const char * const ad7266_gpio_labels[] = {
379 "ad0", "ad1", "ad2",
380 };
381
ad7266_probe(struct spi_device * spi)382 static int ad7266_probe(struct spi_device *spi)
383 {
384 const struct ad7266_platform_data *pdata = dev_get_platdata(&spi->dev);
385 struct iio_dev *indio_dev;
386 struct ad7266_state *st;
387 unsigned int i;
388 int ret;
389
390 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
391 if (indio_dev == NULL)
392 return -ENOMEM;
393
394 st = iio_priv(indio_dev);
395
396 ret = devm_regulator_get_enable_read_voltage(&spi->dev, "vref");
397 if (ret < 0 && ret != -ENODEV)
398 return ret;
399
400 st->vref_mv = ret == -ENODEV ? AD7266_INTERNAL_REF_MV : ret / 1000;
401
402 if (pdata) {
403 st->fixed_addr = pdata->fixed_addr;
404 st->mode = pdata->mode;
405 st->range = pdata->range;
406
407 if (!st->fixed_addr) {
408 for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
409 st->gpios[i] = devm_gpiod_get(&spi->dev,
410 ad7266_gpio_labels[i],
411 GPIOD_OUT_LOW);
412 if (IS_ERR(st->gpios[i])) {
413 ret = PTR_ERR(st->gpios[i]);
414 return ret;
415 }
416 }
417 }
418 } else {
419 st->fixed_addr = true;
420 st->range = AD7266_RANGE_VREF;
421 st->mode = AD7266_MODE_DIFF;
422 }
423
424 st->spi = spi;
425
426 indio_dev->name = spi_get_device_id(spi)->name;
427 indio_dev->modes = INDIO_DIRECT_MODE;
428 indio_dev->info = &ad7266_info;
429
430 ad7266_init_channels(indio_dev);
431
432 /* wakeup */
433 st->single_xfer[0].rx_buf = &st->data.sample[0];
434 st->single_xfer[0].len = 2;
435 st->single_xfer[0].cs_change = 1;
436 /* conversion */
437 st->single_xfer[1].rx_buf = st->data.sample;
438 st->single_xfer[1].len = 4;
439 st->single_xfer[1].cs_change = 1;
440 /* powerdown */
441 st->single_xfer[2].tx_buf = &st->data.sample[0];
442 st->single_xfer[2].len = 1;
443
444 spi_message_init(&st->single_msg);
445 spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
446 spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
447 spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
448
449 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, &iio_pollfunc_store_time,
450 &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
451 if (ret)
452 return ret;
453
454 return devm_iio_device_register(&spi->dev, indio_dev);
455 }
456
457 static const struct spi_device_id ad7266_id[] = {
458 { "ad7265", 0 },
459 { "ad7266", 0 },
460 { }
461 };
462 MODULE_DEVICE_TABLE(spi, ad7266_id);
463
464 static struct spi_driver ad7266_driver = {
465 .driver = {
466 .name = "ad7266",
467 },
468 .probe = ad7266_probe,
469 .id_table = ad7266_id,
470 };
471 module_spi_driver(ad7266_driver);
472
473 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
474 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
475 MODULE_LICENSE("GPL v2");
476