1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * si1133.c - Support for Silabs SI1133 combined ambient 4 * light and UV index sensors 5 * 6 * Copyright 2018 Maxime Roussin-Belanger <maxime.roussinbelanger@gmail.com> 7 */ 8 9 #include <linux/array_size.h> 10 #include <linux/bitops.h> 11 #include <linux/cleanup.h> 12 #include <linux/completion.h> 13 #include <linux/delay.h> 14 #include <linux/dev_printk.h> 15 #include <linux/err.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/jiffies.h> 19 #include <linux/math.h> 20 #include <linux/mod_devicetable.h> 21 #include <linux/module.h> 22 #include <linux/mutex.h> 23 #include <linux/regmap.h> 24 #include <linux/types.h> 25 #include <linux/unaligned.h> 26 #include <linux/util_macros.h> 27 28 #include <linux/iio/iio.h> 29 #include <linux/iio/sysfs.h> 30 31 #define SI1133_REG_PART_ID 0x00 32 #define SI1133_REG_REV_ID 0x01 33 #define SI1133_REG_MFR_ID 0x02 34 #define SI1133_REG_INFO0 0x03 35 #define SI1133_REG_INFO1 0x04 36 37 #define SI1133_PART_ID 0x33 38 39 #define SI1133_REG_HOSTIN0 0x0A 40 #define SI1133_REG_COMMAND 0x0B 41 #define SI1133_REG_IRQ_ENABLE 0x0F 42 #define SI1133_REG_RESPONSE1 0x10 43 #define SI1133_REG_RESPONSE0 0x11 44 #define SI1133_REG_IRQ_STATUS 0x12 45 #define SI1133_REG_MEAS_RATE 0x1A 46 47 #define SI1133_IRQ_CHANNEL_ENABLE 0xF 48 49 #define SI1133_CMD_RESET_CTR 0x00 50 #define SI1133_CMD_RESET_SW 0x01 51 #define SI1133_CMD_FORCE 0x11 52 #define SI1133_CMD_START_AUTONOMOUS 0x13 53 #define SI1133_CMD_PARAM_SET 0x80 54 #define SI1133_CMD_PARAM_QUERY 0x40 55 #define SI1133_CMD_PARAM_MASK 0x3F 56 57 #define SI1133_CMD_ERR_MASK BIT(4) 58 #define SI1133_CMD_SEQ_MASK 0xF 59 #define SI1133_MAX_CMD_CTR 0xF 60 61 #define SI1133_PARAM_REG_CHAN_LIST 0x01 62 #define SI1133_PARAM_REG_ADCCONFIG(x) (((x) * 4) + 2) 63 #define SI1133_PARAM_REG_ADCSENS(x) (((x) * 4) + 3) 64 #define SI1133_PARAM_REG_ADCPOST(x) (((x) * 4) + 4) 65 66 #define SI1133_ADCMUX_MASK 0x1F 67 68 #define SI1133_ADCCONFIG_DECIM_RATE(x) ((x) << 5) 69 70 #define SI1133_ADCSENS_SCALE_MASK 0x70 71 #define SI1133_ADCSENS_SCALE_SHIFT 4 72 #define SI1133_ADCSENS_HSIG_MASK BIT(7) 73 #define SI1133_ADCSENS_HSIG_SHIFT 7 74 #define SI1133_ADCSENS_HW_GAIN_MASK 0xF 75 #define SI1133_ADCSENS_NB_MEAS(x) (fls(x) << SI1133_ADCSENS_SCALE_SHIFT) 76 77 #define SI1133_ADCPOST_24BIT_EN BIT(6) 78 #define SI1133_ADCPOST_POSTSHIFT_BITQTY(x) (((x) & GENMASK(2, 0)) << 3) 79 80 #define SI1133_PARAM_ADCMUX_SMALL_IR 0x0 81 #define SI1133_PARAM_ADCMUX_MED_IR 0x1 82 #define SI1133_PARAM_ADCMUX_LARGE_IR 0x2 83 #define SI1133_PARAM_ADCMUX_WHITE 0xB 84 #define SI1133_PARAM_ADCMUX_LARGE_WHITE 0xD 85 #define SI1133_PARAM_ADCMUX_UV 0x18 86 #define SI1133_PARAM_ADCMUX_UV_DEEP 0x19 87 88 #define SI1133_ERR_INVALID_CMD 0x0 89 #define SI1133_ERR_INVALID_LOCATION_CMD 0x1 90 #define SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION 0x2 91 #define SI1133_ERR_OUTPUT_BUFFER_OVERFLOW 0x3 92 93 #define SI1133_COMPLETION_TIMEOUT_MS 500 94 95 #define SI1133_CMD_MINSLEEP_US_LOW 5000 96 #define SI1133_CMD_MINSLEEP_US_HIGH 7500 97 #define SI1133_CMD_TIMEOUT_MS 25 98 99 #define SI1133_REG_HOSTOUT(x) ((x) + 0x13) 100 101 #define SI1133_X_ORDER_MASK 0x0070 102 #define SI1133_Y_ORDER_MASK 0x0007 103 #define si1133_get_x_order(m) (((m) & SI1133_X_ORDER_MASK) >> 4) 104 #define si1133_get_y_order(m) ((m) & SI1133_Y_ORDER_MASK) 105 106 #define SI1133_LUX_ADC_MASK 0xE 107 #define SI1133_ADC_THRESHOLD 16000 108 #define SI1133_INPUT_FRACTION_HIGH 7 109 #define SI1133_INPUT_FRACTION_LOW 15 110 #define SI1133_LUX_OUTPUT_FRACTION 12 111 #define SI1133_LUX_BUFFER_SIZE 9 112 #define SI1133_MEASURE_BUFFER_SIZE 3 113 114 static const int si1133_scale_available[] = { 115 1, 2, 4, 8, 16, 32, 64, 128}; 116 117 static IIO_CONST_ATTR(scale_available, "1 2 4 8 16 32 64 128"); 118 119 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.0244 0.0488 0.0975 0.195 0.390 0.780 " 120 "1.560 3.120 6.24 12.48 25.0 50.0"); 121 122 /* A.K.A. HW_GAIN in datasheet */ 123 enum si1133_int_time { 124 _24_4_us = 0, 125 _48_8_us = 1, 126 _97_5_us = 2, 127 _195_0_us = 3, 128 _390_0_us = 4, 129 _780_0_us = 5, 130 _1_560_0_us = 6, 131 _3_120_0_us = 7, 132 _6_240_0_us = 8, 133 _12_480_0_us = 9, 134 _25_ms = 10, 135 _50_ms = 11, 136 }; 137 138 /* Integration time in milliseconds, nanoseconds */ 139 static const int si1133_int_time_table[][2] = { 140 [_24_4_us] = {0, 24400}, 141 [_48_8_us] = {0, 48800}, 142 [_97_5_us] = {0, 97500}, 143 [_195_0_us] = {0, 195000}, 144 [_390_0_us] = {0, 390000}, 145 [_780_0_us] = {0, 780000}, 146 [_1_560_0_us] = {1, 560000}, 147 [_3_120_0_us] = {3, 120000}, 148 [_6_240_0_us] = {6, 240000}, 149 [_12_480_0_us] = {12, 480000}, 150 [_25_ms] = {25, 000000}, 151 [_50_ms] = {50, 000000}, 152 }; 153 154 static const struct regmap_range si1133_reg_ranges[] = { 155 regmap_reg_range(0x00, 0x02), 156 regmap_reg_range(0x0A, 0x0B), 157 regmap_reg_range(0x0F, 0x0F), 158 regmap_reg_range(0x10, 0x12), 159 regmap_reg_range(0x13, 0x2C), 160 }; 161 162 static const struct regmap_range si1133_reg_ro_ranges[] = { 163 regmap_reg_range(0x00, 0x02), 164 regmap_reg_range(0x10, 0x2C), 165 }; 166 167 static const struct regmap_range si1133_precious_ranges[] = { 168 regmap_reg_range(0x12, 0x12), 169 }; 170 171 static const struct regmap_access_table si1133_write_ranges_table = { 172 .yes_ranges = si1133_reg_ranges, 173 .n_yes_ranges = ARRAY_SIZE(si1133_reg_ranges), 174 .no_ranges = si1133_reg_ro_ranges, 175 .n_no_ranges = ARRAY_SIZE(si1133_reg_ro_ranges), 176 }; 177 178 static const struct regmap_access_table si1133_read_ranges_table = { 179 .yes_ranges = si1133_reg_ranges, 180 .n_yes_ranges = ARRAY_SIZE(si1133_reg_ranges), 181 }; 182 183 static const struct regmap_access_table si1133_precious_table = { 184 .yes_ranges = si1133_precious_ranges, 185 .n_yes_ranges = ARRAY_SIZE(si1133_precious_ranges), 186 }; 187 188 static const struct regmap_config si1133_regmap_config = { 189 .reg_bits = 8, 190 .val_bits = 8, 191 192 .max_register = 0x2C, 193 194 .wr_table = &si1133_write_ranges_table, 195 .rd_table = &si1133_read_ranges_table, 196 197 .precious_table = &si1133_precious_table, 198 }; 199 200 struct si1133_data { 201 struct regmap *regmap; 202 struct i2c_client *client; 203 204 /* Lock protecting one command at a time can be processed */ 205 struct mutex mutex; 206 207 int rsp_seq; 208 u8 scan_mask; 209 u8 adc_sens[6]; 210 u8 adc_config[6]; 211 212 struct completion completion; 213 }; 214 215 struct si1133_coeff { 216 s16 info; 217 u16 mag; 218 }; 219 220 struct si1133_lux_coeff { 221 struct si1133_coeff coeff_high[4]; 222 struct si1133_coeff coeff_low[9]; 223 }; 224 225 static const struct si1133_lux_coeff lux_coeff = { 226 { 227 { 0, 209}, 228 { 1665, 93}, 229 { 2064, 65}, 230 {-2671, 234} 231 }, 232 { 233 { 0, 0}, 234 { 1921, 29053}, 235 {-1022, 36363}, 236 { 2320, 20789}, 237 { -367, 57909}, 238 {-1774, 38240}, 239 { -608, 46775}, 240 {-1503, 51831}, 241 {-1886, 58928} 242 } 243 }; 244 245 static int si1133_calculate_polynomial_inner(s32 input, u8 fraction, u16 mag, 246 s8 shift) 247 { 248 return ((input << fraction) / mag) << shift; 249 } 250 251 static int si1133_calculate_output(s32 x, s32 y, u8 x_order, u8 y_order, 252 u8 input_fraction, s8 sign, 253 const struct si1133_coeff *coeffs) 254 { 255 s8 shift; 256 int x1 = 1; 257 int x2 = 1; 258 int y1 = 1; 259 int y2 = 1; 260 261 shift = ((u16)coeffs->info & 0xFF00) >> 8; 262 shift ^= 0xFF; 263 shift += 1; 264 shift = -shift; 265 266 if (x_order > 0) { 267 x1 = si1133_calculate_polynomial_inner(x, input_fraction, 268 coeffs->mag, shift); 269 if (x_order > 1) 270 x2 = x1; 271 } 272 273 if (y_order > 0) { 274 y1 = si1133_calculate_polynomial_inner(y, input_fraction, 275 coeffs->mag, shift); 276 if (y_order > 1) 277 y2 = y1; 278 } 279 280 return sign * x1 * x2 * y1 * y2; 281 } 282 283 /* 284 * The algorithm is from: 285 * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00716 286 */ 287 static int si1133_calc_polynomial(s32 x, s32 y, u8 input_fraction, u8 num_coeff, 288 const struct si1133_coeff *coeffs) 289 { 290 u8 x_order, y_order; 291 u8 counter; 292 s8 sign; 293 int output = 0; 294 295 for (counter = 0; counter < num_coeff; counter++) { 296 if (coeffs->info < 0) 297 sign = -1; 298 else 299 sign = 1; 300 301 x_order = si1133_get_x_order(coeffs->info); 302 y_order = si1133_get_y_order(coeffs->info); 303 304 if ((x_order == 0) && (y_order == 0)) 305 output += 306 sign * coeffs->mag << SI1133_LUX_OUTPUT_FRACTION; 307 else 308 output += si1133_calculate_output(x, y, x_order, 309 y_order, 310 input_fraction, sign, 311 coeffs); 312 coeffs++; 313 } 314 315 return abs(output); 316 } 317 318 static int si1133_cmd_reset_sw(struct si1133_data *data) 319 { 320 struct device *dev = &data->client->dev; 321 unsigned int resp; 322 unsigned long timeout; 323 int err; 324 325 err = regmap_write(data->regmap, SI1133_REG_COMMAND, 326 SI1133_CMD_RESET_SW); 327 if (err) 328 return err; 329 330 timeout = jiffies + msecs_to_jiffies(SI1133_CMD_TIMEOUT_MS); 331 while (true) { 332 err = regmap_read(data->regmap, SI1133_REG_RESPONSE0, &resp); 333 if (err == -ENXIO) { 334 usleep_range(SI1133_CMD_MINSLEEP_US_LOW, 335 SI1133_CMD_MINSLEEP_US_HIGH); 336 continue; 337 } 338 339 if ((resp & SI1133_MAX_CMD_CTR) == SI1133_MAX_CMD_CTR) 340 break; 341 342 if (time_after(jiffies, timeout)) { 343 dev_warn(dev, "Timeout on reset ctr resp: %d\n", resp); 344 return -ETIMEDOUT; 345 } 346 } 347 348 if (!err) 349 data->rsp_seq = SI1133_MAX_CMD_CTR; 350 351 return err; 352 } 353 354 static int si1133_parse_response_err(struct device *dev, u32 resp, u8 cmd) 355 { 356 resp &= 0xF; 357 358 switch (resp) { 359 case SI1133_ERR_OUTPUT_BUFFER_OVERFLOW: 360 dev_warn(dev, "Output buffer overflow: 0x%02x\n", cmd); 361 return -EOVERFLOW; 362 case SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION: 363 dev_warn(dev, "Saturation of the ADC or overflow of accumulation: 0x%02x\n", 364 cmd); 365 return -EOVERFLOW; 366 case SI1133_ERR_INVALID_LOCATION_CMD: 367 dev_warn(dev, 368 "Parameter access to an invalid location: 0x%02x\n", 369 cmd); 370 return -EINVAL; 371 case SI1133_ERR_INVALID_CMD: 372 dev_warn(dev, "Invalid command 0x%02x\n", cmd); 373 return -EINVAL; 374 default: 375 dev_warn(dev, "Unknown error 0x%02x\n", cmd); 376 return -EINVAL; 377 } 378 } 379 380 static int si1133_cmd_reset_counter(struct si1133_data *data) 381 { 382 int err = regmap_write(data->regmap, SI1133_REG_COMMAND, 383 SI1133_CMD_RESET_CTR); 384 if (err) 385 return err; 386 387 data->rsp_seq = 0; 388 389 return 0; 390 } 391 392 static int si1133_command(struct si1133_data *data, u8 cmd) 393 { 394 unsigned long timeout; 395 struct device *dev = &data->client->dev; 396 u32 resp; 397 int err; 398 int expected_seq; 399 400 guard(mutex)(&data->mutex); 401 402 expected_seq = (data->rsp_seq + 1) & SI1133_MAX_CMD_CTR; 403 404 if (cmd == SI1133_CMD_FORCE) { 405 /* Flush pending IRQs from a previous timeout. */ 406 regmap_read(data->regmap, SI1133_REG_IRQ_STATUS, &resp); 407 regmap_write(data->regmap, SI1133_REG_IRQ_ENABLE, 408 SI1133_IRQ_CHANNEL_ENABLE); 409 410 reinit_completion(&data->completion); 411 } 412 413 err = regmap_write(data->regmap, SI1133_REG_COMMAND, cmd); 414 if (err) { 415 dev_warn(dev, "Failed to write command 0x%02x, ret=%d\n", cmd, 416 err); 417 return err; 418 } 419 420 if (cmd == SI1133_CMD_FORCE) { 421 /* wait for irq */ 422 timeout = msecs_to_jiffies(SI1133_COMPLETION_TIMEOUT_MS); 423 if (!wait_for_completion_timeout(&data->completion, timeout)) { 424 regmap_write(data->regmap, SI1133_REG_IRQ_ENABLE, 0); 425 return -ETIMEDOUT; 426 } 427 err = regmap_read(data->regmap, SI1133_REG_RESPONSE0, &resp); 428 if (err) 429 return err; 430 } else { 431 err = regmap_read_poll_timeout(data->regmap, 432 SI1133_REG_RESPONSE0, resp, 433 (resp & SI1133_CMD_SEQ_MASK) == 434 expected_seq || 435 (resp & SI1133_CMD_ERR_MASK), 436 SI1133_CMD_MINSLEEP_US_LOW, 437 SI1133_CMD_TIMEOUT_MS * 1000); 438 if (err) { 439 dev_warn(dev, 440 "Failed to read command 0x%02x, ret=%d\n", 441 cmd, err); 442 /* 443 * Reset counter on err to prevent software and hardware 444 * counters being out of sync. 445 */ 446 si1133_cmd_reset_counter(data); 447 return err; 448 } 449 } 450 451 if (resp & SI1133_CMD_ERR_MASK) { 452 err = si1133_parse_response_err(dev, resp, cmd); 453 si1133_cmd_reset_counter(data); 454 } else { 455 data->rsp_seq = expected_seq; 456 } 457 458 return err; 459 } 460 461 static int si1133_param_set(struct si1133_data *data, u8 param, u32 value) 462 { 463 int err = regmap_write(data->regmap, SI1133_REG_HOSTIN0, value); 464 465 if (err) 466 return err; 467 468 return si1133_command(data, SI1133_CMD_PARAM_SET | 469 (param & SI1133_CMD_PARAM_MASK)); 470 } 471 472 static int si1133_param_query(struct si1133_data *data, u8 param, u32 *result) 473 { 474 int err = si1133_command(data, SI1133_CMD_PARAM_QUERY | 475 (param & SI1133_CMD_PARAM_MASK)); 476 if (err) 477 return err; 478 479 return regmap_read(data->regmap, SI1133_REG_RESPONSE1, result); 480 } 481 482 #define SI1133_CHANNEL(_ch, _type) \ 483 .type = _type, \ 484 .channel = _ch, \ 485 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 486 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | \ 487 BIT(IIO_CHAN_INFO_SCALE) | \ 488 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \ 489 490 static const struct iio_chan_spec si1133_channels[] = { 491 { 492 .type = IIO_LIGHT, 493 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 494 .channel = 0, 495 }, 496 { 497 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_WHITE, IIO_INTENSITY) 498 .channel2 = IIO_MOD_LIGHT_BOTH, 499 }, 500 { 501 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_WHITE, IIO_INTENSITY) 502 .channel2 = IIO_MOD_LIGHT_BOTH, 503 .extend_name = "large", 504 }, 505 { 506 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_SMALL_IR, IIO_INTENSITY) 507 .extend_name = "small", 508 .modified = 1, 509 .channel2 = IIO_MOD_LIGHT_IR, 510 }, 511 { 512 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_MED_IR, IIO_INTENSITY) 513 .modified = 1, 514 .channel2 = IIO_MOD_LIGHT_IR, 515 }, 516 { 517 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_IR, IIO_INTENSITY) 518 .extend_name = "large", 519 .modified = 1, 520 .channel2 = IIO_MOD_LIGHT_IR, 521 }, 522 { 523 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV, IIO_UVINDEX) 524 }, 525 { 526 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV_DEEP, IIO_UVINDEX) 527 .modified = 1, 528 .channel2 = IIO_MOD_LIGHT_DUV, 529 } 530 }; 531 532 static int si1133_get_int_time_index(int milliseconds, int nanoseconds) 533 { 534 int i; 535 536 for (i = 0; i < ARRAY_SIZE(si1133_int_time_table); i++) { 537 if (milliseconds == si1133_int_time_table[i][0] && 538 nanoseconds == si1133_int_time_table[i][1]) 539 return i; 540 } 541 return -EINVAL; 542 } 543 544 static int si1133_set_integration_time(struct si1133_data *data, u8 adc, 545 int milliseconds, int nanoseconds) 546 { 547 int index; 548 549 index = si1133_get_int_time_index(milliseconds, nanoseconds); 550 if (index < 0) 551 return index; 552 553 data->adc_sens[adc] &= 0xF0; 554 data->adc_sens[adc] |= index; 555 556 return si1133_param_set(data, SI1133_PARAM_REG_ADCSENS(0), 557 data->adc_sens[adc]); 558 } 559 560 static int si1133_set_chlist(struct si1133_data *data, u8 scan_mask) 561 { 562 /* channel list already set, no need to reprogram */ 563 if (data->scan_mask == scan_mask) 564 return 0; 565 566 data->scan_mask = scan_mask; 567 568 return si1133_param_set(data, SI1133_PARAM_REG_CHAN_LIST, scan_mask); 569 } 570 571 static int si1133_chan_set_adcconfig(struct si1133_data *data, u8 adc, 572 u8 adc_config) 573 { 574 int err; 575 576 err = si1133_param_set(data, SI1133_PARAM_REG_ADCCONFIG(adc), 577 adc_config); 578 if (err) 579 return err; 580 581 data->adc_config[adc] = adc_config; 582 583 return 0; 584 } 585 586 static int si1133_update_adcconfig(struct si1133_data *data, uint8_t adc, 587 u8 mask, u8 shift, u8 value) 588 { 589 u32 adc_config; 590 int err; 591 592 err = si1133_param_query(data, SI1133_PARAM_REG_ADCCONFIG(adc), 593 &adc_config); 594 if (err) 595 return err; 596 597 adc_config &= ~mask; 598 adc_config |= (value << shift); 599 600 return si1133_chan_set_adcconfig(data, adc, adc_config); 601 } 602 603 static int si1133_set_adcmux(struct si1133_data *data, u8 adc, u8 mux) 604 { 605 if ((mux & data->adc_config[adc]) == mux) 606 return 0; /* mux already set to correct value */ 607 608 return si1133_update_adcconfig(data, adc, SI1133_ADCMUX_MASK, 0, mux); 609 } 610 611 static int si1133_force_measurement(struct si1133_data *data) 612 { 613 return si1133_command(data, SI1133_CMD_FORCE); 614 } 615 616 static int si1133_bulk_read(struct si1133_data *data, u8 start_reg, u8 length, 617 u8 *buffer) 618 { 619 int err; 620 621 err = si1133_force_measurement(data); 622 if (err) 623 return err; 624 625 return regmap_bulk_read(data->regmap, start_reg, buffer, length); 626 } 627 628 static int si1133_measure(struct si1133_data *data, 629 struct iio_chan_spec const *chan, 630 int *val) 631 { 632 int err; 633 634 u8 buffer[SI1133_MEASURE_BUFFER_SIZE]; 635 636 err = si1133_set_adcmux(data, 0, chan->channel); 637 if (err) 638 return err; 639 640 /* Deactivate lux measurements if they were active */ 641 err = si1133_set_chlist(data, BIT(0)); 642 if (err) 643 return err; 644 645 err = si1133_bulk_read(data, SI1133_REG_HOSTOUT(0), sizeof(buffer), 646 buffer); 647 if (err) 648 return err; 649 650 *val = sign_extend32(get_unaligned_be24(&buffer[0]), 23); 651 652 return err; 653 } 654 655 static irqreturn_t si1133_threaded_irq_handler(int irq, void *private) 656 { 657 struct iio_dev *iio_dev = private; 658 struct si1133_data *data = iio_priv(iio_dev); 659 u32 irq_status; 660 int err; 661 662 err = regmap_read(data->regmap, SI1133_REG_IRQ_STATUS, &irq_status); 663 if (err) { 664 dev_err_ratelimited(&iio_dev->dev, "Error reading IRQ\n"); 665 goto out; 666 } 667 668 if (irq_status != data->scan_mask) 669 return IRQ_NONE; 670 671 out: 672 complete(&data->completion); 673 674 return IRQ_HANDLED; 675 } 676 677 static int si1133_scale_to_swgain(int scale_integer, int scale_fractional) 678 { 679 scale_integer = find_closest(scale_integer, si1133_scale_available, 680 ARRAY_SIZE(si1133_scale_available)); 681 if (scale_integer < 0 || 682 scale_integer > ARRAY_SIZE(si1133_scale_available) || 683 scale_fractional != 0) 684 return -EINVAL; 685 686 return scale_integer; 687 } 688 689 static int si1133_chan_set_adcsens(struct si1133_data *data, u8 adc, 690 u8 adc_sens) 691 { 692 int err; 693 694 err = si1133_param_set(data, SI1133_PARAM_REG_ADCSENS(adc), adc_sens); 695 if (err) 696 return err; 697 698 data->adc_sens[adc] = adc_sens; 699 700 return 0; 701 } 702 703 static int si1133_update_adcsens(struct si1133_data *data, u8 mask, 704 u8 shift, u8 value) 705 { 706 int err; 707 u32 adc_sens; 708 709 err = si1133_param_query(data, SI1133_PARAM_REG_ADCSENS(0), 710 &adc_sens); 711 if (err) 712 return err; 713 714 adc_sens &= ~mask; 715 adc_sens |= (value << shift); 716 717 return si1133_chan_set_adcsens(data, 0, adc_sens); 718 } 719 720 static int si1133_get_lux(struct si1133_data *data, int *val) 721 { 722 int err; 723 int lux; 724 s32 high_vis; 725 s32 low_vis; 726 s32 ir; 727 u8 buffer[SI1133_LUX_BUFFER_SIZE]; 728 729 /* Activate lux channels */ 730 err = si1133_set_chlist(data, SI1133_LUX_ADC_MASK); 731 if (err) 732 return err; 733 734 err = si1133_bulk_read(data, SI1133_REG_HOSTOUT(0), 735 SI1133_LUX_BUFFER_SIZE, buffer); 736 if (err) 737 return err; 738 739 high_vis = sign_extend32(get_unaligned_be24(&buffer[0]), 23); 740 741 low_vis = sign_extend32(get_unaligned_be24(&buffer[3]), 23); 742 743 ir = sign_extend32(get_unaligned_be24(&buffer[6]), 23); 744 745 if (high_vis > SI1133_ADC_THRESHOLD || ir > SI1133_ADC_THRESHOLD) 746 lux = si1133_calc_polynomial(high_vis, ir, 747 SI1133_INPUT_FRACTION_HIGH, 748 ARRAY_SIZE(lux_coeff.coeff_high), 749 &lux_coeff.coeff_high[0]); 750 else 751 lux = si1133_calc_polynomial(low_vis, ir, 752 SI1133_INPUT_FRACTION_LOW, 753 ARRAY_SIZE(lux_coeff.coeff_low), 754 &lux_coeff.coeff_low[0]); 755 756 *val = lux >> SI1133_LUX_OUTPUT_FRACTION; 757 758 return err; 759 } 760 761 static int si1133_read_raw(struct iio_dev *iio_dev, 762 struct iio_chan_spec const *chan, 763 int *val, int *val2, long mask) 764 { 765 struct si1133_data *data = iio_priv(iio_dev); 766 u8 adc_sens = data->adc_sens[0]; 767 int err; 768 769 switch (mask) { 770 case IIO_CHAN_INFO_PROCESSED: 771 switch (chan->type) { 772 case IIO_LIGHT: 773 err = si1133_get_lux(data, val); 774 if (err) 775 return err; 776 777 return IIO_VAL_INT; 778 default: 779 return -EINVAL; 780 } 781 case IIO_CHAN_INFO_RAW: 782 switch (chan->type) { 783 case IIO_INTENSITY: 784 case IIO_UVINDEX: 785 err = si1133_measure(data, chan, val); 786 if (err) 787 return err; 788 789 return IIO_VAL_INT; 790 default: 791 return -EINVAL; 792 } 793 case IIO_CHAN_INFO_INT_TIME: 794 switch (chan->type) { 795 case IIO_INTENSITY: 796 case IIO_UVINDEX: 797 adc_sens &= SI1133_ADCSENS_HW_GAIN_MASK; 798 799 *val = si1133_int_time_table[adc_sens][0]; 800 *val2 = si1133_int_time_table[adc_sens][1]; 801 return IIO_VAL_INT_PLUS_MICRO; 802 default: 803 return -EINVAL; 804 } 805 case IIO_CHAN_INFO_SCALE: 806 switch (chan->type) { 807 case IIO_INTENSITY: 808 case IIO_UVINDEX: 809 adc_sens &= SI1133_ADCSENS_SCALE_MASK; 810 adc_sens >>= SI1133_ADCSENS_SCALE_SHIFT; 811 812 *val = BIT(adc_sens); 813 814 return IIO_VAL_INT; 815 default: 816 return -EINVAL; 817 } 818 case IIO_CHAN_INFO_HARDWAREGAIN: 819 switch (chan->type) { 820 case IIO_INTENSITY: 821 case IIO_UVINDEX: 822 adc_sens >>= SI1133_ADCSENS_HSIG_SHIFT; 823 824 *val = adc_sens; 825 826 return IIO_VAL_INT; 827 default: 828 return -EINVAL; 829 } 830 default: 831 return -EINVAL; 832 } 833 } 834 835 static int si1133_write_raw(struct iio_dev *iio_dev, 836 struct iio_chan_spec const *chan, 837 int val, int val2, long mask) 838 { 839 struct si1133_data *data = iio_priv(iio_dev); 840 841 switch (mask) { 842 case IIO_CHAN_INFO_SCALE: 843 switch (chan->type) { 844 case IIO_INTENSITY: 845 case IIO_UVINDEX: 846 val = si1133_scale_to_swgain(val, val2); 847 if (val < 0) 848 return val; 849 850 return si1133_update_adcsens(data, 851 SI1133_ADCSENS_SCALE_MASK, 852 SI1133_ADCSENS_SCALE_SHIFT, 853 val); 854 default: 855 return -EINVAL; 856 } 857 case IIO_CHAN_INFO_INT_TIME: 858 return si1133_set_integration_time(data, 0, val, val2); 859 case IIO_CHAN_INFO_HARDWAREGAIN: 860 switch (chan->type) { 861 case IIO_INTENSITY: 862 case IIO_UVINDEX: 863 if (val != 0 && val != 1) 864 return -EINVAL; 865 866 return si1133_update_adcsens(data, 867 SI1133_ADCSENS_HSIG_MASK, 868 SI1133_ADCSENS_HSIG_SHIFT, 869 val); 870 default: 871 return -EINVAL; 872 } 873 default: 874 return -EINVAL; 875 } 876 } 877 878 static struct attribute *si1133_attributes[] = { 879 &iio_const_attr_integration_time_available.dev_attr.attr, 880 &iio_const_attr_scale_available.dev_attr.attr, 881 NULL, 882 }; 883 884 static const struct attribute_group si1133_attribute_group = { 885 .attrs = si1133_attributes, 886 }; 887 888 static const struct iio_info si1133_info = { 889 .read_raw = si1133_read_raw, 890 .write_raw = si1133_write_raw, 891 .attrs = &si1133_attribute_group, 892 }; 893 894 /* 895 * si1133_init_lux_channels - Configure 3 different channels(adc) (1,2 and 3) 896 * The channel configuration for the lux measurement was taken from : 897 * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00578 898 * 899 * Reserved the channel 0 for the other raw measurements 900 */ 901 static int si1133_init_lux_channels(struct si1133_data *data) 902 { 903 int err; 904 905 err = si1133_chan_set_adcconfig(data, 1, 906 SI1133_ADCCONFIG_DECIM_RATE(1) | 907 SI1133_PARAM_ADCMUX_LARGE_WHITE); 908 if (err) 909 return err; 910 911 err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(1), 912 SI1133_ADCPOST_24BIT_EN | 913 SI1133_ADCPOST_POSTSHIFT_BITQTY(0)); 914 if (err) 915 return err; 916 err = si1133_chan_set_adcsens(data, 1, SI1133_ADCSENS_HSIG_MASK | 917 SI1133_ADCSENS_NB_MEAS(64) | _48_8_us); 918 if (err) 919 return err; 920 921 err = si1133_chan_set_adcconfig(data, 2, 922 SI1133_ADCCONFIG_DECIM_RATE(1) | 923 SI1133_PARAM_ADCMUX_LARGE_WHITE); 924 if (err) 925 return err; 926 927 err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(2), 928 SI1133_ADCPOST_24BIT_EN | 929 SI1133_ADCPOST_POSTSHIFT_BITQTY(2)); 930 if (err) 931 return err; 932 933 err = si1133_chan_set_adcsens(data, 2, SI1133_ADCSENS_HSIG_MASK | 934 SI1133_ADCSENS_NB_MEAS(1) | _3_120_0_us); 935 if (err) 936 return err; 937 938 err = si1133_chan_set_adcconfig(data, 3, 939 SI1133_ADCCONFIG_DECIM_RATE(1) | 940 SI1133_PARAM_ADCMUX_MED_IR); 941 if (err) 942 return err; 943 944 err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(3), 945 SI1133_ADCPOST_24BIT_EN | 946 SI1133_ADCPOST_POSTSHIFT_BITQTY(2)); 947 if (err) 948 return err; 949 950 return si1133_chan_set_adcsens(data, 3, SI1133_ADCSENS_HSIG_MASK | 951 SI1133_ADCSENS_NB_MEAS(64) | _48_8_us); 952 } 953 954 static int si1133_initialize(struct si1133_data *data) 955 { 956 int err; 957 958 err = si1133_cmd_reset_sw(data); 959 if (err) 960 return err; 961 962 /* Turn off autonomous mode */ 963 err = si1133_param_set(data, SI1133_REG_MEAS_RATE, 0); 964 if (err) 965 return err; 966 967 err = si1133_init_lux_channels(data); 968 if (err) 969 return err; 970 971 return regmap_write(data->regmap, SI1133_REG_IRQ_ENABLE, 972 SI1133_IRQ_CHANNEL_ENABLE); 973 } 974 975 static int si1133_validate_ids(struct iio_dev *iio_dev) 976 { 977 struct si1133_data *data = iio_priv(iio_dev); 978 979 unsigned int part_id, rev_id, mfr_id; 980 int err; 981 982 err = regmap_read(data->regmap, SI1133_REG_PART_ID, &part_id); 983 if (err) 984 return err; 985 986 err = regmap_read(data->regmap, SI1133_REG_REV_ID, &rev_id); 987 if (err) 988 return err; 989 990 err = regmap_read(data->regmap, SI1133_REG_MFR_ID, &mfr_id); 991 if (err) 992 return err; 993 994 dev_info(&iio_dev->dev, 995 "Device ID part 0x%02x rev 0x%02x mfr 0x%02x\n", 996 part_id, rev_id, mfr_id); 997 if (part_id != SI1133_PART_ID) { 998 dev_err(&iio_dev->dev, 999 "Part ID mismatch got 0x%02x, expected 0x%02x\n", 1000 part_id, SI1133_PART_ID); 1001 return -ENODEV; 1002 } 1003 1004 return 0; 1005 } 1006 1007 static int si1133_probe(struct i2c_client *client) 1008 { 1009 const struct i2c_device_id *id = i2c_client_get_device_id(client); 1010 struct si1133_data *data; 1011 struct iio_dev *iio_dev; 1012 int err; 1013 1014 iio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1015 if (!iio_dev) 1016 return -ENOMEM; 1017 1018 data = iio_priv(iio_dev); 1019 1020 init_completion(&data->completion); 1021 1022 data->regmap = devm_regmap_init_i2c(client, &si1133_regmap_config); 1023 if (IS_ERR(data->regmap)) { 1024 err = PTR_ERR(data->regmap); 1025 dev_err(&client->dev, "Failed to initialise regmap: %d\n", err); 1026 return err; 1027 } 1028 1029 i2c_set_clientdata(client, iio_dev); 1030 data->client = client; 1031 1032 iio_dev->name = id->name; 1033 iio_dev->channels = si1133_channels; 1034 iio_dev->num_channels = ARRAY_SIZE(si1133_channels); 1035 iio_dev->info = &si1133_info; 1036 iio_dev->modes = INDIO_DIRECT_MODE; 1037 1038 mutex_init(&data->mutex); 1039 1040 err = si1133_validate_ids(iio_dev); 1041 if (err) 1042 return err; 1043 1044 err = si1133_initialize(data); 1045 if (err) { 1046 dev_err(&client->dev, 1047 "Error when initializing chip: %d\n", err); 1048 return err; 1049 } 1050 1051 if (!client->irq) { 1052 dev_err(&client->dev, 1053 "Required interrupt not provided, cannot proceed\n"); 1054 return -EINVAL; 1055 } 1056 1057 err = devm_request_threaded_irq(&client->dev, client->irq, 1058 NULL, 1059 si1133_threaded_irq_handler, 1060 IRQF_ONESHOT | IRQF_SHARED, 1061 client->name, iio_dev); 1062 if (err) { 1063 dev_warn(&client->dev, "Request irq %d failed: %i\n", 1064 client->irq, err); 1065 return err; 1066 } 1067 1068 return devm_iio_device_register(&client->dev, iio_dev); 1069 } 1070 1071 static const struct i2c_device_id si1133_ids[] = { 1072 { .name = "si1133" }, 1073 { } 1074 }; 1075 MODULE_DEVICE_TABLE(i2c, si1133_ids); 1076 1077 static struct i2c_driver si1133_driver = { 1078 .driver = { 1079 .name = "si1133", 1080 }, 1081 .probe = si1133_probe, 1082 .id_table = si1133_ids, 1083 }; 1084 1085 module_i2c_driver(si1133_driver); 1086 1087 MODULE_AUTHOR("Maxime Roussin-Belanger <maxime.roussinbelanger@gmail.com>"); 1088 MODULE_DESCRIPTION("Silabs SI1133, UV index sensor and ambient light sensor driver"); 1089 MODULE_LICENSE("GPL"); 1090