xref: /linux/drivers/platform/x86/amd/hsmp/hsmp.c (revision 2c1ed907520c50326b8f604907a8478b27881a2e)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * AMD HSMP Platform Driver
4  * Copyright (c) 2022, AMD.
5  * All Rights Reserved.
6  *
7  * This file provides a device implementation for HSMP interface
8  */
9 
10 #include <asm/amd_hsmp.h>
11 #include <asm/amd_nb.h>
12 
13 #include <linux/acpi.h>
14 #include <linux/delay.h>
15 #include <linux/device.h>
16 #include <linux/semaphore.h>
17 #include <linux/sysfs.h>
18 
19 #include "hsmp.h"
20 
21 /* HSMP Status / Error codes */
22 #define HSMP_STATUS_NOT_READY	0x00
23 #define HSMP_STATUS_OK		0x01
24 #define HSMP_ERR_INVALID_MSG	0xFE
25 #define HSMP_ERR_INVALID_INPUT	0xFF
26 #define HSMP_ERR_PREREQ_NOT_SATISFIED	0xFD
27 #define HSMP_ERR_SMU_BUSY		0xFC
28 
29 /* Timeout in millsec */
30 #define HSMP_MSG_TIMEOUT	100
31 #define HSMP_SHORT_SLEEP	1
32 
33 #define HSMP_WR			true
34 #define HSMP_RD			false
35 
36 #define DRIVER_VERSION		"2.4"
37 
38 /*
39  * When same message numbers are used for both GET and SET operation,
40  * bit:31 indicates whether its SET or GET operation.
41  */
42 #define CHECK_GET_BIT		BIT(31)
43 
44 static struct hsmp_plat_device hsmp_pdev;
45 
46 /*
47  * Send a message to the HSMP port via PCI-e config space registers
48  * or by writing to MMIO space.
49  *
50  * The caller is expected to zero out any unused arguments.
51  * If a response is expected, the number of response words should be greater than 0.
52  *
53  * Returns 0 for success and populates the requested number of arguments.
54  * Returns a negative error code for failure.
55  */
__hsmp_send_message(struct hsmp_socket * sock,struct hsmp_message * msg)56 static int __hsmp_send_message(struct hsmp_socket *sock, struct hsmp_message *msg)
57 {
58 	struct hsmp_mbaddr_info *mbinfo;
59 	unsigned long timeout, short_sleep;
60 	u32 mbox_status;
61 	u32 index;
62 	int ret;
63 
64 	mbinfo = &sock->mbinfo;
65 
66 	/* Clear the status register */
67 	mbox_status = HSMP_STATUS_NOT_READY;
68 	ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_resp_off, &mbox_status, HSMP_WR);
69 	if (ret) {
70 		dev_err(sock->dev, "Error %d clearing mailbox status register\n", ret);
71 		return ret;
72 	}
73 
74 	index = 0;
75 	/* Write any message arguments */
76 	while (index < msg->num_args) {
77 		ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_arg_off + (index << 2),
78 					  &msg->args[index], HSMP_WR);
79 		if (ret) {
80 			dev_err(sock->dev, "Error %d writing message argument %d\n", ret, index);
81 			return ret;
82 		}
83 		index++;
84 	}
85 
86 	/* Write the message ID which starts the operation */
87 	ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_id_off, &msg->msg_id, HSMP_WR);
88 	if (ret) {
89 		dev_err(sock->dev, "Error %d writing message ID %u\n", ret, msg->msg_id);
90 		return ret;
91 	}
92 
93 	/*
94 	 * Depending on when the trigger write completes relative to the SMU
95 	 * firmware 1 ms cycle, the operation may take from tens of us to 1 ms
96 	 * to complete. Some operations may take more. Therefore we will try
97 	 * a few short duration sleeps and switch to long sleeps if we don't
98 	 * succeed quickly.
99 	 */
100 	short_sleep = jiffies + msecs_to_jiffies(HSMP_SHORT_SLEEP);
101 	timeout	= jiffies + msecs_to_jiffies(HSMP_MSG_TIMEOUT);
102 
103 	while (time_before(jiffies, timeout)) {
104 		ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_resp_off, &mbox_status, HSMP_RD);
105 		if (ret) {
106 			dev_err(sock->dev, "Error %d reading mailbox status\n", ret);
107 			return ret;
108 		}
109 
110 		if (mbox_status != HSMP_STATUS_NOT_READY)
111 			break;
112 		if (time_before(jiffies, short_sleep))
113 			usleep_range(50, 100);
114 		else
115 			usleep_range(1000, 2000);
116 	}
117 
118 	if (unlikely(mbox_status == HSMP_STATUS_NOT_READY)) {
119 		dev_err(sock->dev, "Message ID 0x%X failure : SMU tmeout (status = 0x%X)\n",
120 			msg->msg_id, mbox_status);
121 		return -ETIMEDOUT;
122 	} else if (unlikely(mbox_status == HSMP_ERR_INVALID_MSG)) {
123 		dev_err(sock->dev, "Message ID 0x%X failure : Invalid message (status = 0x%X)\n",
124 			msg->msg_id, mbox_status);
125 		return -ENOMSG;
126 	} else if (unlikely(mbox_status == HSMP_ERR_INVALID_INPUT)) {
127 		dev_err(sock->dev, "Message ID 0x%X failure : Invalid arguments (status = 0x%X)\n",
128 			msg->msg_id, mbox_status);
129 		return -EINVAL;
130 	} else if (unlikely(mbox_status == HSMP_ERR_PREREQ_NOT_SATISFIED)) {
131 		dev_err(sock->dev, "Message ID 0x%X failure : Prerequisite not satisfied (status = 0x%X)\n",
132 			msg->msg_id, mbox_status);
133 		return -EREMOTEIO;
134 	} else if (unlikely(mbox_status == HSMP_ERR_SMU_BUSY)) {
135 		dev_err(sock->dev, "Message ID 0x%X failure : SMU BUSY (status = 0x%X)\n",
136 			msg->msg_id, mbox_status);
137 		return -EBUSY;
138 	} else if (unlikely(mbox_status != HSMP_STATUS_OK)) {
139 		dev_err(sock->dev, "Message ID 0x%X unknown failure (status = 0x%X)\n",
140 			msg->msg_id, mbox_status);
141 		return -EIO;
142 	}
143 
144 	/*
145 	 * SMU has responded OK. Read response data.
146 	 * SMU reads the input arguments from eight 32 bit registers starting
147 	 * from SMN_HSMP_MSG_DATA and writes the response data to the same
148 	 * SMN_HSMP_MSG_DATA address.
149 	 * We copy the response data if any, back to the args[].
150 	 */
151 	index = 0;
152 	while (index < msg->response_sz) {
153 		ret = sock->amd_hsmp_rdwr(sock, mbinfo->msg_arg_off + (index << 2),
154 					  &msg->args[index], HSMP_RD);
155 		if (ret) {
156 			dev_err(sock->dev, "Error %d reading response %u for message ID:%u\n",
157 				ret, index, msg->msg_id);
158 			break;
159 		}
160 		index++;
161 	}
162 
163 	return ret;
164 }
165 
validate_message(struct hsmp_message * msg)166 static int validate_message(struct hsmp_message *msg)
167 {
168 	/* msg_id against valid range of message IDs */
169 	if (msg->msg_id < HSMP_TEST || msg->msg_id >= HSMP_MSG_ID_MAX)
170 		return -ENOMSG;
171 
172 	/* msg_id is a reserved message ID */
173 	if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_RSVD)
174 		return -ENOMSG;
175 
176 	/*
177 	 * num_args passed by user should match the num_args specified in
178 	 * message description table.
179 	 */
180 	if (msg->num_args != hsmp_msg_desc_table[msg->msg_id].num_args)
181 		return -EINVAL;
182 
183 	/*
184 	 * Some older HSMP SET messages are updated to add GET in the same message.
185 	 * In these messages, GET returns the current value and SET also returns
186 	 * the successfully set value. To support this GET and SET in same message
187 	 * while maintaining backward compatibility for the HSMP users,
188 	 * hsmp_msg_desc_table[] indicates only maximum allowed response_sz.
189 	 */
190 	if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_SET_GET) {
191 		if (msg->response_sz > hsmp_msg_desc_table[msg->msg_id].response_sz)
192 			return -EINVAL;
193 	} else {
194 		/* only HSMP_SET or HSMP_GET messages go through this strict check */
195 		if (msg->response_sz != hsmp_msg_desc_table[msg->msg_id].response_sz)
196 			return -EINVAL;
197 	}
198 	return 0;
199 }
200 
hsmp_send_message(struct hsmp_message * msg)201 int hsmp_send_message(struct hsmp_message *msg)
202 {
203 	struct hsmp_socket *sock;
204 	int ret;
205 
206 	if (!msg)
207 		return -EINVAL;
208 	ret = validate_message(msg);
209 	if (ret)
210 		return ret;
211 
212 	if (!hsmp_pdev.sock || msg->sock_ind >= hsmp_pdev.num_sockets)
213 		return -ENODEV;
214 	sock = &hsmp_pdev.sock[msg->sock_ind];
215 
216 	/*
217 	 * The time taken by smu operation to complete is between
218 	 * 10us to 1ms. Sometime it may take more time.
219 	 * In SMP system timeout of 100 millisecs should
220 	 * be enough for the previous thread to finish the operation
221 	 */
222 	ret = down_timeout(&sock->hsmp_sem, msecs_to_jiffies(HSMP_MSG_TIMEOUT));
223 	if (ret < 0)
224 		return ret;
225 
226 	ret = __hsmp_send_message(sock, msg);
227 
228 	up(&sock->hsmp_sem);
229 
230 	return ret;
231 }
232 EXPORT_SYMBOL_NS_GPL(hsmp_send_message, "AMD_HSMP");
233 
hsmp_test(u16 sock_ind,u32 value)234 int hsmp_test(u16 sock_ind, u32 value)
235 {
236 	struct hsmp_message msg = { 0 };
237 	int ret;
238 
239 	/*
240 	 * Test the hsmp port by performing TEST command. The test message
241 	 * takes one argument and returns the value of that argument + 1.
242 	 */
243 	msg.msg_id	= HSMP_TEST;
244 	msg.num_args	= 1;
245 	msg.response_sz	= 1;
246 	msg.args[0]	= value;
247 	msg.sock_ind	= sock_ind;
248 
249 	ret = hsmp_send_message(&msg);
250 	if (ret)
251 		return ret;
252 
253 	/* Check the response value */
254 	if (msg.args[0] != (value + 1)) {
255 		dev_err(hsmp_pdev.sock[sock_ind].dev,
256 			"Socket %d test message failed, Expected 0x%08X, received 0x%08X\n",
257 			sock_ind, (value + 1), msg.args[0]);
258 		return -EBADE;
259 	}
260 
261 	return ret;
262 }
263 EXPORT_SYMBOL_NS_GPL(hsmp_test, "AMD_HSMP");
264 
is_get_msg(struct hsmp_message * msg)265 static bool is_get_msg(struct hsmp_message *msg)
266 {
267 	if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_GET)
268 		return true;
269 
270 	if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_SET_GET &&
271 	    (msg->args[0] & CHECK_GET_BIT))
272 		return true;
273 
274 	return false;
275 }
276 
hsmp_ioctl(struct file * fp,unsigned int cmd,unsigned long arg)277 long hsmp_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
278 {
279 	int __user *arguser = (int  __user *)arg;
280 	struct hsmp_message msg = { 0 };
281 	int ret;
282 
283 	if (copy_struct_from_user(&msg, sizeof(msg), arguser, sizeof(struct hsmp_message)))
284 		return -EFAULT;
285 
286 	/*
287 	 * Check msg_id is within the range of supported msg ids
288 	 * i.e within the array bounds of hsmp_msg_desc_table
289 	 */
290 	if (msg.msg_id < HSMP_TEST || msg.msg_id >= HSMP_MSG_ID_MAX)
291 		return -ENOMSG;
292 
293 	switch (fp->f_mode & (FMODE_WRITE | FMODE_READ)) {
294 	case FMODE_WRITE:
295 		/*
296 		 * Device is opened in O_WRONLY mode
297 		 * Execute only set/configure commands
298 		 */
299 		if (is_get_msg(&msg))
300 			return -EPERM;
301 		break;
302 	case FMODE_READ:
303 		/*
304 		 * Device is opened in O_RDONLY mode
305 		 * Execute only get/monitor commands
306 		 */
307 		if (!is_get_msg(&msg))
308 			return -EPERM;
309 		break;
310 	case FMODE_READ | FMODE_WRITE:
311 		/*
312 		 * Device is opened in O_RDWR mode
313 		 * Execute both get/monitor and set/configure commands
314 		 */
315 		break;
316 	default:
317 		return -EPERM;
318 	}
319 
320 	ret = hsmp_send_message(&msg);
321 	if (ret)
322 		return ret;
323 
324 	if (hsmp_msg_desc_table[msg.msg_id].response_sz > 0) {
325 		/* Copy results back to user for get/monitor commands */
326 		if (copy_to_user(arguser, &msg, sizeof(struct hsmp_message)))
327 			return -EFAULT;
328 	}
329 
330 	return 0;
331 }
332 
hsmp_metric_tbl_read(struct hsmp_socket * sock,char * buf,size_t size)333 ssize_t hsmp_metric_tbl_read(struct hsmp_socket *sock, char *buf, size_t size)
334 {
335 	struct hsmp_message msg = { 0 };
336 	int ret;
337 
338 	if (!sock || !buf)
339 		return -EINVAL;
340 
341 	/* Do not support lseek(), also don't allow more than the size of metric table */
342 	if (size != sizeof(struct hsmp_metric_table)) {
343 		dev_err(sock->dev, "Wrong buffer size\n");
344 		return -EINVAL;
345 	}
346 
347 	msg.msg_id	= HSMP_GET_METRIC_TABLE;
348 	msg.sock_ind	= sock->sock_ind;
349 
350 	ret = hsmp_send_message(&msg);
351 	if (ret)
352 		return ret;
353 	memcpy_fromio(buf, sock->metric_tbl_addr, size);
354 
355 	return size;
356 }
357 EXPORT_SYMBOL_NS_GPL(hsmp_metric_tbl_read, "AMD_HSMP");
358 
hsmp_get_tbl_dram_base(u16 sock_ind)359 int hsmp_get_tbl_dram_base(u16 sock_ind)
360 {
361 	struct hsmp_socket *sock = &hsmp_pdev.sock[sock_ind];
362 	struct hsmp_message msg = { 0 };
363 	phys_addr_t dram_addr;
364 	int ret;
365 
366 	msg.sock_ind	= sock_ind;
367 	msg.response_sz	= hsmp_msg_desc_table[HSMP_GET_METRIC_TABLE_DRAM_ADDR].response_sz;
368 	msg.msg_id	= HSMP_GET_METRIC_TABLE_DRAM_ADDR;
369 
370 	ret = hsmp_send_message(&msg);
371 	if (ret)
372 		return ret;
373 
374 	/*
375 	 * calculate the metric table DRAM address from lower and upper 32 bits
376 	 * sent from SMU and ioremap it to virtual address.
377 	 */
378 	dram_addr = msg.args[0] | ((u64)(msg.args[1]) << 32);
379 	if (!dram_addr) {
380 		dev_err(sock->dev, "Invalid DRAM address for metric table\n");
381 		return -ENOMEM;
382 	}
383 	sock->metric_tbl_addr = devm_ioremap(sock->dev, dram_addr,
384 					     sizeof(struct hsmp_metric_table));
385 	if (!sock->metric_tbl_addr) {
386 		dev_err(sock->dev, "Failed to ioremap metric table addr\n");
387 		return -ENOMEM;
388 	}
389 	return 0;
390 }
391 EXPORT_SYMBOL_NS_GPL(hsmp_get_tbl_dram_base, "AMD_HSMP");
392 
hsmp_cache_proto_ver(u16 sock_ind)393 int hsmp_cache_proto_ver(u16 sock_ind)
394 {
395 	struct hsmp_message msg = { 0 };
396 	int ret;
397 
398 	msg.msg_id	= HSMP_GET_PROTO_VER;
399 	msg.sock_ind	= sock_ind;
400 	msg.response_sz = hsmp_msg_desc_table[HSMP_GET_PROTO_VER].response_sz;
401 
402 	ret = hsmp_send_message(&msg);
403 	if (!ret)
404 		hsmp_pdev.proto_ver = msg.args[0];
405 
406 	return ret;
407 }
408 EXPORT_SYMBOL_NS_GPL(hsmp_cache_proto_ver, "AMD_HSMP");
409 
410 static const struct file_operations hsmp_fops = {
411 	.owner		= THIS_MODULE,
412 	.unlocked_ioctl	= hsmp_ioctl,
413 	.compat_ioctl	= hsmp_ioctl,
414 };
415 
hsmp_misc_register(struct device * dev)416 int hsmp_misc_register(struct device *dev)
417 {
418 	hsmp_pdev.mdev.name	= HSMP_CDEV_NAME;
419 	hsmp_pdev.mdev.minor	= MISC_DYNAMIC_MINOR;
420 	hsmp_pdev.mdev.fops	= &hsmp_fops;
421 	hsmp_pdev.mdev.parent	= dev;
422 	hsmp_pdev.mdev.nodename	= HSMP_DEVNODE_NAME;
423 	hsmp_pdev.mdev.mode	= 0644;
424 
425 	return misc_register(&hsmp_pdev.mdev);
426 }
427 EXPORT_SYMBOL_NS_GPL(hsmp_misc_register, "AMD_HSMP");
428 
hsmp_misc_deregister(void)429 void hsmp_misc_deregister(void)
430 {
431 	misc_deregister(&hsmp_pdev.mdev);
432 }
433 EXPORT_SYMBOL_NS_GPL(hsmp_misc_deregister, "AMD_HSMP");
434 
get_hsmp_pdev(void)435 struct hsmp_plat_device *get_hsmp_pdev(void)
436 {
437 	return &hsmp_pdev;
438 }
439 EXPORT_SYMBOL_NS_GPL(get_hsmp_pdev, "AMD_HSMP");
440 
441 MODULE_DESCRIPTION("AMD HSMP Common driver");
442 MODULE_VERSION(DRIVER_VERSION);
443 MODULE_LICENSE("GPL");
444