xref: /linux/drivers/gpu/nova-core/gsp/boot.rs (revision a7a080bb4236ebe577b6776d940d1717912ff6dd)
1 // SPDX-License-Identifier: GPL-2.0
2 
3 use kernel::{
4     device,
5     dma::Coherent,
6     io::poll::read_poll_timeout,
7     io::Io,
8     pci,
9     prelude::*,
10     time::Delta, //
11 };
12 
13 use crate::{
14     driver::Bar0,
15     falcon::{
16         gsp::Gsp,
17         sec2::Sec2,
18         Falcon, //
19     },
20     fb::FbLayout,
21     firmware::{
22         booter::{
23             BooterFirmware,
24             BooterKind, //
25         },
26         fwsec::{
27             bootloader::FwsecFirmwareWithBl,
28             FwsecCommand,
29             FwsecFirmware, //
30         },
31         gsp::GspFirmware,
32         FIRMWARE_VERSION, //
33     },
34     gpu::Chipset,
35     gsp::{
36         commands,
37         sequencer::{
38             GspSequencer,
39             GspSequencerParams, //
40         },
41         GspFwWprMeta, //
42     },
43     regs,
44     vbios::Vbios,
45 };
46 
47 impl super::Gsp {
48     /// Helper function to load and run the FWSEC-FRTS firmware and confirm that it has properly
49     /// created the WPR2 region.
50     fn run_fwsec_frts(
51         dev: &device::Device<device::Bound>,
52         chipset: Chipset,
53         falcon: &Falcon<Gsp>,
54         bar: &Bar0,
55         bios: &Vbios,
56         fb_layout: &FbLayout,
57     ) -> Result<()> {
58         // Check that the WPR2 region does not already exists - if it does, we cannot run
59         // FWSEC-FRTS until the GPU is reset.
60         if bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI).higher_bound() != 0 {
61             dev_err!(
62                 dev,
63                 "WPR2 region already exists - GPU needs to be reset to proceed\n"
64             );
65             return Err(EBUSY);
66         }
67 
68         // FWSEC-FRTS will create the WPR2 region.
69         let fwsec_frts = FwsecFirmware::new(
70             dev,
71             falcon,
72             bar,
73             bios,
74             FwsecCommand::Frts {
75                 frts_addr: fb_layout.frts.start,
76                 frts_size: fb_layout.frts.len(),
77             },
78         )?;
79 
80         if chipset.needs_fwsec_bootloader() {
81             let fwsec_frts_bl = FwsecFirmwareWithBl::new(fwsec_frts, dev, chipset)?;
82             // Load and run the bootloader, which will load FWSEC-FRTS and run it.
83             fwsec_frts_bl.run(dev, falcon, bar)?;
84         } else {
85             // Load and run FWSEC-FRTS directly.
86             fwsec_frts.run(dev, falcon, bar)?;
87         }
88 
89         // SCRATCH_E contains the error code for FWSEC-FRTS.
90         let frts_status = bar
91             .read(regs::NV_PBUS_SW_SCRATCH_0E_FRTS_ERR)
92             .frts_err_code();
93         if frts_status != 0 {
94             dev_err!(
95                 dev,
96                 "FWSEC-FRTS returned with error code {:#x}\n",
97                 frts_status
98             );
99 
100             return Err(EIO);
101         }
102 
103         // Check that the WPR2 region has been created as we requested.
104         let (wpr2_lo, wpr2_hi) = (
105             bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_LO).lower_bound(),
106             bar.read(regs::NV_PFB_PRI_MMU_WPR2_ADDR_HI).higher_bound(),
107         );
108 
109         match (wpr2_lo, wpr2_hi) {
110             (_, 0) => {
111                 dev_err!(dev, "WPR2 region not created after running FWSEC-FRTS\n");
112 
113                 Err(EIO)
114             }
115             (wpr2_lo, _) if wpr2_lo != fb_layout.frts.start => {
116                 dev_err!(
117                     dev,
118                     "WPR2 region created at unexpected address {:#x}; expected {:#x}\n",
119                     wpr2_lo,
120                     fb_layout.frts.start,
121                 );
122 
123                 Err(EIO)
124             }
125             (wpr2_lo, wpr2_hi) => {
126                 dev_dbg!(dev, "WPR2: {:#x}-{:#x}\n", wpr2_lo, wpr2_hi);
127                 dev_dbg!(dev, "GPU instance built\n");
128 
129                 Ok(())
130             }
131         }
132     }
133 
134     /// Attempt to boot the GSP.
135     ///
136     /// This is a GPU-dependent and complex procedure that involves loading firmware files from
137     /// user-space, patching them with signatures, and building firmware-specific intricate data
138     /// structures that the GSP will use at runtime.
139     ///
140     /// Upon return, the GSP is up and running, and its runtime object given as return value.
141     pub(crate) fn boot(
142         self: Pin<&mut Self>,
143         pdev: &pci::Device<device::Bound>,
144         bar: &Bar0,
145         chipset: Chipset,
146         gsp_falcon: &Falcon<Gsp>,
147         sec2_falcon: &Falcon<Sec2>,
148     ) -> Result {
149         let dev = pdev.as_ref();
150 
151         let bios = Vbios::new(dev, bar)?;
152 
153         let gsp_fw = KBox::pin_init(GspFirmware::new(dev, chipset, FIRMWARE_VERSION), GFP_KERNEL)?;
154 
155         let fb_layout = FbLayout::new(chipset, bar, &gsp_fw)?;
156         dev_dbg!(dev, "{:#x?}\n", fb_layout);
157 
158         Self::run_fwsec_frts(dev, chipset, gsp_falcon, bar, &bios, &fb_layout)?;
159 
160         let booter_loader = BooterFirmware::new(
161             dev,
162             BooterKind::Loader,
163             chipset,
164             FIRMWARE_VERSION,
165             sec2_falcon,
166             bar,
167         )?;
168 
169         let wpr_meta = Coherent::init(dev, GFP_KERNEL, GspFwWprMeta::new(&gsp_fw, &fb_layout))?;
170 
171         self.cmdq
172             .send_command_no_wait(bar, commands::SetSystemInfo::new(pdev))?;
173         self.cmdq
174             .send_command_no_wait(bar, commands::SetRegistry::new())?;
175 
176         gsp_falcon.reset(bar)?;
177         let libos_handle = self.libos.dma_handle();
178         let (mbox0, mbox1) = gsp_falcon.boot(
179             bar,
180             Some(libos_handle as u32),
181             Some((libos_handle >> 32) as u32),
182         )?;
183         dev_dbg!(pdev, "GSP MBOX0: {:#x}, MBOX1: {:#x}\n", mbox0, mbox1);
184 
185         dev_dbg!(
186             pdev,
187             "Using SEC2 to load and run the booter_load firmware...\n"
188         );
189 
190         sec2_falcon.reset(bar)?;
191         sec2_falcon.load(dev, bar, &booter_loader)?;
192         let wpr_handle = wpr_meta.dma_handle();
193         let (mbox0, mbox1) = sec2_falcon.boot(
194             bar,
195             Some(wpr_handle as u32),
196             Some((wpr_handle >> 32) as u32),
197         )?;
198         dev_dbg!(pdev, "SEC2 MBOX0: {:#x}, MBOX1: {:#x}\n", mbox0, mbox1);
199 
200         if mbox0 != 0 {
201             dev_err!(pdev, "Booter-load failed with error {:#x}\n", mbox0);
202             return Err(ENODEV);
203         }
204 
205         gsp_falcon.write_os_version(bar, gsp_fw.bootloader.app_version);
206 
207         // Poll for RISC-V to become active before running sequencer
208         read_poll_timeout(
209             || Ok(gsp_falcon.is_riscv_active(bar)),
210             |val: &bool| *val,
211             Delta::from_millis(10),
212             Delta::from_secs(5),
213         )?;
214 
215         dev_dbg!(pdev, "RISC-V active? {}\n", gsp_falcon.is_riscv_active(bar),);
216 
217         // Create and run the GSP sequencer.
218         let seq_params = GspSequencerParams {
219             bootloader_app_version: gsp_fw.bootloader.app_version,
220             libos_dma_handle: libos_handle,
221             gsp_falcon,
222             sec2_falcon,
223             dev: pdev.as_ref().into(),
224             bar,
225         };
226         GspSequencer::run(&self.cmdq, seq_params)?;
227 
228         // Wait until GSP is fully initialized.
229         commands::wait_gsp_init_done(&self.cmdq)?;
230 
231         // Obtain and display basic GPU information.
232         let info = commands::get_gsp_info(&self.cmdq, bar)?;
233         match info.gpu_name() {
234             Ok(name) => dev_info!(pdev, "GPU name: {}\n", name),
235             Err(e) => dev_warn!(pdev, "GPU name unavailable: {:?}\n", e),
236         }
237 
238         Ok(())
239     }
240 }
241