xref: /linux/arch/arm64/boot/dts/qcom/sdm845-mtp.dts (revision 0cac5ce06e524755b3dac1e0a060b05992076d93)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SDM845 MTP board device tree source
4 *
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11#include "sdm845.dtsi"
12#include "pm8998.dtsi"
13#include "pmi8998.dtsi"
14
15/ {
16	model = "Qualcomm Technologies, Inc. SDM845 MTP";
17	compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18	chassis-type = "handset";
19
20	aliases {
21		serial0 = &uart9;
22	};
23
24	chosen {
25		stdout-path = "serial0:115200n8";
26	};
27
28	vph_pwr: vph-pwr-regulator {
29		compatible = "regulator-fixed";
30		regulator-name = "vph_pwr";
31		regulator-min-microvolt = <3700000>;
32		regulator-max-microvolt = <3700000>;
33	};
34
35	/*
36	 * Apparently RPMh does not provide support for PM8998 S4 because it
37	 * is always-on; model it as a fixed regulator.
38	 */
39	vreg_s4a_1p8: pm8998-smps4 {
40		compatible = "regulator-fixed";
41		regulator-name = "vreg_s4a_1p8";
42
43		regulator-min-microvolt = <1800000>;
44		regulator-max-microvolt = <1800000>;
45
46		regulator-always-on;
47		regulator-boot-on;
48
49		vin-supply = <&vph_pwr>;
50	};
51
52	thermal-zones {
53		xo_thermal: xo-thermal {
54			thermal-sensors = <&pm8998_adc_tm 1>;
55
56			trips {
57				trip-point {
58					temperature = <125000>;
59					hysteresis = <10000>;
60					type = "passive";
61				};
62			};
63		};
64
65		msm_thermal: msm-thermal {
66			thermal-sensors = <&pm8998_adc_tm 2>;
67
68			trips {
69				trip-point {
70					temperature = <125000>;
71					hysteresis = <10000>;
72					type = "passive";
73				};
74			};
75		};
76
77		pa_thermal: pa-thermal {
78			thermal-sensors = <&pm8998_adc_tm 3>;
79
80			trips {
81				trip-point {
82					temperature = <125000>;
83					hysteresis = <10000>;
84					type = "passive";
85				};
86			};
87		};
88
89		quiet_thermal: quiet-thermal {
90			thermal-sensors = <&pm8998_adc_tm 4>;
91
92			trips {
93				trip-point {
94					temperature = <125000>;
95					hysteresis = <10000>;
96					type = "passive";
97				};
98			};
99		};
100	};
101};
102
103&adsp_pas {
104	status = "okay";
105	firmware-name = "qcom/sdm845/adsp.mbn";
106};
107
108&apps_rsc {
109	regulators-0 {
110		compatible = "qcom,pm8998-rpmh-regulators";
111		qcom,pmic-id = "a";
112
113		vdd-s1-supply = <&vph_pwr>;
114		vdd-s2-supply = <&vph_pwr>;
115		vdd-s3-supply = <&vph_pwr>;
116		vdd-s4-supply = <&vph_pwr>;
117		vdd-s5-supply = <&vph_pwr>;
118		vdd-s6-supply = <&vph_pwr>;
119		vdd-s7-supply = <&vph_pwr>;
120		vdd-s8-supply = <&vph_pwr>;
121		vdd-s9-supply = <&vph_pwr>;
122		vdd-s10-supply = <&vph_pwr>;
123		vdd-s11-supply = <&vph_pwr>;
124		vdd-s12-supply = <&vph_pwr>;
125		vdd-s13-supply = <&vph_pwr>;
126		vdd-l1-l27-supply = <&vreg_s7a_1p025>;
127		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
128		vdd-l3-l11-supply = <&vreg_s7a_1p025>;
129		vdd-l4-l5-supply = <&vreg_s7a_1p025>;
130		vdd-l6-supply = <&vph_pwr>;
131		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
132		vdd-l9-supply = <&vreg_bob>;
133		vdd-l10-l23-l25-supply = <&vreg_bob>;
134		vdd-l13-l19-l21-supply = <&vreg_bob>;
135		vdd-l16-l28-supply = <&vreg_bob>;
136		vdd-l18-l22-supply = <&vreg_bob>;
137		vdd-l20-l24-supply = <&vreg_bob>;
138		vdd-l26-supply = <&vreg_s3a_1p35>;
139		vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
140
141		vreg_s2a_1p125: smps2 {
142			regulator-min-microvolt = <1100000>;
143			regulator-max-microvolt = <1100000>;
144		};
145
146		vreg_s3a_1p35: smps3 {
147			regulator-min-microvolt = <1352000>;
148			regulator-max-microvolt = <1352000>;
149		};
150
151		vreg_s5a_2p04: smps5 {
152			regulator-min-microvolt = <1904000>;
153			regulator-max-microvolt = <2040000>;
154		};
155
156		vreg_s7a_1p025: smps7 {
157			regulator-min-microvolt = <900000>;
158			regulator-max-microvolt = <1028000>;
159		};
160
161		vdd_qusb_hs0:
162		vdda_hp_pcie_core:
163		vdda_mipi_csi0_0p9:
164		vdda_mipi_csi1_0p9:
165		vdda_mipi_csi2_0p9:
166		vdda_mipi_dsi0_pll:
167		vdda_mipi_dsi1_pll:
168		vdda_qlink_lv:
169		vdda_qlink_lv_ck:
170		vdda_qrefs_0p875:
171		vdda_pcie_core:
172		vdda_pll_cc_ebi01:
173		vdda_pll_cc_ebi23:
174		vdda_sp_sensor:
175		vdda_ufs1_core:
176		vdda_ufs2_core:
177		vdda_usb1_ss_core:
178		vdda_usb2_ss_core:
179		vreg_l1a_0p875: ldo1 {
180			regulator-min-microvolt = <880000>;
181			regulator-max-microvolt = <880000>;
182			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183		};
184
185		vddpx_10:
186		vreg_l2a_1p2: ldo2 {
187			regulator-min-microvolt = <1200000>;
188			regulator-max-microvolt = <1200000>;
189			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
190			regulator-always-on;
191		};
192
193		vreg_l3a_1p0: ldo3 {
194			regulator-min-microvolt = <1000000>;
195			regulator-max-microvolt = <1000000>;
196			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
197		};
198
199		vdd_wcss_cx:
200		vdd_wcss_mx:
201		vdda_wcss_pll:
202		vreg_l5a_0p8: ldo5 {
203			regulator-min-microvolt = <800000>;
204			regulator-max-microvolt = <800000>;
205			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
206		};
207
208		vddpx_13:
209		vreg_l6a_1p8: ldo6 {
210			regulator-min-microvolt = <1856000>;
211			regulator-max-microvolt = <1856000>;
212			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213		};
214
215		vreg_l7a_1p8: ldo7 {
216			regulator-min-microvolt = <1800000>;
217			regulator-max-microvolt = <1800000>;
218			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219		};
220
221		vreg_l8a_1p2: ldo8 {
222			regulator-min-microvolt = <1200000>;
223			regulator-max-microvolt = <1248000>;
224			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225		};
226
227		vreg_l9a_1p8: ldo9 {
228			regulator-min-microvolt = <1704000>;
229			regulator-max-microvolt = <2928000>;
230			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
231		};
232
233		vreg_l10a_1p8: ldo10 {
234			regulator-min-microvolt = <1704000>;
235			regulator-max-microvolt = <2928000>;
236			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237		};
238
239		vreg_l11a_1p0: ldo11 {
240			regulator-min-microvolt = <1000000>;
241			regulator-max-microvolt = <1048000>;
242			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243		};
244
245		vdd_qfprom:
246		vdd_qfprom_sp:
247		vdda_apc1_cs_1p8:
248		vdda_gfx_cs_1p8:
249		vdda_qrefs_1p8:
250		vdda_qusb_hs0_1p8:
251		vddpx_11:
252		vreg_l12a_1p8: ldo12 {
253			regulator-min-microvolt = <1800000>;
254			regulator-max-microvolt = <1800000>;
255			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256		};
257
258		vddpx_2:
259		vreg_l13a_2p95: ldo13 {
260			regulator-min-microvolt = <1800000>;
261			regulator-max-microvolt = <2960000>;
262			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263		};
264
265		vreg_l14a_1p88: ldo14 {
266			regulator-min-microvolt = <1800000>;
267			regulator-max-microvolt = <1800000>;
268			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269		};
270
271		vreg_l15a_1p8: ldo15 {
272			regulator-min-microvolt = <1800000>;
273			regulator-max-microvolt = <1800000>;
274			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275		};
276
277		vreg_l16a_2p7: ldo16 {
278			regulator-min-microvolt = <2704000>;
279			regulator-max-microvolt = <2704000>;
280			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281		};
282
283		vreg_l17a_1p3: ldo17 {
284			regulator-min-microvolt = <1304000>;
285			regulator-max-microvolt = <1304000>;
286			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287		};
288
289		vreg_l18a_2p7: ldo18 {
290			regulator-min-microvolt = <2704000>;
291			regulator-max-microvolt = <2960000>;
292			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293		};
294
295		vreg_l19a_3p0: ldo19 {
296			regulator-min-microvolt = <2856000>;
297			regulator-max-microvolt = <3104000>;
298			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299		};
300
301		vreg_l20a_2p95: ldo20 {
302			regulator-min-microvolt = <2704000>;
303			regulator-max-microvolt = <2960000>;
304			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305		};
306
307		vreg_l21a_2p95: ldo21 {
308			regulator-min-microvolt = <2704000>;
309			regulator-max-microvolt = <2960000>;
310			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311		};
312
313		vreg_l22a_2p85: ldo22 {
314			regulator-min-microvolt = <2864000>;
315			regulator-max-microvolt = <3312000>;
316			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317		};
318
319		vreg_l23a_3p3: ldo23 {
320			regulator-min-microvolt = <3000000>;
321			regulator-max-microvolt = <3312000>;
322			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323		};
324
325		vdda_qusb_hs0_3p1:
326		vreg_l24a_3p075: ldo24 {
327			regulator-min-microvolt = <3088000>;
328			regulator-max-microvolt = <3088000>;
329			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
330		};
331
332		vreg_l25a_3p3: ldo25 {
333			regulator-min-microvolt = <3300000>;
334			regulator-max-microvolt = <3312000>;
335			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336		};
337
338		vdda_hp_pcie_1p2:
339		vdda_hv_ebi0:
340		vdda_hv_ebi1:
341		vdda_hv_ebi2:
342		vdda_hv_ebi3:
343		vdda_mipi_csi_1p25:
344		vdda_mipi_dsi0_1p2:
345		vdda_mipi_dsi1_1p2:
346		vdda_pcie_1p2:
347		vdda_ufs1_1p2:
348		vdda_ufs2_1p2:
349		vdda_usb1_ss_1p2:
350		vdda_usb2_ss_1p2:
351		vreg_l26a_1p2: ldo26 {
352			regulator-min-microvolt = <1200000>;
353			regulator-max-microvolt = <1200000>;
354			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
355		};
356
357		vreg_l28a_3p0: ldo28 {
358			regulator-min-microvolt = <2856000>;
359			regulator-max-microvolt = <3008000>;
360			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
361		};
362
363		vreg_lvs1a_1p8: lvs1 {
364			regulator-min-microvolt = <1800000>;
365			regulator-max-microvolt = <1800000>;
366		};
367
368		vreg_lvs2a_1p8: lvs2 {
369			regulator-min-microvolt = <1800000>;
370			regulator-max-microvolt = <1800000>;
371		};
372	};
373
374	regulators-1 {
375		compatible = "qcom,pmi8998-rpmh-regulators";
376		qcom,pmic-id = "b";
377
378		vdd-bob-supply = <&vph_pwr>;
379
380		vreg_bob: bob {
381			regulator-min-microvolt = <3312000>;
382			regulator-max-microvolt = <3600000>;
383			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
384			regulator-allow-bypass;
385		};
386	};
387
388	regulators-2 {
389		compatible = "qcom,pm8005-rpmh-regulators";
390		qcom,pmic-id = "c";
391
392		vdd-s1-supply = <&vph_pwr>;
393		vdd-s2-supply = <&vph_pwr>;
394		vdd-s3-supply = <&vph_pwr>;
395		vdd-s4-supply = <&vph_pwr>;
396
397		vreg_s3c_0p6: smps3 {
398			regulator-min-microvolt = <600000>;
399			regulator-max-microvolt = <600000>;
400		};
401	};
402};
403
404&cdsp_pas {
405	status = "okay";
406	firmware-name = "qcom/sdm845/cdsp.mbn";
407};
408
409&gcc {
410	protected-clocks = <GCC_QSPI_CORE_CLK>,
411			   <GCC_QSPI_CORE_CLK_SRC>,
412			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
413			   <GCC_LPASS_Q6_AXI_CLK>,
414			   <GCC_LPASS_SWAY_CLK>;
415};
416
417&gpu {
418	status = "okay";
419};
420
421&gpu_zap_shader {
422	firmware-name = "qcom/sdm845/a630_zap.mbn";
423};
424
425&i2c10 {
426	status = "okay";
427	clock-frequency = <400000>;
428};
429
430&ipa {
431	qcom,gsi-loader = "self";
432	memory-region = <&ipa_fw_mem>;
433	status = "okay";
434};
435
436&mdss {
437	status = "okay";
438};
439
440&mdss_dsi0 {
441	status = "okay";
442	vdda-supply = <&vdda_mipi_dsi0_1p2>;
443
444	qcom,dual-dsi-mode;
445	qcom,master-dsi;
446
447	panel@0 {
448		compatible = "truly,nt35597-2K-display";
449		reg = <0>;
450		vdda-supply = <&vreg_l14a_1p88>;
451
452		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
453		mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
454
455		ports {
456			#address-cells = <1>;
457			#size-cells = <0>;
458
459			port@0 {
460				reg = <0>;
461				truly_in_0: endpoint {
462					remote-endpoint = <&mdss_dsi0_out>;
463				};
464			};
465
466			port@1 {
467				reg = <1>;
468				truly_in_1: endpoint {
469					remote-endpoint = <&mdss_dsi1_out>;
470				};
471			};
472		};
473	};
474};
475
476&mdss_dsi0_out {
477	remote-endpoint = <&truly_in_0>;
478	data-lanes = <0 1 2 3>;
479};
480
481&mdss_dsi0_phy {
482	status = "okay";
483	vdds-supply = <&vdda_mipi_dsi0_pll>;
484};
485
486&mdss_dsi1 {
487	status = "okay";
488	vdda-supply = <&vdda_mipi_dsi1_1p2>;
489
490	qcom,dual-dsi-mode;
491
492	/* DSI1 is slave, so use DSI0 clocks */
493	assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
494				 <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
495};
496
497&mdss_dsi1_out {
498	remote-endpoint = <&truly_in_1>;
499	data-lanes = <0 1 2 3>;
500};
501
502&mdss_dsi1_phy {
503	status = "okay";
504	vdds-supply = <&vdda_mipi_dsi1_pll>;
505};
506
507&mss_pil {
508	status = "okay";
509	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
510};
511
512&pcie0 {
513	perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
514
515	pinctrl-0 = <&pcie0_default_state>;
516	pinctrl-names = "default";
517
518	status = "okay";
519};
520
521&pcie0_phy {
522	vdda-phy-supply = <&vreg_l1a_0p875>;
523	vdda-pll-supply = <&vreg_l26a_1p2>;
524
525	status = "okay";
526};
527
528&pcie1 {
529	perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
530
531	pinctrl-names = "default";
532	pinctrl-0 = <&pcie1_default_state>;
533
534	status = "okay";
535};
536
537&pcie1_phy {
538	status = "okay";
539
540	vdda-phy-supply = <&vreg_l1a_0p875>;
541	vdda-pll-supply = <&vreg_l26a_1p2>;
542};
543
544&pm8998_adc {
545	channel@4c {
546		reg = <ADC5_XO_THERM_100K_PU>;
547		label = "xo_therm";
548		qcom,ratiometric;
549		qcom,hw-settle-time = <200>;
550	};
551
552	channel@4d {
553		reg = <ADC5_AMUX_THM1_100K_PU>;
554		label = "msm_therm";
555		qcom,ratiometric;
556		qcom,hw-settle-time = <200>;
557	};
558
559	channel@4f {
560		reg = <ADC5_AMUX_THM3_100K_PU>;
561		label = "pa_therm1";
562		qcom,ratiometric;
563		qcom,hw-settle-time = <200>;
564	};
565
566	channel@51 {
567		reg = <ADC5_AMUX_THM5_100K_PU>;
568		label = "quiet_therm";
569		qcom,ratiometric;
570		qcom,hw-settle-time = <200>;
571	};
572
573	channel@83 {
574		reg = <ADC5_VPH_PWR>;
575		label = "vph_pwr";
576		qcom,ratiometric;
577		qcom,hw-settle-time = <200>;
578	};
579
580	channel@85 {
581		reg = <ADC5_VCOIN>;
582		label = "vcoin";
583		qcom,ratiometric;
584		qcom,hw-settle-time = <200>;
585	};
586};
587
588&pm8998_adc_tm {
589	status = "okay";
590
591	xo-thermistor@1 {
592		reg = <1>;
593		io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>;
594		qcom,ratiometric;
595		qcom,hw-settle-time-us = <200>;
596	};
597
598	msm-thermistor@2 {
599		reg = <2>;
600		io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>;
601		qcom,ratiometric;
602		qcom,hw-settle-time-us = <200>;
603	};
604
605	pa-thermistor@3 {
606		reg = <3>;
607		io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>;
608		qcom,ratiometric;
609		qcom,hw-settle-time-us = <200>;
610	};
611
612	quiet-thermistor@4 {
613		reg = <4>;
614		io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>;
615		qcom,ratiometric;
616		qcom,hw-settle-time-us = <200>;
617	};
618};
619
620&pm8998_resin {
621	linux,code = <KEY_VOLUMEDOWN>;
622	status = "okay";
623};
624
625&qupv3_id_1 {
626	status = "okay";
627};
628
629&sdhc_2 {
630	status = "okay";
631
632	pinctrl-names = "default";
633	pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
634
635	vmmc-supply = <&vreg_l21a_2p95>;
636	vqmmc-supply = <&vddpx_2>;
637
638	cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
639};
640
641&tlmm {
642	pcie0_default_state: pcie0-default-state {
643		clkreq-pins {
644			pins = "gpio36";
645			function = "pci_e0";
646			bias-pull-up;
647		};
648
649		perst-n-pins {
650			pins = "gpio35";
651			function = "gpio";
652			drive-strength = <2>;
653			bias-pull-down;
654		};
655
656		wake-n-pins {
657			pins = "gpio37";
658			function = "gpio";
659			drive-strength = <2>;
660			bias-pull-up;
661		};
662	};
663
664	pcie1_default_state: pcie1-default-state {
665		clkreq-pins {
666			pins = "gpio103";
667			function = "pci_e1";
668			bias-pull-up;
669		};
670
671		perst-n-pins {
672			pins = "gpio102";
673			function = "gpio";
674			drive-strength = <16>;
675			bias-pull-down;
676		};
677
678		wake-n-pins {
679			pins = "gpio104";
680			function = "gpio";
681			drive-strength = <2>;
682			bias-pull-up;
683		};
684	};
685};
686
687&uart9 {
688	status = "okay";
689};
690
691&ufs_mem_hc {
692	status = "okay";
693
694	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
695
696	vcc-supply = <&vreg_l20a_2p95>;
697	vcc-max-microamp = <600000>;
698};
699
700&ufs_mem_phy {
701	status = "okay";
702
703	vdda-phy-supply = <&vdda_ufs1_core>;
704	vdda-pll-supply = <&vdda_ufs1_1p2>;
705};
706
707&usb_1 {
708	status = "okay";
709};
710
711&usb_1_dwc3 {
712	/* Until we have Type C hooked up we'll force this as peripheral. */
713	dr_mode = "peripheral";
714};
715
716&usb_1_hsphy {
717	status = "okay";
718
719	vdd-supply = <&vdda_usb1_ss_core>;
720	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
721	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
722
723	qcom,imp-res-offset-value = <8>;
724	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
725	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
726	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
727};
728
729&usb_1_qmpphy {
730	status = "okay";
731
732	vdda-phy-supply = <&vdda_usb1_ss_1p2>;
733	vdda-pll-supply = <&vdda_usb1_ss_core>;
734};
735
736&usb_2 {
737	status = "okay";
738};
739
740&usb_2_dwc3 {
741	/*
742	 * Though the USB block on SDM845 can support host, there's no vbus
743	 * signal for this port on MTP.  Thus (unless you have a non-compliant
744	 * hub that works without vbus) the only sensible thing is to force
745	 * peripheral mode.
746	 */
747	dr_mode = "peripheral";
748};
749
750&usb_2_hsphy {
751	status = "okay";
752
753	vdd-supply = <&vdda_usb2_ss_core>;
754	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
755	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
756
757	qcom,imp-res-offset-value = <8>;
758	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
759};
760
761&usb_2_qmpphy {
762	status = "okay";
763
764	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
765	vdda-pll-supply = <&vdda_usb2_ss_core>;
766};
767
768&venus {
769	status = "okay";
770};
771
772&wifi {
773	status = "okay";
774	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
775	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
776	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
777	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
778
779	qcom,snoc-host-cap-8bit-quirk;
780	qcom,calibration-variant = "Qualcomm_sdm845mtp";
781};
782
783/* PINCTRL - additions to nodes defined in sdm845.dtsi */
784
785&qup_i2c10_default {
786	drive-strength = <2>;
787	bias-disable;
788};
789
790&qup_uart9_rx {
791	drive-strength = <2>;
792	bias-pull-up;
793};
794
795&qup_uart9_tx {
796	drive-strength = <2>;
797	bias-disable;
798};
799
800&tlmm {
801	gpio-reserved-ranges = <0 4>, <81 4>;
802
803	sdc2_clk: sdc2-clk-state {
804		pins = "sdc2_clk";
805		bias-disable;
806
807		/*
808		 * It seems that mmc_test reports errors if drive
809		 * strength is not 16 on clk, cmd, and data pins.
810		 */
811		drive-strength = <16>;
812	};
813
814	sdc2_cmd: sdc2-cmd-state {
815		pins = "sdc2_cmd";
816		bias-pull-up;
817		drive-strength = <16>;
818	};
819
820	sdc2_data: sdc2-data-state {
821		pins = "sdc2_data";
822		bias-pull-up;
823		drive-strength = <16>;
824	};
825
826	sd_card_det_n: sd-card-det-n-state {
827		pins = "gpio126";
828		function = "gpio";
829		bias-pull-up;
830	};
831};
832