1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * GPIO driver for the SMSC SCH311x Super-I/O chips
4 *
5 * Copyright (C) 2013 Bruno Randolf <br1@einfach.org>
6 *
7 * SuperIO functions and chip detection:
8 * (c) Copyright 2008 Wim Van Sebroeck <wim@iguana.be>.
9 */
10
11 #include <linux/ioport.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/gpio/driver.h>
17 #include <linux/bitops.h>
18 #include <linux/io.h>
19
20 #define DRV_NAME "gpio-sch311x"
21
22 #define SCH311X_GPIO_CONF_DIR BIT(0)
23 #define SCH311X_GPIO_CONF_INVERT BIT(1)
24 #define SCH311X_GPIO_CONF_OPEN_DRAIN BIT(7)
25
26 #define SIO_CONFIG_KEY_ENTER 0x55
27 #define SIO_CONFIG_KEY_EXIT 0xaa
28
29 #define GP1 0x4b
30
31 static int sch311x_ioports[] = { 0x2e, 0x4e, 0x162e, 0x164e };
32
33 static struct platform_device *sch311x_gpio_pdev;
34
35 struct sch311x_pdev_data { /* platform device data */
36 unsigned short runtime_reg; /* runtime register base address */
37 };
38
39 struct sch311x_gpio_block { /* one GPIO block runtime data */
40 struct gpio_chip chip;
41 unsigned short data_reg; /* from definition below */
42 unsigned short *config_regs; /* pointer to definition below */
43 unsigned short runtime_reg; /* runtime register */
44 spinlock_t lock; /* lock for this GPIO block */
45 };
46
47 struct sch311x_gpio_priv { /* driver private data */
48 struct sch311x_gpio_block blocks[6];
49 };
50
51 struct sch311x_gpio_block_def { /* register address definitions */
52 unsigned short data_reg;
53 unsigned short config_regs[8];
54 unsigned short base;
55 };
56
57 /* Note: some GPIOs are not available, these are marked with 0x00 */
58
59 static struct sch311x_gpio_block_def sch311x_gpio_blocks[] = {
60 {
61 .data_reg = 0x4b, /* GP1 */
62 .config_regs = {0x23, 0x24, 0x25, 0x26, 0x27, 0x29, 0x2a, 0x2b},
63 .base = 10,
64 },
65 {
66 .data_reg = 0x4c, /* GP2 */
67 .config_regs = {0x00, 0x2c, 0x2d, 0x00, 0x00, 0x00, 0x00, 0x32},
68 .base = 20,
69 },
70 {
71 .data_reg = 0x4d, /* GP3 */
72 .config_regs = {0x33, 0x34, 0x35, 0x36, 0x37, 0x00, 0x39, 0x3a},
73 .base = 30,
74 },
75 {
76 .data_reg = 0x4e, /* GP4 */
77 .config_regs = {0x3b, 0x00, 0x3d, 0x00, 0x6e, 0x6f, 0x72, 0x73},
78 .base = 40,
79 },
80 {
81 .data_reg = 0x4f, /* GP5 */
82 .config_regs = {0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46},
83 .base = 50,
84 },
85 {
86 .data_reg = 0x50, /* GP6 */
87 .config_regs = {0x47, 0x48, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59},
88 .base = 60,
89 },
90 };
91
92 /*
93 * Super-IO functions
94 */
95
sch311x_sio_enter(int sio_config_port)96 static inline int sch311x_sio_enter(int sio_config_port)
97 {
98 /* Don't step on other drivers' I/O space by accident. */
99 if (!request_muxed_region(sio_config_port, 2, DRV_NAME)) {
100 pr_err(DRV_NAME "I/O address 0x%04x already in use\n",
101 sio_config_port);
102 return -EBUSY;
103 }
104
105 outb(SIO_CONFIG_KEY_ENTER, sio_config_port);
106 return 0;
107 }
108
sch311x_sio_exit(int sio_config_port)109 static inline void sch311x_sio_exit(int sio_config_port)
110 {
111 outb(SIO_CONFIG_KEY_EXIT, sio_config_port);
112 release_region(sio_config_port, 2);
113 }
114
sch311x_sio_inb(int sio_config_port,int reg)115 static inline int sch311x_sio_inb(int sio_config_port, int reg)
116 {
117 outb(reg, sio_config_port);
118 return inb(sio_config_port + 1);
119 }
120
sch311x_sio_outb(int sio_config_port,int reg,int val)121 static inline void sch311x_sio_outb(int sio_config_port, int reg, int val)
122 {
123 outb(reg, sio_config_port);
124 outb(val, sio_config_port + 1);
125 }
126
127
128 /*
129 * GPIO functions
130 */
131
sch311x_gpio_request(struct gpio_chip * chip,unsigned offset)132 static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset)
133 {
134 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
135
136 if (block->config_regs[offset] == 0) /* GPIO is not available */
137 return -ENODEV;
138
139 if (!request_region(block->runtime_reg + block->config_regs[offset],
140 1, DRV_NAME)) {
141 dev_err(chip->parent, "Failed to request region 0x%04x.\n",
142 block->runtime_reg + block->config_regs[offset]);
143 return -EBUSY;
144 }
145 return 0;
146 }
147
sch311x_gpio_free(struct gpio_chip * chip,unsigned offset)148 static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset)
149 {
150 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
151
152 if (block->config_regs[offset] == 0) /* GPIO is not available */
153 return;
154
155 release_region(block->runtime_reg + block->config_regs[offset], 1);
156 }
157
sch311x_gpio_get(struct gpio_chip * chip,unsigned offset)158 static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset)
159 {
160 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
161 u8 data;
162
163 spin_lock(&block->lock);
164 data = inb(block->runtime_reg + block->data_reg);
165 spin_unlock(&block->lock);
166
167 return !!(data & BIT(offset));
168 }
169
__sch311x_gpio_set(struct sch311x_gpio_block * block,unsigned offset,int value)170 static void __sch311x_gpio_set(struct sch311x_gpio_block *block,
171 unsigned offset, int value)
172 {
173 u8 data = inb(block->runtime_reg + block->data_reg);
174 if (value)
175 data |= BIT(offset);
176 else
177 data &= ~BIT(offset);
178 outb(data, block->runtime_reg + block->data_reg);
179 }
180
sch311x_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)181 static int sch311x_gpio_set(struct gpio_chip *chip, unsigned int offset,
182 int value)
183 {
184 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
185
186 spin_lock(&block->lock);
187 __sch311x_gpio_set(block, offset, value);
188 spin_unlock(&block->lock);
189
190 return 0;
191 }
192
sch311x_gpio_direction_in(struct gpio_chip * chip,unsigned offset)193 static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
194 {
195 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
196 u8 data;
197
198 spin_lock(&block->lock);
199 data = inb(block->runtime_reg + block->config_regs[offset]);
200 data |= SCH311X_GPIO_CONF_DIR;
201 outb(data, block->runtime_reg + block->config_regs[offset]);
202 spin_unlock(&block->lock);
203
204 return 0;
205 }
206
sch311x_gpio_direction_out(struct gpio_chip * chip,unsigned offset,int value)207 static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset,
208 int value)
209 {
210 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
211 u8 data;
212
213 spin_lock(&block->lock);
214
215 data = inb(block->runtime_reg + block->config_regs[offset]);
216 data &= ~SCH311X_GPIO_CONF_DIR;
217 outb(data, block->runtime_reg + block->config_regs[offset]);
218 __sch311x_gpio_set(block, offset, value);
219
220 spin_unlock(&block->lock);
221 return 0;
222 }
223
sch311x_gpio_get_direction(struct gpio_chip * chip,unsigned offset)224 static int sch311x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
225 {
226 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
227 u8 data;
228
229 spin_lock(&block->lock);
230 data = inb(block->runtime_reg + block->config_regs[offset]);
231 spin_unlock(&block->lock);
232
233 if (data & SCH311X_GPIO_CONF_DIR)
234 return GPIO_LINE_DIRECTION_IN;
235
236 return GPIO_LINE_DIRECTION_OUT;
237 }
238
sch311x_gpio_set_config(struct gpio_chip * chip,unsigned offset,unsigned long config)239 static int sch311x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
240 unsigned long config)
241 {
242 struct sch311x_gpio_block *block = gpiochip_get_data(chip);
243 enum pin_config_param param = pinconf_to_config_param(config);
244 u8 data;
245
246 switch (param) {
247 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
248 spin_lock(&block->lock);
249 data = inb(block->runtime_reg + block->config_regs[offset]);
250 data |= SCH311X_GPIO_CONF_OPEN_DRAIN;
251 outb(data, block->runtime_reg + block->config_regs[offset]);
252 spin_unlock(&block->lock);
253 return 0;
254 case PIN_CONFIG_DRIVE_PUSH_PULL:
255 spin_lock(&block->lock);
256 data = inb(block->runtime_reg + block->config_regs[offset]);
257 data &= ~SCH311X_GPIO_CONF_OPEN_DRAIN;
258 outb(data, block->runtime_reg + block->config_regs[offset]);
259 spin_unlock(&block->lock);
260 return 0;
261 default:
262 break;
263 }
264 return -ENOTSUPP;
265 }
266
sch311x_gpio_probe(struct platform_device * pdev)267 static int sch311x_gpio_probe(struct platform_device *pdev)
268 {
269 struct sch311x_pdev_data *pdata = dev_get_platdata(&pdev->dev);
270 struct sch311x_gpio_priv *priv;
271 struct sch311x_gpio_block *block;
272 int err, i;
273
274 /* we can register all GPIO data registers at once */
275 if (!devm_request_region(&pdev->dev, pdata->runtime_reg + GP1, 6,
276 DRV_NAME)) {
277 dev_err(&pdev->dev, "Failed to request region 0x%04x-0x%04x.\n",
278 pdata->runtime_reg + GP1, pdata->runtime_reg + GP1 + 5);
279 return -EBUSY;
280 }
281
282 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
283 if (!priv)
284 return -ENOMEM;
285
286 for (i = 0; i < ARRAY_SIZE(priv->blocks); i++) {
287 block = &priv->blocks[i];
288
289 spin_lock_init(&block->lock);
290
291 block->chip.label = DRV_NAME;
292 block->chip.owner = THIS_MODULE;
293 block->chip.request = sch311x_gpio_request;
294 block->chip.free = sch311x_gpio_free;
295 block->chip.direction_input = sch311x_gpio_direction_in;
296 block->chip.direction_output = sch311x_gpio_direction_out;
297 block->chip.get_direction = sch311x_gpio_get_direction;
298 block->chip.set_config = sch311x_gpio_set_config;
299 block->chip.get = sch311x_gpio_get;
300 block->chip.set = sch311x_gpio_set;
301 block->chip.ngpio = 8;
302 block->chip.parent = &pdev->dev;
303 block->chip.base = sch311x_gpio_blocks[i].base;
304 block->config_regs = sch311x_gpio_blocks[i].config_regs;
305 block->data_reg = sch311x_gpio_blocks[i].data_reg;
306 block->runtime_reg = pdata->runtime_reg;
307
308 err = devm_gpiochip_add_data(&pdev->dev, &block->chip, block);
309 if (err < 0) {
310 dev_err(&pdev->dev,
311 "Could not register gpiochip, %d\n", err);
312 return err;
313 }
314 dev_info(&pdev->dev,
315 "SMSC SCH311x GPIO block %d registered.\n", i);
316 }
317
318 return 0;
319 }
320
321 static struct platform_driver sch311x_gpio_driver = {
322 .driver.name = DRV_NAME,
323 .probe = sch311x_gpio_probe,
324 };
325
326
327 /*
328 * Init & exit routines
329 */
330
sch311x_detect(int sio_config_port,unsigned short * addr)331 static int __init sch311x_detect(int sio_config_port, unsigned short *addr)
332 {
333 int err = 0, reg;
334 unsigned short base_addr;
335 u8 dev_id;
336
337 err = sch311x_sio_enter(sio_config_port);
338 if (err)
339 return err;
340
341 /* Check device ID. */
342 reg = sch311x_sio_inb(sio_config_port, 0x20);
343 switch (reg) {
344 case 0x7c: /* SCH3112 */
345 dev_id = 2;
346 break;
347 case 0x7d: /* SCH3114 */
348 dev_id = 4;
349 break;
350 case 0x7f: /* SCH3116 */
351 dev_id = 6;
352 break;
353 default:
354 err = -ENODEV;
355 goto exit;
356 }
357
358 /* Select logical device A (runtime registers) */
359 sch311x_sio_outb(sio_config_port, 0x07, 0x0a);
360
361 /* Check if Logical Device Register is currently active */
362 if ((sch311x_sio_inb(sio_config_port, 0x30) & 0x01) == 0)
363 pr_info("Seems that LDN 0x0a is not active...\n");
364
365 /* Get the base address of the runtime registers */
366 base_addr = (sch311x_sio_inb(sio_config_port, 0x60) << 8) |
367 sch311x_sio_inb(sio_config_port, 0x61);
368 if (!base_addr) {
369 pr_err("Base address not set\n");
370 err = -ENODEV;
371 goto exit;
372 }
373 *addr = base_addr;
374
375 pr_info("Found an SMSC SCH311%d chip at 0x%04x\n", dev_id, base_addr);
376
377 exit:
378 sch311x_sio_exit(sio_config_port);
379 return err;
380 }
381
sch311x_gpio_pdev_add(const unsigned short addr)382 static int __init sch311x_gpio_pdev_add(const unsigned short addr)
383 {
384 struct sch311x_pdev_data pdata;
385 int err;
386
387 pdata.runtime_reg = addr;
388
389 sch311x_gpio_pdev = platform_device_alloc(DRV_NAME, -1);
390 if (!sch311x_gpio_pdev)
391 return -ENOMEM;
392
393 err = platform_device_add_data(sch311x_gpio_pdev,
394 &pdata, sizeof(pdata));
395 if (err) {
396 pr_err(DRV_NAME "Platform data allocation failed\n");
397 goto err;
398 }
399
400 err = platform_device_add(sch311x_gpio_pdev);
401 if (err) {
402 pr_err(DRV_NAME "Device addition failed\n");
403 goto err;
404 }
405 return 0;
406
407 err:
408 platform_device_put(sch311x_gpio_pdev);
409 return err;
410 }
411
sch311x_gpio_init(void)412 static int __init sch311x_gpio_init(void)
413 {
414 int err, i;
415 unsigned short addr = 0;
416
417 for (i = 0; i < ARRAY_SIZE(sch311x_ioports); i++)
418 if (sch311x_detect(sch311x_ioports[i], &addr) == 0)
419 break;
420
421 if (!addr)
422 return -ENODEV;
423
424 err = platform_driver_register(&sch311x_gpio_driver);
425 if (err)
426 return err;
427
428 err = sch311x_gpio_pdev_add(addr);
429 if (err)
430 goto unreg_platform_driver;
431
432 return 0;
433
434 unreg_platform_driver:
435 platform_driver_unregister(&sch311x_gpio_driver);
436 return err;
437 }
438
sch311x_gpio_exit(void)439 static void __exit sch311x_gpio_exit(void)
440 {
441 platform_device_unregister(sch311x_gpio_pdev);
442 platform_driver_unregister(&sch311x_gpio_driver);
443 }
444
445 module_init(sch311x_gpio_init);
446 module_exit(sch311x_gpio_exit);
447
448 MODULE_AUTHOR("Bruno Randolf <br1@einfach.org>");
449 MODULE_DESCRIPTION("SMSC SCH311x GPIO Driver");
450 MODULE_LICENSE("GPL");
451 MODULE_ALIAS("platform:gpio-sch311x");
452