1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // ALSA SoC Texas Instruments TAS2783 Audio Smart Amplifier
4 //
5 // Copyright (C) 2025 Texas Instruments Incorporated
6 // https://www.ti.com
7 //
8 // The TAS2783 driver implements a flexible and configurable
9 // algo coefficient setting for single TAS2783 chips.
10 //
11 // Author: Niranjan H Y <niranjanhy@ti.com>
12 // Author: Baojun Xu <baojun.xu@ti.com>
13 // Author: Kevin Lu <kevin-lu@ti.com>
14
15 #include <linux/unaligned.h>
16 #include <linux/crc32.h>
17 #include <linux/efi.h>
18 #include <linux/err.h>
19 #include <linux/firmware.h>
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <sound/pcm_params.h>
23 #include <linux/pm.h>
24 #include <linux/pm_runtime.h>
25 #include <linux/regmap.h>
26 #include <linux/wait.h>
27 #include <linux/soundwire/sdw.h>
28 #include <linux/soundwire/sdw_registers.h>
29 #include <linux/soundwire/sdw_type.h>
30 #if IS_ENABLED(CONFIG_PCI)
31 #include <linux/pci.h>
32 #endif
33 #include <sound/sdw.h>
34 #include <sound/soc.h>
35 #include <sound/tlv.h>
36 #include <sound/tas2781-tlv.h>
37 #include <sound/sdca_function.h>
38 #include <sound/sdca_regmap.h>
39
40 #include "tas2783.h"
41
42 #define TIMEOUT_FW_DL_MS (3000)
43 #define FW_DL_OFFSET 84 /* binary file information */
44 #define FW_FL_HDR 20 /* minimum number of bytes in one chunk */
45 #define TAS2783_PROBE_TIMEOUT 5000
46 #define TAS2783_CALI_GUID EFI_GUID(0x1f52d2a1, 0xbb3a, 0x457d, 0xbc, \
47 0x09, 0x43, 0xa3, 0xf4, 0x31, 0x0a, 0x92)
48
49 static const u32 tas2783_cali_reg[] = {
50 TAS2783_CAL_R0,
51 TAS2783_CAL_INVR0,
52 TAS2783_CAL_R0LOW,
53 TAS2783_CAL_POWER,
54 TAS2783_CAL_TLIM,
55 };
56
57 struct tas_fw_hdr {
58 u32 size;
59 u32 version_offset;
60 u32 plt_id;
61 u32 ppc3_ver;
62 u32 timestamp;
63 u8 ddc_name[64];
64 };
65
66 struct tas_fw_file {
67 u32 vendor_id;
68 u32 file_id;
69 u32 version;
70 u32 length;
71 u32 dest_addr;
72 u8 *fw_data;
73 };
74
75 struct calibration_data {
76 u32 is_valid;
77 unsigned long read_sz;
78 u8 data[TAS2783_CALIB_DATA_SZ];
79 };
80
81 struct tas2783_prv {
82 struct snd_soc_component *component;
83 struct calibration_data cali_data;
84 struct sdw_slave *sdw_peripheral;
85 struct sdca_function_data *sa_func_data;
86 enum sdw_slave_status status;
87 /* calibration */
88 struct mutex calib_lock;
89 /* pde and firmware download */
90 struct mutex pde_lock;
91 struct regmap *regmap;
92 struct device *dev;
93 struct class *class;
94 struct attribute_group *cal_attr_groups;
95 struct tm tm;
96 u8 rca_binaryname[64];
97 u8 dev_name[32];
98 bool hw_init;
99 /* wq for firmware download */
100 wait_queue_head_t fw_wait;
101 bool fw_dl_task_done;
102 bool fw_dl_success;
103 };
104
105 static const struct reg_default tas2783_reg_default[] = {
106 {TAS2783_AMP_LEVEL, 0x28},
107 {TASDEV_REG_SDW(0, 0, 0x03), 0x28},
108 {TASDEV_REG_SDW(0, 0, 0x04), 0x21},
109 {TASDEV_REG_SDW(0, 0, 0x05), 0x41},
110 {TASDEV_REG_SDW(0, 0, 0x06), 0x00},
111 {TASDEV_REG_SDW(0, 0, 0x07), 0x20},
112 {TASDEV_REG_SDW(0, 0, 0x08), 0x09},
113 {TASDEV_REG_SDW(0, 0, 0x09), 0x02},
114 {TASDEV_REG_SDW(0, 0, 0x0a), 0x0a},
115 {TASDEV_REG_SDW(0, 0, 0x0c), 0x10},
116 {TASDEV_REG_SDW(0, 0, 0x0d), 0x13},
117 {TASDEV_REG_SDW(0, 0, 0x0e), 0xc2},
118 {TASDEV_REG_SDW(0, 0, 0x0f), 0x40},
119 {TASDEV_REG_SDW(0, 0, 0x10), 0x04},
120 {TASDEV_REG_SDW(0, 0, 0x13), 0x13},
121 {TASDEV_REG_SDW(0, 0, 0x14), 0x12},
122 {TASDEV_REG_SDW(0, 0, 0x15), 0x00},
123 {TASDEV_REG_SDW(0, 0, 0x16), 0x12},
124 {TASDEV_REG_SDW(0, 0, 0x17), 0x80},
125 {TAS2783_DVC_LVL, 0x00},
126 {TASDEV_REG_SDW(0, 0, 0x1b), 0x61},
127 {TASDEV_REG_SDW(0, 0, 0x1c), 0x36},
128 {TASDEV_REG_SDW(0, 0, 0x1d), 0x00},
129 {TASDEV_REG_SDW(0, 0, 0x1f), 0x01},
130 {TASDEV_REG_SDW(0, 0, 0x20), 0x2e},
131 {TASDEV_REG_SDW(0, 0, 0x21), 0x00},
132 {TASDEV_REG_SDW(0, 0, 0x34), 0x06},
133 {TASDEV_REG_SDW(0, 0, 0x35), 0xbd},
134 {TASDEV_REG_SDW(0, 0, 0x36), 0xad},
135 {TASDEV_REG_SDW(0, 0, 0x37), 0xa8},
136 {TASDEV_REG_SDW(0, 0, 0x38), 0x00},
137 {TASDEV_REG_SDW(0, 0, 0x3b), 0xfc},
138 {TASDEV_REG_SDW(0, 0, 0x3d), 0xdd},
139 {TASDEV_REG_SDW(0, 0, 0x40), 0xf6},
140 {TASDEV_REG_SDW(0, 0, 0x41), 0x14},
141 {TASDEV_REG_SDW(0, 0, 0x5c), 0x19},
142 {TASDEV_REG_SDW(0, 0, 0x5d), 0x80},
143 {TASDEV_REG_SDW(0, 0, 0x63), 0x48},
144 {TASDEV_REG_SDW(0, 0, 0x65), 0x08},
145 {TASDEV_REG_SDW(0, 0, 0x66), 0xb2},
146 {TASDEV_REG_SDW(0, 0, 0x67), 0x00},
147 {TASDEV_REG_SDW(0, 0, 0x6a), 0x12},
148 {TASDEV_REG_SDW(0, 0, 0x6b), 0xfb},
149 {TASDEV_REG_SDW(0, 0, 0x6c), 0x00},
150 {TASDEV_REG_SDW(0, 0, 0x6d), 0x00},
151 {TASDEV_REG_SDW(0, 0, 0x6e), 0x1a},
152 {TASDEV_REG_SDW(0, 0, 0x6f), 0x00},
153 {TASDEV_REG_SDW(0, 0, 0x70), 0x96},
154 {TASDEV_REG_SDW(0, 0, 0x71), 0x02},
155 {TASDEV_REG_SDW(0, 0, 0x73), 0x08},
156 {TASDEV_REG_SDW(0, 0, 0x75), 0xe0},
157 {TASDEV_REG_SDW(0, 0, 0x7a), 0x60},
158 {TASDEV_REG_SDW(0, 0, 0x60), 0x21},
159 {TASDEV_REG_SDW(0, 1, 0x02), 0x00},
160 {TASDEV_REG_SDW(0, 1, 0x17), 0xc0},
161 {TASDEV_REG_SDW(0, 1, 0x19), 0x60},
162 {TASDEV_REG_SDW(0, 1, 0x35), 0x75},
163 {TASDEV_REG_SDW(0, 1, 0x3d), 0x00},
164 {TASDEV_REG_SDW(0, 1, 0x3e), 0x00},
165 {TASDEV_REG_SDW(0, 1, 0x3f), 0x00},
166 {TASDEV_REG_SDW(0, 1, 0x40), 0x00},
167 {TASDEV_REG_SDW(0, 1, 0x41), 0x00},
168 {TASDEV_REG_SDW(0, 1, 0x42), 0x00},
169 {TASDEV_REG_SDW(0, 1, 0x43), 0x00},
170 {TASDEV_REG_SDW(0, 1, 0x44), 0x00},
171 {TASDEV_REG_SDW(0, 1, 0x45), 0x00},
172 {TASDEV_REG_SDW(0, 1, 0x47), 0xab},
173 {TASDEV_REG_SDW(0, 0xfd, 0x0d), 0x0d},
174 {TASDEV_REG_SDW(0, 0xfd, 0x39), 0x00},
175 {TASDEV_REG_SDW(0, 0xfd, 0x3e), 0x00},
176 {TASDEV_REG_SDW(0, 0xfd, 0x45), 0x00},
177 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0), 0x0},
178 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0), 0x0},
179 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0), 0x0},
180 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0), 0x0},
181 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0), 0x0},
182 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0), 0x0},
183 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0), 0x0},
184 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0), 0x0},
185 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0), 0x0},
186 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0), 0x0},
187 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x01, 1), 0x1},
188 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1), 0x9c00},
189 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0), 0x1},
190 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1), 0x1},
191 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1), 0x0},
192 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0), 0x0},
193 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1), 0x1},
194 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0), 0x1},
195 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1), 0x0},
196 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0), 0x0},
197 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0), 0x1},
198 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1), 0x1},
199 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2), 0x1},
200 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0), 0x0},
201 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1), 0x0},
202 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2), 0x0},
203 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0), 0x0},
204 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0), 0x0},
205 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0), 0x0},
206 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0), 0x0},
207 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0), 0x0},
208 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0), 0x0},
209 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0), 0x0},
210 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0), 0x0},
211 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0), 0x0},
212 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0), 0x0},
213 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0), 0x0},
214 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0), 0x0},
215 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0), 0x0},
216 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0), 0x0},
217 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0), 0x0},
218 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0), 0x0},
219 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0), 0x0},
220 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0), 0x0},
221 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0), 0x0},
222 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0), 0x1},
223 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0), 0x0},
224 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0), 0x0},
225 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0), 0x0},
226 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0), 0x0},
227 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0), 0x0},
228 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0), 0x0},
229 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0), 0x1},
230 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0), 0x0},
231 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0), 0x0},
232 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0), 0x0},
233 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0), 0x0},
234 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0), 0x0},
235 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1), 0x0},
236 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2), 0x0},
237 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3), 0x0},
238 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4), 0x0},
239 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5), 0x0},
240 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6), 0x0},
241 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7), 0x0},
242 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0), 0x0},
243 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0), 0x0},
244 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0), 0x0},
245 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0), 0x0},
246 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0), 0x0},
247 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0), 0x0},
248 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0), 0x0},
249 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0), 0x0},
250 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0), 0x0},
251 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0), 0x0},
252 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0), 0x0},
253 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0), 0x0},
254 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0), 0x0},
255 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0), 0x0},
256 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0), 0x0},
257 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0), 0x0},
258 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1), 0x0},
259 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2), 0x0},
260 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3), 0x0},
261 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4), 0x0},
262 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5), 0x0},
263 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6), 0x0},
264 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7), 0x0},
265 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8), 0x0},
266 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9), 0x0},
267 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa), 0x0},
268 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb), 0x0},
269 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc), 0x0},
270 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd), 0x0},
271 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe), 0x0},
272 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf), 0x0},
273 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0), 0x3},
274 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0), 0x3},
275 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0), 0x0},
276 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0), 0x0},
277 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0), 0x0},
278 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0), 0x0},
279 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0), 0x0},
280 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0), 0x0},
281 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0), 0x0},
282 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0), 0x0},
283 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0), 0x0},
284 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0), 0x0},
285 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0), 0x0},
286 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0), 0x1},
287 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0), 0x0},
288 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0), 0x0},
289 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0), 0x0},
290 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0), 0x1},
291 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0), 0x0},
292 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0), 0x0},
293 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0), 0x0},
294 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0), 0x0},
295 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0), 0x0},
296 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0), 0x1},
297 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0), 0x0},
298 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0), 0x0},
299 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0), 0x0},
300 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0), 0x0},
301 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0), 0x0},
302 {SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23, 0x10, 0), 0x0},
303 };
304
305 static const struct reg_sequence tas2783_init_seq[] = {
306 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0x00), 0x01),
307 REG_SEQ0(0x00800418, 0x00),
308 REG_SEQ0(0x00800419, 0x00),
309 REG_SEQ0(0x0080041a, 0x00),
310 REG_SEQ0(0x0080041b, 0x00),
311 REG_SEQ0(0x00800428, 0x40),
312 REG_SEQ0(0x00800429, 0x00),
313 REG_SEQ0(0x0080042a, 0x00),
314 REG_SEQ0(0x0080042b, 0x00),
315 REG_SEQ0(SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x1, 0x00), 0x00),
316 REG_SEQ0(0x00800004, 0x21),
317 REG_SEQ0(0x00800005, 0x41),
318 REG_SEQ0(0x00800006, 0x00),
319 REG_SEQ0(0x00800007, 0x20),
320 REG_SEQ0(0x00800015, 0x00),
321 REG_SEQ0(0x00800036, 0xad),
322 REG_SEQ0(0x00800037, 0xa8),
323 REG_SEQ0(0x0080006b, 0x7b),
324 REG_SEQ0(0x0080006c, 0x00),
325 REG_SEQ0(0x0080006d, 0x00),
326 REG_SEQ0(0x0080006e, 0x1a),
327 REG_SEQ0(0x0080006f, 0x00),
328 REG_SEQ0(0x00800071, 0x02),
329 REG_SEQ0(0x008000be, 0x00),
330 REG_SEQ0(0x008000bf, 0x00),
331 REG_SEQ0(0x008000c0, 0x00),
332 REG_SEQ0(0x008000c1, 0x00),
333 REG_SEQ0(0x008000c2, 0x00),
334 REG_SEQ0(0x008000c3, 0x00),
335 REG_SEQ0(0x008000c4, 0x00),
336 };
337
tas2783_sdca_mbq_size(struct device * dev,u32 reg)338 static int tas2783_sdca_mbq_size(struct device *dev, u32 reg)
339 {
340 switch (reg) {
341 case 0x000 ... 0x080: /* Data port 0. */
342 case 0x100 ... 0x140: /* Data port 1. */
343 case 0x200 ... 0x240: /* Data port 2. */
344 case 0x300 ... 0x340: /* Data port 3. */
345 case 0x400 ... 0x440: /* Data port 4. */
346 case 0x500 ... 0x540: /* Data port 5. */
347 case 0x800000 ... 0x803fff: /* Page 0 ~ 127. */
348 case 0x807e80 ... 0x807eff: /* Page 253. */
349 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_UDMPU23,
350 TAS2783_SDCA_CTL_UDMPU_CLUSTER, 0):
351 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, TAS2783_SDCA_CTL_FU_MUTE,
352 TAS2783_DEVICE_CHANNEL_LEFT):
353 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x1, 0):
354 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23, 0x10, 0):
355 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x04, 0):
356 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x10, 0):
357 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x11, 0):
358 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x12, 0):
359 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x10, 0):
360 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x11, 0):
361 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x10, 0):
362 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x11, 0):
363 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_TG23, 0x10, 0):
364 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x01, 0):
365 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x08, 0):
366 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x0a, 0):
367 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x10, 0):
368 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x14, 0):
369 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x15, 0):
370 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x16, 0):
371 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x04, 0):
372 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x04, 0):
373 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x04, 0):
374 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x04, 0):
375 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x04, 0):
376 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x04, 0):
377 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x04, 0):
378 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0):
379 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 1):
380 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 2):
381 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 3):
382 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 4):
383 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 5):
384 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 6):
385 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 7):
386 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 8):
387 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 9):
388 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xa):
389 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xb):
390 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xc):
391 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xd):
392 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xe):
393 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x12, 0xf):
394 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x02, 0):
395 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS21, 0x10, 0):
396 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x02, 0):
397 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS24, 0x10, 0):
398 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x02, 0):
399 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS25, 0x10, 0):
400 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x02, 0):
401 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS127, 0x10, 0):
402 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x02, 0):
403 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS26, 0x10, 0):
404 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x02, 0):
405 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_CS28, 0x10, 0):
406 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x01, 0):
407 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x04, 0):
408 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x05, 0):
409 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x10, 0):
410 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x11, 0):
411 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 1):
412 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 2):
413 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x01, 0):
414 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 1):
415 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x01, 0):
416 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x01, 0):
417 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x04, 0):
418 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x05, 0):
419 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x10, 0):
420 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x11, 0):
421 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 0):
422 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x01, 1):
423 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x04, 0):
424 return 1;
425
426 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x10, 0):
427 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x11, 0):
428 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x10, 0):
429 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x11, 0):
430 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x10, 0):
431 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x11, 0):
432 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x11, 0):
433 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x11, 0):
434 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x11, 0):
435 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x11, 0):
436 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 0):
437 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 1):
438 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 2):
439 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 3):
440 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 4):
441 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 5):
442 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 6):
443 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x01, 7):
444 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21, 0x02, 1):
445 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x0b, 1):
446 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 1):
447 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 2):
448 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x0b, 0):
449 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 0):
450 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x0b, 1):
451 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x07, 0):
452 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x09, 0):
453 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x12, 0):
454 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x12, 0):
455 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x12, 0):
456 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x13, 0):
457 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x12, 0):
458 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x13, 0):
459 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x10, 0):
460 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x11, 0):
461 return 2;
462
463 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23, 0x10, 0):
464 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT21, 0x08, 0):
465 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT26, 0x08, 0):
466 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT28, 0x08, 0):
467 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_IT29, 0x08, 0):
468 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT23, 0x08, 0):
469 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT24, 0x08, 0):
470 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT25, 0x08, 0):
471 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT28, 0x08, 0):
472 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_OT127, 0x08, 0):
473 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MU26, 0x06, 0):
474 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU127, 0x10, 0):
475 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU26, 0x10, 0):
476 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x06, 0):
477 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x12, 0):
478 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_XU22, 0x13, 0):
479 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU21, 0x08, 0):
480 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_MFPU26, 0x08, 0):
481 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_SAPU29, 0x05, 0):
482 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU21, 0x06, 0):
483 case SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PPU26, 0x06, 0):
484 return 4;
485
486 default:
487 return 0;
488 }
489 }
490
tas2783_readable_register(struct device * dev,unsigned int reg)491 static bool tas2783_readable_register(struct device *dev, unsigned int reg)
492 {
493 return tas2783_sdca_mbq_size(dev, reg) > 0;
494 }
495
tas2783_volatile_register(struct device * dev,u32 reg)496 static bool tas2783_volatile_register(struct device *dev, u32 reg)
497 {
498 switch (reg) {
499 case 0x000 ... 0x080: /* Data port 0. */
500 case 0x100 ... 0x140: /* Data port 1. */
501 case 0x200 ... 0x240: /* Data port 2. */
502 case 0x300 ... 0x340: /* Data port 3. */
503 case 0x400 ... 0x440: /* Data port 4. */
504 case 0x500 ... 0x540: /* Data port 5. */
505 case 0x800001:
506 return true;
507
508 default:
509 return false;
510 }
511 }
512
513 static const struct regmap_config tas_regmap = {
514 .reg_bits = 32,
515 .val_bits = 8,
516 .readable_reg = tas2783_readable_register,
517 .volatile_reg = tas2783_volatile_register,
518 .reg_defaults = tas2783_reg_default,
519 .num_reg_defaults = ARRAY_SIZE(tas2783_reg_default),
520 .max_register = 0x41008000 + TASDEV_REG_SDW(0xa1, 0x60, 0x7f),
521 .cache_type = REGCACHE_MAPLE,
522 .use_single_read = true,
523 .use_single_write = true,
524 };
525
526 static const struct regmap_sdw_mbq_cfg tas2783_mbq_cfg = {
527 .mbq_size = tas2783_sdca_mbq_size,
528 };
529
tas2783_digital_getvol(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)530 static s32 tas2783_digital_getvol(struct snd_kcontrol *kcontrol,
531 struct snd_ctl_elem_value *ucontrol)
532 {
533 return snd_soc_get_volsw(kcontrol, ucontrol);
534 }
535
tas2783_digital_putvol(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)536 static s32 tas2783_digital_putvol(struct snd_kcontrol *kcontrol,
537 struct snd_ctl_elem_value *ucontrol)
538 {
539 return snd_soc_put_volsw(kcontrol, ucontrol);
540 }
541
tas2783_amp_getvol(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)542 static s32 tas2783_amp_getvol(struct snd_kcontrol *kcontrol,
543 struct snd_ctl_elem_value *ucontrol)
544 {
545 return snd_soc_get_volsw(kcontrol, ucontrol);
546 }
547
tas2783_amp_putvol(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)548 static s32 tas2783_amp_putvol(struct snd_kcontrol *kcontrol,
549 struct snd_ctl_elem_value *ucontrol)
550 {
551 return snd_soc_put_volsw(kcontrol, ucontrol);
552 }
553
554 static const struct snd_kcontrol_new tas2783_snd_controls[] = {
555 SOC_SINGLE_RANGE_EXT_TLV("Amp Volume", TAS2783_AMP_LEVEL,
556 1, 0, 20, 0, tas2783_amp_getvol,
557 tas2783_amp_putvol, tas2781_amp_tlv),
558 SOC_SINGLE_RANGE_EXT_TLV("Speaker Volume", TAS2783_DVC_LVL,
559 0, 0, 200, 1, tas2783_digital_getvol,
560 tas2783_digital_putvol, tas2781_dvc_tlv),
561 };
562
tas2783_validate_calibdata(struct tas2783_prv * tas_dev,u8 * data,u32 size)563 static s32 tas2783_validate_calibdata(struct tas2783_prv *tas_dev,
564 u8 *data, u32 size)
565 {
566 u32 ts, spk_count, size_calculated;
567 u32 crc_calculated, crc_read, i;
568 u32 *tmp_val;
569 struct tm tm;
570
571 i = 0;
572 tmp_val = (u32 *)data;
573 if (tmp_val[i++] != 2783) {
574 dev_err(tas_dev->dev, "cal data magic number mismatch");
575 return -EINVAL;
576 }
577
578 spk_count = tmp_val[i++];
579 if (spk_count > TAS2783_CALIB_MAX_SPK_COUNT) {
580 dev_err(tas_dev->dev, "cal data spk_count too large");
581 return -EINVAL;
582 }
583
584 ts = tmp_val[i++];
585 time64_to_tm(ts, 0, &tm);
586 dev_dbg(tas_dev->dev, "cal data timestamp: %ld-%d-%d %d:%d:%d",
587 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday,
588 tm.tm_hour, tm.tm_min, tm.tm_sec);
589
590 size_calculated =
591 (spk_count * TAS2783_CALIB_PARAMS * sizeof(u32)) +
592 TAS2783_CALIB_HDR_SZ + TAS2783_CALIB_CRC_SZ;
593 if (size_calculated > TAS2783_CALIB_DATA_SZ) {
594 dev_err(tas_dev->dev, "cali data sz too large");
595 return -EINVAL;
596 } else if (size < size_calculated) {
597 dev_err(tas_dev->dev, "cali data size mismatch calc=%u vs %d\n",
598 size, size_calculated);
599 return -EINVAL;
600 }
601
602 crc_calculated = crc32(~0, data,
603 size_calculated - TAS2783_CALIB_CRC_SZ) ^ ~0;
604 crc_read = tmp_val[(size_calculated - TAS2783_CALIB_CRC_SZ) / sizeof(u32)];
605 if (crc_calculated != crc_read) {
606 dev_err(tas_dev->dev,
607 "calib data integrity check fail, 0x%08x vs 0x%08x\n",
608 crc_calculated, crc_read);
609 return -EINVAL;
610 }
611
612 return 0;
613 }
614
tas2783_set_calib_params_to_device(struct tas2783_prv * tas_dev,u32 * cali_data)615 static void tas2783_set_calib_params_to_device(struct tas2783_prv *tas_dev, u32 *cali_data)
616 {
617 u32 dev_count, offset, i, device_num;
618 u32 reg_value;
619 u8 buf[4];
620
621 dev_count = cali_data[1];
622 offset = 3;
623
624 for (device_num = 0; device_num < dev_count; device_num++) {
625 if (cali_data[offset] != tas_dev->sdw_peripheral->id.unique_id) {
626 offset += TAS2783_CALIB_PARAMS;
627 continue;
628 }
629 offset++;
630
631 for (i = 0; i < ARRAY_SIZE(tas2783_cali_reg); i++) {
632 reg_value = cali_data[offset + i];
633 buf[0] = reg_value >> 24;
634 buf[1] = reg_value >> 16;
635 buf[2] = reg_value >> 8;
636 buf[3] = reg_value & 0xff;
637 regmap_bulk_write(tas_dev->regmap, tas2783_cali_reg[i],
638 buf, sizeof(u32));
639 }
640 break;
641 }
642
643 if (device_num == dev_count)
644 dev_err(tas_dev->dev,
645 "unique id not found in the calib data\n");
646 else
647 dev_dbg(tas_dev->dev, "calib data update done\n");
648 }
649
tas2783_update_calibdata(struct tas2783_prv * tas_dev)650 static s32 tas2783_update_calibdata(struct tas2783_prv *tas_dev)
651 {
652 efi_guid_t efi_guid = TAS2783_CALI_GUID;
653 u32 attr, i, *tmp_val;
654 unsigned long size;
655 s32 ret;
656 efi_status_t status;
657 static efi_char16_t efi_names[][32] = {
658 L"SmartAmpCalibrationData", L"CALI_DATA"};
659
660 tmp_val = (u32 *)tas_dev->cali_data.data;
661 attr = 0;
662
663 /*
664 * In some cases, the calibration is performed in Windows,
665 * and data was saved in UEFI. Linux can access it.
666 */
667 for (i = 0; i < ARRAY_SIZE(efi_names); i++) {
668 size = 0;
669 status = efi.get_variable(efi_names[i], &efi_guid, &attr,
670 &size, NULL);
671 if (size > TAS2783_CALIB_DATA_SZ) {
672 dev_err(tas_dev->dev, "cali data too large\n");
673 break;
674 }
675
676 tas_dev->cali_data.read_sz = size;
677 if (status == EFI_BUFFER_TOO_SMALL) {
678 status = efi.get_variable(efi_names[i], &efi_guid, &attr,
679 &tas_dev->cali_data.read_sz,
680 tas_dev->cali_data.data);
681 dev_dbg(tas_dev->dev, "cali get %lu bytes result:%ld\n",
682 tas_dev->cali_data.read_sz, status);
683 }
684 if (status == EFI_SUCCESS)
685 break;
686 }
687
688 if (status != EFI_SUCCESS) {
689 /* Failed got calibration data from EFI. */
690 dev_dbg(tas_dev->dev, "No calibration data in UEFI.");
691 return 0;
692 }
693
694 mutex_lock(&tas_dev->calib_lock);
695 ret = tas2783_validate_calibdata(tas_dev, tas_dev->cali_data.data,
696 tas_dev->cali_data.read_sz);
697 if (!ret)
698 tas2783_set_calib_params_to_device(tas_dev, tmp_val);
699 mutex_unlock(&tas_dev->calib_lock);
700
701 return ret;
702 }
703
tas_fw_read_hdr(const u8 * data,struct tas_fw_hdr * hdr)704 static s32 tas_fw_read_hdr(const u8 *data, struct tas_fw_hdr *hdr)
705 {
706 hdr->size = get_unaligned_le32(data);
707 hdr->version_offset = get_unaligned_le32(&data[4]);
708 hdr->plt_id = get_unaligned_le32(&data[8]);
709 hdr->ppc3_ver = get_unaligned_le32(&data[12]);
710 memcpy(hdr->ddc_name, &data[16], 64);
711 hdr->timestamp = get_unaligned_le32(&data[80]);
712
713 return 84;
714 }
715
tas_fw_get_next_file(const u8 * data,struct tas_fw_file * file)716 static s32 tas_fw_get_next_file(const u8 *data, struct tas_fw_file *file)
717 {
718 file->vendor_id = get_unaligned_le32(&data[0]);
719 file->file_id = get_unaligned_le32(&data[4]);
720 file->version = get_unaligned_le32(&data[8]);
721 file->length = get_unaligned_le32(&data[12]);
722 file->dest_addr = get_unaligned_le32(&data[16]);
723 file->fw_data = (u8 *)&data[20];
724
725 return file->length + sizeof(u32) * 5;
726 }
727
tas2783_fw_ready(const struct firmware * fmw,void * context)728 static void tas2783_fw_ready(const struct firmware *fmw, void *context)
729 {
730 struct tas2783_prv *tas_dev =
731 (struct tas2783_prv *)context;
732 const u8 *buf = NULL;
733 s32 img_sz, ret = 0, cur_file = 0;
734 s32 offset = 0;
735
736 struct tas_fw_hdr *hdr __free(kfree) = kzalloc_obj(*hdr);
737 struct tas_fw_file *file __free(kfree) = kzalloc_obj(*file);
738 if (!file || !hdr) {
739 ret = -ENOMEM;
740 goto out;
741 }
742
743 if (!fmw || !fmw->data) {
744 /* firmware binary not found*/
745 dev_err(tas_dev->dev,
746 "Failed to read fw binary %s\n",
747 tas_dev->rca_binaryname);
748 ret = -EINVAL;
749 goto out;
750 }
751
752 img_sz = fmw->size;
753 buf = fmw->data;
754 offset += tas_fw_read_hdr(buf, hdr);
755 if (hdr->size != img_sz) {
756 ret = -EINVAL;
757 dev_err(tas_dev->dev, "firmware size mismatch with header");
758 goto out;
759 }
760
761 if (img_sz < FW_DL_OFFSET) {
762 ret = -EINVAL;
763 dev_err(tas_dev->dev, "unexpected size, size is too small");
764 goto out;
765 }
766
767 mutex_lock(&tas_dev->pde_lock);
768 while (offset < (img_sz - FW_FL_HDR)) {
769 offset += tas_fw_get_next_file(&buf[offset], file);
770 dev_dbg(tas_dev->dev,
771 "v=%d, fid=%d, ver=%d, len=%d, daddr=0x%x, fw=%p",
772 file->vendor_id, file->file_id,
773 file->version, file->length,
774 file->dest_addr, file->fw_data);
775
776 ret = sdw_nwrite_no_pm(tas_dev->sdw_peripheral,
777 file->dest_addr,
778 file->length,
779 file->fw_data);
780 if (ret < 0) {
781 dev_err(tas_dev->dev,
782 "FW download failed: %d", ret);
783 break;
784 }
785 cur_file++;
786 }
787 mutex_unlock(&tas_dev->pde_lock);
788
789 if (cur_file == 0) {
790 dev_err(tas_dev->dev, "fw with no files");
791 ret = -EINVAL;
792 } else {
793 tas2783_update_calibdata(tas_dev);
794 }
795
796 out:
797 if (!ret)
798 tas_dev->fw_dl_success = true;
799 tas_dev->fw_dl_task_done = true;
800 wake_up(&tas_dev->fw_wait);
801 if (fmw)
802 release_firmware(fmw);
803 }
804
tas_clear_latch(struct tas2783_prv * priv)805 static inline s32 tas_clear_latch(struct tas2783_prv *priv)
806 {
807 return regmap_update_bits(priv->regmap,
808 TASDEV_REG_SDW(0, 0, 0x5c),
809 0x04, 0x04);
810 }
811
tas_fu21_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,s32 event)812 static s32 tas_fu21_event(struct snd_soc_dapm_widget *w,
813 struct snd_kcontrol *k, s32 event)
814 {
815 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
816 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(component);
817 s32 mute;
818
819 switch (event) {
820 case SND_SOC_DAPM_POST_PMU:
821 mute = 0;
822 break;
823
824 case SND_SOC_DAPM_PRE_PMD:
825 mute = 1;
826 break;
827 }
828
829 return sdw_write_no_pm(tas_dev->sdw_peripheral,
830 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU21,
831 TAS2783_SDCA_CTL_FU_MUTE, 1), mute);
832 }
833
tas_fu23_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * k,s32 event)834 static s32 tas_fu23_event(struct snd_soc_dapm_widget *w,
835 struct snd_kcontrol *k, s32 event)
836 {
837 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
838 struct tas2783_prv *tas_dev = snd_soc_component_get_drvdata(component);
839 s32 mute;
840
841 switch (event) {
842 case SND_SOC_DAPM_POST_PMU:
843 mute = 0;
844 break;
845
846 case SND_SOC_DAPM_PRE_PMD:
847 mute = 1;
848 break;
849 }
850
851 return sdw_write_no_pm(tas_dev->sdw_peripheral,
852 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_FU23,
853 TAS2783_SDCA_CTL_FU_MUTE, 1), mute);
854 }
855
856 static const struct snd_soc_dapm_widget tas_dapm_widgets[] = {
857 SND_SOC_DAPM_AIF_IN("ASI", "ASI Playback", 0, SND_SOC_NOPM, 0, 0),
858 SND_SOC_DAPM_AIF_OUT("ASI OUT", "ASI Capture", 0, SND_SOC_NOPM,
859 0, 0),
860 SND_SOC_DAPM_DAC_E("FU21", NULL, SND_SOC_NOPM, 0, 0, tas_fu21_event,
861 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
862 SND_SOC_DAPM_DAC_E("FU23", NULL, SND_SOC_NOPM, 0, 0, tas_fu23_event,
863 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
864 SND_SOC_DAPM_OUTPUT("SPK"),
865 SND_SOC_DAPM_INPUT("DMIC"),
866 };
867
868 static const struct snd_soc_dapm_route tas_audio_map[] = {
869 {"FU21", NULL, "ASI"},
870 {"SPK", NULL, "FU21"},
871 {"FU23", NULL, "ASI"},
872 {"SPK", NULL, "FU23"},
873 {"ASI OUT", NULL, "DMIC"},
874 };
875
tas_set_sdw_stream(struct snd_soc_dai * dai,void * sdw_stream,s32 direction)876 static s32 tas_set_sdw_stream(struct snd_soc_dai *dai,
877 void *sdw_stream, s32 direction)
878 {
879 if (!sdw_stream)
880 return 0;
881
882 snd_soc_dai_dma_data_set(dai, direction, sdw_stream);
883
884 return 0;
885 }
886
tas_sdw_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)887 static void tas_sdw_shutdown(struct snd_pcm_substream *substream,
888 struct snd_soc_dai *dai)
889 {
890 snd_soc_dai_set_dma_data(dai, substream, NULL);
891 }
892
tas_sdw_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)893 static s32 tas_sdw_hw_params(struct snd_pcm_substream *substream,
894 struct snd_pcm_hw_params *params,
895 struct snd_soc_dai *dai)
896 {
897 struct snd_soc_component *component = dai->component;
898 struct tas2783_prv *tas_dev =
899 snd_soc_component_get_drvdata(component);
900 struct sdw_stream_config stream_config = {0};
901 struct sdw_port_config port_config = {0};
902 struct sdw_stream_runtime *sdw_stream;
903 struct sdw_slave *sdw_peripheral = tas_dev->sdw_peripheral;
904 s32 ret, retry = 3;
905
906 if (!tas_dev->fw_dl_success) {
907 dev_err(tas_dev->dev, "error playback without fw download");
908 return -EINVAL;
909 }
910
911 sdw_stream = snd_soc_dai_get_dma_data(dai, substream);
912 if (!sdw_stream)
913 return -EINVAL;
914
915 ret = tas_clear_latch(tas_dev);
916 if (ret)
917 dev_err(tas_dev->dev,
918 "clear latch failed, err=%d", ret);
919
920 mutex_lock(&tas_dev->pde_lock);
921 /*
922 * Sometimes, there is error returned during power on.
923 * So added retry logic to ensure power on so that
924 * port prepare succeeds
925 */
926 do {
927 ret = regmap_write(tas_dev->regmap,
928 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23,
929 TAS2783_SDCA_CTL_REQ_POW_STATE, 0),
930 TAS2783_SDCA_POW_STATE_ON);
931 if (!ret)
932 break;
933 usleep_range(2000, 2200);
934 } while (retry--);
935 mutex_unlock(&tas_dev->pde_lock);
936 if (ret)
937 return ret;
938
939 /* SoundWire specific configuration */
940 snd_sdw_params_to_config(substream, params,
941 &stream_config, &port_config);
942 /* port 1 for playback */
943 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
944 port_config.num = 1;
945 else
946 port_config.num = 2;
947
948 ret = sdw_stream_add_slave(sdw_peripheral,
949 &stream_config, &port_config, 1, sdw_stream);
950 if (ret)
951 dev_err(dai->dev, "Unable to configure port\n");
952
953 return ret;
954 }
955
tas_sdw_pcm_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)956 static s32 tas_sdw_pcm_hw_free(struct snd_pcm_substream *substream,
957 struct snd_soc_dai *dai)
958 {
959 s32 ret;
960 struct snd_soc_component *component = dai->component;
961 struct tas2783_prv *tas_dev =
962 snd_soc_component_get_drvdata(component);
963 struct sdw_stream_runtime *sdw_stream =
964 snd_soc_dai_get_dma_data(dai, substream);
965
966 sdw_stream_remove_slave(tas_dev->sdw_peripheral, sdw_stream);
967
968 mutex_lock(&tas_dev->pde_lock);
969 ret = regmap_write(tas_dev->regmap,
970 SDW_SDCA_CTL(1, TAS2783_SDCA_ENT_PDE23,
971 TAS2783_SDCA_CTL_REQ_POW_STATE, 0),
972 TAS2783_SDCA_POW_STATE_OFF);
973 mutex_unlock(&tas_dev->pde_lock);
974
975 return ret;
976 }
977
978 static const struct snd_soc_dai_ops tas_dai_ops = {
979 .hw_params = tas_sdw_hw_params,
980 .hw_free = tas_sdw_pcm_hw_free,
981 .set_stream = tas_set_sdw_stream,
982 .shutdown = tas_sdw_shutdown,
983 };
984
985 static struct snd_soc_dai_driver tas_dai_driver[] = {
986 {
987 .name = "tas2783-codec",
988 .id = 0,
989 .playback = {
990 .stream_name = "Playback",
991 .channels_min = 1,
992 .channels_max = 4,
993 .rates = TAS2783_DEVICE_RATES,
994 .formats = TAS2783_DEVICE_FORMATS,
995 },
996 .capture = {
997 .stream_name = "Capture",
998 .channels_min = 1,
999 .channels_max = 4,
1000 .rates = TAS2783_DEVICE_RATES,
1001 .formats = TAS2783_DEVICE_FORMATS,
1002 },
1003 .ops = &tas_dai_ops,
1004 .symmetric_rate = 1,
1005 },
1006 };
1007
tas_component_probe(struct snd_soc_component * component)1008 static s32 tas_component_probe(struct snd_soc_component *component)
1009 {
1010 struct tas2783_prv *tas_dev =
1011 snd_soc_component_get_drvdata(component);
1012
1013 tas_dev->component = component;
1014 tas25xx_register_misc(tas_dev->sdw_peripheral);
1015
1016 return 0;
1017 }
1018
tas_component_remove(struct snd_soc_component * codec)1019 static void tas_component_remove(struct snd_soc_component *codec)
1020 {
1021 struct tas2783_prv *tas_dev =
1022 snd_soc_component_get_drvdata(codec);
1023 tas25xx_deregister_misc();
1024 tas_dev->component = NULL;
1025 }
1026
1027 static const struct snd_soc_component_driver soc_codec_driver_tasdevice = {
1028 .probe = tas_component_probe,
1029 .remove = tas_component_remove,
1030 .controls = tas2783_snd_controls,
1031 .num_controls = ARRAY_SIZE(tas2783_snd_controls),
1032 .dapm_widgets = tas_dapm_widgets,
1033 .num_dapm_widgets = ARRAY_SIZE(tas_dapm_widgets),
1034 .dapm_routes = tas_audio_map,
1035 .num_dapm_routes = ARRAY_SIZE(tas_audio_map),
1036 .idle_bias_on = 1,
1037 .endianness = 1,
1038 };
1039
tas_init(struct tas2783_prv * tas_dev)1040 static s32 tas_init(struct tas2783_prv *tas_dev)
1041 {
1042 s32 ret;
1043
1044 dev_set_drvdata(tas_dev->dev, tas_dev);
1045 ret = devm_snd_soc_register_component(tas_dev->dev,
1046 &soc_codec_driver_tasdevice,
1047 tas_dai_driver,
1048 ARRAY_SIZE(tas_dai_driver));
1049 if (ret) {
1050 dev_err(tas_dev->dev, "%s: codec register error:%d.\n",
1051 __func__, ret);
1052 return ret;
1053 }
1054
1055 /* set autosuspend parameters */
1056 pm_runtime_set_autosuspend_delay(tas_dev->dev, 3000);
1057 pm_runtime_use_autosuspend(tas_dev->dev);
1058 /* make sure the device does not suspend immediately */
1059 pm_runtime_mark_last_busy(tas_dev->dev);
1060 pm_runtime_enable(tas_dev->dev);
1061
1062 return ret;
1063 }
1064
tas2783_sdca_dev_suspend(struct device * dev)1065 static s32 tas2783_sdca_dev_suspend(struct device *dev)
1066 {
1067 struct tas2783_prv *tas_dev = dev_get_drvdata(dev);
1068
1069 if (!tas_dev->hw_init)
1070 return 0;
1071
1072 regcache_cache_only(tas_dev->regmap, true);
1073 return 0;
1074 }
1075
tas2783_sdca_dev_system_suspend(struct device * dev)1076 static s32 tas2783_sdca_dev_system_suspend(struct device *dev)
1077 {
1078 return tas2783_sdca_dev_suspend(dev);
1079 }
1080
tas2783_sdca_dev_resume(struct device * dev)1081 static s32 tas2783_sdca_dev_resume(struct device *dev)
1082 {
1083 struct sdw_slave *slave = dev_to_sdw_dev(dev);
1084 struct tas2783_prv *tas_dev = dev_get_drvdata(dev);
1085 unsigned long t;
1086
1087 if (!slave->unattach_request)
1088 goto regmap_sync;
1089
1090 t = wait_for_completion_timeout(&slave->initialization_complete,
1091 msecs_to_jiffies(TAS2783_PROBE_TIMEOUT));
1092 if (!t) {
1093 dev_err(&slave->dev, "resume: initialization timed out\n");
1094 sdw_show_ping_status(slave->bus, true);
1095 return -ETIMEDOUT;
1096 }
1097
1098 slave->unattach_request = 0;
1099
1100 regmap_sync:
1101 regcache_cache_only(tas_dev->regmap, false);
1102 regcache_sync(tas_dev->regmap);
1103 return 0;
1104 }
1105
1106 static const struct dev_pm_ops tas2783_sdca_pm = {
1107 SYSTEM_SLEEP_PM_OPS(tas2783_sdca_dev_system_suspend, tas2783_sdca_dev_resume)
1108 RUNTIME_PM_OPS(tas2783_sdca_dev_suspend, tas2783_sdca_dev_resume, NULL)
1109 };
1110
tas_generate_fw_name(struct sdw_slave * slave,char * name,size_t size)1111 static void tas_generate_fw_name(struct sdw_slave *slave, char *name, size_t size)
1112 {
1113 struct sdw_bus *bus = slave->bus;
1114 u8 unique_id = slave->id.unique_id;
1115 bool pci_found = false;
1116 #if IS_ENABLED(CONFIG_PCI)
1117 struct device *dev = &slave->dev;
1118 struct pci_dev *pci = NULL;
1119
1120 for (; dev; dev = dev->parent) {
1121 if (dev->bus == &pci_bus_type) {
1122 pci = to_pci_dev(dev);
1123 scnprintf(name, size, "%04X-%1X-%1X.bin",
1124 pci->subsystem_device, bus->link_id, unique_id);
1125 pci_found = true;
1126 break;
1127 }
1128 }
1129 #endif
1130
1131 if (!pci_found)
1132 scnprintf(name, size, "tas2783-%1X-%1X.bin",
1133 bus->link_id, unique_id);
1134 }
1135
tas_io_init(struct device * dev,struct sdw_slave * slave)1136 static s32 tas_io_init(struct device *dev, struct sdw_slave *slave)
1137 {
1138 struct tas2783_prv *tas_dev = dev_get_drvdata(dev);
1139 s32 ret;
1140 u8 unique_id = tas_dev->sdw_peripheral->id.unique_id;
1141
1142 if (tas_dev->hw_init)
1143 return 0;
1144
1145 tas_dev->fw_dl_task_done = false;
1146 tas_dev->fw_dl_success = false;
1147
1148 ret = regmap_write(tas_dev->regmap, TAS2783_SW_RESET, 0x1);
1149 if (ret) {
1150 dev_err(dev, "sw reset failed, err=%d", ret);
1151 return ret;
1152 }
1153 usleep_range(2000, 2200);
1154
1155 tas_generate_fw_name(slave, tas_dev->rca_binaryname,
1156 sizeof(tas_dev->rca_binaryname));
1157
1158 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
1159 tas_dev->rca_binaryname, tas_dev->dev,
1160 GFP_KERNEL, tas_dev, tas2783_fw_ready);
1161 if (ret) {
1162 dev_err(tas_dev->dev,
1163 "firmware request failed for uid=%d, ret=%d\n",
1164 unique_id, ret);
1165 return ret;
1166 }
1167
1168 ret = wait_event_timeout(tas_dev->fw_wait, tas_dev->fw_dl_task_done,
1169 msecs_to_jiffies(TIMEOUT_FW_DL_MS));
1170 if (!ret) {
1171 dev_err(tas_dev->dev, "fw request, wait_event timeout\n");
1172 ret = -EAGAIN;
1173 } else {
1174 if (tas_dev->sa_func_data)
1175 ret = sdca_regmap_write_init(dev, tas_dev->regmap,
1176 tas_dev->sa_func_data);
1177 else
1178 ret = regmap_multi_reg_write(tas_dev->regmap, tas2783_init_seq,
1179 ARRAY_SIZE(tas2783_init_seq));
1180
1181 if (ret)
1182 dev_err(tas_dev->dev,
1183 "init writes failed, err=%d", ret);
1184 else
1185 tas_dev->hw_init = true;
1186 }
1187
1188 return ret;
1189 }
1190
tas_update_status(struct sdw_slave * slave,enum sdw_slave_status status)1191 static s32 tas_update_status(struct sdw_slave *slave,
1192 enum sdw_slave_status status)
1193 {
1194 struct tas2783_prv *tas_dev = dev_get_drvdata(&slave->dev);
1195 struct device *dev = &slave->dev;
1196
1197 dev_dbg(dev, "Peripheral status = %s",
1198 status == SDW_SLAVE_UNATTACHED ? "unattached" :
1199 status == SDW_SLAVE_ATTACHED ? "attached" : "alert");
1200
1201 tas_dev->status = status;
1202 if (status == SDW_SLAVE_UNATTACHED)
1203 tas_dev->hw_init = false;
1204
1205 /* Perform initialization only if slave status
1206 * is present and hw_init flag is false
1207 */
1208 if (tas_dev->hw_init || tas_dev->status != SDW_SLAVE_ATTACHED)
1209 return 0;
1210
1211 /* updated the cache data to device */
1212 regcache_cache_only(tas_dev->regmap, false);
1213 regcache_sync(tas_dev->regmap);
1214
1215 /* perform I/O transfers required for Slave initialization */
1216 return tas_io_init(&slave->dev, slave);
1217 }
1218
1219 /*
1220 * TAS2783 requires explicit port prepare during playback stream
1221 * setup even when simple_ch_prep_sm is enabled. Without this,
1222 * the port fails to enter the prepared state resulting in no audio output.
1223 */
tas_port_prep(struct sdw_slave * slave,struct sdw_prepare_ch * prep_ch,enum sdw_port_prep_ops pre_ops)1224 static int tas_port_prep(struct sdw_slave *slave, struct sdw_prepare_ch *prep_ch,
1225 enum sdw_port_prep_ops pre_ops)
1226 {
1227 struct device *dev = &slave->dev;
1228 struct sdw_dpn_prop *dpn_prop;
1229 u32 addr;
1230 int ret;
1231
1232 dpn_prop = slave->prop.sink_dpn_prop;
1233 if (!dpn_prop || !dpn_prop->simple_ch_prep_sm)
1234 return 0;
1235
1236 addr = SDW_DPN_PREPARECTRL(prep_ch->num);
1237 switch (pre_ops) {
1238 case SDW_OPS_PORT_PRE_PREP:
1239 ret = sdw_write_no_pm(slave, addr, prep_ch->ch_mask);
1240 if (ret)
1241 dev_err(dev, "prep failed for port %d, err=%d\n",
1242 prep_ch->num, ret);
1243 return ret;
1244
1245 case SDW_OPS_PORT_PRE_DEPREP:
1246 ret = sdw_write_no_pm(slave, addr, 0x00);
1247 if (ret)
1248 dev_err(dev, "de-prep failed for port %d, err=%d\n",
1249 prep_ch->num, ret);
1250 return ret;
1251
1252 case SDW_OPS_PORT_POST_PREP:
1253 case SDW_OPS_PORT_POST_DEPREP:
1254 /* No POST handling required for TAS2783 */
1255 return 0;
1256 }
1257
1258 return 0;
1259 }
1260
1261 static const struct sdw_slave_ops tas_sdw_ops = {
1262 .update_status = tas_update_status,
1263 .port_prep = tas_port_prep,
1264 };
1265
tas_remove(struct tas2783_prv * tas_dev)1266 static void tas_remove(struct tas2783_prv *tas_dev)
1267 {
1268 snd_soc_unregister_component(tas_dev->dev);
1269 }
1270
tas_sdw_probe(struct sdw_slave * peripheral,const struct sdw_device_id * id)1271 static s32 tas_sdw_probe(struct sdw_slave *peripheral,
1272 const struct sdw_device_id *id)
1273 {
1274 struct regmap *regmap;
1275 struct device *dev = &peripheral->dev;
1276 struct tas2783_prv *tas_dev;
1277 struct sdca_function_data *function_data = NULL;
1278 int ret, i;
1279
1280 ret = sdw_slave_read_prop(peripheral);
1281 if (ret)
1282 return dev_err_probe(dev, ret,
1283 "slave property read failed");
1284
1285 tas_dev = devm_kzalloc(dev, sizeof(*tas_dev), GFP_KERNEL);
1286 if (!tas_dev)
1287 return dev_err_probe(dev, -ENOMEM,
1288 "Failed devm_kzalloc");
1289
1290 i = -1;
1291 /* check if we have any SDCA function data available */
1292 if (peripheral->sdca_data.num_functions > 0) {
1293 dev_dbg(dev, "SDCA functions found: %d", peripheral->sdca_data.num_functions);
1294
1295 /* Look for Smart Amp function type */
1296 for (i = 0; i < peripheral->sdca_data.num_functions; i++) {
1297 if (peripheral->sdca_data.function[i].type ==
1298 SDCA_FUNCTION_TYPE_SMART_AMP) {
1299 dev_info(dev, "Found Smart Amp function at index %d", i);
1300 break;
1301 }
1302 }
1303 }
1304
1305 if (i >= 0 && i < peripheral->sdca_data.num_functions) {
1306 /* Allocate memory for function data */
1307 function_data = devm_kzalloc(dev, sizeof(*function_data),
1308 GFP_KERNEL);
1309 if (!function_data)
1310 return dev_err_probe(dev, -ENOMEM,
1311 "failed to parse sdca functions");
1312
1313 /* Parse the function */
1314 ret = sdca_parse_function(dev, peripheral,
1315 &peripheral->sdca_data.function[i],
1316 function_data);
1317 if (!ret)
1318 tas_dev->sa_func_data = function_data;
1319 else
1320 dev_warn(dev, "smartamp function parse failed:err%d, using defaults", ret);
1321 }
1322
1323 tas_dev->dev = dev;
1324 tas_dev->sdw_peripheral = peripheral;
1325 tas_dev->hw_init = false;
1326 mutex_init(&tas_dev->calib_lock);
1327 mutex_init(&tas_dev->pde_lock);
1328
1329 init_waitqueue_head(&tas_dev->fw_wait);
1330 dev_set_drvdata(dev, tas_dev);
1331 regmap = devm_regmap_init_sdw_mbq_cfg(&peripheral->dev,
1332 peripheral,
1333 &tas_regmap,
1334 &tas2783_mbq_cfg);
1335 if (IS_ERR(regmap))
1336 return dev_err_probe(dev, PTR_ERR(regmap),
1337 "Failed devm_regmap_init_sdw.");
1338
1339 /* keep in cache until the device is fully initialized */
1340 regcache_cache_only(regmap, true);
1341 tas_dev->regmap = regmap;
1342 return tas_init(tas_dev);
1343 }
1344
tas_sdw_remove(struct sdw_slave * peripheral)1345 static void tas_sdw_remove(struct sdw_slave *peripheral)
1346 {
1347 struct tas2783_prv *tas_dev = dev_get_drvdata(&peripheral->dev);
1348
1349 pm_runtime_disable(tas_dev->dev);
1350 tas_remove(tas_dev);
1351 mutex_destroy(&tas_dev->calib_lock);
1352 mutex_destroy(&tas_dev->pde_lock);
1353 dev_set_drvdata(&peripheral->dev, NULL);
1354 }
1355
1356 static const struct sdw_device_id tas_sdw_id[] = {
1357 /* chipid for the TAS2783 is 0x0000 */
1358 SDW_SLAVE_ENTRY(0x0102, 0x0000, 0),
1359 {},
1360 };
1361 MODULE_DEVICE_TABLE(sdw, tas_sdw_id);
1362
1363 static struct sdw_driver tas_sdw_driver = {
1364 .driver = {
1365 .name = "slave-tas2783",
1366 .pm = pm_ptr(&tas2783_sdca_pm),
1367 },
1368 .probe = tas_sdw_probe,
1369 .remove = tas_sdw_remove,
1370 .ops = &tas_sdw_ops,
1371 .id_table = tas_sdw_id,
1372 };
1373 module_sdw_driver(tas_sdw_driver);
1374
1375 MODULE_IMPORT_NS("SND_SOC_SDCA");
1376 MODULE_AUTHOR("Texas Instruments Inc.");
1377 MODULE_DESCRIPTION("ASoC TAS2783 SoundWire Driver");
1378 MODULE_LICENSE("GPL");
1379