1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2013 - 2021 Intel Corporation. */ 3 4 #ifndef _I40E_H_ 5 #define _I40E_H_ 6 7 #include <linux/linkmode.h> 8 #include <linux/pci.h> 9 #include <linux/ptp_clock_kernel.h> 10 #include <linux/types.h> 11 #include <linux/avf/virtchnl.h> 12 #include <linux/net/intel/i40e_client.h> 13 #include <net/devlink.h> 14 #include <net/pkt_cls.h> 15 #include <net/udp_tunnel.h> 16 #include "i40e_dcb.h" 17 #include "i40e_debug.h" 18 #include "i40e_devlink.h" 19 #include "i40e_io.h" 20 #include "i40e_prototype.h" 21 #include "i40e_register.h" 22 #include "i40e_txrx.h" 23 24 /* Useful i40e defaults */ 25 #define I40E_MAX_VEB 16 26 27 #define I40E_MAX_NUM_DESCRIPTORS 4096 28 #define I40E_MAX_NUM_DESCRIPTORS_XL710 8160 29 #define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024) 30 #define I40E_DEFAULT_NUM_DESCRIPTORS 512 31 #define I40E_REQ_DESCRIPTOR_MULTIPLE 32 32 #define I40E_MIN_NUM_DESCRIPTORS 64 33 #define I40E_MIN_MSIX 2 34 #define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */ 35 #define I40E_MIN_VSI_ALLOC 83 /* LAN, ATR, FCOE, 64 VF */ 36 /* max 16 qps */ 37 #define i40e_default_queues_per_vmdq(pf) \ 38 (test_bit(I40E_HW_CAP_RSS_AQ, (pf)->hw.caps) ? 4 : 1) 39 #define I40E_DEFAULT_QUEUES_PER_VF 4 40 #define I40E_MAX_VF_QUEUES 16 41 #define i40e_pf_get_max_q_per_tc(pf) \ 42 (test_bit(I40E_HW_CAP_128_QP_RSS, (pf)->hw.caps) ? 128 : 64) 43 #define I40E_FDIR_RING_COUNT 32 44 #define I40E_MAX_AQ_BUF_SIZE 4096 45 #define I40E_AQ_LEN 256 46 #define I40E_MIN_ARQ_LEN 1 47 #define I40E_MIN_ASQ_LEN 2 48 #define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */ 49 #define I40E_MAX_USER_PRIORITY 8 50 #define I40E_DEFAULT_TRAFFIC_CLASS BIT(0) 51 #define I40E_QUEUE_WAIT_RETRY_LIMIT 10 52 #define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16) 53 54 #define I40E_PHY_DEBUG_ALL \ 55 (I40E_AQ_PHY_DEBUG_DISABLE_LINK_FW | \ 56 I40E_AQ_PHY_DEBUG_DISABLE_ALL_LINK_FW) 57 58 #define I40E_OEM_EETRACK_ID 0xffffffff 59 #define I40E_NVM_VERSION_LO_MASK GENMASK(7, 0) 60 #define I40E_NVM_VERSION_HI_MASK GENMASK(15, 12) 61 #define I40E_OEM_VER_BUILD_MASK GENMASK(23, 8) 62 #define I40E_OEM_VER_PATCH_MASK GENMASK(7, 0) 63 #define I40E_OEM_VER_MASK GENMASK(31, 24) 64 #define I40E_OEM_GEN_MASK GENMASK(31, 24) 65 #define I40E_OEM_SNAP_MASK GENMASK(23, 16) 66 #define I40E_OEM_RELEASE_MASK GENMASK(15, 0) 67 68 #define I40E_RX_DESC(R, i) \ 69 (&(((union i40e_rx_desc *)((R)->desc))[i])) 70 #define I40E_TX_DESC(R, i) \ 71 (&(((struct i40e_tx_desc *)((R)->desc))[i])) 72 #define I40E_TX_CTXTDESC(R, i) \ 73 (&(((struct i40e_tx_context_desc *)((R)->desc))[i])) 74 #define I40E_TX_FDIRDESC(R, i) \ 75 (&(((struct i40e_filter_program_desc *)((R)->desc))[i])) 76 77 /* BW rate limiting */ 78 #define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */ 79 #define I40E_BW_MBPS_DIVISOR 125000 /* rate / (1000000 / 8) Mbps */ 80 #define I40E_MAX_BW_INACTIVE_ACCUM 4 /* accumulate 4 credits max */ 81 82 /* driver state flags */ 83 enum i40e_state { 84 __I40E_TESTING, 85 __I40E_CONFIG_BUSY, 86 __I40E_CONFIG_DONE, 87 __I40E_DOWN, 88 __I40E_SERVICE_SCHED, 89 __I40E_ADMINQ_EVENT_PENDING, 90 __I40E_MDD_EVENT_PENDING, 91 __I40E_MDD_VF_PRINT_PENDING, 92 __I40E_VFLR_EVENT_PENDING, 93 __I40E_RESET_RECOVERY_PENDING, 94 __I40E_TIMEOUT_RECOVERY_PENDING, 95 __I40E_MISC_IRQ_REQUESTED, 96 __I40E_RESET_INTR_RECEIVED, 97 __I40E_REINIT_REQUESTED, 98 __I40E_PF_RESET_REQUESTED, 99 __I40E_PF_RESET_AND_REBUILD_REQUESTED, 100 __I40E_CORE_RESET_REQUESTED, 101 __I40E_GLOBAL_RESET_REQUESTED, 102 __I40E_EMP_RESET_INTR_RECEIVED, 103 __I40E_SUSPENDED, 104 __I40E_PTP_TX_IN_PROGRESS, 105 __I40E_BAD_EEPROM, 106 __I40E_DOWN_REQUESTED, 107 __I40E_FD_FLUSH_REQUESTED, 108 __I40E_FD_ATR_AUTO_DISABLED, 109 __I40E_FD_SB_AUTO_DISABLED, 110 __I40E_RESET_FAILED, 111 __I40E_PORT_SUSPENDED, 112 __I40E_VF_DISABLE, 113 __I40E_MACVLAN_SYNC_PENDING, 114 __I40E_TEMP_LINK_POLLING, 115 __I40E_CLIENT_SERVICE_REQUESTED, 116 __I40E_CLIENT_L2_CHANGE, 117 __I40E_CLIENT_RESET, 118 __I40E_VIRTCHNL_OP_PENDING, 119 __I40E_RECOVERY_MODE, 120 __I40E_VF_RESETS_DISABLED, /* disable resets during i40e_remove */ 121 __I40E_IN_REMOVE, 122 __I40E_VFS_RELEASING, 123 /* This must be last as it determines the size of the BITMAP */ 124 __I40E_STATE_SIZE__, 125 }; 126 127 #define I40E_PF_RESET_FLAG BIT_ULL(__I40E_PF_RESET_REQUESTED) 128 #define I40E_PF_RESET_AND_REBUILD_FLAG \ 129 BIT_ULL(__I40E_PF_RESET_AND_REBUILD_REQUESTED) 130 131 /* VSI state flags */ 132 enum i40e_vsi_state { 133 __I40E_VSI_DOWN, 134 __I40E_VSI_NEEDS_RESTART, 135 __I40E_VSI_SYNCING_FILTERS, 136 __I40E_VSI_OVERFLOW_PROMISC, 137 __I40E_VSI_REINIT_REQUESTED, 138 __I40E_VSI_DOWN_REQUESTED, 139 __I40E_VSI_RELEASING, 140 /* This must be last as it determines the size of the BITMAP */ 141 __I40E_VSI_STATE_SIZE__, 142 }; 143 144 enum i40e_pf_flags { 145 I40E_FLAG_MSI_ENA, 146 I40E_FLAG_MSIX_ENA, 147 I40E_FLAG_RSS_ENA, 148 I40E_FLAG_VMDQ_ENA, 149 I40E_FLAG_SRIOV_ENA, 150 I40E_FLAG_DCB_CAPABLE, 151 I40E_FLAG_DCB_ENA, 152 I40E_FLAG_FD_SB_ENA, 153 I40E_FLAG_FD_ATR_ENA, 154 I40E_FLAG_MFP_ENA, 155 I40E_FLAG_HW_ATR_EVICT_ENA, 156 I40E_FLAG_VEB_MODE_ENA, 157 I40E_FLAG_VEB_STATS_ENA, 158 I40E_FLAG_LINK_POLLING_ENA, 159 I40E_FLAG_TRUE_PROMISC_ENA, 160 I40E_FLAG_LEGACY_RX_ENA, 161 I40E_FLAG_PTP_ENA, 162 I40E_FLAG_IWARP_ENA, 163 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, 164 I40E_FLAG_SOURCE_PRUNING_DIS, 165 I40E_FLAG_TC_MQPRIO_ENA, 166 I40E_FLAG_FD_SB_INACTIVE, 167 I40E_FLAG_FD_SB_TO_CLOUD_FILTER, 168 I40E_FLAG_FW_LLDP_DIS, 169 I40E_FLAG_RS_FEC, 170 I40E_FLAG_BASE_R_FEC, 171 /* TOTAL_PORT_SHUTDOWN_ENA 172 * Allows to physically disable the link on the NIC's port. 173 * If enabled, (after link down request from the OS) 174 * no link, traffic or led activity is possible on that port. 175 * 176 * If I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA is set, the 177 * I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA must be explicitly forced 178 * to true and cannot be disabled by system admin at that time. 179 * The functionalities are exclusive in terms of configuration, but 180 * they also have similar behavior (allowing to disable physical 181 * link of the port), with following differences: 182 * - LINK_DOWN_ON_CLOSE_ENA is configurable at host OS run-time and 183 * is supported by whole family of 7xx Intel Ethernet Controllers 184 * - TOTAL_PORT_SHUTDOWN_ENA may be enabled only before OS loads 185 * (in BIOS) only if motherboard's BIOS and NIC's FW has support of it 186 * - when LINK_DOWN_ON_CLOSE_ENABLED is used, the link is being brought 187 * down by sending phy_type=0 to NIC's FW 188 * - when TOTAL_PORT_SHUTDOWN_ENA is used, phy_type is not altered, 189 * instead the link is being brought down by clearing 190 * bit (I40E_AQ_PHY_ENABLE_LINK) in abilities field of 191 * i40e_aq_set_phy_config structure 192 */ 193 I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 194 I40E_FLAG_VF_VLAN_PRUNING_ENA, 195 I40E_FLAG_MDD_AUTO_RESET_VF, 196 I40E_PF_FLAGS_NBITS, /* must be last */ 197 }; 198 199 enum i40e_interrupt_policy { 200 I40E_INTERRUPT_BEST_CASE, 201 I40E_INTERRUPT_MEDIUM, 202 I40E_INTERRUPT_LOWEST 203 }; 204 205 struct i40e_lump_tracking { 206 u16 num_entries; 207 u16 list[]; 208 #define I40E_PILE_VALID_BIT 0x8000 209 #define I40E_IWARP_IRQ_PILE_ID (I40E_PILE_VALID_BIT - 2) 210 }; 211 212 #define I40E_DEFAULT_ATR_SAMPLE_RATE 20 213 #define I40E_FDIR_MAX_RAW_PACKET_SIZE 512 214 #define I40E_FDIR_BUFFER_FULL_MARGIN 10 215 #define I40E_FDIR_BUFFER_HEAD_ROOM 32 216 #define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4) 217 218 #define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4) 219 #define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4) 220 #define I40E_VF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT1_MAX_INDEX + 1) * 4) 221 222 enum i40e_fd_stat_idx { 223 I40E_FD_STAT_ATR, 224 I40E_FD_STAT_SB, 225 I40E_FD_STAT_ATR_TUNNEL, 226 I40E_FD_STAT_PF_COUNT 227 }; 228 #define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT) 229 #define I40E_FD_ATR_STAT_IDX(pf_id) \ 230 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR) 231 #define I40E_FD_SB_STAT_IDX(pf_id) \ 232 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB) 233 #define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \ 234 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL) 235 236 /* The following structure contains the data parsed from the user-defined 237 * field of the ethtool_rx_flow_spec structure. 238 */ 239 struct i40e_rx_flow_userdef { 240 bool flex_filter; 241 u16 flex_word; 242 u16 flex_offset; 243 }; 244 245 struct i40e_fdir_filter { 246 struct hlist_node fdir_node; 247 /* filter ipnut set */ 248 u8 flow_type; 249 u8 ipl4_proto; 250 /* TX packet view of src and dst */ 251 __be32 dst_ip; 252 __be32 src_ip; 253 __be32 dst_ip6[4]; 254 __be32 src_ip6[4]; 255 __be16 src_port; 256 __be16 dst_port; 257 __be32 sctp_v_tag; 258 259 __be16 vlan_etype; 260 __be16 vlan_tag; 261 /* Flexible data to match within the packet payload */ 262 __be16 flex_word; 263 u16 flex_offset; 264 bool flex_filter; 265 266 /* filter control */ 267 u16 q_index; 268 u8 flex_off; 269 u8 pctype; 270 u16 dest_vsi; 271 u8 dest_ctl; 272 u8 fd_status; 273 u16 cnt_index; 274 u32 fd_id; 275 }; 276 277 #define I40E_CLOUD_FIELD_OMAC BIT(0) 278 #define I40E_CLOUD_FIELD_IMAC BIT(1) 279 #define I40E_CLOUD_FIELD_IVLAN BIT(2) 280 #define I40E_CLOUD_FIELD_TEN_ID BIT(3) 281 #define I40E_CLOUD_FIELD_IIP BIT(4) 282 283 #define I40E_CLOUD_FILTER_FLAGS_OMAC I40E_CLOUD_FIELD_OMAC 284 #define I40E_CLOUD_FILTER_FLAGS_IMAC I40E_CLOUD_FIELD_IMAC 285 #define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN (I40E_CLOUD_FIELD_IMAC | \ 286 I40E_CLOUD_FIELD_IVLAN) 287 #define I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID (I40E_CLOUD_FIELD_IMAC | \ 288 I40E_CLOUD_FIELD_TEN_ID) 289 #define I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC (I40E_CLOUD_FIELD_OMAC | \ 290 I40E_CLOUD_FIELD_IMAC | \ 291 I40E_CLOUD_FIELD_TEN_ID) 292 #define I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID (I40E_CLOUD_FIELD_IMAC | \ 293 I40E_CLOUD_FIELD_IVLAN | \ 294 I40E_CLOUD_FIELD_TEN_ID) 295 #define I40E_CLOUD_FILTER_FLAGS_IIP I40E_CLOUD_FIELD_IIP 296 297 struct i40e_cloud_filter { 298 struct hlist_node cloud_node; 299 unsigned long cookie; 300 /* cloud filter input set follows */ 301 u8 dst_mac[ETH_ALEN]; 302 u8 src_mac[ETH_ALEN]; 303 __be16 vlan_id; 304 u16 seid; /* filter control */ 305 __be16 dst_port; 306 __be16 src_port; 307 u32 tenant_id; 308 union { 309 struct { 310 struct in_addr dst_ip; 311 struct in_addr src_ip; 312 } v4; 313 struct { 314 struct in6_addr dst_ip6; 315 struct in6_addr src_ip6; 316 } v6; 317 } ip; 318 #define dst_ipv6 ip.v6.dst_ip6.s6_addr32 319 #define src_ipv6 ip.v6.src_ip6.s6_addr32 320 #define dst_ipv4 ip.v4.dst_ip.s_addr 321 #define src_ipv4 ip.v4.src_ip.s_addr 322 u16 n_proto; /* Ethernet Protocol */ 323 u8 ip_proto; /* IPPROTO value */ 324 u8 flags; 325 #define I40E_CLOUD_TNL_TYPE_NONE 0xff 326 u8 tunnel_type; 327 }; 328 329 #define I40E_DCB_PRIO_TYPE_STRICT 0 330 #define I40E_DCB_PRIO_TYPE_ETS 1 331 #define I40E_DCB_STRICT_PRIO_CREDITS 127 332 /* DCB per TC information data structure */ 333 struct i40e_tc_info { 334 u16 qoffset; /* Queue offset from base queue */ 335 u16 qcount; /* Total Queues */ 336 u8 netdev_tc; /* Netdev TC index if netdev associated */ 337 }; 338 339 /* TC configuration data structure */ 340 struct i40e_tc_configuration { 341 u8 numtc; /* Total number of enabled TCs */ 342 u8 enabled_tc; /* TC map */ 343 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS]; 344 }; 345 346 #define I40E_UDP_PORT_INDEX_UNUSED 255 347 struct i40e_udp_port_config { 348 /* AdminQ command interface expects port number in Host byte order */ 349 u16 port; 350 u8 type; 351 u8 filter_index; 352 }; 353 354 /* macros related to FLX_PIT */ 355 #define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \ 356 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \ 357 I40E_PRTQF_FLX_PIT_FSIZE_MASK) 358 #define I40E_FLEX_SET_DST_WORD(dst) (((dst) << \ 359 I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT) & \ 360 I40E_PRTQF_FLX_PIT_DEST_OFF_MASK) 361 #define I40E_FLEX_SET_SRC_WORD(src) (((src) << \ 362 I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT) & \ 363 I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK) 364 #define I40E_FLEX_PREP_VAL(dst, fsize, src) (I40E_FLEX_SET_DST_WORD(dst) | \ 365 I40E_FLEX_SET_FSIZE(fsize) | \ 366 I40E_FLEX_SET_SRC_WORD(src)) 367 368 369 #define I40E_MAX_FLEX_SRC_OFFSET 0x1F 370 371 /* macros related to GLQF_ORT */ 372 #define I40E_ORT_SET_IDX(idx) (((idx) << \ 373 I40E_GLQF_ORT_PIT_INDX_SHIFT) & \ 374 I40E_GLQF_ORT_PIT_INDX_MASK) 375 376 #define I40E_ORT_SET_COUNT(count) (((count) << \ 377 I40E_GLQF_ORT_FIELD_CNT_SHIFT) & \ 378 I40E_GLQF_ORT_FIELD_CNT_MASK) 379 380 #define I40E_ORT_SET_PAYLOAD(payload) (((payload) << \ 381 I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) & \ 382 I40E_GLQF_ORT_FLX_PAYLOAD_MASK) 383 384 #define I40E_ORT_PREP_VAL(idx, count, payload) (I40E_ORT_SET_IDX(idx) | \ 385 I40E_ORT_SET_COUNT(count) | \ 386 I40E_ORT_SET_PAYLOAD(payload)) 387 388 #define I40E_L3_GLQF_ORT_IDX 34 389 #define I40E_L4_GLQF_ORT_IDX 35 390 391 /* Flex PIT register index */ 392 #define I40E_FLEX_PIT_IDX_START_L3 3 393 #define I40E_FLEX_PIT_IDX_START_L4 6 394 395 #define I40E_FLEX_PIT_TABLE_SIZE 3 396 397 #define I40E_FLEX_DEST_UNUSED 63 398 399 #define I40E_FLEX_INDEX_ENTRIES 8 400 401 /* Flex MASK to disable all flexible entries */ 402 #define I40E_FLEX_INPUT_MASK (I40E_FLEX_50_MASK | I40E_FLEX_51_MASK | \ 403 I40E_FLEX_52_MASK | I40E_FLEX_53_MASK | \ 404 I40E_FLEX_54_MASK | I40E_FLEX_55_MASK | \ 405 I40E_FLEX_56_MASK | I40E_FLEX_57_MASK) 406 407 #define I40E_QINT_TQCTL_VAL(qp, vector, nextq_type) \ 408 (I40E_QINT_TQCTL_CAUSE_ENA_MASK | \ 409 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | \ 410 ((vector) << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | \ 411 ((qp) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) | \ 412 (I40E_QUEUE_TYPE_##nextq_type << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT)) 413 414 #define I40E_QINT_RQCTL_VAL(qp, vector, nextq_type) \ 415 (I40E_QINT_RQCTL_CAUSE_ENA_MASK | \ 416 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | \ 417 ((vector) << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | \ 418 ((qp) << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) | \ 419 (I40E_QUEUE_TYPE_##nextq_type << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT)) 420 421 struct i40e_flex_pit { 422 struct list_head list; 423 u16 src_offset; 424 u8 pit_index; 425 }; 426 427 struct i40e_fwd_adapter { 428 struct net_device *netdev; 429 int bit_no; 430 }; 431 432 struct i40e_channel { 433 struct list_head list; 434 bool initialized; 435 u8 type; 436 u16 vsi_number; /* Assigned VSI number from AQ 'Add VSI' response */ 437 u16 stat_counter_idx; 438 u16 base_queue; 439 u16 num_queue_pairs; /* Requested by user */ 440 u16 seid; 441 442 u8 enabled_tc; 443 struct i40e_aqc_vsi_properties_data info; 444 445 u64 max_tx_rate; 446 struct i40e_fwd_adapter *fwd; 447 448 /* track this channel belongs to which VSI */ 449 struct i40e_vsi *parent_vsi; 450 }; 451 452 struct i40e_ptp_pins_settings; 453 454 static inline bool i40e_is_channel_macvlan(struct i40e_channel *ch) 455 { 456 return !!ch->fwd; 457 } 458 459 static inline const u8 *i40e_channel_mac(struct i40e_channel *ch) 460 { 461 if (i40e_is_channel_macvlan(ch)) 462 return ch->fwd->netdev->dev_addr; 463 else 464 return NULL; 465 } 466 467 /* struct that defines the Ethernet device */ 468 struct i40e_pf { 469 struct pci_dev *pdev; 470 struct devlink_port devlink_port; 471 struct i40e_hw hw; 472 DECLARE_BITMAP(state, __I40E_STATE_SIZE__); 473 struct msix_entry *msix_entries; 474 475 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */ 476 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */ 477 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */ 478 u16 num_req_vfs; /* num VFs requested for this PF */ 479 u16 num_vf_qps; /* num queue pairs per VF */ 480 u16 num_lan_qps; /* num lan queues this PF has set up */ 481 u16 num_lan_msix; /* num queue vectors for the base PF vsi */ 482 u16 num_fdsb_msix; /* num queue vectors for sideband Fdir */ 483 u16 num_iwarp_msix; /* num of iwarp vectors for this PF */ 484 int iwarp_base_vector; 485 int queues_left; /* queues left unclaimed */ 486 u16 alloc_rss_size; /* allocated RSS queues */ 487 u16 rss_size_max; /* HW defined max RSS queues */ 488 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */ 489 u16 num_alloc_vsi; /* num VSIs this driver supports */ 490 bool wol_en; 491 492 struct hlist_head fdir_filter_list; 493 u16 fdir_pf_active_filters; 494 unsigned long fd_flush_timestamp; 495 u32 fd_flush_cnt; 496 u32 fd_add_err; 497 u32 fd_atr_cnt; 498 499 /* Book-keeping of side-band filter count per flow-type. 500 * This is used to detect and handle input set changes for 501 * respective flow-type. 502 */ 503 u16 fd_tcp4_filter_cnt; 504 u16 fd_udp4_filter_cnt; 505 u16 fd_sctp4_filter_cnt; 506 u16 fd_ip4_filter_cnt; 507 508 u16 fd_tcp6_filter_cnt; 509 u16 fd_udp6_filter_cnt; 510 u16 fd_sctp6_filter_cnt; 511 u16 fd_ip6_filter_cnt; 512 513 /* Flexible filter table values that need to be programmed into 514 * hardware, which expects L3 and L4 to be programmed separately. We 515 * need to ensure that the values are in ascended order and don't have 516 * duplicates, so we track each L3 and L4 values in separate lists. 517 */ 518 struct list_head l3_flex_pit_list; 519 struct list_head l4_flex_pit_list; 520 521 struct udp_tunnel_nic_shared udp_tunnel_shared; 522 struct udp_tunnel_nic_info udp_tunnel_nic; 523 524 struct hlist_head cloud_filter_list; 525 u16 num_cloud_filters; 526 527 u16 rx_itr_default; 528 u16 tx_itr_default; 529 u32 msg_enable; 530 char int_name[I40E_INT_NAME_STR_LEN]; 531 unsigned long service_timer_period; 532 unsigned long service_timer_previous; 533 struct timer_list service_timer; 534 struct work_struct service_task; 535 536 DECLARE_BITMAP(flags, I40E_PF_FLAGS_NBITS); 537 struct i40e_client_instance *cinst; 538 bool stat_offsets_loaded; 539 struct i40e_hw_port_stats stats; 540 struct i40e_hw_port_stats stats_offsets; 541 u32 tx_timeout_count; 542 u32 tx_timeout_recovery_level; 543 unsigned long tx_timeout_last_recovery; 544 u32 hw_csum_rx_error; 545 u32 led_status; 546 u16 corer_count; /* Core reset count */ 547 u16 globr_count; /* Global reset count */ 548 u16 empr_count; /* EMP reset count */ 549 u16 pfr_count; /* PF reset count */ 550 u16 sw_int_count; /* SW interrupt count */ 551 u32 link_down_events; 552 553 struct mutex switch_mutex; 554 u16 lan_vsi; /* our default LAN VSI */ 555 u16 lan_veb; /* initial relay, if exists */ 556 #define I40E_NO_VEB 0xffff 557 #define I40E_NO_VSI 0xffff 558 u16 next_vsi; /* Next unallocated VSI - 0-based! */ 559 struct i40e_vsi **vsi; 560 struct i40e_veb *veb[I40E_MAX_VEB]; 561 562 struct i40e_lump_tracking *qp_pile; 563 struct i40e_lump_tracking *irq_pile; 564 565 /* switch config info */ 566 u16 main_vsi_seid; 567 u16 mac_seid; 568 #ifdef CONFIG_DEBUG_FS 569 struct dentry *i40e_dbg_pf; 570 #endif /* CONFIG_DEBUG_FS */ 571 bool cur_promisc; 572 573 /* sr-iov config info */ 574 struct i40e_vf *vf; 575 int num_alloc_vfs; /* actual number of VFs allocated */ 576 u32 vf_aq_requests; 577 /* If set to non-zero, the device uses this value 578 * as maximum number of MAC filters per VF. 579 */ 580 u32 max_mac_per_vf; 581 u32 arq_overflows; /* Not fatal, possibly indicative of problems */ 582 struct ratelimit_state mdd_message_rate_limit; 583 /* DCBx/DCBNL capability for PF that indicates 584 * whether DCBx is managed by firmware or host 585 * based agent (LLDPAD). Also, indicates what 586 * flavor of DCBx protocol (IEEE/CEE) is supported 587 * by the device. For now we're supporting IEEE 588 * mode only. 589 */ 590 u16 dcbx_cap; 591 592 struct i40e_filter_control_settings filter_settings; 593 struct i40e_rx_pb_config pb_cfg; /* Current Rx packet buffer config */ 594 struct i40e_dcbx_config tmp_cfg; 595 596 /* GPIO defines used by PTP */ 597 #define I40E_SDP3_2 18 598 #define I40E_SDP3_3 19 599 #define I40E_GPIO_4 20 600 #define I40E_LED2_0 26 601 #define I40E_LED2_1 27 602 #define I40E_LED3_0 28 603 #define I40E_LED3_1 29 604 #define I40E_GLGEN_GPIO_SET_SDP_DATA_HI \ 605 (1 << I40E_GLGEN_GPIO_SET_SDP_DATA_SHIFT) 606 #define I40E_GLGEN_GPIO_SET_DRV_SDP_DATA \ 607 (1 << I40E_GLGEN_GPIO_SET_DRIVE_SDP_SHIFT) 608 #define I40E_GLGEN_GPIO_CTL_PRT_NUM_0 \ 609 (0 << I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT) 610 #define I40E_GLGEN_GPIO_CTL_PRT_NUM_1 \ 611 (1 << I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT) 612 #define I40E_GLGEN_GPIO_CTL_RESERVED BIT(2) 613 #define I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_Z \ 614 (1 << I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_SHIFT) 615 #define I40E_GLGEN_GPIO_CTL_DIR_OUT \ 616 (1 << I40E_GLGEN_GPIO_CTL_PIN_DIR_SHIFT) 617 #define I40E_GLGEN_GPIO_CTL_TRI_DRV_HI \ 618 (1 << I40E_GLGEN_GPIO_CTL_TRI_CTL_SHIFT) 619 #define I40E_GLGEN_GPIO_CTL_OUT_HI_RST \ 620 (1 << I40E_GLGEN_GPIO_CTL_OUT_CTL_SHIFT) 621 #define I40E_GLGEN_GPIO_CTL_TIMESYNC_0 \ 622 (3 << I40E_GLGEN_GPIO_CTL_PIN_FUNC_SHIFT) 623 #define I40E_GLGEN_GPIO_CTL_TIMESYNC_1 \ 624 (4 << I40E_GLGEN_GPIO_CTL_PIN_FUNC_SHIFT) 625 #define I40E_GLGEN_GPIO_CTL_NOT_FOR_PHY_CONN \ 626 (0x3F << I40E_GLGEN_GPIO_CTL_PHY_PIN_NAME_SHIFT) 627 #define I40E_GLGEN_GPIO_CTL_OUT_DEFAULT \ 628 (1 << I40E_GLGEN_GPIO_CTL_OUT_DEFAULT_SHIFT) 629 #define I40E_GLGEN_GPIO_CTL_PORT_0_IN_TIMESYNC_0 \ 630 (I40E_GLGEN_GPIO_CTL_NOT_FOR_PHY_CONN | \ 631 I40E_GLGEN_GPIO_CTL_TIMESYNC_0 | \ 632 I40E_GLGEN_GPIO_CTL_RESERVED | I40E_GLGEN_GPIO_CTL_PRT_NUM_0) 633 #define I40E_GLGEN_GPIO_CTL_PORT_1_IN_TIMESYNC_0 \ 634 (I40E_GLGEN_GPIO_CTL_NOT_FOR_PHY_CONN | \ 635 I40E_GLGEN_GPIO_CTL_TIMESYNC_0 | \ 636 I40E_GLGEN_GPIO_CTL_RESERVED | I40E_GLGEN_GPIO_CTL_PRT_NUM_1) 637 #define I40E_GLGEN_GPIO_CTL_PORT_0_OUT_TIMESYNC_1 \ 638 (I40E_GLGEN_GPIO_CTL_NOT_FOR_PHY_CONN | \ 639 I40E_GLGEN_GPIO_CTL_TIMESYNC_1 | I40E_GLGEN_GPIO_CTL_OUT_HI_RST | \ 640 I40E_GLGEN_GPIO_CTL_TRI_DRV_HI | I40E_GLGEN_GPIO_CTL_DIR_OUT | \ 641 I40E_GLGEN_GPIO_CTL_RESERVED | I40E_GLGEN_GPIO_CTL_PRT_NUM_0) 642 #define I40E_GLGEN_GPIO_CTL_PORT_1_OUT_TIMESYNC_1 \ 643 (I40E_GLGEN_GPIO_CTL_NOT_FOR_PHY_CONN | \ 644 I40E_GLGEN_GPIO_CTL_TIMESYNC_1 | I40E_GLGEN_GPIO_CTL_OUT_HI_RST | \ 645 I40E_GLGEN_GPIO_CTL_TRI_DRV_HI | I40E_GLGEN_GPIO_CTL_DIR_OUT | \ 646 I40E_GLGEN_GPIO_CTL_RESERVED | I40E_GLGEN_GPIO_CTL_PRT_NUM_1) 647 #define I40E_GLGEN_GPIO_CTL_LED_INIT \ 648 (I40E_GLGEN_GPIO_CTL_PRT_NUM_NA_Z | \ 649 I40E_GLGEN_GPIO_CTL_DIR_OUT | \ 650 I40E_GLGEN_GPIO_CTL_TRI_DRV_HI | \ 651 I40E_GLGEN_GPIO_CTL_OUT_HI_RST | \ 652 I40E_GLGEN_GPIO_CTL_OUT_DEFAULT | \ 653 I40E_GLGEN_GPIO_CTL_NOT_FOR_PHY_CONN) 654 #define I40E_PRTTSYN_AUX_1_INSTNT \ 655 (1 << I40E_PRTTSYN_AUX_1_INSTNT_SHIFT) 656 #define I40E_PRTTSYN_AUX_0_OUT_ENABLE \ 657 (1 << I40E_PRTTSYN_AUX_0_OUT_ENA_SHIFT) 658 #define I40E_PRTTSYN_AUX_0_OUT_CLK_MOD (3 << I40E_PRTTSYN_AUX_0_OUTMOD_SHIFT) 659 #define I40E_PRTTSYN_AUX_0_OUT_ENABLE_CLK_MOD \ 660 (I40E_PRTTSYN_AUX_0_OUT_ENABLE | I40E_PRTTSYN_AUX_0_OUT_CLK_MOD) 661 #define I40E_PTP_HALF_SECOND 500000000LL /* nano seconds */ 662 #define I40E_PTP_2_SEC_DELAY 2 663 664 struct ptp_clock *ptp_clock; 665 struct ptp_clock_info ptp_caps; 666 struct sk_buff *ptp_tx_skb; 667 unsigned long ptp_tx_start; 668 struct kernel_hwtstamp_config tstamp_config; 669 struct timespec64 ptp_prev_hw_time; 670 struct work_struct ptp_extts0_work; 671 ktime_t ptp_reset_start; 672 struct mutex tmreg_lock; /* Used to protect the SYSTIME registers. */ 673 u32 ptp_adj_mult; 674 u32 tx_hwtstamp_timeouts; 675 u32 tx_hwtstamp_skipped; 676 u32 rx_hwtstamp_cleared; 677 u32 latch_event_flags; 678 spinlock_t ptp_rx_lock; /* Used to protect Rx timestamp registers. */ 679 unsigned long latch_events[4]; 680 bool ptp_tx; 681 bool ptp_rx; 682 struct i40e_ptp_pins_settings *ptp_pins; 683 u16 rss_table_size; /* HW RSS table size */ 684 u32 max_bw; 685 u32 min_bw; 686 687 u32 ioremap_len; 688 u32 fd_inv; 689 u16 phy_led_val; 690 691 u16 last_sw_conf_flags; 692 u16 last_sw_conf_valid_flags; 693 /* List to keep previous DDP profiles to be rolled back in the future */ 694 struct list_head ddp_old_prof; 695 }; 696 697 /** 698 * __i40e_pf_next_vsi - get next valid VSI 699 * @pf: pointer to the PF struct 700 * @idx: pointer to start position number 701 * 702 * Find and return next non-NULL VSI pointer in pf->vsi array and 703 * updates idx position. Returns NULL if no VSI is found. 704 **/ 705 static __always_inline struct i40e_vsi * 706 __i40e_pf_next_vsi(struct i40e_pf *pf, int *idx) 707 { 708 while (*idx < pf->num_alloc_vsi) { 709 if (pf->vsi[*idx]) 710 return pf->vsi[*idx]; 711 (*idx)++; 712 } 713 return NULL; 714 } 715 716 #define i40e_pf_for_each_vsi(_pf, _i, _vsi) \ 717 for (_i = 0, _vsi = __i40e_pf_next_vsi(_pf, &_i); \ 718 _vsi; \ 719 _i++, _vsi = __i40e_pf_next_vsi(_pf, &_i)) 720 721 /** 722 * __i40e_pf_next_veb - get next valid VEB 723 * @pf: pointer to the PF struct 724 * @idx: pointer to start position number 725 * 726 * Find and return next non-NULL VEB pointer in pf->veb array and 727 * updates idx position. Returns NULL if no VEB is found. 728 **/ 729 static __always_inline struct i40e_veb * 730 __i40e_pf_next_veb(struct i40e_pf *pf, int *idx) 731 { 732 while (*idx < I40E_MAX_VEB) { 733 if (pf->veb[*idx]) 734 return pf->veb[*idx]; 735 (*idx)++; 736 } 737 return NULL; 738 } 739 740 #define i40e_pf_for_each_veb(_pf, _i, _veb) \ 741 for (_i = 0, _veb = __i40e_pf_next_veb(_pf, &_i); \ 742 _veb; \ 743 _i++, _veb = __i40e_pf_next_veb(_pf, &_i)) 744 745 /** 746 * i40e_addr_to_hkey - Convert a 6-byte MAC Address to a u64 hash key 747 * @macaddr: the MAC Address as the base key 748 * 749 * Simply copies the address and returns it as a u64 for hashing 750 **/ 751 static inline u64 i40e_addr_to_hkey(const u8 *macaddr) 752 { 753 u64 key = 0; 754 755 ether_addr_copy((u8 *)&key, macaddr); 756 return key; 757 } 758 759 enum i40e_filter_state { 760 I40E_FILTER_INVALID = 0, /* Invalid state */ 761 I40E_FILTER_NEW, /* New, not sent to FW yet */ 762 I40E_FILTER_ACTIVE, /* Added to switch by FW */ 763 I40E_FILTER_FAILED, /* Rejected by FW */ 764 I40E_FILTER_REMOVE, /* To be removed */ 765 I40E_FILTER_NEW_SYNC, /* New, not sent yet, is in i40e_sync_vsi_filters() */ 766 /* There is no 'removed' state; the filter struct is freed */ 767 }; 768 struct i40e_mac_filter { 769 struct hlist_node hlist; 770 u8 macaddr[ETH_ALEN]; 771 #define I40E_VLAN_ANY -1 772 s16 vlan; 773 enum i40e_filter_state state; 774 }; 775 776 /* Wrapper structure to keep track of filters while we are preparing to send 777 * firmware commands. We cannot send firmware commands while holding a 778 * spinlock, since it might sleep. To avoid this, we wrap the added filters in 779 * a separate structure, which will track the state change and update the real 780 * filter while under lock. We can't simply hold the filters in a separate 781 * list, as this opens a window for a race condition when adding new MAC 782 * addresses to all VLANs, or when adding new VLANs to all MAC addresses. 783 */ 784 struct i40e_new_mac_filter { 785 struct hlist_node hlist; 786 struct i40e_mac_filter *f; 787 788 /* Track future changes to state separately */ 789 enum i40e_filter_state state; 790 }; 791 792 struct i40e_veb { 793 struct i40e_pf *pf; 794 u16 idx; 795 u16 seid; 796 u16 uplink_seid; 797 u16 stats_idx; /* index of VEB parent */ 798 u8 enabled_tc; 799 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */ 800 u16 bw_limit; 801 u8 bw_max_quanta; 802 bool is_abs_credits; 803 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS]; 804 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS]; 805 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS]; 806 struct kobject *kobj; 807 bool stat_offsets_loaded; 808 struct i40e_eth_stats stats; 809 struct i40e_eth_stats stats_offsets; 810 struct i40e_veb_tc_stats tc_stats; 811 struct i40e_veb_tc_stats tc_stats_offsets; 812 }; 813 814 /* struct that defines a VSI, associated with a dev */ 815 struct i40e_vsi { 816 struct net_device *netdev; 817 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; 818 bool netdev_registered; 819 bool stat_offsets_loaded; 820 821 u32 current_netdev_flags; 822 DECLARE_BITMAP(state, __I40E_VSI_STATE_SIZE__); 823 #define I40E_VSI_FLAG_FILTER_CHANGED BIT(0) 824 #define I40E_VSI_FLAG_VEB_OWNER BIT(1) 825 unsigned long flags; 826 827 /* Per VSI lock to protect elements/hash (MAC filter) */ 828 spinlock_t mac_filter_hash_lock; 829 /* Fixed size hash table with 2^8 buckets for MAC filters */ 830 DECLARE_HASHTABLE(mac_filter_hash, 8); 831 bool has_vlan_filter; 832 833 /* VSI stats */ 834 struct rtnl_link_stats64 net_stats; 835 struct rtnl_link_stats64 net_stats_offsets; 836 struct i40e_eth_stats eth_stats; 837 struct i40e_eth_stats eth_stats_offsets; 838 u64 tx_restart; 839 u64 tx_busy; 840 u64 tx_linearize; 841 u64 tx_force_wb; 842 u64 tx_stopped; 843 u64 rx_buf_failed; 844 u64 rx_page_failed; 845 u64 rx_page_reuse; 846 u64 rx_page_alloc; 847 u64 rx_page_waive; 848 u64 rx_page_busy; 849 850 /* These are containers of ring pointers, allocated at run-time */ 851 struct i40e_ring **rx_rings; 852 struct i40e_ring **tx_rings; 853 struct i40e_ring **xdp_rings; /* XDP Tx rings */ 854 855 u32 active_filters; 856 u32 promisc_threshold; 857 858 u16 work_limit; 859 u16 int_rate_limit; /* value in usecs */ 860 861 u16 rss_table_size; /* HW RSS table size */ 862 u16 rss_size; /* Allocated RSS queues */ 863 u8 *rss_hkey_user; /* User configured hash keys */ 864 u8 *rss_lut_user; /* User configured lookup table entries */ 865 866 867 u16 max_frame; 868 u16 rx_buf_len; 869 870 struct bpf_prog *xdp_prog; 871 872 /* List of q_vectors allocated to this VSI */ 873 struct i40e_q_vector **q_vectors; 874 int num_q_vectors; 875 int base_vector; 876 bool irqs_ready; 877 878 u16 seid; /* HW index of this VSI (absolute index) */ 879 u16 id; /* VSI number */ 880 u16 uplink_seid; 881 882 u16 base_queue; /* vsi's first queue in hw array */ 883 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */ 884 u16 req_queue_pairs; /* User requested queue pairs */ 885 u16 num_queue_pairs; /* Used tx and rx pairs */ 886 u16 num_tx_desc; 887 u16 num_rx_desc; 888 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */ 889 s16 vf_id; /* Virtual function ID for SRIOV VSIs */ 890 891 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */ 892 struct i40e_tc_configuration tc_config; 893 struct i40e_aqc_vsi_properties_data info; 894 895 /* VSI BW limit (absolute across all TCs) */ 896 u16 bw_limit; /* VSI BW Limit (0 = disabled) */ 897 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */ 898 899 /* Relative TC credits across VSIs */ 900 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS]; 901 /* TC BW limit credits within VSI */ 902 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS]; 903 /* TC BW limit max quanta within VSI */ 904 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS]; 905 906 struct i40e_pf *back; /* Backreference to associated PF */ 907 u16 idx; /* index in pf->vsi[] */ 908 u16 veb_idx; /* index of VEB parent */ 909 struct kobject *kobj; /* sysfs object */ 910 bool current_isup; /* Sync 'link up' logging */ 911 enum i40e_aq_link_speed current_speed; /* Sync link speed logging */ 912 913 /* channel specific fields */ 914 u16 cnt_q_avail; /* num of queues available for channel usage */ 915 u16 orig_rss_size; 916 u16 current_rss_size; 917 bool reconfig_rss; 918 919 u16 next_base_queue; /* next queue to be used for channel setup */ 920 921 struct list_head ch_list; 922 u16 tc_seid_map[I40E_MAX_TRAFFIC_CLASS]; 923 924 /* macvlan fields */ 925 #define I40E_MAX_MACVLANS 128 /* Max HW vectors - 1 on FVL */ 926 #define I40E_MIN_MACVLAN_VECTORS 2 /* Min vectors to enable macvlans */ 927 DECLARE_BITMAP(fwd_bitmask, I40E_MAX_MACVLANS); 928 struct list_head macvlan_list; 929 int macvlan_cnt; 930 931 void *priv; /* client driver data reference. */ 932 933 /* VSI specific handlers */ 934 irqreturn_t (*irq_handler)(int irq, void *data); 935 936 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */ 937 } ____cacheline_internodealigned_in_smp; 938 939 struct i40e_netdev_priv { 940 struct i40e_vsi *vsi; 941 }; 942 943 extern struct ida i40e_client_ida; 944 945 /* struct that defines an interrupt vector */ 946 struct i40e_q_vector { 947 struct i40e_vsi *vsi; 948 949 u16 v_idx; /* index in the vsi->q_vector array. */ 950 u16 reg_idx; /* register index of the interrupt */ 951 952 struct napi_struct napi; 953 struct rcu_head rcu; /* to avoid race with update stats on free */ 954 955 struct i40e_ring_container rx; 956 struct i40e_ring_container tx; 957 958 u8 itr_countdown; /* when 0 should adjust adaptive ITR */ 959 u8 num_ringpairs; /* total number of ring pairs in vector */ 960 961 cpumask_t affinity_mask; 962 struct irq_affinity_notify affinity_notify; 963 964 char name[I40E_INT_NAME_STR_LEN]; 965 bool arm_wb_state; 966 bool in_busy_poll; 967 int irq_num; /* IRQ assigned to this q_vector */ 968 } ____cacheline_internodealigned_in_smp; 969 970 /* lan device */ 971 struct i40e_device { 972 struct list_head list; 973 struct i40e_pf *pf; 974 }; 975 976 /** 977 * i40e_info_nvm_ver - format the NVM version string 978 * @hw: ptr to the hardware info 979 * @buf: string buffer to store 980 * @len: buffer size 981 * 982 * Formats NVM version string as: 983 * <gen>.<snap>.<release> when eetrackid == I40E_OEM_EETRACK_ID 984 * <nvm_major>.<nvm_minor> otherwise 985 **/ 986 static inline void i40e_info_nvm_ver(struct i40e_hw *hw, char *buf, size_t len) 987 { 988 struct i40e_nvm_info *nvm = &hw->nvm; 989 990 if (nvm->eetrack == I40E_OEM_EETRACK_ID) { 991 u32 full_ver = nvm->oem_ver; 992 u8 gen, snap; 993 u16 release; 994 995 gen = FIELD_GET(I40E_OEM_GEN_MASK, full_ver); 996 snap = FIELD_GET(I40E_OEM_SNAP_MASK, full_ver); 997 release = FIELD_GET(I40E_OEM_RELEASE_MASK, full_ver); 998 snprintf(buf, len, "%x.%x.%x", gen, snap, release); 999 } else { 1000 u8 major, minor; 1001 1002 major = FIELD_GET(I40E_NVM_VERSION_HI_MASK, nvm->version); 1003 minor = FIELD_GET(I40E_NVM_VERSION_LO_MASK, nvm->version); 1004 snprintf(buf, len, "%x.%02x", major, minor); 1005 } 1006 } 1007 1008 /** 1009 * i40e_info_eetrack - format the EETrackID string 1010 * @hw: ptr to the hardware info 1011 * @buf: string buffer to store 1012 * @len: buffer size 1013 * 1014 * Returns hexadecimally formated EETrackID if it is 1015 * different from I40E_OEM_EETRACK_ID or empty string. 1016 **/ 1017 static inline void i40e_info_eetrack(struct i40e_hw *hw, char *buf, size_t len) 1018 { 1019 struct i40e_nvm_info *nvm = &hw->nvm; 1020 1021 buf[0] = '\0'; 1022 if (nvm->eetrack != I40E_OEM_EETRACK_ID) 1023 snprintf(buf, len, "0x%08x", nvm->eetrack); 1024 } 1025 1026 /** 1027 * i40e_info_civd_ver - format the NVM version strings 1028 * @hw: ptr to the hardware info 1029 * @buf: string buffer to store 1030 * @len: buffer size 1031 * 1032 * Returns formated combo image version if adapter's EETrackID is 1033 * different from I40E_OEM_EETRACK_ID or empty string. 1034 **/ 1035 static inline void i40e_info_civd_ver(struct i40e_hw *hw, char *buf, size_t len) 1036 { 1037 struct i40e_nvm_info *nvm = &hw->nvm; 1038 1039 buf[0] = '\0'; 1040 if (nvm->eetrack != I40E_OEM_EETRACK_ID) { 1041 u32 full_ver = nvm->oem_ver; 1042 u8 major, minor; 1043 u16 build; 1044 1045 major = FIELD_GET(I40E_OEM_VER_MASK, full_ver); 1046 build = FIELD_GET(I40E_OEM_VER_BUILD_MASK, full_ver); 1047 minor = FIELD_GET(I40E_OEM_VER_PATCH_MASK, full_ver); 1048 snprintf(buf, len, "%d.%d.%d", major, build, minor); 1049 } 1050 } 1051 1052 /** 1053 * i40e_nvm_version_str - format the NVM version strings 1054 * @hw: ptr to the hardware info 1055 * @buf: string buffer to store 1056 * @len: buffer size 1057 **/ 1058 static inline char *i40e_nvm_version_str(struct i40e_hw *hw, char *buf, 1059 size_t len) 1060 { 1061 char ver[16] = " "; 1062 1063 /* Get NVM version */ 1064 i40e_info_nvm_ver(hw, buf, len); 1065 1066 /* Append EETrackID if provided */ 1067 i40e_info_eetrack(hw, &ver[1], sizeof(ver) - 1); 1068 if (strlen(ver) > 1) 1069 strlcat(buf, ver, len); 1070 1071 /* Append combo image version if provided */ 1072 i40e_info_civd_ver(hw, &ver[1], sizeof(ver) - 1); 1073 if (strlen(ver) > 1) 1074 strlcat(buf, ver, len); 1075 1076 return buf; 1077 } 1078 1079 /** 1080 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev 1081 * @netdev: the corresponding netdev 1082 * 1083 * Return the PF struct for the given netdev 1084 **/ 1085 static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev) 1086 { 1087 struct i40e_netdev_priv *np = netdev_priv(netdev); 1088 struct i40e_vsi *vsi = np->vsi; 1089 1090 return vsi->back; 1091 } 1092 1093 static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi, 1094 irqreturn_t (*irq_handler)(int, void *)) 1095 { 1096 vsi->irq_handler = irq_handler; 1097 } 1098 1099 /** 1100 * i40e_get_fd_cnt_all - get the total FD filter space available 1101 * @pf: pointer to the PF struct 1102 **/ 1103 static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf) 1104 { 1105 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count; 1106 } 1107 1108 /** 1109 * i40e_read_fd_input_set - reads value of flow director input set register 1110 * @pf: pointer to the PF struct 1111 * @addr: register addr 1112 * 1113 * This function reads value of flow director input set register 1114 * specified by 'addr' (which is specific to flow-type) 1115 **/ 1116 static inline u64 i40e_read_fd_input_set(struct i40e_pf *pf, u16 addr) 1117 { 1118 u64 val; 1119 1120 val = i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1)); 1121 val <<= 32; 1122 val += i40e_read_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0)); 1123 1124 return val; 1125 } 1126 1127 /** 1128 * i40e_write_fd_input_set - writes value into flow director input set register 1129 * @pf: pointer to the PF struct 1130 * @addr: register addr 1131 * @val: value to be written 1132 * 1133 * This function writes specified value to the register specified by 'addr'. 1134 * This register is input set register based on flow-type. 1135 **/ 1136 static inline void i40e_write_fd_input_set(struct i40e_pf *pf, 1137 u16 addr, u64 val) 1138 { 1139 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 1), 1140 (u32)(val >> 32)); 1141 i40e_write_rx_ctl(&pf->hw, I40E_PRTQF_FD_INSET(addr, 0), 1142 (u32)(val & 0xFFFFFFFFULL)); 1143 } 1144 1145 /** 1146 * i40e_get_pf_count - get PCI PF count. 1147 * @hw: pointer to a hw. 1148 * 1149 * Reports the function number of the highest PCI physical 1150 * function plus 1 as it is loaded from the NVM. 1151 * 1152 * Return: PCI PF count. 1153 **/ 1154 static inline u32 i40e_get_pf_count(struct i40e_hw *hw) 1155 { 1156 return FIELD_GET(I40E_GLGEN_PCIFCNCNT_PCIPFCNT_MASK, 1157 rd32(hw, I40E_GLGEN_PCIFCNCNT)); 1158 } 1159 1160 /* needed by i40e_ethtool.c */ 1161 int i40e_up(struct i40e_vsi *vsi); 1162 void i40e_down(struct i40e_vsi *vsi); 1163 extern const char i40e_driver_name[]; 1164 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags); 1165 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired); 1166 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 1167 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size); 1168 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut, 1169 u16 rss_table_size, u16 rss_size); 1170 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id); 1171 /** 1172 * i40e_find_vsi_by_type - Find and return Flow Director VSI 1173 * @pf: PF to search for VSI 1174 * @type: Value indicating type of VSI we are looking for 1175 **/ 1176 static inline struct i40e_vsi * 1177 i40e_find_vsi_by_type(struct i40e_pf *pf, u16 type) 1178 { 1179 struct i40e_vsi *vsi; 1180 int i; 1181 1182 i40e_pf_for_each_vsi(pf, i, vsi) 1183 if (vsi->type == type) 1184 return vsi; 1185 1186 return NULL; 1187 } 1188 void i40e_update_stats(struct i40e_vsi *vsi); 1189 void i40e_update_veb_stats(struct i40e_veb *veb); 1190 void i40e_update_eth_stats(struct i40e_vsi *vsi); 1191 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi); 1192 int i40e_fetch_switch_configuration(struct i40e_pf *pf, 1193 bool printconfig); 1194 1195 int i40e_add_del_fdir(struct i40e_vsi *vsi, 1196 struct i40e_fdir_filter *input, bool add); 1197 void i40e_fdir_check_and_reenable(struct i40e_pf *pf); 1198 u32 i40e_get_current_fd_count(struct i40e_pf *pf); 1199 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf); 1200 u32 i40e_get_global_fd_count(struct i40e_pf *pf); 1201 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features); 1202 void i40e_set_ethtool_ops(struct net_device *netdev); 1203 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, 1204 const u8 *macaddr, s16 vlan); 1205 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f); 1206 int i40e_sync_vsi_filters(struct i40e_vsi *vsi); 1207 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, 1208 u16 uplink, u32 param1); 1209 int i40e_vsi_release(struct i40e_vsi *vsi); 1210 void i40e_service_event_schedule(struct i40e_pf *pf); 1211 void i40e_notify_client_of_vf_msg(struct i40e_vsi *vsi, u32 vf_id, 1212 u8 *msg, u16 len); 1213 1214 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q, bool is_xdp, 1215 bool enable); 1216 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable); 1217 int i40e_vsi_start_rings(struct i40e_vsi *vsi); 1218 void i40e_vsi_stop_rings(struct i40e_vsi *vsi); 1219 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi); 1220 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi); 1221 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count); 1222 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 uplink_seid, 1223 u16 downlink_seid, u8 enabled_tc); 1224 void i40e_veb_release(struct i40e_veb *veb); 1225 1226 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc); 1227 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid); 1228 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi); 1229 void i40e_vsi_reset_stats(struct i40e_vsi *vsi); 1230 void i40e_pf_reset_stats(struct i40e_pf *pf); 1231 #ifdef CONFIG_DEBUG_FS 1232 void i40e_dbg_pf_init(struct i40e_pf *pf); 1233 void i40e_dbg_pf_exit(struct i40e_pf *pf); 1234 void i40e_dbg_init(void); 1235 void i40e_dbg_exit(void); 1236 #else 1237 static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {} 1238 static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {} 1239 static inline void i40e_dbg_init(void) {} 1240 static inline void i40e_dbg_exit(void) {} 1241 #endif /* CONFIG_DEBUG_FS*/ 1242 /* needed by client drivers */ 1243 int i40e_lan_add_device(struct i40e_pf *pf); 1244 int i40e_lan_del_device(struct i40e_pf *pf); 1245 void i40e_client_subtask(struct i40e_pf *pf); 1246 void i40e_notify_client_of_l2_param_changes(struct i40e_pf *pf); 1247 void i40e_notify_client_of_netdev_close(struct i40e_pf *pf, bool reset); 1248 void i40e_notify_client_of_vf_enable(struct i40e_pf *pf, u32 num_vfs); 1249 void i40e_notify_client_of_vf_reset(struct i40e_pf *pf, u32 vf_id); 1250 void i40e_client_update_msix_info(struct i40e_pf *pf); 1251 int i40e_vf_client_capable(struct i40e_pf *pf, u32 vf_id); 1252 /** 1253 * i40e_irq_dynamic_enable - Enable default interrupt generation settings 1254 * @vsi: pointer to a vsi 1255 * @vector: enable a particular Hw Interrupt vector, without base_vector 1256 **/ 1257 static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) 1258 { 1259 struct i40e_pf *pf = vsi->back; 1260 struct i40e_hw *hw = &pf->hw; 1261 u32 val; 1262 1263 val = I40E_PFINT_DYN_CTLN_INTENA_MASK | 1264 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | 1265 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); 1266 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val); 1267 /* skip the flush */ 1268 } 1269 1270 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf); 1271 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf); 1272 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); 1273 int i40e_open(struct net_device *netdev); 1274 int i40e_close(struct net_device *netdev); 1275 int i40e_vsi_open(struct i40e_vsi *vsi); 1276 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi); 1277 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid); 1278 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid); 1279 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid); 1280 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid); 1281 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi, 1282 const u8 *macaddr); 1283 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr); 1284 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi); 1285 int i40e_count_all_filters(struct i40e_vsi *vsi); 1286 int i40e_count_active_filters(struct i40e_vsi *vsi); 1287 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr); 1288 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi); 1289 static inline bool i40e_is_sw_dcb(struct i40e_pf *pf) 1290 { 1291 return test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags); 1292 } 1293 1294 #ifdef CONFIG_I40E_DCB 1295 void i40e_dcbnl_flush_apps(struct i40e_pf *pf, 1296 struct i40e_dcbx_config *old_cfg, 1297 struct i40e_dcbx_config *new_cfg); 1298 void i40e_dcbnl_set_all(struct i40e_vsi *vsi); 1299 void i40e_dcbnl_setup(struct i40e_vsi *vsi); 1300 bool i40e_dcb_need_reconfig(struct i40e_pf *pf, 1301 struct i40e_dcbx_config *old_cfg, 1302 struct i40e_dcbx_config *new_cfg); 1303 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg); 1304 int i40e_dcb_sw_default_config(struct i40e_pf *pf); 1305 #endif /* CONFIG_I40E_DCB */ 1306 void i40e_ptp_rx_hang(struct i40e_pf *pf); 1307 void i40e_ptp_tx_hang(struct i40e_pf *pf); 1308 void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf); 1309 void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index); 1310 void i40e_ptp_set_increment(struct i40e_pf *pf); 1311 int i40e_ptp_hwtstamp_get(struct net_device *netdev, 1312 struct kernel_hwtstamp_config *config); 1313 int i40e_ptp_hwtstamp_set(struct net_device *netdev, 1314 struct kernel_hwtstamp_config *config, 1315 struct netlink_ext_ack *extack); 1316 void i40e_ptp_save_hw_time(struct i40e_pf *pf); 1317 void i40e_ptp_restore_hw_time(struct i40e_pf *pf); 1318 void i40e_ptp_init(struct i40e_pf *pf); 1319 void i40e_ptp_stop(struct i40e_pf *pf); 1320 int i40e_ptp_alloc_pins(struct i40e_pf *pf); 1321 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset); 1322 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi); 1323 int i40e_get_partition_bw_setting(struct i40e_pf *pf); 1324 int i40e_set_partition_bw_setting(struct i40e_pf *pf); 1325 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup); 1326 1327 void i40e_set_fec_in_flags(u8 fec_cfg, unsigned long *flags); 1328 1329 static inline bool i40e_enabled_xdp_vsi(struct i40e_vsi *vsi) 1330 { 1331 return !!READ_ONCE(vsi->xdp_prog); 1332 } 1333 1334 int i40e_create_queue_channel(struct i40e_vsi *vsi, struct i40e_channel *ch); 1335 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate); 1336 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi, 1337 struct i40e_cloud_filter *filter, 1338 bool add); 1339 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi, 1340 struct i40e_cloud_filter *filter, 1341 bool add); 1342 1343 /** 1344 * i40e_is_tc_mqprio_enabled - check if TC MQPRIO is enabled on PF 1345 * @pf: pointer to a pf. 1346 * 1347 * Check and return state of flag I40E_FLAG_TC_MQPRIO. 1348 * 1349 * Return: true/false if I40E_FLAG_TC_MQPRIO is set or not 1350 **/ 1351 static inline bool i40e_is_tc_mqprio_enabled(struct i40e_pf *pf) 1352 { 1353 return test_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags); 1354 } 1355 1356 /** 1357 * i40e_hw_to_pf - get pf pointer from the hardware structure 1358 * @hw: pointer to the device HW structure 1359 **/ 1360 static inline struct i40e_pf *i40e_hw_to_pf(struct i40e_hw *hw) 1361 { 1362 return container_of(hw, struct i40e_pf, hw); 1363 } 1364 1365 struct device *i40e_hw_to_dev(struct i40e_hw *hw); 1366 1367 /** 1368 * i40e_pf_get_vsi_by_seid - find VSI by SEID 1369 * @pf: pointer to a PF 1370 * @seid: SEID of the VSI 1371 **/ 1372 static inline struct i40e_vsi * 1373 i40e_pf_get_vsi_by_seid(struct i40e_pf *pf, u16 seid) 1374 { 1375 struct i40e_vsi *vsi; 1376 int i; 1377 1378 i40e_pf_for_each_vsi(pf, i, vsi) 1379 if (vsi->seid == seid) 1380 return vsi; 1381 1382 return NULL; 1383 } 1384 1385 /** 1386 * i40e_pf_get_main_vsi - get pointer to main VSI 1387 * @pf: pointer to a PF 1388 * 1389 * Return: pointer to main VSI or NULL if it does not exist 1390 **/ 1391 static inline struct i40e_vsi *i40e_pf_get_main_vsi(struct i40e_pf *pf) 1392 { 1393 return (pf->lan_vsi != I40E_NO_VSI) ? pf->vsi[pf->lan_vsi] : NULL; 1394 } 1395 1396 /** 1397 * i40e_pf_get_veb_by_seid - find VEB by SEID 1398 * @pf: pointer to a PF 1399 * @seid: SEID of the VSI 1400 **/ 1401 static inline struct i40e_veb * 1402 i40e_pf_get_veb_by_seid(struct i40e_pf *pf, u16 seid) 1403 { 1404 struct i40e_veb *veb; 1405 int i; 1406 1407 i40e_pf_for_each_veb(pf, i, veb) 1408 if (veb->seid == seid) 1409 return veb; 1410 1411 return NULL; 1412 } 1413 1414 /** 1415 * i40e_pf_get_main_veb - get pointer to main VEB 1416 * @pf: pointer to a PF 1417 * 1418 * Return: pointer to main VEB or NULL if it does not exist 1419 **/ 1420 static inline struct i40e_veb *i40e_pf_get_main_veb(struct i40e_pf *pf) 1421 { 1422 return (pf->lan_veb != I40E_NO_VEB) ? pf->veb[pf->lan_veb] : NULL; 1423 } 1424 1425 #endif /* _I40E_H_ */ 1426