1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * SPI bus driver for the Virtio SPI controller
4 * Copyright (C) 2023 OpenSynergy GmbH
5 * Copyright (C) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
6 */
7
8 #include <linux/completion.h>
9 #include <linux/interrupt.h>
10 #include <linux/io.h>
11 #include <linux/module.h>
12 #include <linux/spi/spi.h>
13 #include <linux/stddef.h>
14 #include <linux/virtio.h>
15 #include <linux/virtio_ring.h>
16 #include <linux/virtio_spi.h>
17
18 #define VIRTIO_SPI_MODE_MASK \
19 (SPI_MODE_X_MASK | SPI_CS_HIGH | SPI_LSB_FIRST)
20
21 struct virtio_spi_req {
22 struct completion completion;
23 const u8 *tx_buf;
24 u8 *rx_buf;
25 struct spi_transfer_head transfer_head ____cacheline_aligned;
26 struct spi_transfer_result result;
27 };
28
29 struct virtio_spi_priv {
30 /* The virtio device we're associated with */
31 struct virtio_device *vdev;
32 /* Pointer to the virtqueue */
33 struct virtqueue *vq;
34 /* Copy of config space mode_func_supported */
35 u32 mode_func_supported;
36 /* Copy of config space max_freq_hz */
37 u32 max_freq_hz;
38 };
39
virtio_spi_msg_done(struct virtqueue * vq)40 static void virtio_spi_msg_done(struct virtqueue *vq)
41 {
42 struct virtio_spi_req *req;
43 unsigned int len;
44
45 while ((req = virtqueue_get_buf(vq, &len)))
46 complete(&req->completion);
47 }
48
49 /*
50 * virtio_spi_set_delays - Set delay parameters for SPI transfer
51 *
52 * This function sets various delay parameters for SPI transfer,
53 * including delay after CS asserted, timing intervals between
54 * adjacent words within a transfer, delay before and after CS
55 * deasserted. It converts these delay parameters to nanoseconds
56 * using spi_delay_to_ns and stores the results in spi_transfer_head
57 * structure.
58 * If the conversion fails, the function logs a warning message and
59 * returns an error code.
60 * . . . . . . . . . .
61 * Delay + A + + B + + C + D + E + F + A +
62 * . . . . . . . . . .
63 * ___. . . . . . .___.___. .
64 * CS# |___.______.____.____.___.___| . |___._____________
65 * . . . . . . . . . .
66 * . . . . . . . . . .
67 * SCLK__.___.___NNN_____NNN__.___.___.___.___.___.___NNN_______
68 *
69 * NOTE: 1st transfer has two words, the delay between these two words are
70 * 'B' in the diagram.
71 *
72 * A => struct spi_device -> cs_setup
73 * B => max{struct spi_transfer -> word_delay, struct spi_device -> word_delay}
74 * Note: spi_device and spi_transfer both have word_delay, Linux
75 * choose the bigger one, refer to _spi_xfer_word_delay_update function
76 * C => struct spi_transfer -> delay
77 * D => struct spi_device -> cs_hold
78 * E => struct spi_device -> cs_inactive
79 * F => struct spi_transfer -> cs_change_delay
80 *
81 * So the corresponding relationship:
82 * A <===> cs_setup_ns (after CS asserted)
83 * B <===> word_delay_ns (delay between adjacent words within a transfer)
84 * C+D <===> cs_delay_hold_ns (before CS deasserted)
85 * E+F <===> cs_change_delay_inactive_ns (after CS deasserted, these two
86 * values are also recommended in the Linux driver to be added up)
87 */
virtio_spi_set_delays(struct spi_transfer_head * th,struct spi_device * spi,struct spi_transfer * xfer)88 static int virtio_spi_set_delays(struct spi_transfer_head *th,
89 struct spi_device *spi,
90 struct spi_transfer *xfer)
91 {
92 int cs_setup;
93 int cs_word_delay_xfer;
94 int cs_word_delay_spi;
95 int delay;
96 int cs_hold;
97 int cs_inactive;
98 int cs_change_delay;
99
100 cs_setup = spi_delay_to_ns(&spi->cs_setup, xfer);
101 if (cs_setup < 0) {
102 dev_warn(&spi->dev, "Cannot convert cs_setup\n");
103 return cs_setup;
104 }
105 th->cs_setup_ns = cpu_to_le32(cs_setup);
106
107 cs_word_delay_xfer = spi_delay_to_ns(&xfer->word_delay, xfer);
108 if (cs_word_delay_xfer < 0) {
109 dev_warn(&spi->dev, "Cannot convert cs_word_delay_xfer\n");
110 return cs_word_delay_xfer;
111 }
112 cs_word_delay_spi = spi_delay_to_ns(&spi->word_delay, xfer);
113 if (cs_word_delay_spi < 0) {
114 dev_warn(&spi->dev, "Cannot convert cs_word_delay_spi\n");
115 return cs_word_delay_spi;
116 }
117
118 th->word_delay_ns = cpu_to_le32(max(cs_word_delay_spi, cs_word_delay_xfer));
119
120 delay = spi_delay_to_ns(&xfer->delay, xfer);
121 if (delay < 0) {
122 dev_warn(&spi->dev, "Cannot convert delay\n");
123 return delay;
124 }
125 cs_hold = spi_delay_to_ns(&spi->cs_hold, xfer);
126 if (cs_hold < 0) {
127 dev_warn(&spi->dev, "Cannot convert cs_hold\n");
128 return cs_hold;
129 }
130 th->cs_delay_hold_ns = cpu_to_le32(delay + cs_hold);
131
132 cs_inactive = spi_delay_to_ns(&spi->cs_inactive, xfer);
133 if (cs_inactive < 0) {
134 dev_warn(&spi->dev, "Cannot convert cs_inactive\n");
135 return cs_inactive;
136 }
137 cs_change_delay = spi_delay_to_ns(&xfer->cs_change_delay, xfer);
138 if (cs_change_delay < 0) {
139 dev_warn(&spi->dev, "Cannot convert cs_change_delay\n");
140 return cs_change_delay;
141 }
142 th->cs_change_delay_inactive_ns =
143 cpu_to_le32(cs_inactive + cs_change_delay);
144
145 return 0;
146 }
147
virtio_spi_transfer_one(struct spi_controller * ctrl,struct spi_device * spi,struct spi_transfer * xfer)148 static int virtio_spi_transfer_one(struct spi_controller *ctrl,
149 struct spi_device *spi,
150 struct spi_transfer *xfer)
151 {
152 struct virtio_spi_priv *priv = spi_controller_get_devdata(ctrl);
153 struct spi_transfer_head *th;
154 struct scatterlist sg_out_head, sg_out_payload;
155 struct scatterlist sg_in_result, sg_in_payload;
156 struct scatterlist *sgs[4];
157 unsigned int outcnt = 0;
158 unsigned int incnt = 0;
159 int ret;
160
161 struct virtio_spi_req *spi_req __free(kfree) = kzalloc_obj(*spi_req);
162 if (!spi_req)
163 return -ENOMEM;
164
165 init_completion(&spi_req->completion);
166
167 th = &spi_req->transfer_head;
168
169 /* Fill struct spi_transfer_head */
170 th->chip_select_id = spi_get_chipselect(spi, 0);
171 th->bits_per_word = spi->bits_per_word;
172 th->cs_change = xfer->cs_change;
173 th->tx_nbits = xfer->tx_nbits;
174 th->rx_nbits = xfer->rx_nbits;
175 th->reserved[0] = 0;
176 th->reserved[1] = 0;
177 th->reserved[2] = 0;
178
179 static_assert(VIRTIO_SPI_CPHA == SPI_CPHA,
180 "VIRTIO_SPI_CPHA must match SPI_CPHA");
181 static_assert(VIRTIO_SPI_CPOL == SPI_CPOL,
182 "VIRTIO_SPI_CPOL must match SPI_CPOL");
183 static_assert(VIRTIO_SPI_CS_HIGH == SPI_CS_HIGH,
184 "VIRTIO_SPI_CS_HIGH must match SPI_CS_HIGH");
185 static_assert(VIRTIO_SPI_MODE_LSB_FIRST == SPI_LSB_FIRST,
186 "VIRTIO_SPI_MODE_LSB_FIRST must match SPI_LSB_FIRST");
187
188 th->mode = cpu_to_le32(spi->mode & VIRTIO_SPI_MODE_MASK);
189 if (spi->mode & SPI_LOOP)
190 th->mode |= cpu_to_le32(VIRTIO_SPI_MODE_LOOP);
191
192 th->freq = cpu_to_le32(xfer->speed_hz);
193
194 ret = virtio_spi_set_delays(th, spi, xfer);
195 if (ret)
196 goto msg_done;
197
198 /* Set buffers */
199 spi_req->tx_buf = xfer->tx_buf;
200 spi_req->rx_buf = xfer->rx_buf;
201
202 /* Prepare sending of virtio message */
203 init_completion(&spi_req->completion);
204
205 sg_init_one(&sg_out_head, th, sizeof(*th));
206 sgs[outcnt] = &sg_out_head;
207 outcnt++;
208
209 if (spi_req->tx_buf) {
210 sg_init_one(&sg_out_payload, spi_req->tx_buf, xfer->len);
211 sgs[outcnt] = &sg_out_payload;
212 outcnt++;
213 }
214
215 if (spi_req->rx_buf) {
216 sg_init_one(&sg_in_payload, spi_req->rx_buf, xfer->len);
217 sgs[outcnt] = &sg_in_payload;
218 incnt++;
219 }
220
221 sg_init_one(&sg_in_result, &spi_req->result,
222 sizeof(struct spi_transfer_result));
223 sgs[outcnt + incnt] = &sg_in_result;
224 incnt++;
225
226 ret = virtqueue_add_sgs(priv->vq, sgs, outcnt, incnt, spi_req,
227 GFP_KERNEL);
228 if (ret)
229 goto msg_done;
230
231 /* Simple implementation: There can be only one transfer in flight */
232 virtqueue_kick(priv->vq);
233
234 wait_for_completion(&spi_req->completion);
235
236 /* Read result from message and translate return code */
237 switch (spi_req->result.result) {
238 case VIRTIO_SPI_TRANS_OK:
239 break;
240 case VIRTIO_SPI_PARAM_ERR:
241 ret = -EINVAL;
242 break;
243 case VIRTIO_SPI_TRANS_ERR:
244 ret = -EIO;
245 break;
246 default:
247 ret = -EIO;
248 break;
249 }
250
251 msg_done:
252 if (ret)
253 ctrl->cur_msg->status = ret;
254
255 return ret;
256 }
257
virtio_spi_read_config(struct virtio_device * vdev)258 static void virtio_spi_read_config(struct virtio_device *vdev)
259 {
260 struct spi_controller *ctrl = dev_get_drvdata(&vdev->dev);
261 struct virtio_spi_priv *priv = vdev->priv;
262 u8 cs_max_number;
263 u8 tx_nbits_supported;
264 u8 rx_nbits_supported;
265
266 cs_max_number = virtio_cread8(vdev, offsetof(struct virtio_spi_config,
267 cs_max_number));
268 ctrl->num_chipselect = cs_max_number;
269
270 /* Set the mode bits which are understood by this driver */
271 priv->mode_func_supported =
272 virtio_cread32(vdev, offsetof(struct virtio_spi_config,
273 mode_func_supported));
274 ctrl->mode_bits = priv->mode_func_supported &
275 (VIRTIO_SPI_CS_HIGH | VIRTIO_SPI_MODE_LSB_FIRST);
276 if (priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPHA_1)
277 ctrl->mode_bits |= VIRTIO_SPI_CPHA;
278 if (priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_CPOL_1)
279 ctrl->mode_bits |= VIRTIO_SPI_CPOL;
280 if (priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LSB_FIRST)
281 ctrl->mode_bits |= SPI_LSB_FIRST;
282 if (priv->mode_func_supported & VIRTIO_SPI_MF_SUPPORT_LOOPBACK)
283 ctrl->mode_bits |= SPI_LOOP;
284 tx_nbits_supported =
285 virtio_cread8(vdev, offsetof(struct virtio_spi_config,
286 tx_nbits_supported));
287 if (tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL)
288 ctrl->mode_bits |= SPI_TX_DUAL;
289 if (tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD)
290 ctrl->mode_bits |= SPI_TX_QUAD;
291 if (tx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL)
292 ctrl->mode_bits |= SPI_TX_OCTAL;
293 rx_nbits_supported =
294 virtio_cread8(vdev, offsetof(struct virtio_spi_config,
295 rx_nbits_supported));
296 if (rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_DUAL)
297 ctrl->mode_bits |= SPI_RX_DUAL;
298 if (rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_QUAD)
299 ctrl->mode_bits |= SPI_RX_QUAD;
300 if (rx_nbits_supported & VIRTIO_SPI_RX_TX_SUPPORT_OCTAL)
301 ctrl->mode_bits |= SPI_RX_OCTAL;
302
303 ctrl->bits_per_word_mask =
304 virtio_cread32(vdev, offsetof(struct virtio_spi_config,
305 bits_per_word_mask));
306
307 priv->max_freq_hz =
308 virtio_cread32(vdev, offsetof(struct virtio_spi_config,
309 max_freq_hz));
310 }
311
virtio_spi_find_vqs(struct virtio_spi_priv * priv)312 static int virtio_spi_find_vqs(struct virtio_spi_priv *priv)
313 {
314 struct virtqueue *vq;
315
316 vq = virtio_find_single_vq(priv->vdev, virtio_spi_msg_done, "spi-rq");
317 if (IS_ERR(vq))
318 return PTR_ERR(vq);
319 priv->vq = vq;
320 return 0;
321 }
322
323 /* Function must not be called before virtio_spi_find_vqs() has been run */
virtio_spi_del_vq(void * data)324 static void virtio_spi_del_vq(void *data)
325 {
326 struct virtio_device *vdev = data;
327
328 virtio_reset_device(vdev);
329 vdev->config->del_vqs(vdev);
330 }
331
virtio_spi_probe(struct virtio_device * vdev)332 static int virtio_spi_probe(struct virtio_device *vdev)
333 {
334 struct virtio_spi_priv *priv;
335 struct spi_controller *ctrl;
336 int ret;
337
338 ctrl = devm_spi_alloc_host(&vdev->dev, sizeof(*priv));
339 if (!ctrl)
340 return -ENOMEM;
341
342 priv = spi_controller_get_devdata(ctrl);
343 priv->vdev = vdev;
344 vdev->priv = priv;
345
346 dev_set_drvdata(&vdev->dev, ctrl);
347
348 virtio_spi_read_config(vdev);
349
350 ctrl->transfer_one = virtio_spi_transfer_one;
351
352 ret = virtio_spi_find_vqs(priv);
353 if (ret)
354 return dev_err_probe(&vdev->dev, ret, "Cannot setup virtqueues\n");
355
356 /* Register cleanup for virtqueues using devm */
357 ret = devm_add_action_or_reset(&vdev->dev, virtio_spi_del_vq, vdev);
358 if (ret)
359 return dev_err_probe(&vdev->dev, ret, "Cannot register virtqueue cleanup\n");
360
361 /* Use devm version to register controller */
362 ret = devm_spi_register_controller(&vdev->dev, ctrl);
363 if (ret)
364 return dev_err_probe(&vdev->dev, ret, "Cannot register controller\n");
365
366 return 0;
367 }
368
virtio_spi_freeze(struct device * dev)369 static int virtio_spi_freeze(struct device *dev)
370 {
371 struct spi_controller *ctrl = dev_get_drvdata(dev);
372 struct virtio_device *vdev = dev_to_virtio(dev);
373 int ret;
374
375 ret = spi_controller_suspend(ctrl);
376 if (ret) {
377 dev_warn(dev, "cannot suspend controller (%d)\n", ret);
378 return ret;
379 }
380
381 virtio_spi_del_vq(vdev);
382 return 0;
383 }
384
virtio_spi_restore(struct device * dev)385 static int virtio_spi_restore(struct device *dev)
386 {
387 struct spi_controller *ctrl = dev_get_drvdata(dev);
388 struct virtio_device *vdev = dev_to_virtio(dev);
389 int ret;
390
391 ret = virtio_spi_find_vqs(vdev->priv);
392 if (ret) {
393 dev_err(dev, "problem starting vqueue (%d)\n", ret);
394 return ret;
395 }
396
397 ret = spi_controller_resume(ctrl);
398 if (ret)
399 dev_err(dev, "problem resuming controller (%d)\n", ret);
400
401 return ret;
402 }
403
404 static struct virtio_device_id virtio_spi_id_table[] = {
405 { VIRTIO_ID_SPI, VIRTIO_DEV_ANY_ID },
406 {}
407 };
408 MODULE_DEVICE_TABLE(virtio, virtio_spi_id_table);
409
410 static const struct dev_pm_ops virtio_spi_pm_ops = {
411 .freeze = pm_sleep_ptr(virtio_spi_freeze),
412 .restore = pm_sleep_ptr(virtio_spi_restore),
413 };
414
415 static struct virtio_driver virtio_spi_driver = {
416 .driver = {
417 .name = KBUILD_MODNAME,
418 .pm = &virtio_spi_pm_ops,
419 },
420 .id_table = virtio_spi_id_table,
421 .probe = virtio_spi_probe,
422 };
423 module_virtio_driver(virtio_spi_driver);
424
425 MODULE_AUTHOR("OpenSynergy GmbH");
426 MODULE_AUTHOR("Haixu Cui <quic_haixcui@quicinc.com>");
427 MODULE_LICENSE("GPL");
428 MODULE_DESCRIPTION("Virtio SPI bus driver");
429